annotate gcc/config/rs6000/rs6000-modes.def @ 111:04ced10e8804

gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
parents f6334be47118
children 84e7813d76e9
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1 /* Definitions of target machine for GNU compiler, for IBM RS/6000.
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2 Copyright (C) 2002-2017 Free Software Foundation, Inc.
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3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
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4
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5 This file is part of GCC.
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6
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7 GCC is free software; you can redistribute it and/or modify it
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8 under the terms of the GNU General Public License as published
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9 by the Free Software Foundation; either version 3, or (at your
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10 option) any later version.
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11
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12 GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 License for more details.
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16
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17 You should have received a copy of the GNU General Public License
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18 along with GCC; see the file COPYING3. If not see
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19 <http://www.gnu.org/licenses/>. */
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20
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21 /* IBM 128-bit floating point. IFmode and KFmode use the fractional float
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22 support in order to declare 3 128-bit floating point types. */
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23 FRACTIONAL_FLOAT_MODE (IF, 106, 16, ibm_extended_format);
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24
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25 /* Explicit IEEE 128-bit floating point. */
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26 FRACTIONAL_FLOAT_MODE (KF, 113, 16, ieee_quad_format);
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27
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28 /* 128-bit floating point. ABI_V4 uses IEEE quad, AIX/Darwin
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f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
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29 adjust this in rs6000_option_override_internal. */
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30 FLOAT_MODE (TF, 16, ieee_quad_format);
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32 /* Add any extra modes needed to represent the condition code.
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33
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34 For the RS/6000, we need separate modes when unsigned (logical) comparisons
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35 are being done and we need a separate mode for floating-point. We also
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36 use a mode for the case when we are comparing the results of two
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37 comparisons, as then only the EQ bit is valid in the register. */
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39 CC_MODE (CCUNS);
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40 CC_MODE (CCFP);
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41 CC_MODE (CCEQ);
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42
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43 /* Vector modes. */
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44
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45 /* VMX/VSX. */
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46 VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */
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47 VECTOR_MODE (INT, TI, 1); /* V1TI */
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48 VECTOR_MODES (FLOAT, 16); /* V8HF V4SF V2DF */
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49
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50 /* Two VMX/VSX vectors (for permute, select, concat, etc.) */
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51 VECTOR_MODES (INT, 32); /* V32QI V16HI V8SI V4DI */
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52 VECTOR_MODES (FLOAT, 32); /* V16HF V8SF V4DF */
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53
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54 /* Paired single. */
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55 VECTOR_MODE (FLOAT, SF, 2); /* The only valid paired-single mode. */
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56 VECTOR_MODE (INT, SI, 2); /* For paired-single permutes. */
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57
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58 /* Replacement for TImode that only is allowed in GPRs. We also use PTImode
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59 for quad memory atomic operations to force getting an even/odd register
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60 combination. */
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61 PARTIAL_INT_MODE (TI, 128, PTI);