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1 /* { dg-do compile } */
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2 /* { dg-options "-O -mbig-endian -fno-shrink-wrap -fno-stack-clash-protection -g" } */
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3 /* { dg-final { check-function-bodies "**" "" } } */
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4
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5 #pragma GCC aarch64 "arm_sve.h"
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6
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7 /*
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8 ** test_1:
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9 ** addvl sp, sp, #-17
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10 ** str p4, \[sp\]
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11 ** str p5, \[sp, #1, mul vl\]
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12 ** str p6, \[sp, #2, mul vl\]
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13 ** str p7, \[sp, #3, mul vl\]
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14 ** str p8, \[sp, #4, mul vl\]
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15 ** str p9, \[sp, #5, mul vl\]
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16 ** str p10, \[sp, #6, mul vl\]
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17 ** str p11, \[sp, #7, mul vl\]
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18 ** ptrue p1\.b, all
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19 ** st1d z8\.d, p1, \[sp, #1, mul vl\]
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20 ** st1d z9\.d, p1, \[sp, #2, mul vl\]
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21 ** st1d z10\.d, p1, \[sp, #3, mul vl\]
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22 ** st1d z11\.d, p1, \[sp, #4, mul vl\]
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23 ** st1d z12\.d, p1, \[sp, #5, mul vl\]
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24 ** st1d z13\.d, p1, \[sp, #6, mul vl\]
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25 ** st1d z14\.d, p1, \[sp, #7, mul vl\]
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26 ** addvl x11, sp, #16
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27 ** st1d z15\.d, p1, \[x11, #-8, mul vl\]
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28 ** str z16, \[sp, #9, mul vl\]
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29 ** str z17, \[sp, #10, mul vl\]
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30 ** str z18, \[sp, #11, mul vl\]
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31 ** str z19, \[sp, #12, mul vl\]
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32 ** str z20, \[sp, #13, mul vl\]
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33 ** str z21, \[sp, #14, mul vl\]
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34 ** str z22, \[sp, #15, mul vl\]
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35 ** str z23, \[sp, #16, mul vl\]
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36 ** ptrue p0\.b, all
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37 ** ptrue p1\.b, all
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38 ** ld1d z8\.d, p1/z, \[sp, #1, mul vl\]
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39 ** ld1d z9\.d, p1/z, \[sp, #2, mul vl\]
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40 ** ld1d z10\.d, p1/z, \[sp, #3, mul vl\]
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41 ** ld1d z11\.d, p1/z, \[sp, #4, mul vl\]
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42 ** ld1d z12\.d, p1/z, \[sp, #5, mul vl\]
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43 ** ld1d z13\.d, p1/z, \[sp, #6, mul vl\]
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44 ** ld1d z14\.d, p1/z, \[sp, #7, mul vl\]
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45 ** addvl x11, sp, #16
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46 ** ld1d z15\.d, p1/z, \[x11, #-8, mul vl\]
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47 ** ldr z16, \[sp, #9, mul vl\]
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48 ** ldr z17, \[sp, #10, mul vl\]
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49 ** ldr z18, \[sp, #11, mul vl\]
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50 ** ldr z19, \[sp, #12, mul vl\]
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51 ** ldr z20, \[sp, #13, mul vl\]
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52 ** ldr z21, \[sp, #14, mul vl\]
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53 ** ldr z22, \[sp, #15, mul vl\]
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54 ** ldr z23, \[sp, #16, mul vl\]
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55 ** ldr p4, \[sp\]
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56 ** ldr p5, \[sp, #1, mul vl\]
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57 ** ldr p6, \[sp, #2, mul vl\]
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58 ** ldr p7, \[sp, #3, mul vl\]
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59 ** ldr p8, \[sp, #4, mul vl\]
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60 ** ldr p9, \[sp, #5, mul vl\]
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61 ** ldr p10, \[sp, #6, mul vl\]
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62 ** ldr p11, \[sp, #7, mul vl\]
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63 ** addvl sp, sp, #17
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64 ** ret
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65 */
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66 svbool_t
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67 test_1 (void)
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68 {
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69 asm volatile ("" :::
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70 "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7",
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71 "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15",
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72 "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23",
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73 "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31",
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74 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
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75 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15");
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76 return svptrue_b8 ();
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77 }
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78
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79 /*
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80 ** test_2:
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81 ** ptrue p0\.b, all
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82 ** ret
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83 */
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84 svbool_t
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85 test_2 (void)
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86 {
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87 asm volatile ("" :::
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88 "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7",
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89 "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31",
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90 "p0", "p1", "p2", "p3", "p12", "p13", "p14", "p15");
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91 return svptrue_b8 ();
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92 }
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93
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94 /*
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95 ** test_3:
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96 ** addvl sp, sp, #-6
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97 ** str p5, \[sp\]
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98 ** str p6, \[sp, #1, mul vl\]
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99 ** str p11, \[sp, #2, mul vl\]
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100 ** ptrue p1\.b, all
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101 ** st1d z8\.d, p1, \[sp, #1, mul vl\]
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102 ** st1d z13\.d, p1, \[sp, #2, mul vl\]
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103 ** str z19, \[sp, #3, mul vl\]
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104 ** str z20, \[sp, #4, mul vl\]
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105 ** str z22, \[sp, #5, mul vl\]
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106 ** ptrue p0\.b, all
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107 ** ptrue p1\.b, all
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108 ** ld1d z8\.d, p1/z, \[sp, #1, mul vl\]
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109 ** ld1d z13\.d, p1/z, \[sp, #2, mul vl\]
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110 ** ldr z19, \[sp, #3, mul vl\]
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111 ** ldr z20, \[sp, #4, mul vl\]
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112 ** ldr z22, \[sp, #5, mul vl\]
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113 ** ldr p5, \[sp\]
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114 ** ldr p6, \[sp, #1, mul vl\]
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115 ** ldr p11, \[sp, #2, mul vl\]
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116 ** addvl sp, sp, #6
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117 ** ret
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118 */
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119 svbool_t
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120 test_3 (void)
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121 {
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122 asm volatile ("" :::
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123 "z8", "z13", "z19", "z20", "z22",
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124 "p5", "p6", "p11");
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125 return svptrue_b8 ();
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126 }
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127
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128 /*
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129 ** test_4:
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130 ** addvl sp, sp, #-1
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131 ** str p4, \[sp\]
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132 ** ptrue p0\.b, all
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133 ** ldr p4, \[sp\]
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134 ** addvl sp, sp, #1
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135 ** ret
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136 */
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137 svbool_t
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138 test_4 (void)
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139 {
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140 asm volatile ("" ::: "p4");
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141 return svptrue_b8 ();
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142 }
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143
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144 /*
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145 ** test_5:
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146 ** addvl sp, sp, #-1
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147 ** ptrue p1\.b, all
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148 ** st1d z15\.d, p1, \[sp\]
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149 ** ptrue p0\.b, all
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150 ** ptrue p1\.b, all
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151 ** ld1d z15\.d, p1/z, \[sp\]
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152 ** addvl sp, sp, #1
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153 ** ret
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154 */
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155 svbool_t
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156 test_5 (void)
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157 {
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158 asm volatile ("" ::: "z15");
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159 return svptrue_b8 ();
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160 }
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161
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162 /*
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163 ** test_6:
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164 ** addvl sp, sp, #-2
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165 ** str p4, \[sp\]
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166 ** ptrue p4\.b, all
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167 ** st1d z15\.d, p4, \[sp, #1, mul vl\]
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168 ** mov z0\.b, #1
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169 ** ptrue p4\.b, all
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170 ** ld1d z15\.d, p4/z, \[sp, #1, mul vl\]
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171 ** ldr p4, \[sp\]
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172 ** addvl sp, sp, #2
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173 ** ret
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174 */
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175 svint8_t
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176 test_6 (svbool_t p0, svbool_t p1, svbool_t p2, svbool_t p3)
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177 {
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178 asm volatile ("" :: "Upa" (p0), "Upa" (p1), "Upa" (p2), "Upa" (p3) : "z15");
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179 return svdup_s8 (1);
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180 }
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181
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182 /*
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183 ** test_7:
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184 ** addvl sp, sp, #-1
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185 ** str z16, \[sp\]
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186 ** ptrue p0\.b, all
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187 ** ldr z16, \[sp\]
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188 ** addvl sp, sp, #1
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189 ** ret
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190 */
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191 svbool_t
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192 test_7 (void)
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193 {
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194 asm volatile ("" ::: "z16");
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195 return svptrue_b8 ();
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196 }
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