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1 /* Copyright (C) 2006, 2009 Free Software Foundation, Inc.
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2
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3 This file is free software; you can redistribute it and/or modify it
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4 under the terms of the GNU General Public License as published by the
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5 Free Software Foundation; either version 3, or (at your option) any
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6 later version.
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7
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8 This file is distributed in the hope that it will be useful, but
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9 WITHOUT ANY WARRANTY; without even the implied warranty of
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10 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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11 General Public License for more details.
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12
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13 Under Section 7 of GPL version 3, you are granted additional
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14 permissions described in the GCC Runtime Library Exception, version
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15 3.1, as published by the Free Software Foundation.
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16
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17 You should have received a copy of the GNU General Public License and
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18 a copy of the GCC Runtime Library Exception along with this program;
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19 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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20 <http://www.gnu.org/licenses/>. */
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21
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22 /* Moderately Space-optimized libgcc routines for the Renesas SH /
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23 STMicroelectronics ST40 CPUs.
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24 Contributed by J"orn Rennecke joern.rennecke@st.com. */
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25
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26 #include "lib1funcs.h"
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27
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28 #if !__SHMEDIA__
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29 #ifdef L_udivsi3_i4i
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30
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31 /* 88 bytes; sh4-200 cycle counts:
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32 divisor >= 2G: 11 cycles
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33 dividend < 2G: 48 cycles
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34 dividend >= 2G: divisor != 1: 54 cycles
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35 dividend >= 2G, divisor == 1: 22 cycles */
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36 #if defined (__SH_FPU_DOUBLE__) || defined (__SH4_SINGLE_ONLY__)
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37 !! args in r4 and r5, result in r0, clobber r1
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38
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39 .global GLOBAL(udivsi3_i4i)
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40 FUNC(GLOBAL(udivsi3_i4i))
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41 GLOBAL(udivsi3_i4i):
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42 mova L1,r0
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43 cmp/pz r5
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44 sts fpscr,r1
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45 lds.l @r0+,fpscr
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46 sts.l fpul,@-r15
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47 bf LOCAL(huge_divisor)
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48 mov.l r1,@-r15
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49 lds r4,fpul
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50 cmp/pz r4
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51 #ifdef FMOVD_WORKS
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52 fmov.d dr0,@-r15
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53 float fpul,dr0
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54 fmov.d dr2,@-r15
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55 bt LOCAL(dividend_adjusted)
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56 mov #1,r1
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57 fmov.d @r0,dr2
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58 cmp/eq r1,r5
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59 bt LOCAL(div_by_1)
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60 fadd dr2,dr0
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61 LOCAL(dividend_adjusted):
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62 lds r5,fpul
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63 float fpul,dr2
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64 fdiv dr2,dr0
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65 LOCAL(div_by_1):
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66 fmov.d @r15+,dr2
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67 ftrc dr0,fpul
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68 fmov.d @r15+,dr0
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69 #else /* !FMOVD_WORKS */
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70 fmov.s DR01,@-r15
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71 mov #1,r1
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72 fmov.s DR00,@-r15
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73 float fpul,dr0
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74 fmov.s DR21,@-r15
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75 bt/s LOCAL(dividend_adjusted)
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76 fmov.s DR20,@-r15
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77 cmp/eq r1,r5
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78 bt LOCAL(div_by_1)
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79 fmov.s @r0+,DR20
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80 fmov.s @r0,DR21
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81 fadd dr2,dr0
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82 LOCAL(dividend_adjusted):
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83 lds r5,fpul
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84 float fpul,dr2
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85 fdiv dr2,dr0
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86 LOCAL(div_by_1):
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87 fmov.s @r15+,DR20
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88 fmov.s @r15+,DR21
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89 ftrc dr0,fpul
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90 fmov.s @r15+,DR00
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91 fmov.s @r15+,DR01
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92 #endif /* !FMOVD_WORKS */
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93 lds.l @r15+,fpscr
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94 sts fpul,r0
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95 rts
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96 lds.l @r15+,fpul
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97
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98 #ifdef FMOVD_WORKS
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99 .p2align 3 ! make double below 8 byte aligned.
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100 #endif
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101 LOCAL(huge_divisor):
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102 lds r1,fpscr
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103 add #4,r15
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104 cmp/hs r5,r4
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105 rts
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106 movt r0
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107
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108 .p2align 2
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109 L1:
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110 #ifndef FMOVD_WORKS
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111 .long 0x80000
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112 #else
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113 .long 0x180000
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114 #endif
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115 .double 4294967296
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116
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117 ENDFUNC(GLOBAL(udivsi3_i4i))
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118 #elif !defined (__sh1__) /* !__SH_FPU_DOUBLE__ */
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119
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120 #if 0
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121 /* With 36 bytes, the following would probably be the most compact
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122 implementation, but with 139 cycles on an sh4-200, it is extremely slow. */
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123 GLOBAL(udivsi3_i4i):
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124 mov.l r2,@-r15
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125 mov #0,r1
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126 div0u
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127 mov r1,r2
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128 mov.l r3,@-r15
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129 mov r1,r3
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130 sett
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131 mov r4,r0
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132 LOCAL(loop):
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133 rotcr r2
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134 ;
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135 bt/s LOCAL(end)
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136 cmp/gt r2,r3
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137 rotcl r0
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138 bra LOCAL(loop)
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139 div1 r5,r1
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140 LOCAL(end):
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141 rotcl r0
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142 mov.l @r15+,r3
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143 rts
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144 mov.l @r15+,r2
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145 #endif /* 0 */
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146
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147 /* Size: 186 bytes jointly for udivsi3_i4i and sdivsi3_i4i
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148 sh4-200 run times:
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149 udiv small divisor: 55 cycles
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150 udiv large divisor: 52 cycles
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151 sdiv small divisor, positive result: 59 cycles
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152 sdiv large divisor, positive result: 56 cycles
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153 sdiv small divisor, negative result: 65 cycles (*)
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154 sdiv large divisor, negative result: 62 cycles (*)
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155 (*): r2 is restored in the rts delay slot and has a lingering latency
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156 of two more cycles. */
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157 .balign 4
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158 .global GLOBAL(udivsi3_i4i)
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159 FUNC(GLOBAL(udivsi3_i4i))
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160 FUNC(GLOBAL(sdivsi3_i4i))
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161 GLOBAL(udivsi3_i4i):
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162 sts pr,r1
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163 mov.l r4,@-r15
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164 extu.w r5,r0
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165 cmp/eq r5,r0
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166 swap.w r4,r0
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167 shlr16 r4
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168 bf/s LOCAL(large_divisor)
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169 div0u
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170 mov.l r5,@-r15
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171 shll16 r5
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172 LOCAL(sdiv_small_divisor):
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173 div1 r5,r4
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174 bsr LOCAL(div6)
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175 div1 r5,r4
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176 div1 r5,r4
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177 bsr LOCAL(div6)
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178 div1 r5,r4
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179 xtrct r4,r0
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180 xtrct r0,r4
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181 bsr LOCAL(div7)
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182 swap.w r4,r4
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183 div1 r5,r4
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184 bsr LOCAL(div7)
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185 div1 r5,r4
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186 xtrct r4,r0
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187 mov.l @r15+,r5
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188 swap.w r0,r0
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189 mov.l @r15+,r4
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190 jmp @r1
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191 rotcl r0
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192 LOCAL(div7):
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193 div1 r5,r4
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194 LOCAL(div6):
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195 div1 r5,r4; div1 r5,r4; div1 r5,r4
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196 div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
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197
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198 LOCAL(divx3):
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199 rotcl r0
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200 div1 r5,r4
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201 rotcl r0
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202 div1 r5,r4
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203 rotcl r0
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204 rts
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205 div1 r5,r4
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206
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207 LOCAL(large_divisor):
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208 mov.l r5,@-r15
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209 LOCAL(sdiv_large_divisor):
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210 xor r4,r0
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211 .rept 4
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212 rotcl r0
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213 bsr LOCAL(divx3)
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214 div1 r5,r4
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215 .endr
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216 mov.l @r15+,r5
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217 mov.l @r15+,r4
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218 jmp @r1
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219 rotcl r0
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220 ENDFUNC(GLOBAL(udivsi3_i4i))
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221
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222 .global GLOBAL(sdivsi3_i4i)
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223 GLOBAL(sdivsi3_i4i):
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224 mov.l r4,@-r15
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225 cmp/pz r5
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226 mov.l r5,@-r15
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227 bt/s LOCAL(pos_divisor)
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228 cmp/pz r4
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229 neg r5,r5
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230 extu.w r5,r0
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231 bt/s LOCAL(neg_result)
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232 cmp/eq r5,r0
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233 neg r4,r4
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234 LOCAL(pos_result):
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235 swap.w r4,r0
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236 bra LOCAL(sdiv_check_divisor)
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237 sts pr,r1
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238 LOCAL(pos_divisor):
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239 extu.w r5,r0
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240 bt/s LOCAL(pos_result)
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241 cmp/eq r5,r0
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242 neg r4,r4
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243 LOCAL(neg_result):
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244 mova LOCAL(negate_result),r0
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245 ;
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246 mov r0,r1
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247 swap.w r4,r0
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248 lds r2,macl
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249 sts pr,r2
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250 LOCAL(sdiv_check_divisor):
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251 shlr16 r4
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252 bf/s LOCAL(sdiv_large_divisor)
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253 div0u
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254 bra LOCAL(sdiv_small_divisor)
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255 shll16 r5
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256 .balign 4
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257 LOCAL(negate_result):
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258 neg r0,r0
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259 jmp @r2
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260 sts macl,r2
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261 ENDFUNC(GLOBAL(sdivsi3_i4i))
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262 #endif /* !__SH_FPU_DOUBLE__ */
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263 #endif /* L_udivsi3_i4i */
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264
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265 #ifdef L_sdivsi3_i4i
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266 #if defined (__SH_FPU_DOUBLE__) || defined (__SH4_SINGLE_ONLY__)
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267 /* 48 bytes, 45 cycles on sh4-200 */
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268 !! args in r4 and r5, result in r0, clobber r1
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269
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270 .global GLOBAL(sdivsi3_i4i)
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271 FUNC(GLOBAL(sdivsi3_i4i))
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272 GLOBAL(sdivsi3_i4i):
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273 sts.l fpscr,@-r15
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274 sts fpul,r1
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275 mova L1,r0
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276 lds.l @r0+,fpscr
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277 lds r4,fpul
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278 #ifdef FMOVD_WORKS
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279 fmov.d dr0,@-r15
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280 float fpul,dr0
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281 lds r5,fpul
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282 fmov.d dr2,@-r15
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283 #else
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284 fmov.s DR01,@-r15
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285 fmov.s DR00,@-r15
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286 float fpul,dr0
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287 lds r5,fpul
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288 fmov.s DR21,@-r15
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289 fmov.s DR20,@-r15
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290 #endif
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291 float fpul,dr2
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292 fdiv dr2,dr0
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293 #ifdef FMOVD_WORKS
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294 fmov.d @r15+,dr2
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295 #else
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296 fmov.s @r15+,DR20
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297 fmov.s @r15+,DR21
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298 #endif
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299 ftrc dr0,fpul
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300 #ifdef FMOVD_WORKS
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301 fmov.d @r15+,dr0
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302 #else
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303 fmov.s @r15+,DR00
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304 fmov.s @r15+,DR01
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305 #endif
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306 lds.l @r15+,fpscr
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307 sts fpul,r0
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308 rts
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309 lds r1,fpul
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310
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311 .p2align 2
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312 L1:
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313 #ifndef FMOVD_WORKS
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314 .long 0x80000
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315 #else
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316 .long 0x180000
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317 #endif
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318
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319 ENDFUNC(GLOBAL(sdivsi3_i4i))
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320 #endif /* __SH_FPU_DOUBLE__ */
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321 #endif /* L_sdivsi3_i4i */
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322 #endif /* !__SHMEDIA__ */
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