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annotate include/xtensa-config.h @ 76:6381ea127240

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call argument iterator fix
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Tue, 20 Sep 2011 16:58:47 +0900
parents f6334be47118
children 04ced10e8804
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1 /* Xtensa configuration settings.
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2 Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010
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3 Free Software Foundation, Inc.
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4 Contributed by Bob Wilson (bob.wilson@acm.org) at Tensilica.
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5
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6 This program is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2, or (at your option)
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9 any later version.
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11 This program is distributed in the hope that it will be useful, but
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12 WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with this program; if not, write to the Free Software
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18 Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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19
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20 #ifndef XTENSA_CONFIG_H
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21 #define XTENSA_CONFIG_H
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22
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23 /* The macros defined here match those with the same names in the Xtensa
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24 compile-time HAL (Hardware Abstraction Layer). Please refer to the
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25 Xtensa System Software Reference Manual for documentation of these
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26 macros. */
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27
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28 #undef XCHAL_HAVE_BE
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29 #define XCHAL_HAVE_BE 1
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31 #undef XCHAL_HAVE_DENSITY
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32 #define XCHAL_HAVE_DENSITY 1
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33
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34 #undef XCHAL_HAVE_CONST16
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35 #define XCHAL_HAVE_CONST16 0
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36
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37 #undef XCHAL_HAVE_ABS
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38 #define XCHAL_HAVE_ABS 1
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39
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40 #undef XCHAL_HAVE_ADDX
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41 #define XCHAL_HAVE_ADDX 1
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42
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43 #undef XCHAL_HAVE_L32R
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44 #define XCHAL_HAVE_L32R 1
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45
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46 #undef XSHAL_USE_ABSOLUTE_LITERALS
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47 #define XSHAL_USE_ABSOLUTE_LITERALS 0
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48
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49 #undef XSHAL_HAVE_TEXT_SECTION_LITERALS
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50 #define XSHAL_HAVE_TEXT_SECTION_LITERALS 1 /* Set if there is some memory that allows both code and literals. */
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51
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52 #undef XCHAL_HAVE_MAC16
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53 #define XCHAL_HAVE_MAC16 0
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54
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55 #undef XCHAL_HAVE_MUL16
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56 #define XCHAL_HAVE_MUL16 1
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57
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58 #undef XCHAL_HAVE_MUL32
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59 #define XCHAL_HAVE_MUL32 1
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60
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61 #undef XCHAL_HAVE_MUL32_HIGH
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62 #define XCHAL_HAVE_MUL32_HIGH 0
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63
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64 #undef XCHAL_HAVE_DIV32
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65 #define XCHAL_HAVE_DIV32 1
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67 #undef XCHAL_HAVE_NSA
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68 #define XCHAL_HAVE_NSA 1
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69
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70 #undef XCHAL_HAVE_MINMAX
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71 #define XCHAL_HAVE_MINMAX 1
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72
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73 #undef XCHAL_HAVE_SEXT
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74 #define XCHAL_HAVE_SEXT 1
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75
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76 #undef XCHAL_HAVE_LOOPS
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77 #define XCHAL_HAVE_LOOPS 1
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78
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79 #undef XCHAL_HAVE_THREADPTR
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80 #define XCHAL_HAVE_THREADPTR 1
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81
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82 #undef XCHAL_HAVE_RELEASE_SYNC
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83 #define XCHAL_HAVE_RELEASE_SYNC 1
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84
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85 #undef XCHAL_HAVE_S32C1I
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86 #define XCHAL_HAVE_S32C1I 1
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87
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88 #undef XCHAL_HAVE_BOOLEANS
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89 #define XCHAL_HAVE_BOOLEANS 0
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90
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91 #undef XCHAL_HAVE_FP
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92 #define XCHAL_HAVE_FP 0
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93
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94 #undef XCHAL_HAVE_FP_DIV
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95 #define XCHAL_HAVE_FP_DIV 0
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96
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97 #undef XCHAL_HAVE_FP_RECIP
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98 #define XCHAL_HAVE_FP_RECIP 0
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99
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100 #undef XCHAL_HAVE_FP_SQRT
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101 #define XCHAL_HAVE_FP_SQRT 0
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102
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103 #undef XCHAL_HAVE_FP_RSQRT
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104 #define XCHAL_HAVE_FP_RSQRT 0
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105
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106 #undef XCHAL_HAVE_DFP_accel
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107 #define XCHAL_HAVE_DFP_accel 0
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108 #undef XCHAL_HAVE_WINDOWED
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109 #define XCHAL_HAVE_WINDOWED 1
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110
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111 #undef XCHAL_NUM_AREGS
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112 #define XCHAL_NUM_AREGS 32
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113
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114 #undef XCHAL_HAVE_WIDE_BRANCHES
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115 #define XCHAL_HAVE_WIDE_BRANCHES 0
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116
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117 #undef XCHAL_HAVE_PREDICTED_BRANCHES
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118 #define XCHAL_HAVE_PREDICTED_BRANCHES 0
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119
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120
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121 #undef XCHAL_ICACHE_SIZE
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122 #define XCHAL_ICACHE_SIZE 16384
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123
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124 #undef XCHAL_DCACHE_SIZE
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125 #define XCHAL_DCACHE_SIZE 16384
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126
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127 #undef XCHAL_ICACHE_LINESIZE
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128 #define XCHAL_ICACHE_LINESIZE 32
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129
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130 #undef XCHAL_DCACHE_LINESIZE
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131 #define XCHAL_DCACHE_LINESIZE 32
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132
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133 #undef XCHAL_ICACHE_LINEWIDTH
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134 #define XCHAL_ICACHE_LINEWIDTH 5
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135
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136 #undef XCHAL_DCACHE_LINEWIDTH
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137 #define XCHAL_DCACHE_LINEWIDTH 5
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138
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139 #undef XCHAL_DCACHE_IS_WRITEBACK
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140 #define XCHAL_DCACHE_IS_WRITEBACK 1
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141
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142
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143 #undef XCHAL_HAVE_MMU
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144 #define XCHAL_HAVE_MMU 1
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145
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146 #undef XCHAL_MMU_MIN_PTE_PAGE_SIZE
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147 #define XCHAL_MMU_MIN_PTE_PAGE_SIZE 12
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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148
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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149
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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150 #undef XCHAL_HAVE_DEBUG
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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151 #define XCHAL_HAVE_DEBUG 1
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152
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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153 #undef XCHAL_NUM_IBREAK
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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154 #define XCHAL_NUM_IBREAK 2
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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155
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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156 #undef XCHAL_NUM_DBREAK
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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157 #define XCHAL_NUM_DBREAK 2
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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158
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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159 #undef XCHAL_DEBUGLEVEL
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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160 #define XCHAL_DEBUGLEVEL 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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161
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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162
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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163 #undef XCHAL_MAX_INSTRUCTION_SIZE
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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164 #define XCHAL_MAX_INSTRUCTION_SIZE 3
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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165
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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166 #undef XCHAL_INST_FETCH_WIDTH
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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167 #define XCHAL_INST_FETCH_WIDTH 4
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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168
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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169
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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170 #undef XSHAL_ABI
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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171 #undef XTHAL_ABI_WINDOWED
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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172 #undef XTHAL_ABI_CALL0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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173 #define XSHAL_ABI XTHAL_ABI_WINDOWED
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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174 #define XTHAL_ABI_WINDOWED 0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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175 #define XTHAL_ABI_CALL0 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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176
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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177 #endif /* !XTENSA_CONFIG_H */