Mercurial > hg > CbC > CbC_gcc
annotate gcc/caller-save.c @ 55:77e2b8dfacca gcc-4.4.5
update it from 4.4.3 to 4.5.0
| author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Fri, 12 Feb 2010 23:39:51 +0900 |
| parents | a06113de4d67 |
| children | b7f97abdc517 |
| rev | line source |
|---|---|
| 0 | 1 /* Save and restore call-clobbered registers which are live across a call. |
| 2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000, | |
| 3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 | |
| 4 Free Software Foundation, Inc. | |
| 5 | |
| 6 This file is part of GCC. | |
| 7 | |
| 8 GCC is free software; you can redistribute it and/or modify it under | |
| 9 the terms of the GNU General Public License as published by the Free | |
| 10 Software Foundation; either version 3, or (at your option) any later | |
| 11 version. | |
| 12 | |
| 13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
| 14 WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 16 for more details. | |
| 17 | |
| 18 You should have received a copy of the GNU General Public License | |
| 19 along with GCC; see the file COPYING3. If not see | |
| 20 <http://www.gnu.org/licenses/>. */ | |
| 21 | |
| 22 #include "config.h" | |
| 23 #include "system.h" | |
| 24 #include "coretypes.h" | |
| 25 #include "tm.h" | |
| 26 #include "rtl.h" | |
| 27 #include "regs.h" | |
| 28 #include "insn-config.h" | |
| 29 #include "flags.h" | |
| 30 #include "hard-reg-set.h" | |
| 31 #include "recog.h" | |
| 32 #include "basic-block.h" | |
| 33 #include "reload.h" | |
| 34 #include "function.h" | |
| 35 #include "expr.h" | |
| 36 #include "toplev.h" | |
| 37 #include "tm_p.h" | |
| 38 #include "addresses.h" | |
| 39 #include "output.h" | |
| 40 #include "df.h" | |
| 41 #include "ggc.h" | |
| 42 | |
| 43 /* Call used hard registers which can not be saved because there is no | |
| 44 insn for this. */ | |
| 45 HARD_REG_SET no_caller_save_reg_set; | |
| 46 | |
| 47 #ifndef MAX_MOVE_MAX | |
| 48 #define MAX_MOVE_MAX MOVE_MAX | |
| 49 #endif | |
| 50 | |
| 51 #ifndef MIN_UNITS_PER_WORD | |
| 52 #define MIN_UNITS_PER_WORD UNITS_PER_WORD | |
| 53 #endif | |
| 54 | |
| 55 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD) | |
| 56 | |
| 57 /* Modes for each hard register that we can save. The smallest mode is wide | |
| 58 enough to save the entire contents of the register. When saving the | |
| 59 register because it is live we first try to save in multi-register modes. | |
| 60 If that is not possible the save is done one register at a time. */ | |
| 61 | |
| 62 static enum machine_mode | |
| 63 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; | |
| 64 | |
| 65 /* For each hard register, a place on the stack where it can be saved, | |
| 66 if needed. */ | |
| 67 | |
| 68 static rtx | |
| 69 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; | |
| 70 | |
| 71 /* The number of elements in the subsequent array. */ | |
| 72 static int save_slots_num; | |
| 73 | |
| 74 /* Allocated slots so far. */ | |
| 75 static rtx save_slots[FIRST_PSEUDO_REGISTER]; | |
| 76 | |
| 77 /* We will only make a register eligible for caller-save if it can be | |
| 78 saved in its widest mode with a simple SET insn as long as the memory | |
| 79 address is valid. We record the INSN_CODE is those insns here since | |
| 80 when we emit them, the addresses might not be valid, so they might not | |
| 81 be recognized. */ | |
| 82 | |
| 83 static int | |
| 84 cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; | |
| 85 static int | |
| 86 cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; | |
| 87 | |
| 88 /* Set of hard regs currently residing in save area (during insn scan). */ | |
| 89 | |
| 90 static HARD_REG_SET hard_regs_saved; | |
| 91 | |
| 92 /* Number of registers currently in hard_regs_saved. */ | |
| 93 | |
| 94 static int n_regs_saved; | |
| 95 | |
| 96 /* Computed by mark_referenced_regs, all regs referenced in a given | |
| 97 insn. */ | |
| 98 static HARD_REG_SET referenced_regs; | |
| 99 | |
| 100 | |
|
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101 typedef void refmarker_fn (rtx *loc, enum machine_mode mode, int hardregno, |
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102 void *mark_arg); |
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103 |
| 0 | 104 static int reg_save_code (int, enum machine_mode); |
| 105 static int reg_restore_code (int, enum machine_mode); | |
| 106 | |
| 107 struct saved_hard_reg; | |
| 108 static void initiate_saved_hard_regs (void); | |
| 109 static struct saved_hard_reg *new_saved_hard_reg (int, int); | |
| 110 static void finish_saved_hard_regs (void); | |
| 111 static int saved_hard_reg_compare_func (const void *, const void *); | |
| 112 | |
| 113 static void mark_set_regs (rtx, const_rtx, void *); | |
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114 static void mark_referenced_regs (rtx *, refmarker_fn *mark, void *mark_arg); |
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115 static refmarker_fn mark_reg_as_referenced; |
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116 static refmarker_fn replace_reg_with_saved_mem; |
| 0 | 117 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *, |
| 118 enum machine_mode *); | |
| 119 static int insert_restore (struct insn_chain *, int, int, int, | |
| 120 enum machine_mode *); | |
| 121 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int, | |
| 122 rtx); | |
| 123 static void add_stored_regs (rtx, const_rtx, void *); | |
| 124 | |
| 125 | |
| 126 | |
| 127 static GTY(()) rtx savepat; | |
| 128 static GTY(()) rtx restpat; | |
| 129 static GTY(()) rtx test_reg; | |
| 130 static GTY(()) rtx test_mem; | |
| 131 static GTY(()) rtx saveinsn; | |
| 132 static GTY(()) rtx restinsn; | |
| 133 | |
| 134 /* Return the INSN_CODE used to save register REG in mode MODE. */ | |
| 135 static int | |
| 136 reg_save_code (int reg, enum machine_mode mode) | |
| 137 { | |
| 138 bool ok; | |
| 139 if (cached_reg_save_code[reg][mode]) | |
| 140 return cached_reg_save_code[reg][mode]; | |
| 141 if (!HARD_REGNO_MODE_OK (reg, mode)) | |
| 142 { | |
| 143 cached_reg_save_code[reg][mode] = -1; | |
| 144 cached_reg_restore_code[reg][mode] = -1; | |
| 145 return -1; | |
| 146 } | |
| 147 | |
| 148 /* Update the register number and modes of the register | |
| 149 and memory operand. */ | |
| 150 SET_REGNO (test_reg, reg); | |
| 151 PUT_MODE (test_reg, mode); | |
| 152 PUT_MODE (test_mem, mode); | |
| 153 | |
| 154 /* Force re-recognition of the modified insns. */ | |
| 155 INSN_CODE (saveinsn) = -1; | |
| 156 INSN_CODE (restinsn) = -1; | |
| 157 | |
| 158 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn); | |
| 159 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn); | |
| 160 | |
| 161 /* Now extract both insns and see if we can meet their | |
| 162 constraints. */ | |
| 163 ok = (cached_reg_save_code[reg][mode] != -1 | |
| 164 && cached_reg_restore_code[reg][mode] != -1); | |
| 165 if (ok) | |
| 166 { | |
| 167 extract_insn (saveinsn); | |
| 168 ok = constrain_operands (1); | |
| 169 extract_insn (restinsn); | |
| 170 ok &= constrain_operands (1); | |
| 171 } | |
| 172 | |
| 173 if (! ok) | |
| 174 { | |
| 175 cached_reg_save_code[reg][mode] = -1; | |
| 176 cached_reg_restore_code[reg][mode] = -1; | |
| 177 } | |
| 178 gcc_assert (cached_reg_save_code[reg][mode]); | |
| 179 return cached_reg_save_code[reg][mode]; | |
| 180 } | |
| 181 | |
| 182 /* Return the INSN_CODE used to restore register REG in mode MODE. */ | |
| 183 static int | |
| 184 reg_restore_code (int reg, enum machine_mode mode) | |
| 185 { | |
| 186 if (cached_reg_restore_code[reg][mode]) | |
| 187 return cached_reg_restore_code[reg][mode]; | |
| 188 /* Populate our cache. */ | |
| 189 reg_save_code (reg, mode); | |
| 190 return cached_reg_restore_code[reg][mode]; | |
| 191 } | |
| 192 | |
| 193 /* Initialize for caller-save. | |
| 194 | |
| 195 Look at all the hard registers that are used by a call and for which | |
| 196 reginfo.c has not already excluded from being used across a call. | |
| 197 | |
| 198 Ensure that we can find a mode to save the register and that there is a | |
| 199 simple insn to save and restore the register. This latter check avoids | |
| 200 problems that would occur if we tried to save the MQ register of some | |
| 201 machines directly into memory. */ | |
| 202 | |
| 203 void | |
| 204 init_caller_save (void) | |
| 205 { | |
| 206 rtx addr_reg; | |
| 207 int offset; | |
| 208 rtx address; | |
| 209 int i, j; | |
| 210 | |
| 211 CLEAR_HARD_REG_SET (no_caller_save_reg_set); | |
| 212 /* First find all the registers that we need to deal with and all | |
| 213 the modes that they can have. If we can't find a mode to use, | |
| 214 we can't have the register live over calls. */ | |
| 215 | |
| 216 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 217 { | |
|
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218 if (call_used_regs[i] |
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219 && !TEST_HARD_REG_BIT (call_fixed_reg_set, i)) |
| 0 | 220 { |
| 221 for (j = 1; j <= MOVE_MAX_WORDS; j++) | |
| 222 { | |
| 223 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j, | |
| 224 VOIDmode); | |
| 225 if (regno_save_mode[i][j] == VOIDmode && j == 1) | |
| 226 { | |
| 227 SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
| 228 } | |
| 229 } | |
| 230 } | |
| 231 else | |
| 232 regno_save_mode[i][1] = VOIDmode; | |
| 233 } | |
| 234 | |
| 235 /* The following code tries to approximate the conditions under which | |
| 236 we can easily save and restore a register without scratch registers or | |
| 237 other complexities. It will usually work, except under conditions where | |
| 238 the validity of an insn operand is dependent on the address offset. | |
| 239 No such cases are currently known. | |
| 240 | |
| 241 We first find a typical offset from some BASE_REG_CLASS register. | |
| 242 This address is chosen by finding the first register in the class | |
| 243 and by finding the smallest power of two that is a valid offset from | |
| 244 that register in every mode we will use to save registers. */ | |
| 245 | |
| 246 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 247 if (TEST_HARD_REG_BIT | |
| 248 (reg_class_contents | |
| 249 [(int) base_reg_class (regno_save_mode[i][1], PLUS, CONST_INT)], i)) | |
| 250 break; | |
| 251 | |
| 252 gcc_assert (i < FIRST_PSEUDO_REGISTER); | |
| 253 | |
| 254 addr_reg = gen_rtx_REG (Pmode, i); | |
| 255 | |
| 256 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1) | |
| 257 { | |
| 258 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset)); | |
| 259 | |
| 260 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 261 if (regno_save_mode[i][1] != VOIDmode | |
| 262 && ! strict_memory_address_p (regno_save_mode[i][1], address)) | |
| 263 break; | |
| 264 | |
| 265 if (i == FIRST_PSEUDO_REGISTER) | |
| 266 break; | |
| 267 } | |
| 268 | |
| 269 /* If we didn't find a valid address, we must use register indirect. */ | |
| 270 if (offset == 0) | |
| 271 address = addr_reg; | |
| 272 | |
| 273 /* Next we try to form an insn to save and restore the register. We | |
| 274 see if such an insn is recognized and meets its constraints. | |
| 275 | |
| 276 To avoid lots of unnecessary RTL allocation, we construct all the RTL | |
| 277 once, then modify the memory and register operands in-place. */ | |
| 278 | |
| 279 test_reg = gen_rtx_REG (VOIDmode, 0); | |
| 280 test_mem = gen_rtx_MEM (VOIDmode, address); | |
| 281 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg); | |
| 282 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem); | |
| 283 | |
| 284 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0); | |
| 285 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0); | |
| 286 | |
| 287 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 288 for (j = 1; j <= MOVE_MAX_WORDS; j++) | |
| 289 if (reg_save_code (i,regno_save_mode[i][j]) == -1) | |
| 290 { | |
| 291 regno_save_mode[i][j] = VOIDmode; | |
| 292 if (j == 1) | |
| 293 { | |
| 294 SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
| 295 if (call_used_regs[i]) | |
| 296 SET_HARD_REG_BIT (no_caller_save_reg_set, i); | |
| 297 } | |
| 298 } | |
| 299 } | |
| 300 | |
| 301 | |
| 302 | |
| 303 /* Initialize save areas by showing that we haven't allocated any yet. */ | |
| 304 | |
| 305 void | |
| 306 init_save_areas (void) | |
| 307 { | |
| 308 int i, j; | |
| 309 | |
| 310 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 311 for (j = 1; j <= MOVE_MAX_WORDS; j++) | |
| 312 regno_save_mem[i][j] = 0; | |
| 313 save_slots_num = 0; | |
|
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314 |
| 0 | 315 } |
| 316 | |
| 317 /* The structure represents a hard register which should be saved | |
| 318 through the call. It is used when the integrated register | |
| 319 allocator (IRA) is used and sharing save slots is on. */ | |
| 320 struct saved_hard_reg | |
| 321 { | |
| 322 /* Order number starting with 0. */ | |
| 323 int num; | |
| 324 /* The hard regno. */ | |
| 325 int hard_regno; | |
| 326 /* Execution frequency of all calls through which given hard | |
| 327 register should be saved. */ | |
| 328 int call_freq; | |
| 329 /* Stack slot reserved to save the hard register through calls. */ | |
| 330 rtx slot; | |
| 331 /* True if it is first hard register in the chain of hard registers | |
| 332 sharing the same stack slot. */ | |
| 333 int first_p; | |
| 334 /* Order number of the next hard register structure with the same | |
| 335 slot in the chain. -1 represents end of the chain. */ | |
| 336 int next; | |
| 337 }; | |
| 338 | |
| 339 /* Map: hard register number to the corresponding structure. */ | |
| 340 static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER]; | |
| 341 | |
| 342 /* The number of all structures representing hard registers should be | |
| 343 saved, in order words, the number of used elements in the following | |
| 344 array. */ | |
| 345 static int saved_regs_num; | |
| 346 | |
| 347 /* Pointers to all the structures. Index is the order number of the | |
| 348 corresponding structure. */ | |
| 349 static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER]; | |
| 350 | |
| 351 /* First called function for work with saved hard registers. */ | |
| 352 static void | |
| 353 initiate_saved_hard_regs (void) | |
| 354 { | |
| 355 int i; | |
| 356 | |
| 357 saved_regs_num = 0; | |
| 358 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 359 hard_reg_map[i] = NULL; | |
| 360 } | |
| 361 | |
| 362 /* Allocate and return new saved hard register with given REGNO and | |
| 363 CALL_FREQ. */ | |
| 364 static struct saved_hard_reg * | |
| 365 new_saved_hard_reg (int regno, int call_freq) | |
| 366 { | |
| 367 struct saved_hard_reg *saved_reg; | |
| 368 | |
| 369 saved_reg | |
| 370 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg)); | |
| 371 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg; | |
| 372 saved_reg->num = saved_regs_num++; | |
| 373 saved_reg->hard_regno = regno; | |
| 374 saved_reg->call_freq = call_freq; | |
| 375 saved_reg->first_p = FALSE; | |
| 376 saved_reg->next = -1; | |
| 377 return saved_reg; | |
| 378 } | |
| 379 | |
| 380 /* Free memory allocated for the saved hard registers. */ | |
| 381 static void | |
| 382 finish_saved_hard_regs (void) | |
| 383 { | |
| 384 int i; | |
| 385 | |
| 386 for (i = 0; i < saved_regs_num; i++) | |
| 387 free (all_saved_regs[i]); | |
| 388 } | |
| 389 | |
| 390 /* The function is used to sort the saved hard register structures | |
| 391 according their frequency. */ | |
| 392 static int | |
| 393 saved_hard_reg_compare_func (const void *v1p, const void *v2p) | |
| 394 { | |
| 395 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p; | |
| 396 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p; | |
|
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397 |
| 0 | 398 if (flag_omit_frame_pointer) |
| 399 { | |
| 400 if (p1->call_freq - p2->call_freq != 0) | |
| 401 return p1->call_freq - p2->call_freq; | |
| 402 } | |
| 403 else if (p2->call_freq - p1->call_freq != 0) | |
| 404 return p2->call_freq - p1->call_freq; | |
| 405 | |
| 406 return p1->num - p2->num; | |
| 407 } | |
| 408 | |
| 409 /* Allocate save areas for any hard registers that might need saving. | |
| 410 We take a conservative approach here and look for call-clobbered hard | |
| 411 registers that are assigned to pseudos that cross calls. This may | |
| 412 overestimate slightly (especially if some of these registers are later | |
| 413 used as spill registers), but it should not be significant. | |
| 414 | |
| 415 For IRA we use priority coloring to decrease stack slots needed for | |
| 416 saving hard registers through calls. We build conflicts for them | |
| 417 to do coloring. | |
| 418 | |
| 419 Future work: | |
| 420 | |
| 421 In the fallback case we should iterate backwards across all possible | |
| 422 modes for the save, choosing the largest available one instead of | |
| 423 falling back to the smallest mode immediately. (eg TF -> DF -> SF). | |
| 424 | |
| 425 We do not try to use "move multiple" instructions that exist | |
| 426 on some machines (such as the 68k moveml). It could be a win to try | |
| 427 and use them when possible. The hard part is doing it in a way that is | |
| 428 machine independent since they might be saving non-consecutive | |
| 429 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */ | |
| 430 | |
| 431 void | |
| 432 setup_save_areas (void) | |
| 433 { | |
| 434 int i, j, k; | |
| 435 unsigned int r; | |
| 436 HARD_REG_SET hard_regs_used; | |
| 437 | |
| 438 /* Allocate space in the save area for the largest multi-register | |
| 439 pseudos first, then work backwards to single register | |
| 440 pseudos. */ | |
| 441 | |
| 442 /* Find and record all call-used hard-registers in this function. */ | |
| 443 CLEAR_HARD_REG_SET (hard_regs_used); | |
| 444 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
| 445 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0) | |
| 446 { | |
| 447 unsigned int regno = reg_renumber[i]; | |
| 448 unsigned int endregno | |
| 449 = end_hard_regno (GET_MODE (regno_reg_rtx[i]), regno); | |
| 450 for (r = regno; r < endregno; r++) | |
| 451 if (call_used_regs[r]) | |
| 452 SET_HARD_REG_BIT (hard_regs_used, r); | |
| 453 } | |
| 454 | |
| 455 if (optimize && flag_ira_share_save_slots) | |
| 456 { | |
| 457 rtx insn, slot; | |
| 458 struct insn_chain *chain, *next; | |
| 459 char *saved_reg_conflicts; | |
| 460 unsigned int regno; | |
| 461 int next_k, freq; | |
| 462 struct saved_hard_reg *saved_reg, *saved_reg2, *saved_reg3; | |
| 463 int call_saved_regs_num; | |
| 464 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER]; | |
| 465 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets; | |
| 466 reg_set_iterator rsi; | |
| 467 int best_slot_num; | |
| 468 int prev_save_slots_num; | |
| 469 rtx prev_save_slots[FIRST_PSEUDO_REGISTER]; | |
|
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470 |
| 0 | 471 initiate_saved_hard_regs (); |
| 472 /* Create hard reg saved regs. */ | |
| 473 for (chain = reload_insn_chain; chain != 0; chain = next) | |
| 474 { | |
| 475 insn = chain->insn; | |
| 476 next = chain->next; | |
|
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|
477 if (!CALL_P (insn) |
| 0 | 478 || find_reg_note (insn, REG_NORETURN, NULL)) |
| 479 continue; | |
| 480 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn)); | |
| 481 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, | |
| 482 &chain->live_throughout); | |
| 483 COPY_HARD_REG_SET (used_regs, call_used_reg_set); | |
| 484 | |
| 485 /* Record all registers set in this call insn. These don't | |
| 486 need to be saved. N.B. the call insn might set a subreg | |
| 487 of a multi-hard-reg pseudo; then the pseudo is considered | |
| 488 live during the call, but the subreg that is set | |
| 489 isn't. */ | |
| 490 CLEAR_HARD_REG_SET (this_insn_sets); | |
| 491 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets); | |
| 492 /* Sibcalls are considered to set the return value. */ | |
| 493 if (SIBLING_CALL_P (insn) && crtl->return_rtx) | |
| 494 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets); | |
| 495 | |
| 496 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set); | |
| 497 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets); | |
| 498 AND_HARD_REG_SET (hard_regs_to_save, used_regs); | |
| 499 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 500 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) | |
| 501 { | |
| 502 if (hard_reg_map[regno] != NULL) | |
| 503 hard_reg_map[regno]->call_freq += freq; | |
| 504 else | |
| 505 saved_reg = new_saved_hard_reg (regno, freq); | |
| 506 } | |
| 507 /* Look through all live pseudos, mark their hard registers. */ | |
| 508 EXECUTE_IF_SET_IN_REG_SET | |
| 509 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) | |
| 510 { | |
| 511 int r = reg_renumber[regno]; | |
| 512 int bound; | |
|
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513 |
| 0 | 514 if (r < 0) |
| 515 continue; | |
|
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516 |
| 0 | 517 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)]; |
| 518 for (; r < bound; r++) | |
| 519 if (TEST_HARD_REG_BIT (used_regs, r)) | |
| 520 { | |
| 521 if (hard_reg_map[r] != NULL) | |
| 522 hard_reg_map[r]->call_freq += freq; | |
| 523 else | |
| 524 saved_reg = new_saved_hard_reg (r, freq); | |
| 525 SET_HARD_REG_BIT (hard_regs_to_save, r); | |
| 526 } | |
| 527 } | |
| 528 } | |
| 529 /* Find saved hard register conflicts. */ | |
| 530 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num); | |
| 531 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num); | |
| 532 for (chain = reload_insn_chain; chain != 0; chain = next) | |
| 533 { | |
| 534 call_saved_regs_num = 0; | |
| 535 insn = chain->insn; | |
| 536 next = chain->next; | |
|
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537 if (!CALL_P (insn) |
| 0 | 538 || find_reg_note (insn, REG_NORETURN, NULL)) |
| 539 continue; | |
| 540 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, | |
| 541 &chain->live_throughout); | |
| 542 COPY_HARD_REG_SET (used_regs, call_used_reg_set); | |
| 543 | |
| 544 /* Record all registers set in this call insn. These don't | |
| 545 need to be saved. N.B. the call insn might set a subreg | |
| 546 of a multi-hard-reg pseudo; then the pseudo is considered | |
| 547 live during the call, but the subreg that is set | |
| 548 isn't. */ | |
| 549 CLEAR_HARD_REG_SET (this_insn_sets); | |
| 550 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets); | |
| 551 /* Sibcalls are considered to set the return value, | |
| 552 compare flow.c:propagate_one_insn. */ | |
| 553 if (SIBLING_CALL_P (insn) && crtl->return_rtx) | |
| 554 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets); | |
| 555 | |
| 556 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set); | |
| 557 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets); | |
| 558 AND_HARD_REG_SET (hard_regs_to_save, used_regs); | |
| 559 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 560 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) | |
| 561 { | |
| 562 gcc_assert (hard_reg_map[regno] != NULL); | |
| 563 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno]; | |
| 564 } | |
| 565 /* Look through all live pseudos, mark their hard registers. */ | |
| 566 EXECUTE_IF_SET_IN_REG_SET | |
| 567 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) | |
| 568 { | |
| 569 int r = reg_renumber[regno]; | |
| 570 int bound; | |
|
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571 |
| 0 | 572 if (r < 0) |
| 573 continue; | |
| 574 | |
| 575 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)]; | |
| 576 for (; r < bound; r++) | |
| 577 if (TEST_HARD_REG_BIT (used_regs, r)) | |
| 578 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r]; | |
| 579 } | |
| 580 for (i = 0; i < call_saved_regs_num; i++) | |
| 581 { | |
| 582 saved_reg = call_saved_regs[i]; | |
| 583 for (j = 0; j < call_saved_regs_num; j++) | |
| 584 if (i != j) | |
| 585 { | |
| 586 saved_reg2 = call_saved_regs[j]; | |
| 587 saved_reg_conflicts[saved_reg->num * saved_regs_num | |
| 588 + saved_reg2->num] | |
| 589 = saved_reg_conflicts[saved_reg2->num * saved_regs_num | |
| 590 + saved_reg->num] | |
| 591 = TRUE; | |
| 592 } | |
| 593 } | |
| 594 } | |
| 595 /* Sort saved hard regs. */ | |
| 596 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *), | |
| 597 saved_hard_reg_compare_func); | |
| 598 /* Initiate slots available from the previous reload | |
| 599 iteration. */ | |
| 600 prev_save_slots_num = save_slots_num; | |
| 601 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx)); | |
| 602 save_slots_num = 0; | |
| 603 /* Allocate stack slots for the saved hard registers. */ | |
| 604 for (i = 0; i < saved_regs_num; i++) | |
| 605 { | |
| 606 saved_reg = all_saved_regs[i]; | |
| 607 regno = saved_reg->hard_regno; | |
| 608 for (j = 0; j < i; j++) | |
| 609 { | |
| 610 saved_reg2 = all_saved_regs[j]; | |
| 611 if (! saved_reg2->first_p) | |
| 612 continue; | |
| 613 slot = saved_reg2->slot; | |
| 614 for (k = j; k >= 0; k = next_k) | |
| 615 { | |
| 616 saved_reg3 = all_saved_regs[k]; | |
| 617 next_k = saved_reg3->next; | |
| 618 if (saved_reg_conflicts[saved_reg->num * saved_regs_num | |
| 619 + saved_reg3->num]) | |
| 620 break; | |
| 621 } | |
| 622 if (k < 0 | |
| 623 && (GET_MODE_SIZE (regno_save_mode[regno][1]) | |
| 624 <= GET_MODE_SIZE (regno_save_mode | |
| 625 [saved_reg2->hard_regno][1]))) | |
| 626 { | |
| 627 saved_reg->slot | |
| 628 = adjust_address_nv | |
| 629 (slot, regno_save_mode[saved_reg->hard_regno][1], 0); | |
| 630 regno_save_mem[regno][1] = saved_reg->slot; | |
| 631 saved_reg->next = saved_reg2->next; | |
| 632 saved_reg2->next = i; | |
| 633 if (dump_file != NULL) | |
| 634 fprintf (dump_file, "%d uses slot of %d\n", | |
| 635 regno, saved_reg2->hard_regno); | |
| 636 break; | |
| 637 } | |
| 638 } | |
| 639 if (j == i) | |
| 640 { | |
| 641 saved_reg->first_p = TRUE; | |
| 642 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++) | |
| 643 { | |
| 644 slot = prev_save_slots[j]; | |
| 645 if (slot == NULL_RTX) | |
| 646 continue; | |
| 647 if (GET_MODE_SIZE (regno_save_mode[regno][1]) | |
| 648 <= GET_MODE_SIZE (GET_MODE (slot)) | |
| 649 && best_slot_num < 0) | |
| 650 best_slot_num = j; | |
| 651 if (GET_MODE (slot) == regno_save_mode[regno][1]) | |
| 652 break; | |
| 653 } | |
| 654 if (best_slot_num >= 0) | |
| 655 { | |
| 656 saved_reg->slot = prev_save_slots[best_slot_num]; | |
| 657 saved_reg->slot | |
| 658 = adjust_address_nv | |
| 659 (saved_reg->slot, | |
| 660 regno_save_mode[saved_reg->hard_regno][1], 0); | |
| 661 if (dump_file != NULL) | |
| 662 fprintf (dump_file, | |
| 663 "%d uses a slot from prev iteration\n", regno); | |
| 664 prev_save_slots[best_slot_num] = NULL_RTX; | |
| 665 if (best_slot_num + 1 == prev_save_slots_num) | |
| 666 prev_save_slots_num--; | |
| 667 } | |
| 668 else | |
| 669 { | |
| 670 saved_reg->slot | |
| 671 = assign_stack_local_1 | |
| 672 (regno_save_mode[regno][1], | |
| 673 GET_MODE_SIZE (regno_save_mode[regno][1]), 0, true); | |
| 674 if (dump_file != NULL) | |
| 675 fprintf (dump_file, "%d uses a new slot\n", regno); | |
| 676 } | |
| 677 regno_save_mem[regno][1] = saved_reg->slot; | |
| 678 save_slots[save_slots_num++] = saved_reg->slot; | |
| 679 } | |
| 680 } | |
| 681 free (saved_reg_conflicts); | |
| 682 finish_saved_hard_regs (); | |
| 683 } | |
| 684 else | |
| 685 { | |
| 686 /* Now run through all the call-used hard-registers and allocate | |
| 687 space for them in the caller-save area. Try to allocate space | |
| 688 in a manner which allows multi-register saves/restores to be done. */ | |
|
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689 |
| 0 | 690 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
| 691 for (j = MOVE_MAX_WORDS; j > 0; j--) | |
| 692 { | |
| 693 int do_save = 1; | |
|
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694 |
| 0 | 695 /* If no mode exists for this size, try another. Also break out |
| 696 if we have already saved this hard register. */ | |
| 697 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0) | |
| 698 continue; | |
|
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699 |
| 0 | 700 /* See if any register in this group has been saved. */ |
| 701 for (k = 0; k < j; k++) | |
| 702 if (regno_save_mem[i + k][1]) | |
| 703 { | |
| 704 do_save = 0; | |
| 705 break; | |
| 706 } | |
| 707 if (! do_save) | |
| 708 continue; | |
|
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709 |
| 0 | 710 for (k = 0; k < j; k++) |
| 711 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k)) | |
| 712 { | |
| 713 do_save = 0; | |
| 714 break; | |
| 715 } | |
| 716 if (! do_save) | |
| 717 continue; | |
|
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718 |
| 0 | 719 /* We have found an acceptable mode to store in. Since |
| 720 hard register is always saved in the widest mode | |
| 721 available, the mode may be wider than necessary, it is | |
| 722 OK to reduce the alignment of spill space. We will | |
| 723 verify that it is equal to or greater than required | |
| 724 when we restore and save the hard register in | |
| 725 insert_restore and insert_save. */ | |
| 726 regno_save_mem[i][j] | |
| 727 = assign_stack_local_1 (regno_save_mode[i][j], | |
| 728 GET_MODE_SIZE (regno_save_mode[i][j]), | |
| 729 0, true); | |
|
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730 |
| 0 | 731 /* Setup single word save area just in case... */ |
| 732 for (k = 0; k < j; k++) | |
| 733 /* This should not depend on WORDS_BIG_ENDIAN. | |
| 734 The order of words in regs is the same as in memory. */ | |
| 735 regno_save_mem[i + k][1] | |
| 736 = adjust_address_nv (regno_save_mem[i][j], | |
| 737 regno_save_mode[i + k][1], | |
| 738 k * UNITS_PER_WORD); | |
| 739 } | |
| 740 } | |
| 741 | |
| 742 /* Now loop again and set the alias set of any save areas we made to | |
| 743 the alias set used to represent frame objects. */ | |
| 744 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 745 for (j = MOVE_MAX_WORDS; j > 0; j--) | |
| 746 if (regno_save_mem[i][j] != 0) | |
| 747 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ()); | |
| 748 } | |
| 749 | |
| 750 | |
| 751 | |
| 752 /* Find the places where hard regs are live across calls and save them. */ | |
| 753 | |
| 754 void | |
| 755 save_call_clobbered_regs (void) | |
| 756 { | |
| 757 struct insn_chain *chain, *next; | |
| 758 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER]; | |
| 759 | |
| 760 /* Computed in mark_set_regs, holds all registers set by the current | |
| 761 instruction. */ | |
| 762 HARD_REG_SET this_insn_sets; | |
| 763 | |
| 764 CLEAR_HARD_REG_SET (hard_regs_saved); | |
| 765 n_regs_saved = 0; | |
| 766 | |
| 767 for (chain = reload_insn_chain; chain != 0; chain = next) | |
| 768 { | |
| 769 rtx insn = chain->insn; | |
| 770 enum rtx_code code = GET_CODE (insn); | |
| 771 | |
| 772 next = chain->next; | |
| 773 | |
| 774 gcc_assert (!chain->is_caller_save_insn); | |
| 775 | |
|
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776 if (NONDEBUG_INSN_P (insn)) |
| 0 | 777 { |
| 778 /* If some registers have been saved, see if INSN references | |
| 779 any of them. We must restore them before the insn if so. */ | |
| 780 | |
| 781 if (n_regs_saved) | |
| 782 { | |
| 783 int regno; | |
| 784 | |
| 785 if (code == JUMP_INSN) | |
| 786 /* Restore all registers if this is a JUMP_INSN. */ | |
| 787 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved); | |
| 788 else | |
| 789 { | |
| 790 CLEAR_HARD_REG_SET (referenced_regs); | |
|
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791 mark_referenced_regs (&PATTERN (insn), |
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792 mark_reg_as_referenced, NULL); |
| 0 | 793 AND_HARD_REG_SET (referenced_regs, hard_regs_saved); |
| 794 } | |
| 795 | |
| 796 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 797 if (TEST_HARD_REG_BIT (referenced_regs, regno)) | |
| 798 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode); | |
| 799 } | |
| 800 | |
| 801 if (code == CALL_INSN | |
| 802 && ! SIBLING_CALL_P (insn) | |
| 803 && ! find_reg_note (insn, REG_NORETURN, NULL)) | |
| 804 { | |
| 805 unsigned regno; | |
| 806 HARD_REG_SET hard_regs_to_save; | |
| 807 reg_set_iterator rsi; | |
| 808 | |
| 809 /* Use the register life information in CHAIN to compute which | |
| 810 regs are live during the call. */ | |
| 811 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, | |
| 812 &chain->live_throughout); | |
| 813 /* Save hard registers always in the widest mode available. */ | |
| 814 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 815 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) | |
| 816 save_mode [regno] = regno_save_mode [regno][1]; | |
| 817 else | |
| 818 save_mode [regno] = VOIDmode; | |
| 819 | |
| 820 /* Look through all live pseudos, mark their hard registers | |
| 821 and choose proper mode for saving. */ | |
| 822 EXECUTE_IF_SET_IN_REG_SET | |
| 823 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) | |
| 824 { | |
| 825 int r = reg_renumber[regno]; | |
| 826 int nregs; | |
| 827 enum machine_mode mode; | |
| 828 | |
| 829 if (r < 0) | |
| 830 continue; | |
| 831 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)]; | |
| 832 mode = HARD_REGNO_CALLER_SAVE_MODE | |
| 833 (r, nregs, PSEUDO_REGNO_MODE (regno)); | |
| 834 if (GET_MODE_BITSIZE (mode) | |
| 835 > GET_MODE_BITSIZE (save_mode[r])) | |
| 836 save_mode[r] = mode; | |
| 837 while (nregs-- > 0) | |
| 838 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs); | |
| 839 } | |
| 840 | |
| 841 /* Record all registers set in this call insn. These don't need | |
| 842 to be saved. N.B. the call insn might set a subreg of a | |
| 843 multi-hard-reg pseudo; then the pseudo is considered live | |
| 844 during the call, but the subreg that is set isn't. */ | |
| 845 CLEAR_HARD_REG_SET (this_insn_sets); | |
| 846 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets); | |
| 847 | |
| 848 /* Compute which hard regs must be saved before this call. */ | |
| 849 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set); | |
| 850 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets); | |
| 851 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved); | |
| 852 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set); | |
| 853 | |
| 854 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 855 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) | |
| 856 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode); | |
| 857 | |
| 858 /* Must recompute n_regs_saved. */ | |
| 859 n_regs_saved = 0; | |
| 860 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 861 if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
| 862 n_regs_saved++; | |
| 863 } | |
| 864 } | |
|
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865 else if (DEBUG_INSN_P (insn) && n_regs_saved) |
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866 mark_referenced_regs (&PATTERN (insn), |
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867 replace_reg_with_saved_mem, |
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868 save_mode); |
| 0 | 869 |
| 870 if (chain->next == 0 || chain->next->block != chain->block) | |
| 871 { | |
| 872 int regno; | |
| 873 /* At the end of the basic block, we must restore any registers that | |
| 874 remain saved. If the last insn in the block is a JUMP_INSN, put | |
| 875 the restore before the insn, otherwise, put it after the insn. */ | |
| 876 | |
| 877 if (n_regs_saved) | |
| 878 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 879 if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
| 880 regno += insert_restore (chain, JUMP_P (insn), | |
| 881 regno, MOVE_MAX_WORDS, save_mode); | |
| 882 } | |
| 883 } | |
| 884 } | |
| 885 | |
| 886 /* Here from note_stores, or directly from save_call_clobbered_regs, when | |
| 887 an insn stores a value in a register. | |
| 888 Set the proper bit or bits in this_insn_sets. All pseudos that have | |
| 889 been assigned hard regs have had their register number changed already, | |
| 890 so we can ignore pseudos. */ | |
| 891 static void | |
| 892 mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data) | |
| 893 { | |
| 894 int regno, endregno, i; | |
| 895 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data; | |
| 896 | |
| 897 if (GET_CODE (reg) == SUBREG) | |
| 898 { | |
| 899 rtx inner = SUBREG_REG (reg); | |
| 900 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER) | |
| 901 return; | |
| 902 regno = subreg_regno (reg); | |
| 903 endregno = regno + subreg_nregs (reg); | |
| 904 } | |
| 905 else if (REG_P (reg) | |
| 906 && REGNO (reg) < FIRST_PSEUDO_REGISTER) | |
| 907 { | |
| 908 regno = REGNO (reg); | |
| 909 endregno = END_HARD_REGNO (reg); | |
| 910 } | |
| 911 else | |
| 912 return; | |
| 913 | |
| 914 for (i = regno; i < endregno; i++) | |
| 915 SET_HARD_REG_BIT (*this_insn_sets, i); | |
| 916 } | |
| 917 | |
| 918 /* Here from note_stores when an insn stores a value in a register. | |
| 919 Set the proper bit or bits in the passed regset. All pseudos that have | |
| 920 been assigned hard regs have had their register number changed already, | |
| 921 so we can ignore pseudos. */ | |
| 922 static void | |
| 923 add_stored_regs (rtx reg, const_rtx setter, void *data) | |
| 924 { | |
| 925 int regno, endregno, i; | |
| 926 enum machine_mode mode = GET_MODE (reg); | |
| 927 int offset = 0; | |
| 928 | |
| 929 if (GET_CODE (setter) == CLOBBER) | |
| 930 return; | |
| 931 | |
| 932 if (GET_CODE (reg) == SUBREG | |
| 933 && REG_P (SUBREG_REG (reg)) | |
| 934 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER) | |
| 935 { | |
| 936 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)), | |
| 937 GET_MODE (SUBREG_REG (reg)), | |
| 938 SUBREG_BYTE (reg), | |
| 939 GET_MODE (reg)); | |
| 940 regno = REGNO (SUBREG_REG (reg)) + offset; | |
| 941 endregno = regno + subreg_nregs (reg); | |
| 942 } | |
| 943 else | |
| 944 { | |
| 945 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER) | |
| 946 return; | |
| 947 | |
| 948 regno = REGNO (reg) + offset; | |
| 949 endregno = end_hard_regno (mode, regno); | |
| 950 } | |
| 951 | |
| 952 for (i = regno; i < endregno; i++) | |
| 953 SET_REGNO_REG_SET ((regset) data, i); | |
| 954 } | |
| 955 | |
| 956 /* Walk X and record all referenced registers in REFERENCED_REGS. */ | |
| 957 static void | |
|
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958 mark_referenced_regs (rtx *loc, refmarker_fn *mark, void *arg) |
| 0 | 959 { |
|
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960 enum rtx_code code = GET_CODE (*loc); |
| 0 | 961 const char *fmt; |
| 962 int i, j; | |
| 963 | |
| 964 if (code == SET) | |
|
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965 mark_referenced_regs (&SET_SRC (*loc), mark, arg); |
| 0 | 966 if (code == SET || code == CLOBBER) |
| 967 { | |
|
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968 loc = &SET_DEST (*loc); |
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969 code = GET_CODE (*loc); |
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970 if ((code == REG && REGNO (*loc) < FIRST_PSEUDO_REGISTER) |
| 0 | 971 || code == PC || code == CC0 |
|
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972 || (code == SUBREG && REG_P (SUBREG_REG (*loc)) |
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973 && REGNO (SUBREG_REG (*loc)) < FIRST_PSEUDO_REGISTER |
| 0 | 974 /* If we're setting only part of a multi-word register, |
| 975 we shall mark it as referenced, because the words | |
| 976 that are not being set should be restored. */ | |
|
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977 && ((GET_MODE_SIZE (GET_MODE (*loc)) |
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978 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc)))) |
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979 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc))) |
| 0 | 980 <= UNITS_PER_WORD)))) |
| 981 return; | |
| 982 } | |
| 983 if (code == MEM || code == SUBREG) | |
| 984 { | |
|
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985 loc = &XEXP (*loc, 0); |
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986 code = GET_CODE (*loc); |
| 0 | 987 } |
| 988 | |
| 989 if (code == REG) | |
| 990 { | |
|
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991 int regno = REGNO (*loc); |
| 0 | 992 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno |
| 993 : reg_renumber[regno]); | |
| 994 | |
| 995 if (hardregno >= 0) | |
|
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996 mark (loc, GET_MODE (*loc), hardregno, arg); |
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997 else if (arg) |
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998 /* ??? Will we ever end up with an equiv expression in a debug |
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999 insn, that would have required restoring a reg, or will |
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1000 reload take care of it for us? */ |
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1001 return; |
| 0 | 1002 /* If this is a pseudo that did not get a hard register, scan its |
| 1003 memory location, since it might involve the use of another | |
| 1004 register, which might be saved. */ | |
| 1005 else if (reg_equiv_mem[regno] != 0) | |
|
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1006 mark_referenced_regs (&XEXP (reg_equiv_mem[regno], 0), mark, arg); |
| 0 | 1007 else if (reg_equiv_address[regno] != 0) |
|
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1008 mark_referenced_regs (®_equiv_address[regno], mark, arg); |
| 0 | 1009 return; |
| 1010 } | |
| 1011 | |
| 1012 fmt = GET_RTX_FORMAT (code); | |
| 1013 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
| 1014 { | |
| 1015 if (fmt[i] == 'e') | |
|
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1016 mark_referenced_regs (&XEXP (*loc, i), mark, arg); |
| 0 | 1017 else if (fmt[i] == 'E') |
|
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1018 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--) |
|
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1019 mark_referenced_regs (&XVECEXP (*loc, i, j), mark, arg); |
| 0 | 1020 } |
| 1021 } | |
|
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1022 |
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1023 /* Parameter function for mark_referenced_regs() that adds registers |
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1024 present in the insn and in equivalent mems and addresses to |
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1025 referenced_regs. */ |
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1026 |
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1027 static void |
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1028 mark_reg_as_referenced (rtx *loc ATTRIBUTE_UNUSED, |
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1029 enum machine_mode mode, |
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1030 int hardregno, |
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1031 void *arg ATTRIBUTE_UNUSED) |
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1032 { |
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1033 add_to_hard_reg_set (&referenced_regs, mode, hardregno); |
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1034 } |
|
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1035 |
|
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1036 /* Parameter function for mark_referenced_regs() that replaces |
|
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1037 registers referenced in a debug_insn that would have been restored, |
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1038 should it be a non-debug_insn, with their save locations. */ |
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1039 |
|
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1040 static void |
|
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1041 replace_reg_with_saved_mem (rtx *loc, |
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1042 enum machine_mode mode, |
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1043 int regno, |
|
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1044 void *arg) |
|
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1045 { |
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1046 unsigned int i, nregs = hard_regno_nregs [regno][mode]; |
|
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|
1047 rtx mem; |
|
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1048 enum machine_mode *save_mode = (enum machine_mode *)arg; |
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1049 |
|
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1050 for (i = 0; i < nregs; i++) |
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1051 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) |
|
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1052 break; |
|
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|
1053 |
|
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1054 /* If none of the registers in the range would need restoring, we're |
|
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|
1055 all set. */ |
|
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1056 if (i == nregs) |
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1057 return; |
|
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1058 |
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1059 while (++i < nregs) |
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1060 if (!TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) |
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|
1061 break; |
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1062 |
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|
1063 if (i == nregs |
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1064 && regno_save_mem[regno][nregs]) |
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1065 { |
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1066 mem = copy_rtx (regno_save_mem[regno][nregs]); |
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|
1067 |
|
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1068 if (nregs == (unsigned int) hard_regno_nregs[regno][save_mode[regno]]) |
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|
1069 mem = adjust_address_nv (mem, save_mode[regno], 0); |
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|
1070 |
|
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|
1071 if (GET_MODE (mem) != mode) |
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1072 { |
|
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1073 /* This is gen_lowpart_if_possible(), but without validating |
|
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|
1074 the newly-formed address. */ |
|
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1075 int offset = 0; |
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1076 |
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1077 if (WORDS_BIG_ENDIAN) |
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1078 offset = (MAX (GET_MODE_SIZE (GET_MODE (mem)), UNITS_PER_WORD) |
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1079 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); |
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1080 if (BYTES_BIG_ENDIAN) |
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1081 /* Adjust the address so that the address-after-the-data is |
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1082 unchanged. */ |
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1083 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) |
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1084 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (mem)))); |
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1085 |
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1086 mem = adjust_address_nv (mem, mode, offset); |
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1087 } |
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1088 } |
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1089 else |
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1090 { |
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1091 mem = gen_rtx_CONCATN (mode, rtvec_alloc (nregs)); |
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1092 for (i = 0; i < nregs; i++) |
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1093 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) |
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1094 { |
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1095 gcc_assert (regno_save_mem[regno + i][1]); |
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1096 XVECEXP (mem, 0, i) = copy_rtx (regno_save_mem[regno + i][1]); |
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1097 } |
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1098 else |
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1099 { |
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1100 gcc_assert (save_mode[regno] != VOIDmode); |
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1101 XVECEXP (mem, 0, i) = gen_rtx_REG (save_mode [regno], |
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1102 regno + i); |
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1103 } |
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1104 } |
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1105 |
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1106 gcc_assert (GET_MODE (mem) == mode); |
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1107 *loc = mem; |
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1108 } |
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1109 |
| 0 | 1110 |
| 1111 /* Insert a sequence of insns to restore. Place these insns in front of | |
| 1112 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is | |
| 1113 the maximum number of registers which should be restored during this call. | |
| 1114 It should never be less than 1 since we only work with entire registers. | |
| 1115 | |
| 1116 Note that we have verified in init_caller_save that we can do this | |
| 1117 with a simple SET, so use it. Set INSN_CODE to what we save there | |
| 1118 since the address might not be valid so the insn might not be recognized. | |
| 1119 These insns will be reloaded and have register elimination done by | |
| 1120 find_reload, so we need not worry about that here. | |
| 1121 | |
| 1122 Return the extra number of registers saved. */ | |
| 1123 | |
| 1124 static int | |
| 1125 insert_restore (struct insn_chain *chain, int before_p, int regno, | |
| 1126 int maxrestore, enum machine_mode *save_mode) | |
| 1127 { | |
| 1128 int i, k; | |
| 1129 rtx pat = NULL_RTX; | |
| 1130 int code; | |
| 1131 unsigned int numregs = 0; | |
| 1132 struct insn_chain *new_chain; | |
| 1133 rtx mem; | |
| 1134 | |
| 1135 /* A common failure mode if register status is not correct in the | |
| 1136 RTL is for this routine to be called with a REGNO we didn't | |
| 1137 expect to save. That will cause us to write an insn with a (nil) | |
| 1138 SET_DEST or SET_SRC. Instead of doing so and causing a crash | |
| 1139 later, check for this common case here instead. This will remove | |
| 1140 one step in debugging such problems. */ | |
| 1141 gcc_assert (regno_save_mem[regno][1]); | |
| 1142 | |
| 1143 /* Get the pattern to emit and update our status. | |
| 1144 | |
| 1145 See if we can restore `maxrestore' registers at once. Work | |
| 1146 backwards to the single register case. */ | |
| 1147 for (i = maxrestore; i > 0; i--) | |
| 1148 { | |
| 1149 int j; | |
| 1150 int ok = 1; | |
| 1151 | |
| 1152 if (regno_save_mem[regno][i] == 0) | |
| 1153 continue; | |
| 1154 | |
| 1155 for (j = 0; j < i; j++) | |
| 1156 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j)) | |
| 1157 { | |
| 1158 ok = 0; | |
| 1159 break; | |
| 1160 } | |
| 1161 /* Must do this one restore at a time. */ | |
| 1162 if (! ok) | |
| 1163 continue; | |
| 1164 | |
| 1165 numregs = i; | |
| 1166 break; | |
| 1167 } | |
| 1168 | |
| 1169 mem = regno_save_mem [regno][numregs]; | |
| 1170 if (save_mode [regno] != VOIDmode | |
| 1171 && save_mode [regno] != GET_MODE (mem) | |
| 1172 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]] | |
| 1173 /* Check that insn to restore REGNO in save_mode[regno] is | |
| 1174 correct. */ | |
| 1175 && reg_save_code (regno, save_mode[regno]) >= 0) | |
| 1176 mem = adjust_address (mem, save_mode[regno], 0); | |
| 1177 else | |
| 1178 mem = copy_rtx (mem); | |
| 1179 | |
| 1180 /* Verify that the alignment of spill space is equal to or greater | |
| 1181 than required. */ | |
| 1182 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT, | |
| 1183 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem)); | |
| 1184 | |
| 1185 pat = gen_rtx_SET (VOIDmode, | |
| 1186 gen_rtx_REG (GET_MODE (mem), | |
| 1187 regno), mem); | |
| 1188 code = reg_restore_code (regno, GET_MODE (mem)); | |
| 1189 new_chain = insert_one_insn (chain, before_p, code, pat); | |
| 1190 | |
| 1191 /* Clear status for all registers we restored. */ | |
| 1192 for (k = 0; k < i; k++) | |
| 1193 { | |
| 1194 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k); | |
| 1195 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k); | |
| 1196 n_regs_saved--; | |
| 1197 } | |
| 1198 | |
| 1199 /* Tell our callers how many extra registers we saved/restored. */ | |
| 1200 return numregs - 1; | |
| 1201 } | |
| 1202 | |
| 1203 /* Like insert_restore above, but save registers instead. */ | |
| 1204 | |
| 1205 static int | |
| 1206 insert_save (struct insn_chain *chain, int before_p, int regno, | |
| 1207 HARD_REG_SET (*to_save), enum machine_mode *save_mode) | |
| 1208 { | |
| 1209 int i; | |
| 1210 unsigned int k; | |
| 1211 rtx pat = NULL_RTX; | |
| 1212 int code; | |
| 1213 unsigned int numregs = 0; | |
| 1214 struct insn_chain *new_chain; | |
| 1215 rtx mem; | |
| 1216 | |
| 1217 /* A common failure mode if register status is not correct in the | |
| 1218 RTL is for this routine to be called with a REGNO we didn't | |
| 1219 expect to save. That will cause us to write an insn with a (nil) | |
| 1220 SET_DEST or SET_SRC. Instead of doing so and causing a crash | |
| 1221 later, check for this common case here. This will remove one | |
| 1222 step in debugging such problems. */ | |
| 1223 gcc_assert (regno_save_mem[regno][1]); | |
| 1224 | |
| 1225 /* Get the pattern to emit and update our status. | |
| 1226 | |
| 1227 See if we can save several registers with a single instruction. | |
| 1228 Work backwards to the single register case. */ | |
| 1229 for (i = MOVE_MAX_WORDS; i > 0; i--) | |
| 1230 { | |
| 1231 int j; | |
| 1232 int ok = 1; | |
| 1233 if (regno_save_mem[regno][i] == 0) | |
| 1234 continue; | |
| 1235 | |
| 1236 for (j = 0; j < i; j++) | |
| 1237 if (! TEST_HARD_REG_BIT (*to_save, regno + j)) | |
| 1238 { | |
| 1239 ok = 0; | |
| 1240 break; | |
| 1241 } | |
| 1242 /* Must do this one save at a time. */ | |
| 1243 if (! ok) | |
| 1244 continue; | |
| 1245 | |
| 1246 numregs = i; | |
| 1247 break; | |
| 1248 } | |
| 1249 | |
| 1250 mem = regno_save_mem [regno][numregs]; | |
| 1251 if (save_mode [regno] != VOIDmode | |
| 1252 && save_mode [regno] != GET_MODE (mem) | |
| 1253 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]] | |
| 1254 /* Check that insn to save REGNO in save_mode[regno] is | |
| 1255 correct. */ | |
| 1256 && reg_save_code (regno, save_mode[regno]) >= 0) | |
| 1257 mem = adjust_address (mem, save_mode[regno], 0); | |
| 1258 else | |
| 1259 mem = copy_rtx (mem); | |
| 1260 | |
| 1261 /* Verify that the alignment of spill space is equal to or greater | |
| 1262 than required. */ | |
| 1263 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT, | |
| 1264 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem)); | |
| 1265 | |
| 1266 pat = gen_rtx_SET (VOIDmode, mem, | |
| 1267 gen_rtx_REG (GET_MODE (mem), | |
| 1268 regno)); | |
| 1269 code = reg_save_code (regno, GET_MODE (mem)); | |
| 1270 new_chain = insert_one_insn (chain, before_p, code, pat); | |
| 1271 | |
| 1272 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */ | |
| 1273 for (k = 0; k < numregs; k++) | |
| 1274 { | |
| 1275 SET_HARD_REG_BIT (hard_regs_saved, regno + k); | |
| 1276 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k); | |
| 1277 n_regs_saved++; | |
| 1278 } | |
| 1279 | |
| 1280 /* Tell our callers how many extra registers we saved/restored. */ | |
| 1281 return numregs - 1; | |
| 1282 } | |
| 1283 | |
| 1284 /* A for_each_rtx callback used by add_used_regs. Add the hard-register | |
| 1285 equivalent of each REG to regset DATA. */ | |
| 1286 | |
| 1287 static int | |
| 1288 add_used_regs_1 (rtx *loc, void *data) | |
| 1289 { | |
| 1290 int regno, i; | |
| 1291 regset live; | |
| 1292 rtx x; | |
| 1293 | |
| 1294 x = *loc; | |
| 1295 live = (regset) data; | |
| 1296 if (REG_P (x)) | |
| 1297 { | |
| 1298 regno = REGNO (x); | |
| 1299 if (!HARD_REGISTER_NUM_P (regno)) | |
| 1300 regno = reg_renumber[regno]; | |
| 1301 if (regno >= 0) | |
| 1302 for (i = hard_regno_nregs[regno][GET_MODE (x)] - 1; i >= 0; i--) | |
| 1303 SET_REGNO_REG_SET (live, regno + i); | |
| 1304 } | |
| 1305 return 0; | |
| 1306 } | |
| 1307 | |
| 1308 /* A note_uses callback used by insert_one_insn. Add the hard-register | |
| 1309 equivalent of each REG to regset DATA. */ | |
| 1310 | |
| 1311 static void | |
| 1312 add_used_regs (rtx *loc, void *data) | |
| 1313 { | |
| 1314 for_each_rtx (loc, add_used_regs_1, data); | |
| 1315 } | |
| 1316 | |
| 1317 /* Emit a new caller-save insn and set the code. */ | |
| 1318 static struct insn_chain * | |
| 1319 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat) | |
| 1320 { | |
| 1321 rtx insn = chain->insn; | |
| 1322 struct insn_chain *new_chain; | |
| 1323 | |
| 1324 #ifdef HAVE_cc0 | |
| 1325 /* If INSN references CC0, put our insns in front of the insn that sets | |
| 1326 CC0. This is always safe, since the only way we could be passed an | |
| 1327 insn that references CC0 is for a restore, and doing a restore earlier | |
| 1328 isn't a problem. We do, however, assume here that CALL_INSNs don't | |
| 1329 reference CC0. Guard against non-INSN's like CODE_LABEL. */ | |
| 1330 | |
| 1331 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn)) | |
| 1332 && before_p | |
| 1333 && reg_referenced_p (cc0_rtx, PATTERN (insn))) | |
| 1334 chain = chain->prev, insn = chain->insn; | |
| 1335 #endif | |
| 1336 | |
| 1337 new_chain = new_insn_chain (); | |
| 1338 if (before_p) | |
| 1339 { | |
| 1340 rtx link; | |
| 1341 | |
| 1342 new_chain->prev = chain->prev; | |
| 1343 if (new_chain->prev != 0) | |
| 1344 new_chain->prev->next = new_chain; | |
| 1345 else | |
| 1346 reload_insn_chain = new_chain; | |
| 1347 | |
| 1348 chain->prev = new_chain; | |
| 1349 new_chain->next = chain; | |
| 1350 new_chain->insn = emit_insn_before (pat, insn); | |
| 1351 /* ??? It would be nice if we could exclude the already / still saved | |
| 1352 registers from the live sets. */ | |
| 1353 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout); | |
| 1354 note_uses (&PATTERN (chain->insn), add_used_regs, | |
| 1355 &new_chain->live_throughout); | |
| 1356 /* If CHAIN->INSN is a call, then the registers which contain | |
| 1357 the arguments to the function are live in the new insn. */ | |
| 1358 if (CALL_P (chain->insn)) | |
| 1359 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn); | |
| 1360 link != NULL_RTX; | |
| 1361 link = XEXP (link, 1)) | |
| 1362 note_uses (&XEXP (link, 0), add_used_regs, | |
| 1363 &new_chain->live_throughout); | |
| 1364 | |
| 1365 CLEAR_REG_SET (&new_chain->dead_or_set); | |
| 1366 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block))) | |
| 1367 BB_HEAD (BASIC_BLOCK (chain->block)) = new_chain->insn; | |
| 1368 } | |
| 1369 else | |
| 1370 { | |
| 1371 new_chain->next = chain->next; | |
| 1372 if (new_chain->next != 0) | |
| 1373 new_chain->next->prev = new_chain; | |
| 1374 chain->next = new_chain; | |
| 1375 new_chain->prev = chain; | |
| 1376 new_chain->insn = emit_insn_after (pat, insn); | |
| 1377 /* ??? It would be nice if we could exclude the already / still saved | |
| 1378 registers from the live sets, and observe REG_UNUSED notes. */ | |
| 1379 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout); | |
| 1380 /* Registers that are set in CHAIN->INSN live in the new insn. | |
| 1381 (Unless there is a REG_UNUSED note for them, but we don't | |
| 1382 look for them here.) */ | |
| 1383 note_stores (PATTERN (chain->insn), add_stored_regs, | |
| 1384 &new_chain->live_throughout); | |
| 1385 CLEAR_REG_SET (&new_chain->dead_or_set); | |
| 1386 if (chain->insn == BB_END (BASIC_BLOCK (chain->block))) | |
| 1387 BB_END (BASIC_BLOCK (chain->block)) = new_chain->insn; | |
| 1388 } | |
| 1389 new_chain->block = chain->block; | |
| 1390 new_chain->is_caller_save_insn = 1; | |
| 1391 | |
| 1392 INSN_CODE (new_chain->insn) = code; | |
| 1393 return new_chain; | |
| 1394 } | |
| 1395 #include "gt-caller-save.h" |