Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/alpha/predicates.md @ 55:77e2b8dfacca gcc-4.4.5
update it from 4.4.3 to 4.5.0
| author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Fri, 12 Feb 2010 23:39:51 +0900 |
| parents | 3bfb6c00c1e0 |
| children | b7f97abdc517 |
| rev | line source |
|---|---|
| 0 | 1 ;; Predicate definitions for DEC Alpha. |
| 2 ;; Copyright (C) 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. | |
| 3 ;; | |
| 4 ;; This file is part of GCC. | |
| 5 ;; | |
| 6 ;; GCC is free software; you can redistribute it and/or modify | |
| 7 ;; it under the terms of the GNU General Public License as published by | |
| 8 ;; the Free Software Foundation; either version 3, or (at your option) | |
| 9 ;; any later version. | |
| 10 ;; | |
| 11 ;; GCC is distributed in the hope that it will be useful, | |
| 12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 ;; GNU General Public License for more details. | |
| 15 ;; | |
| 16 ;; You should have received a copy of the GNU General Public License | |
| 17 ;; along with GCC; see the file COPYING3. If not see | |
| 18 ;; <http://www.gnu.org/licenses/>. | |
| 19 | |
| 20 ;; Return 1 if OP is the zero constant for MODE. | |
| 21 (define_predicate "const0_operand" | |
| 22 (and (match_code "const_int,const_double,const_vector") | |
| 23 (match_test "op == CONST0_RTX (mode)"))) | |
| 24 | |
| 25 ;; Returns true if OP is either the constant zero or a register. | |
| 26 (define_predicate "reg_or_0_operand" | |
| 27 (ior (match_operand 0 "register_operand") | |
| 28 (match_operand 0 "const0_operand"))) | |
| 29 | |
| 30 ;; Return 1 if OP is a constant in the range of 0-63 (for a shift) or | |
| 31 ;; any register. | |
| 32 (define_predicate "reg_or_6bit_operand" | |
| 33 (if_then_else (match_code "const_int") | |
| 34 (match_test "INTVAL (op) >= 0 && INTVAL (op) < 64") | |
| 35 (match_operand 0 "register_operand"))) | |
| 36 | |
| 37 ;; Return 1 if OP is an 8-bit constant. | |
| 38 (define_predicate "cint8_operand" | |
| 39 (and (match_code "const_int") | |
| 40 (match_test "INTVAL (op) >= 0 && INTVAL (op) < 256"))) | |
| 41 | |
| 42 ;; Return 1 if OP is an 8-bit constant or any register. | |
| 43 (define_predicate "reg_or_8bit_operand" | |
| 44 (if_then_else (match_code "const_int") | |
| 45 (match_test "INTVAL (op) >= 0 && INTVAL (op) < 256") | |
| 46 (match_operand 0 "register_operand"))) | |
| 47 | |
| 48 ;; Return 1 if OP is a constant or any register. | |
| 49 (define_predicate "reg_or_cint_operand" | |
| 50 (ior (match_operand 0 "register_operand") | |
| 51 (match_operand 0 "const_int_operand"))) | |
| 52 | |
| 53 ;; Return 1 if the operand is a valid second operand to an add insn. | |
| 54 (define_predicate "add_operand" | |
| 55 (if_then_else (match_code "const_int") | |
| 56 (match_test "satisfies_constraint_K (op) || satisfies_constraint_L (op)") | |
| 57 (match_operand 0 "register_operand"))) | |
| 58 | |
| 59 ;; Return 1 if the operand is a valid second operand to a | |
| 60 ;; sign-extending add insn. | |
| 61 (define_predicate "sext_add_operand" | |
| 62 (if_then_else (match_code "const_int") | |
| 63 (match_test "satisfies_constraint_I (op) || satisfies_constraint_O (op)") | |
| 64 (match_operand 0 "register_operand"))) | |
| 65 | |
| 66 ;; Return 1 if the operand is a non-symbolic constant operand that | |
| 67 ;; does not satisfy add_operand. | |
| 68 (define_predicate "non_add_const_operand" | |
| 69 (and (match_code "const_int,const_double,const_vector") | |
| 70 (not (match_operand 0 "add_operand")))) | |
| 71 | |
| 72 ;; Return 1 if the operand is a non-symbolic, nonzero constant operand. | |
| 73 (define_predicate "non_zero_const_operand" | |
| 74 (and (match_code "const_int,const_double,const_vector") | |
| 75 (match_test "op != CONST0_RTX (mode)"))) | |
| 76 | |
| 77 ;; Return 1 if OP is the constant 4 or 8. | |
| 78 (define_predicate "const48_operand" | |
| 79 (and (match_code "const_int") | |
| 80 (match_test "INTVAL (op) == 4 || INTVAL (op) == 8"))) | |
| 81 | |
| 82 ;; Return 1 if OP is a valid first operand to an AND insn. | |
| 83 (define_predicate "and_operand" | |
| 84 (if_then_else (match_code "const_int") | |
| 85 (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) < 0x100 | |
| 86 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100 | |
| 87 || zap_mask (INTVAL (op))") | |
| 88 (if_then_else (match_code "const_double") | |
| 89 (match_test "GET_MODE (op) == VOIDmode | |
| 90 && zap_mask (CONST_DOUBLE_LOW (op)) | |
| 91 && zap_mask (CONST_DOUBLE_HIGH (op))") | |
| 92 (match_operand 0 "register_operand")))) | |
| 93 | |
| 94 ;; Return 1 if OP is a valid first operand to an IOR or XOR insn. | |
| 95 (define_predicate "or_operand" | |
| 96 (if_then_else (match_code "const_int") | |
| 97 (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) < 0x100 | |
| 98 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100") | |
| 99 (match_operand 0 "register_operand"))) | |
| 100 | |
| 101 ;; Return 1 if OP is a constant that is the width, in bits, of an integral | |
| 102 ;; mode not larger than DImode. | |
| 103 (define_predicate "mode_width_operand" | |
| 104 (match_code "const_int") | |
| 105 { | |
| 106 HOST_WIDE_INT i = INTVAL (op); | |
| 107 return i == 8 || i == 16 || i == 32 || i == 64; | |
| 108 }) | |
| 109 | |
| 110 ;; Return 1 if OP is a constant that is a mask of ones of width of an | |
| 111 ;; integral machine mode not larger than DImode. | |
| 112 (define_predicate "mode_mask_operand" | |
| 113 (match_code "const_int,const_double") | |
| 114 { | |
|
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|
115 if (CONST_INT_P (op)) |
| 0 | 116 { |
| 117 HOST_WIDE_INT value = INTVAL (op); | |
| 118 | |
| 119 if (value == 0xff) | |
| 120 return 1; | |
| 121 if (value == 0xffff) | |
| 122 return 1; | |
| 123 if (value == 0xffffffff) | |
| 124 return 1; | |
| 125 if (value == -1) | |
| 126 return 1; | |
| 127 } | |
| 128 else if (HOST_BITS_PER_WIDE_INT == 32 && GET_CODE (op) == CONST_DOUBLE) | |
| 129 { | |
| 130 if (CONST_DOUBLE_LOW (op) == 0xffffffff && CONST_DOUBLE_HIGH (op) == 0) | |
| 131 return 1; | |
| 132 } | |
| 133 return 0; | |
| 134 }) | |
| 135 | |
| 136 ;; Return 1 if OP is a multiple of 8 less than 64. | |
| 137 (define_predicate "mul8_operand" | |
| 138 (match_code "const_int") | |
| 139 { | |
| 140 unsigned HOST_WIDE_INT i = INTVAL (op); | |
| 141 return i < 64 && i % 8 == 0; | |
| 142 }) | |
| 143 | |
| 144 ;; Return 1 if OP is a hard floating-point register. | |
| 145 (define_predicate "hard_fp_register_operand" | |
| 146 (match_operand 0 "register_operand") | |
| 147 { | |
| 148 if (GET_CODE (op) == SUBREG) | |
| 149 op = SUBREG_REG (op); | |
| 150 return REGNO_REG_CLASS (REGNO (op)) == FLOAT_REGS; | |
| 151 }) | |
| 152 | |
| 153 ;; Return 1 if OP is a hard general register. | |
| 154 (define_predicate "hard_int_register_operand" | |
| 155 (match_operand 0 "register_operand") | |
| 156 { | |
| 157 if (GET_CODE (op) == SUBREG) | |
| 158 op = SUBREG_REG (op); | |
| 159 return REGNO_REG_CLASS (REGNO (op)) == GENERAL_REGS; | |
| 160 }) | |
| 161 | |
| 162 ;; Return 1 if OP is something that can be reloaded into a register; | |
| 163 ;; if it is a MEM, it need not be valid. | |
| 164 (define_predicate "some_operand" | |
| 165 (ior (match_code "reg,mem,const_int,const_double,const_vector, | |
| 166 label_ref,symbol_ref,const,high") | |
| 167 (and (match_code "subreg") | |
| 168 (match_test "some_operand (SUBREG_REG (op), VOIDmode)")))) | |
| 169 | |
| 170 ;; Likewise, but don't accept constants. | |
| 171 (define_predicate "some_ni_operand" | |
| 172 (ior (match_code "reg,mem") | |
| 173 (and (match_code "subreg") | |
| 174 (match_test "some_ni_operand (SUBREG_REG (op), VOIDmode)")))) | |
| 175 | |
| 176 ;; Return 1 if OP is a valid operand for the source of a move insn. | |
| 177 (define_predicate "input_operand" | |
| 178 (match_code "label_ref,symbol_ref,const,high,reg,subreg,mem, | |
| 179 const_double,const_vector,const_int") | |
| 180 { | |
| 181 switch (GET_CODE (op)) | |
| 182 { | |
| 183 case LABEL_REF: | |
| 184 case SYMBOL_REF: | |
| 185 case CONST: | |
| 186 if (TARGET_EXPLICIT_RELOCS) | |
| 187 { | |
| 188 /* We don't split symbolic operands into something unintelligable | |
| 189 until after reload, but we do not wish non-small, non-global | |
| 190 symbolic operands to be reconstructed from their high/lo_sum | |
| 191 form. */ | |
| 192 return (small_symbolic_operand (op, mode) | |
| 193 || global_symbolic_operand (op, mode) | |
| 194 || gotdtp_symbolic_operand (op, mode) | |
| 195 || gottp_symbolic_operand (op, mode)); | |
| 196 } | |
| 197 | |
| 198 /* This handles both the Windows/NT and OSF cases. */ | |
| 199 return mode == ptr_mode || mode == DImode; | |
| 200 | |
| 201 case HIGH: | |
| 202 return (TARGET_EXPLICIT_RELOCS | |
| 203 && local_symbolic_operand (XEXP (op, 0), mode)); | |
| 204 | |
| 205 case REG: | |
| 206 return 1; | |
| 207 | |
| 208 case SUBREG: | |
| 209 if (register_operand (op, mode)) | |
| 210 return 1; | |
| 211 /* ... fall through ... */ | |
| 212 case MEM: | |
| 213 return ((TARGET_BWX || (mode != HImode && mode != QImode)) | |
| 214 && general_operand (op, mode)); | |
| 215 | |
| 216 case CONST_DOUBLE: | |
| 217 return op == CONST0_RTX (mode); | |
| 218 | |
| 219 case CONST_VECTOR: | |
| 220 if (reload_in_progress || reload_completed) | |
| 221 return alpha_legitimate_constant_p (op); | |
| 222 return op == CONST0_RTX (mode); | |
| 223 | |
| 224 case CONST_INT: | |
| 225 if (mode == QImode || mode == HImode) | |
| 226 return true; | |
| 227 if (reload_in_progress || reload_completed) | |
| 228 return alpha_legitimate_constant_p (op); | |
| 229 return add_operand (op, mode); | |
| 230 | |
| 231 default: | |
| 232 gcc_unreachable (); | |
| 233 } | |
| 234 return 0; | |
| 235 }) | |
| 236 | |
| 237 ;; Return 1 if OP is a SYMBOL_REF for a function known to be in this | |
| 238 ;; file, and in the same section as the current function. | |
| 239 | |
| 240 (define_predicate "samegp_function_operand" | |
| 241 (match_code "symbol_ref") | |
| 242 { | |
| 243 /* Easy test for recursion. */ | |
| 244 if (op == XEXP (DECL_RTL (current_function_decl), 0)) | |
| 245 return true; | |
| 246 | |
| 247 /* Functions that are not local can be overridden, and thus may | |
| 248 not share the same gp. */ | |
| 249 if (! SYMBOL_REF_LOCAL_P (op)) | |
| 250 return false; | |
| 251 | |
| 252 /* If -msmall-data is in effect, assume that there is only one GP | |
| 253 for the module, and so any local symbol has this property. We | |
| 254 need explicit relocations to be able to enforce this for symbols | |
| 255 not defined in this unit of translation, however. */ | |
| 256 if (TARGET_EXPLICIT_RELOCS && TARGET_SMALL_DATA) | |
| 257 return true; | |
| 258 | |
| 259 /* Functions that are not external are defined in this UoT, | |
| 260 and thus must share the same gp. */ | |
| 261 return ! SYMBOL_REF_EXTERNAL_P (op); | |
| 262 }) | |
| 263 | |
| 264 ;; Return 1 if OP is a SYMBOL_REF for which we can make a call via bsr. | |
| 265 (define_predicate "direct_call_operand" | |
| 266 (match_operand 0 "samegp_function_operand") | |
| 267 { | |
| 268 tree op_decl, cfun_sec, op_sec; | |
| 269 | |
| 270 /* If profiling is implemented via linker tricks, we can't jump | |
| 271 to the nogp alternate entry point. Note that crtl->profile | |
| 272 would not be correct, since that doesn't indicate if the target | |
| 273 function uses profiling. */ | |
| 274 /* ??? TARGET_PROFILING_NEEDS_GP isn't really the right test, | |
| 275 but is approximately correct for the OSF ABIs. Don't know | |
| 276 what to do for VMS, NT, or UMK. */ | |
| 277 if (!TARGET_PROFILING_NEEDS_GP && profile_flag) | |
| 278 return false; | |
| 279 | |
| 280 /* Must be a function. In some cases folks create thunks in static | |
| 281 data structures and then make calls to them. If we allow the | |
| 282 direct call, we'll get an error from the linker about !samegp reloc | |
| 283 against a symbol without a .prologue directive. */ | |
| 284 if (!SYMBOL_REF_FUNCTION_P (op)) | |
| 285 return false; | |
| 286 | |
| 287 /* Must be "near" so that the branch is assumed to reach. With | |
| 288 -msmall-text, this is assumed true of all local symbols. Since | |
| 289 we've already checked samegp, locality is already assured. */ | |
| 290 if (TARGET_SMALL_TEXT) | |
| 291 return true; | |
| 292 | |
| 293 /* Otherwise, a decl is "near" if it is defined in the same section. */ | |
| 294 if (flag_function_sections) | |
| 295 return false; | |
| 296 | |
| 297 op_decl = SYMBOL_REF_DECL (op); | |
| 298 if (DECL_ONE_ONLY (current_function_decl) | |
| 299 || (op_decl && DECL_ONE_ONLY (op_decl))) | |
| 300 return false; | |
| 301 | |
| 302 cfun_sec = DECL_SECTION_NAME (current_function_decl); | |
| 303 op_sec = op_decl ? DECL_SECTION_NAME (op_decl) : NULL; | |
| 304 return ((!cfun_sec && !op_sec) | |
| 305 || (cfun_sec && op_sec | |
| 306 && strcmp (TREE_STRING_POINTER (cfun_sec), | |
| 307 TREE_STRING_POINTER (op_sec)) == 0)); | |
| 308 }) | |
| 309 | |
| 310 ;; Return 1 if OP is a valid operand for the MEM of a CALL insn. | |
| 311 ;; | |
| 312 ;; For TARGET_ABI_OSF, we want to restrict to R27 or a pseudo. | |
| 313 ;; For TARGET_ABI_UNICOSMK, we want to restrict to registers. | |
| 314 | |
| 315 (define_predicate "call_operand" | |
| 316 (if_then_else (match_code "reg") | |
| 317 (match_test "!TARGET_ABI_OSF | |
| 318 || REGNO (op) == 27 || REGNO (op) > LAST_VIRTUAL_REGISTER") | |
| 319 (and (match_test "!TARGET_ABI_UNICOSMK") | |
| 320 (match_code "symbol_ref")))) | |
| 321 | |
| 322 ;; Return true if OP is a LABEL_REF, or SYMBOL_REF or CONST referencing | |
| 323 ;; a (non-tls) variable known to be defined in this file. | |
| 324 (define_predicate "local_symbolic_operand" | |
| 325 (match_code "label_ref,const,symbol_ref") | |
| 326 { | |
| 327 if (GET_CODE (op) == CONST | |
| 328 && GET_CODE (XEXP (op, 0)) == PLUS | |
|
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77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
47
diff
changeset
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329 && CONST_INT_P (XEXP (XEXP (op, 0), 1))) |
| 0 | 330 op = XEXP (XEXP (op, 0), 0); |
| 331 | |
| 332 if (GET_CODE (op) == LABEL_REF) | |
| 333 return 1; | |
| 334 | |
| 335 if (GET_CODE (op) != SYMBOL_REF) | |
| 336 return 0; | |
| 337 | |
| 338 return (SYMBOL_REF_LOCAL_P (op) | |
| 339 && !SYMBOL_REF_WEAK (op) | |
| 340 && !SYMBOL_REF_TLS_MODEL (op)); | |
| 341 }) | |
| 342 | |
| 343 ;; Return true if OP is a SYMBOL_REF or CONST referencing a variable | |
| 344 ;; known to be defined in this file in the small data area. | |
| 345 (define_predicate "small_symbolic_operand" | |
| 346 (match_code "const,symbol_ref") | |
| 347 { | |
| 348 if (! TARGET_SMALL_DATA) | |
| 349 return 0; | |
| 350 | |
| 351 if (GET_CODE (op) == CONST | |
| 352 && GET_CODE (XEXP (op, 0)) == PLUS | |
|
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77e2b8dfacca
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
47
diff
changeset
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353 && CONST_INT_P (XEXP (XEXP (op, 0), 1))) |
| 0 | 354 op = XEXP (XEXP (op, 0), 0); |
| 355 | |
| 356 if (GET_CODE (op) != SYMBOL_REF) | |
| 357 return 0; | |
| 358 | |
| 359 /* ??? There's no encode_section_info equivalent for the rtl | |
| 360 constant pool, so SYMBOL_FLAG_SMALL never gets set. */ | |
| 361 if (CONSTANT_POOL_ADDRESS_P (op)) | |
| 362 return GET_MODE_SIZE (get_pool_mode (op)) <= g_switch_value; | |
| 363 | |
| 364 return (SYMBOL_REF_LOCAL_P (op) | |
| 365 && SYMBOL_REF_SMALL_P (op) | |
| 366 && !SYMBOL_REF_WEAK (op) | |
| 367 && !SYMBOL_REF_TLS_MODEL (op)); | |
| 368 }) | |
| 369 | |
| 370 ;; Return true if OP is a SYMBOL_REF or CONST referencing a variable | |
| 371 ;; not known (or known not) to be defined in this file. | |
| 372 (define_predicate "global_symbolic_operand" | |
| 373 (match_code "const,symbol_ref") | |
| 374 { | |
| 375 if (GET_CODE (op) == CONST | |
| 376 && GET_CODE (XEXP (op, 0)) == PLUS | |
|
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77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
47
diff
changeset
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377 && CONST_INT_P (XEXP (XEXP (op, 0), 1))) |
| 0 | 378 op = XEXP (XEXP (op, 0), 0); |
| 379 | |
| 380 if (GET_CODE (op) != SYMBOL_REF) | |
| 381 return 0; | |
| 382 | |
| 383 return ((!SYMBOL_REF_LOCAL_P (op) || SYMBOL_REF_WEAK (op)) | |
| 384 && !SYMBOL_REF_TLS_MODEL (op)); | |
| 385 }) | |
| 386 | |
| 387 ;; Returns 1 if OP is a symbolic operand, i.e. a symbol_ref or a label_ref, | |
| 388 ;; possibly with an offset. | |
| 389 (define_predicate "symbolic_operand" | |
| 390 (ior (match_code "symbol_ref,label_ref") | |
| 391 (and (match_code "const") | |
| 392 (match_test "GET_CODE (XEXP (op,0)) == PLUS | |
| 393 && (GET_CODE (XEXP (XEXP (op,0), 0)) == SYMBOL_REF | |
| 394 || GET_CODE (XEXP (XEXP (op,0), 0)) == LABEL_REF) | |
|
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77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
47
diff
changeset
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395 && CONST_INT_P (XEXP (XEXP (op,0), 1))")))) |
| 0 | 396 |
| 397 ;; Return true if OP is valid for 16-bit DTP relative relocations. | |
| 398 (define_predicate "dtp16_symbolic_operand" | |
| 399 (and (match_code "const") | |
| 400 (match_test "tls_symbolic_operand_1 (op, 16, UNSPEC_DTPREL)"))) | |
| 401 | |
| 402 ;; Return true if OP is valid for 32-bit DTP relative relocations. | |
| 403 (define_predicate "dtp32_symbolic_operand" | |
| 404 (and (match_code "const") | |
| 405 (match_test "tls_symbolic_operand_1 (op, 32, UNSPEC_DTPREL)"))) | |
| 406 | |
| 407 ;; Return true if OP is valid for 64-bit DTP relative relocations. | |
| 408 (define_predicate "gotdtp_symbolic_operand" | |
| 409 (and (match_code "const") | |
| 410 (match_test "tls_symbolic_operand_1 (op, 64, UNSPEC_DTPREL)"))) | |
| 411 | |
| 412 ;; Return true if OP is valid for 16-bit TP relative relocations. | |
| 413 (define_predicate "tp16_symbolic_operand" | |
| 414 (and (match_code "const") | |
| 415 (match_test "tls_symbolic_operand_1 (op, 16, UNSPEC_TPREL)"))) | |
| 416 | |
| 417 ;; Return true if OP is valid for 32-bit TP relative relocations. | |
| 418 (define_predicate "tp32_symbolic_operand" | |
| 419 (and (match_code "const") | |
| 420 (match_test "tls_symbolic_operand_1 (op, 32, UNSPEC_TPREL)"))) | |
| 421 | |
| 422 ;; Return true if OP is valid for 64-bit TP relative relocations. | |
| 423 (define_predicate "gottp_symbolic_operand" | |
| 424 (and (match_code "const") | |
| 425 (match_test "tls_symbolic_operand_1 (op, 64, UNSPEC_TPREL)"))) | |
| 426 | |
| 427 ;; Return 1 if this memory address is a known aligned register plus | |
| 428 ;; a constant. It must be a valid address. This means that we can do | |
| 429 ;; this as an aligned reference plus some offset. | |
| 430 ;; | |
| 431 ;; Take into account what reload will do. Oh god this is awful. | |
| 432 ;; The horrible comma-operator construct below is to prevent genrecog | |
| 433 ;; from thinking that this predicate accepts REG and SUBREG. We don't | |
| 434 ;; use recog during reload, so pretending these codes are accepted | |
| 435 ;; pessimizes things a tad. | |
| 436 | |
| 437 (define_special_predicate "aligned_memory_operand" | |
| 438 (ior (match_test "op = resolve_reload_operand (op), 0") | |
| 439 (match_code "mem")) | |
| 440 { | |
| 441 rtx base; | |
| 442 | |
| 443 if (MEM_ALIGN (op) >= 32) | |
| 444 return 1; | |
| 445 op = XEXP (op, 0); | |
| 446 | |
| 447 /* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo) | |
| 448 sorts of constructs. Dig for the real base register. */ | |
| 449 if (reload_in_progress | |
| 450 && GET_CODE (op) == PLUS | |
| 451 && GET_CODE (XEXP (op, 0)) == PLUS) | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
47
diff
changeset
|
452 base = XEXP (XEXP (op, 0), 0); |
| 0 | 453 else |
| 454 { | |
| 455 if (! memory_address_p (mode, op)) | |
| 456 return 0; | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
47
diff
changeset
|
457 base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op); |
| 0 | 458 } |
| 459 | |
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460 return (REG_P (base) && REGNO_POINTER_ALIGN (REGNO (base)) >= 32); |
| 0 | 461 }) |
| 462 | |
| 463 ;; Similar, but return 1 if OP is a MEM which is not alignable. | |
| 464 | |
| 465 (define_special_predicate "unaligned_memory_operand" | |
| 466 (ior (match_test "op = resolve_reload_operand (op), 0") | |
| 467 (match_code "mem")) | |
| 468 { | |
| 469 rtx base; | |
| 470 | |
| 471 if (MEM_ALIGN (op) >= 32) | |
| 472 return 0; | |
| 473 op = XEXP (op, 0); | |
| 474 | |
| 475 /* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo) | |
| 476 sorts of constructs. Dig for the real base register. */ | |
| 477 if (reload_in_progress | |
| 478 && GET_CODE (op) == PLUS | |
| 479 && GET_CODE (XEXP (op, 0)) == PLUS) | |
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480 base = XEXP (XEXP (op, 0), 0); |
| 0 | 481 else |
| 482 { | |
| 483 if (! memory_address_p (mode, op)) | |
| 484 return 0; | |
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485 base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op); |
| 0 | 486 } |
| 487 | |
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488 return (REG_P (base) && REGNO_POINTER_ALIGN (REGNO (base)) < 32); |
| 0 | 489 }) |
| 490 | |
| 491 ;; Return 1 if OP is any memory location. During reload a pseudo matches. | |
| 492 (define_special_predicate "any_memory_operand" | |
| 493 (match_code "mem,reg,subreg") | |
| 494 { | |
| 495 if (GET_CODE (op) == SUBREG) | |
| 496 op = SUBREG_REG (op); | |
| 497 | |
| 498 if (MEM_P (op)) | |
| 499 return true; | |
| 500 if (reload_in_progress && REG_P (op)) | |
| 501 { | |
| 502 unsigned regno = REGNO (op); | |
| 503 if (HARD_REGISTER_NUM_P (regno)) | |
| 504 return false; | |
| 505 else | |
| 506 return reg_renumber[regno] < 0; | |
| 507 } | |
| 508 | |
| 509 return false; | |
| 510 }) | |
| 511 | |
| 512 ;; Return 1 is OP is a memory location that is not a reference | |
| 513 ;; (using an AND) to an unaligned location. Take into account | |
| 514 ;; what reload will do. | |
| 515 (define_special_predicate "normal_memory_operand" | |
| 516 (ior (match_test "op = resolve_reload_operand (op), 0") | |
| 517 (and (match_code "mem") | |
| 518 (match_test "GET_CODE (XEXP (op, 0)) != AND")))) | |
| 519 | |
| 520 ;; Returns 1 if OP is not an eliminable register. | |
| 521 ;; | |
| 522 ;; This exists to cure a pathological failure in the s8addq (et al) patterns, | |
| 523 ;; | |
| 524 ;; long foo () { long t; bar(); return (long) &t * 26107; } | |
| 525 ;; | |
| 526 ;; which run afoul of a hack in reload to cure a (presumably) similar | |
| 527 ;; problem with lea-type instructions on other targets. But there is | |
| 528 ;; one of us and many of them, so work around the problem by selectively | |
| 529 ;; preventing combine from making the optimization. | |
| 530 | |
| 531 (define_predicate "reg_not_elim_operand" | |
| 532 (match_operand 0 "register_operand") | |
| 533 { | |
| 534 if (GET_CODE (op) == SUBREG) | |
| 535 op = SUBREG_REG (op); | |
| 536 return op != frame_pointer_rtx && op != arg_pointer_rtx; | |
| 537 }) | |
| 538 | |
| 539 ;; Accept a register, but not a subreg of any kind. This allows us to | |
| 540 ;; avoid pathological cases in reload wrt data movement common in | |
| 541 ;; int->fp conversion. */ | |
| 542 (define_predicate "reg_no_subreg_operand" | |
| 543 (and (match_code "reg") | |
| 544 (match_operand 0 "register_operand"))) | |
| 545 | |
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546 ;; Return 1 if OP is a valid Alpha comparison operator for "cbranch" |
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547 ;; instructions. |
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548 (define_predicate "alpha_cbranch_operator" |
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549 (ior (match_operand 0 "ordered_comparison_operator") |
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550 (match_code "ordered,unordered"))) |
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551 |
| 0 | 552 ;; Return 1 if OP is a valid Alpha comparison operator for "cmp" style |
| 553 ;; instructions. | |
| 554 (define_predicate "alpha_comparison_operator" | |
| 555 (match_code "eq,le,lt,leu,ltu")) | |
| 556 | |
| 557 ;; Similarly, but with swapped operands. | |
| 558 (define_predicate "alpha_swapped_comparison_operator" | |
| 559 (match_code "eq,ge,gt,gtu")) | |
| 560 | |
| 561 ;; Return 1 if OP is a valid Alpha comparison operator against zero | |
| 562 ;; for "bcc" style instructions. | |
| 563 (define_predicate "alpha_zero_comparison_operator" | |
| 564 (match_code "eq,ne,le,lt,leu,ltu")) | |
| 565 | |
| 566 ;; Return 1 if OP is a signed comparison operation. | |
| 567 (define_predicate "signed_comparison_operator" | |
| 568 (match_code "eq,ne,le,lt,ge,gt")) | |
| 569 | |
| 570 ;; Return 1 if OP is a valid Alpha floating point comparison operator. | |
| 571 (define_predicate "alpha_fp_comparison_operator" | |
| 572 (match_code "eq,le,lt,unordered")) | |
| 573 | |
| 574 ;; Return 1 if this is a divide or modulus operator. | |
| 575 (define_predicate "divmod_operator" | |
| 576 (match_code "div,mod,udiv,umod")) | |
| 577 | |
| 578 ;; Return 1 if this is a float->int conversion operator. | |
| 579 (define_predicate "fix_operator" | |
| 580 (match_code "fix,unsigned_fix")) | |
| 581 | |
| 582 ;; Recognize an addition operation that includes a constant. Used to | |
| 583 ;; convince reload to canonize (plus (plus reg c1) c2) during register | |
| 584 ;; elimination. | |
| 585 | |
| 586 (define_predicate "addition_operation" | |
| 587 (and (match_code "plus") | |
| 588 (match_test "register_operand (XEXP (op, 0), mode) | |
| 589 && satisfies_constraint_K (XEXP (op, 1))"))) | |
| 590 | |
| 591 ;; For TARGET_EXPLICIT_RELOCS, we don't obfuscate a SYMBOL_REF to a | |
| 592 ;; small symbolic operand until after reload. At which point we need | |
| 593 ;; to replace (mem (symbol_ref)) with (mem (lo_sum $29 symbol_ref)) | |
| 594 ;; so that sched2 has the proper dependency information. */ | |
| 595 (define_predicate "some_small_symbolic_operand" | |
| 596 (match_code "set,parallel,prefetch,unspec,unspec_volatile") | |
| 597 { | |
| 598 /* Avoid search unless necessary. */ | |
| 599 if (!TARGET_EXPLICIT_RELOCS || !reload_completed) | |
| 600 return false; | |
| 601 return for_each_rtx (&op, some_small_symbolic_operand_int, NULL); | |
| 602 }) |