Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/arm/arm-cores.def @ 55:77e2b8dfacca gcc-4.4.5
update it from 4.4.3 to 4.5.0
author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
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date | Fri, 12 Feb 2010 23:39:51 +0900 |
parents | a06113de4d67 |
children | f6334be47118 |
rev | line source |
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0 | 1 /* ARM CPU Cores |
2 Copyright (C) 2003, 2005, 2006, 2007, 2008, 2009 | |
3 Free Software Foundation, Inc. | |
4 Written by CodeSourcery, LLC | |
5 | |
6 This file is part of GCC. | |
7 | |
8 GCC is free software; you can redistribute it and/or modify it | |
9 under the terms of the GNU General Public License as published by | |
10 the Free Software Foundation; either version 3, or (at your option) | |
11 any later version. | |
12 | |
13 GCC is distributed in the hope that it will be useful, but | |
14 WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
16 General Public License for more details. | |
17 | |
18 You should have received a copy of the GNU General Public License | |
19 along with GCC; see the file COPYING3. If not see | |
20 <http://www.gnu.org/licenses/>. */ | |
21 | |
22 /* Before using #include to read this file, define a macro: | |
23 | |
24 ARM_CORE(CORE_NAME, CORE_IDENT, ARCH, FLAGS, COSTS) | |
25 | |
26 The CORE_NAME is the name of the core, represented as a string constant. | |
27 The CORE_IDENT is the name of the core, represented as an identifier. | |
28 ARCH is the architecture revision implemented by the chip. | |
29 FLAGS are the bitwise-or of the traits that apply to that core. | |
30 This need not include flags implied by the architecture. | |
31 COSTS is the name of the rtx_costs routine to use. | |
32 | |
33 If you update this table, you must update the "tune" attribute in | |
34 arm.md. | |
35 | |
36 Some tools assume no whitespace up to the first "," in each entry. */ | |
37 | |
38 /* V2/V2A Architecture Processors */ | |
39 ARM_CORE("arm2", arm2, 2, FL_CO_PROC | FL_MODE26, slowmul) | |
40 ARM_CORE("arm250", arm250, 2, FL_CO_PROC | FL_MODE26, slowmul) | |
41 ARM_CORE("arm3", arm3, 2, FL_CO_PROC | FL_MODE26, slowmul) | |
42 | |
43 /* V3 Architecture Processors */ | |
44 ARM_CORE("arm6", arm6, 3, FL_CO_PROC | FL_MODE26, slowmul) | |
45 ARM_CORE("arm60", arm60, 3, FL_CO_PROC | FL_MODE26, slowmul) | |
46 ARM_CORE("arm600", arm600, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul) | |
47 ARM_CORE("arm610", arm610, 3, FL_MODE26 | FL_WBUF, slowmul) | |
48 ARM_CORE("arm620", arm620, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul) | |
49 ARM_CORE("arm7", arm7, 3, FL_CO_PROC | FL_MODE26, slowmul) | |
50 ARM_CORE("arm7d", arm7d, 3, FL_CO_PROC | FL_MODE26, slowmul) | |
51 ARM_CORE("arm7di", arm7di, 3, FL_CO_PROC | FL_MODE26, slowmul) | |
52 ARM_CORE("arm70", arm70, 3, FL_CO_PROC | FL_MODE26, slowmul) | |
53 ARM_CORE("arm700", arm700, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul) | |
54 ARM_CORE("arm700i", arm700i, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul) | |
55 ARM_CORE("arm710", arm710, 3, FL_MODE26 | FL_WBUF, slowmul) | |
56 ARM_CORE("arm720", arm720, 3, FL_MODE26 | FL_WBUF, slowmul) | |
57 ARM_CORE("arm710c", arm710c, 3, FL_MODE26 | FL_WBUF, slowmul) | |
58 ARM_CORE("arm7100", arm7100, 3, FL_MODE26 | FL_WBUF, slowmul) | |
59 ARM_CORE("arm7500", arm7500, 3, FL_MODE26 | FL_WBUF, slowmul) | |
60 /* Doesn't have an external co-proc, but does have embedded fpa. */ | |
61 ARM_CORE("arm7500fe", arm7500fe, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul) | |
62 | |
63 /* V3M Architecture Processors */ | |
64 /* arm7m doesn't exist on its own, but only with D, ("and", and I), but | |
65 those don't alter the code, so arm7m is sometimes used. */ | |
66 ARM_CORE("arm7m", arm7m, 3M, FL_CO_PROC | FL_MODE26, fastmul) | |
67 ARM_CORE("arm7dm", arm7dm, 3M, FL_CO_PROC | FL_MODE26, fastmul) | |
68 ARM_CORE("arm7dmi", arm7dmi, 3M, FL_CO_PROC | FL_MODE26, fastmul) | |
69 | |
70 /* V4 Architecture Processors */ | |
71 ARM_CORE("arm8", arm8, 4, FL_MODE26 | FL_LDSCHED, fastmul) | |
72 ARM_CORE("arm810", arm810, 4, FL_MODE26 | FL_LDSCHED, fastmul) | |
73 ARM_CORE("strongarm", strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) | |
74 ARM_CORE("strongarm110", strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) | |
75 ARM_CORE("strongarm1100", strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) | |
76 ARM_CORE("strongarm1110", strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) | |
77 | |
78 /* V4T Architecture Processors */ | |
79 ARM_CORE("arm7tdmi", arm7tdmi, 4T, FL_CO_PROC , fastmul) | |
80 ARM_CORE("arm7tdmi-s", arm7tdmis, 4T, FL_CO_PROC , fastmul) | |
81 ARM_CORE("arm710t", arm710t, 4T, FL_WBUF, fastmul) | |
82 ARM_CORE("arm720t", arm720t, 4T, FL_WBUF, fastmul) | |
83 ARM_CORE("arm740t", arm740t, 4T, FL_WBUF, fastmul) | |
84 ARM_CORE("arm9", arm9, 4T, FL_LDSCHED, fastmul) | |
85 ARM_CORE("arm9tdmi", arm9tdmi, 4T, FL_LDSCHED, fastmul) | |
86 ARM_CORE("arm920", arm920, 4T, FL_LDSCHED, fastmul) | |
87 ARM_CORE("arm920t", arm920t, 4T, FL_LDSCHED, fastmul) | |
88 ARM_CORE("arm922t", arm922t, 4T, FL_LDSCHED, fastmul) | |
89 ARM_CORE("arm940t", arm940t, 4T, FL_LDSCHED, fastmul) | |
90 ARM_CORE("ep9312", ep9312, 4T, FL_LDSCHED | FL_CIRRUS, fastmul) | |
91 | |
92 /* V5T Architecture Processors */ | |
93 ARM_CORE("arm10tdmi", arm10tdmi, 5T, FL_LDSCHED, fastmul) | |
94 ARM_CORE("arm1020t", arm1020t, 5T, FL_LDSCHED, fastmul) | |
95 | |
96 /* V5TE Architecture Processors */ | |
97 ARM_CORE("arm9e", arm9e, 5TE, FL_LDSCHED, 9e) | |
98 ARM_CORE("arm946e-s", arm946es, 5TE, FL_LDSCHED, 9e) | |
99 ARM_CORE("arm966e-s", arm966es, 5TE, FL_LDSCHED, 9e) | |
100 ARM_CORE("arm968e-s", arm968es, 5TE, FL_LDSCHED, 9e) | |
101 ARM_CORE("arm10e", arm10e, 5TE, FL_LDSCHED, fastmul) | |
102 ARM_CORE("arm1020e", arm1020e, 5TE, FL_LDSCHED, fastmul) | |
103 ARM_CORE("arm1022e", arm1022e, 5TE, FL_LDSCHED, fastmul) | |
104 ARM_CORE("xscale", xscale, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE, xscale) | |
105 ARM_CORE("iwmmxt", iwmmxt, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale) | |
106 ARM_CORE("iwmmxt2", iwmmxt2, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale) | |
107 | |
108 /* V5TEJ Architecture Processors */ | |
109 ARM_CORE("arm926ej-s", arm926ejs, 5TEJ, FL_LDSCHED, 9e) | |
110 ARM_CORE("arm1026ej-s", arm1026ejs, 5TEJ, FL_LDSCHED, 9e) | |
111 | |
112 /* V6 Architecture Processors */ | |
113 ARM_CORE("arm1136j-s", arm1136js, 6J, FL_LDSCHED, 9e) | |
114 ARM_CORE("arm1136jf-s", arm1136jfs, 6J, FL_LDSCHED | FL_VFPV2, 9e) | |
115 ARM_CORE("arm1176jz-s", arm1176jzs, 6ZK, FL_LDSCHED, 9e) | |
116 ARM_CORE("arm1176jzf-s", arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e) | |
117 ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, FL_LDSCHED, 9e) | |
118 ARM_CORE("mpcore", mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e) | |
119 ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, 9e) | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
120 ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, 9e) |
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
121 ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, 9e) |
0 | 122 ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, 9e) |
123 ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED, 9e) | |
124 ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, 9e) | |
125 ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, 9e) | |
126 ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, 9e) | |
127 ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, 9e) | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
128 ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, 9e) |