Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/arm/vec-common.md @ 55:77e2b8dfacca gcc-4.4.5
update it from 4.4.3 to 4.5.0
| author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Fri, 12 Feb 2010 23:39:51 +0900 |
| parents | a06113de4d67 |
| children | f6334be47118 |
| rev | line source |
|---|---|
| 0 | 1 ;; Machine Description for shared bits common to IWMMXT and Neon. |
| 2 ;; Copyright (C) 2006, 2007 Free Software Foundation, Inc. | |
| 3 ;; Written by CodeSourcery. | |
| 4 ;; | |
| 5 ;; This file is part of GCC. | |
| 6 ;; | |
| 7 ;; GCC is free software; you can redistribute it and/or modify it | |
| 8 ;; under the terms of the GNU General Public License as published by | |
| 9 ;; the Free Software Foundation; either version 3, or (at your option) | |
| 10 ;; any later version. | |
| 11 ;; | |
| 12 ;; GCC is distributed in the hope that it will be useful, but | |
| 13 ;; WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 15 ;; General Public License for more details. | |
| 16 ;; | |
| 17 ;; You should have received a copy of the GNU General Public License | |
| 18 ;; along with GCC; see the file COPYING3. If not see | |
| 19 ;; <http://www.gnu.org/licenses/>. | |
| 20 | |
| 21 ;; Vector Moves | |
| 22 | |
| 23 ;; All integer and float modes supported by Neon and IWMMXT. | |
| 24 (define_mode_iterator VALL [V2DI V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF]) | |
| 25 | |
| 26 ;; All integer and float modes supported by Neon and IWMMXT, except V2DI. | |
| 27 (define_mode_iterator VALLW [V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF]) | |
| 28 | |
| 29 ;; All integer modes supported by Neon and IWMMXT | |
| 30 (define_mode_iterator VINT [V2DI V2SI V4HI V8QI V4SI V8HI V16QI]) | |
| 31 | |
| 32 ;; All integer modes supported by Neon and IWMMXT, except V2DI | |
| 33 (define_mode_iterator VINTW [V2SI V4HI V8QI V4SI V8HI V16QI]) | |
| 34 | |
| 35 (define_expand "mov<mode>" | |
| 36 [(set (match_operand:VALL 0 "nonimmediate_operand" "") | |
| 37 (match_operand:VALL 1 "general_operand" ""))] | |
| 38 "TARGET_NEON | |
| 39 || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" | |
| 40 { | |
|
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77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
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41 if (can_create_pseudo_p ()) |
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77e2b8dfacca
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
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42 { |
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77e2b8dfacca
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
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43 if (GET_CODE (operands[0]) != REG) |
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77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
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44 operands[1] = force_reg (<MODE>mode, operands[1]); |
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77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
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45 else if (TARGET_NEON && CONSTANT_P (operands[1])) |
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77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
46 { |
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77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
47 operands[1] = neon_make_constant (operands[1]); |
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77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
48 gcc_assert (operands[1] != NULL_RTX); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
49 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
50 } |
| 0 | 51 }) |
| 52 | |
| 53 ;; Vector arithmetic. Expanders are blank, then unnamed insns implement | |
| 54 ;; patterns separately for IWMMXT and Neon. | |
| 55 | |
| 56 (define_expand "add<mode>3" | |
| 57 [(set (match_operand:VALL 0 "s_register_operand" "") | |
| 58 (plus:VALL (match_operand:VALL 1 "s_register_operand" "") | |
| 59 (match_operand:VALL 2 "s_register_operand" "")))] | |
| 60 "TARGET_NEON | |
| 61 || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" | |
| 62 { | |
| 63 }) | |
| 64 | |
| 65 (define_expand "sub<mode>3" | |
| 66 [(set (match_operand:VALL 0 "s_register_operand" "") | |
| 67 (minus:VALL (match_operand:VALL 1 "s_register_operand" "") | |
| 68 (match_operand:VALL 2 "s_register_operand" "")))] | |
| 69 "TARGET_NEON | |
| 70 || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" | |
| 71 { | |
| 72 }) | |
| 73 | |
| 74 (define_expand "mul<mode>3" | |
| 75 [(set (match_operand:VALLW 0 "s_register_operand" "") | |
| 76 (mult:VALLW (match_operand:VALLW 1 "s_register_operand" "") | |
| 77 (match_operand:VALLW 2 "s_register_operand" "")))] | |
| 78 "TARGET_NEON || (<MODE>mode == V4HImode && TARGET_REALLY_IWMMXT)" | |
| 79 { | |
| 80 }) | |
| 81 | |
| 82 (define_expand "smin<mode>3" | |
| 83 [(set (match_operand:VALLW 0 "s_register_operand" "") | |
| 84 (smin:VALLW (match_operand:VALLW 1 "s_register_operand" "") | |
| 85 (match_operand:VALLW 2 "s_register_operand" "")))] | |
| 86 "TARGET_NEON | |
| 87 || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" | |
| 88 { | |
| 89 }) | |
| 90 | |
| 91 (define_expand "umin<mode>3" | |
| 92 [(set (match_operand:VINTW 0 "s_register_operand" "") | |
| 93 (umin:VINTW (match_operand:VINTW 1 "s_register_operand" "") | |
| 94 (match_operand:VINTW 2 "s_register_operand" "")))] | |
| 95 "TARGET_NEON | |
| 96 || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" | |
| 97 { | |
| 98 }) | |
| 99 | |
| 100 (define_expand "smax<mode>3" | |
| 101 [(set (match_operand:VALLW 0 "s_register_operand" "") | |
| 102 (smax:VALLW (match_operand:VALLW 1 "s_register_operand" "") | |
| 103 (match_operand:VALLW 2 "s_register_operand" "")))] | |
| 104 "TARGET_NEON | |
| 105 || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" | |
| 106 { | |
| 107 }) | |
| 108 | |
| 109 (define_expand "umax<mode>3" | |
| 110 [(set (match_operand:VINTW 0 "s_register_operand" "") | |
| 111 (umax:VINTW (match_operand:VINTW 1 "s_register_operand" "") | |
| 112 (match_operand:VINTW 2 "s_register_operand" "")))] | |
| 113 "TARGET_NEON | |
| 114 || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" | |
| 115 { | |
| 116 }) |