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1 ;; R4600 and R4650 pipeline description.
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2 ;; Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc.
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3 ;;
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4 ;; This file is part of GCC.
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5
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6 ;; GCC is free software; you can redistribute it and/or modify it
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7 ;; under the terms of the GNU General Public License as published
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8 ;; by the Free Software Foundation; either version 3, or (at your
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9 ;; option) any later version.
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10
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11 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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12 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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13 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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14 ;; License for more details.
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15
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16 ;; You should have received a copy of the GNU General Public License
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17 ;; along with GCC; see the file COPYING3. If not see
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18 ;; <http://www.gnu.org/licenses/>.
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19
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20
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21 ;; This file overrides parts of generic.md. It is derived from the
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22 ;; old define_function_unit description.
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23 ;;
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24 ;; We handle the R4600 and R4650 in much the same way. The only difference
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25 ;; is in the integer multiplication and division costs.
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26
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27 (define_insn_reservation "r4600_imul" 10
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28 (and (eq_attr "cpu" "r4600")
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29 (eq_attr "type" "imul,imul3,imadd"))
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30 "imuldiv*10")
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31
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32 (define_insn_reservation "r4600_idiv" 42
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33 (and (eq_attr "cpu" "r4600")
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34 (eq_attr "type" "idiv"))
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35 "imuldiv*42")
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36
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37
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38 (define_insn_reservation "r4650_imul" 4
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39 (and (eq_attr "cpu" "r4650")
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40 (eq_attr "type" "imul,imul3,imadd"))
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41 "imuldiv*4")
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42
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43 (define_insn_reservation "r4650_idiv" 36
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44 (and (eq_attr "cpu" "r4650")
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45 (eq_attr "type" "idiv"))
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46 "imuldiv*36")
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47
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48
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49 (define_insn_reservation "r4600_load" 2
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50 (and (eq_attr "cpu" "r4600,r4650")
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51 (eq_attr "type" "load,fpload,fpidxload"))
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52 "alu")
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53
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54 (define_insn_reservation "r4600_fmove" 1
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55 (and (eq_attr "cpu" "r4600,r4650")
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56 (eq_attr "type" "fabs,fneg,fmove"))
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57 "alu")
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58
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59 (define_insn_reservation "r4600_fmul_single" 8
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60 (and (eq_attr "cpu" "r4600,r4650")
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61 (and (eq_attr "type" "fmul,fmadd")
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62 (eq_attr "mode" "SF")))
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63 "alu")
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64
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65 (define_insn_reservation "r4600_fdiv_single" 32
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66 (and (eq_attr "cpu" "r4600,r4650")
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67 (and (eq_attr "type" "fdiv,frdiv")
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68 (eq_attr "mode" "SF")))
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69 "alu")
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70
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71 (define_insn_reservation "r4600_fdiv_double" 61
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72 (and (eq_attr "cpu" "r4600,r4650")
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73 (and (eq_attr "type" "fdiv,frdiv")
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74 (eq_attr "mode" "DF")))
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75 "alu")
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76
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77 (define_insn_reservation "r4600_fsqrt_single" 31
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78 (and (eq_attr "cpu" "r4600,r4650")
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79 (and (eq_attr "type" "fsqrt,frsqrt")
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80 (eq_attr "mode" "SF")))
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81 "alu")
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82
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83 (define_insn_reservation "r4600_fsqrt_double" 60
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84 (and (eq_attr "cpu" "r4600,r4650")
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85 (and (eq_attr "type" "fsqrt,frsqrt")
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86 (eq_attr "mode" "DF")))
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87 "alu")
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