Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/mips/sdemtk.h @ 55:77e2b8dfacca gcc-4.4.5
update it from 4.4.3 to 4.5.0
author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
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date | Fri, 12 Feb 2010 23:39:51 +0900 |
parents | a06113de4d67 |
children | b7f97abdc517 |
rev | line source |
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0 | 1 /* Definitions of target machine for GNU compiler. |
2 MIPS SDE version, for use with the SDE C library rather than newlib. | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
3 Copyright (C) 2007, 2008, 2009 |
0 | 4 Free Software Foundation, Inc. |
5 | |
6 This file is part of GCC. | |
7 | |
8 GCC is free software; you can redistribute it and/or modify | |
9 it under the terms of the GNU General Public License as published by | |
10 the Free Software Foundation; either version 3, or (at your option) | |
11 any later version. | |
12 | |
13 GCC is distributed in the hope that it will be useful, | |
14 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 GNU General Public License for more details. | |
17 | |
18 You should have received a copy of the GNU General Public License | |
19 along with GCC; see the file COPYING3. If not see | |
20 <http://www.gnu.org/licenses/>. */ | |
21 | |
22 #define TARGET_OS_CPP_BUILTINS() \ | |
23 do \ | |
24 { \ | |
25 builtin_assert ("system=sde"); \ | |
26 builtin_assert ("system=posix"); \ | |
27 builtin_define ("__SDE_MIPS__"); \ | |
28 \ | |
29 /* Deprecated: use __mips_isa_rev >= 2. */ \ | |
30 if (ISA_MIPS32R2) \ | |
31 builtin_define ("__mipsr2"); \ | |
32 \ | |
33 /* Deprecated: use __mips_fpr == 64. */ \ | |
34 if (TARGET_FLOAT64) \ | |
35 builtin_define ("__mipsfp64"); \ | |
36 \ | |
37 if (TARGET_NO_FLOAT) \ | |
38 { \ | |
39 builtin_define ("__NO_FLOAT"); \ | |
40 builtin_define ("__mips_no_float"); \ | |
41 } \ | |
42 else if (TARGET_SOFT_FLOAT_ABI) \ | |
43 builtin_define ("__SOFT_FLOAT"); \ | |
44 else if (TARGET_SINGLE_FLOAT) \ | |
45 builtin_define ("__SINGLE_FLOAT"); \ | |
46 \ | |
47 if (TARGET_BIG_ENDIAN) \ | |
48 { \ | |
49 builtin_assert ("endian=big"); \ | |
50 builtin_assert ("cpu=mipseb"); \ | |
51 } \ | |
52 else \ | |
53 { \ | |
54 builtin_assert ("endian=little"); \ | |
55 builtin_assert ("cpu=mipsel"); \ | |
56 } \ | |
57 } \ | |
58 while (0) | |
59 | |
60 #undef SUBTARGET_OVERRIDE_OPTIONS | |
61 #define SUBTARGET_OVERRIDE_OPTIONS \ | |
62 do \ | |
63 { \ | |
64 if (TARGET_NO_FLOAT) \ | |
65 { \ | |
66 target_flags |= MASK_SOFT_FLOAT_ABI; \ | |
67 target_flags_explicit |= MASK_SOFT_FLOAT_ABI; \ | |
68 } \ | |
69 } \ | |
70 while (0) | |
71 | |
72 /* For __clear_cache in libgcc2.c. */ | |
73 #ifdef IN_LIBGCC2 | |
74 extern void mips_sync_icache (void *beg, unsigned long len); | |
75 #undef CLEAR_INSN_CACHE | |
76 #define CLEAR_INSN_CACHE(beg, end) \ | |
77 mips_sync_icache (beg, end - beg) | |
78 #endif | |
79 | |
80 /* For mips_cache_flush_func in mips.opt. */ | |
81 #undef CACHE_FLUSH_FUNC | |
82 #define CACHE_FLUSH_FUNC "mips_sync_icache" | |
83 | |
84 /* For inline code which needs to sync the icache and dcache, | |
85 noting that the SDE library takes arguments (address, size). */ | |
86 #undef MIPS_ICACHE_SYNC | |
87 #define MIPS_ICACHE_SYNC(ADDR, SIZE) \ | |
88 emit_library_call (gen_rtx_SYMBOL_REF (Pmode, mips_cache_flush_func), \ | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
89 LCT_NORMAL, VOIDmode, 2, ADDR, Pmode, \ |
0 | 90 SIZE, TYPE_MODE (sizetype)) |
91 | |
92 /* This version of _mcount does not pop 2 words from the stack. */ | |
93 #undef FUNCTION_PROFILER | |
94 #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
95 { \ | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
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96 mips_push_asm_switch (&mips_noat); \ |
0 | 97 /* _mcount treats $2 as the static chain register. */ \ |
98 if (cfun->static_chain_decl != NULL) \ | |
99 fprintf (FILE, "\tmove\t%s,%s\n", reg_names[2], \ | |
100 reg_names[STATIC_CHAIN_REGNUM]); \ | |
101 /* MIPS16 code passes saved $ra in $v1 instead of $at. */ \ | |
102 fprintf (FILE, "\tmove\t%s,%s\n", \ | |
103 reg_names[GP_REG_FIRST + (TARGET_MIPS16 ? 3 : 1)], \ | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
104 reg_names[RETURN_ADDR_REGNUM]); \ |
0 | 105 fprintf (FILE, "\tjal\t_mcount\n"); \ |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
106 mips_pop_asm_switch (&mips_noat); \ |
0 | 107 /* _mcount treats $2 as the static chain register. */ \ |
108 if (cfun->static_chain_decl != NULL) \ | |
109 fprintf (FILE, "\tmove\t%s,%s\n", reg_names[STATIC_CHAIN_REGNUM], \ | |
110 reg_names[2]); \ | |
111 } | |
112 | |
113 /* ...nor does the call sequence preserve $31. */ | |
114 #undef MIPS_SAVE_REG_FOR_PROFILING_P | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
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115 #define MIPS_SAVE_REG_FOR_PROFILING_P(REGNO) ((REGNO) == RETURN_ADDR_REGNUM) |