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annotate gcc/config/mips/xlr.md @ 55:77e2b8dfacca gcc-4.4.5

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update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents a06113de4d67
children 04ced10e8804
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1 ;; DFA-based pipeline description for the XLR.
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2 ;; Copyright (C) 2008, 2009 Free Software Foundation, Inc.
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3 ;;
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4 ;; xlr.md Machine Description for the RMI XLR Microprocessor
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5 ;; This file is part of GCC.
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6
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7 ;; GCC is free software; you can redistribute it and/or modify it
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8 ;; under the terms of the GNU General Public License as published
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9 ;; by the Free Software Foundation; either version 3, or (at your
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10 ;; option) any later version.
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11
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12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 ;; License for more details.
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16
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17 ;; You should have received a copy of the GNU General Public License
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18 ;; along with GCC; see the file COPYING3. If not see
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19 ;; <http://www.gnu.org/licenses/>.
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20
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21 (define_automaton "xlr_main,xlr_muldiv")
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22
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23 ;; Definitions for xlr_main automaton.
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24 (define_cpu_unit "xlr_main_pipe" "xlr_main")
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26 (define_insn_reservation "ir_xlr_alu_slt" 2
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27 (and (eq_attr "cpu" "xlr")
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28 (eq_attr "type" "slt"))
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29 "xlr_main_pipe")
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31 ;; Integer arithmetic instructions.
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32 (define_insn_reservation "ir_xlr_alu" 1
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33 (and (eq_attr "cpu" "xlr")
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34 (eq_attr "type" "move,arith,shift,clz,logical,signext,const,unknown,multi,nop,trap"))
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35 "xlr_main_pipe")
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37 ;; Integer arithmetic instructions.
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38 (define_insn_reservation "ir_xlr_condmove" 2
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39 (and (eq_attr "cpu" "xlr")
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40 (eq_attr "type" "condmove"))
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41 "xlr_main_pipe")
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42
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43 ;; Load/store instructions.
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44 (define_insn_reservation "ir_xlr_load" 4
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45 (and (eq_attr "cpu" "xlr")
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46 (eq_attr "type" "load"))
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47 "xlr_main_pipe")
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49 (define_insn_reservation "ir_xlr_store" 1
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50 (and (eq_attr "cpu" "xlr")
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51 (eq_attr "type" "store"))
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52 "xlr_main_pipe")
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53
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54 (define_insn_reservation "ir_xlr_prefetch_x" 1
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55 (and (eq_attr "cpu" "xlr")
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56 (eq_attr "type" "prefetch,prefetchx"))
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57 "xlr_main_pipe")
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59 ;; Branch instructions - use branch misprediction latency.
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60 (define_insn_reservation "ir_xlr_branch" 1
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61 (and (eq_attr "cpu" "xlr")
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62 (eq_attr "type" "branch,jump,call"))
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63 "xlr_main_pipe")
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64
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65 ;; Coprocessor move instructions.
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66 (define_insn_reservation "ir_xlr_xfer" 2
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67 (and (eq_attr "cpu" "xlr")
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68 (eq_attr "type" "mtc,mfc"))
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69 "xlr_main_pipe")
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71 (define_bypass 5 "ir_xlr_xfer" "ir_xlr_xfer")
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73 ;; Definitions for the xlr_muldiv automaton.
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74 (define_cpu_unit "xlr_imuldiv_nopipe" "xlr_muldiv")
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76 (define_insn_reservation "ir_xlr_imul" 8
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77 (and (eq_attr "cpu" "xlr")
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78 (eq_attr "type" "imul,imul3,imadd"))
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79 "xlr_main_pipe,xlr_imuldiv_nopipe*6")
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81 (define_insn_reservation "ir_xlr_div" 68
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82 (and (eq_attr "cpu" "xlr")
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83 (eq_attr "type" "idiv"))
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84 "xlr_main_pipe,xlr_imuldiv_nopipe*67")
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86 (define_insn_reservation "xlr_hilo" 2
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87 (and (eq_attr "cpu" "xlr")
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88 (eq_attr "type" "mfhilo,mthilo"))
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89 "xlr_imuldiv_nopipe")