Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/rs6000/rios2.md @ 55:77e2b8dfacca gcc-4.4.5
update it from 4.4.3 to 4.5.0
| author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Fri, 12 Feb 2010 23:39:51 +0900 |
| parents | a06113de4d67 |
| children |
| rev | line source |
|---|---|
| 0 | 1 ;; Scheduling description for IBM Power2 processor. |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
2 ;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. |
| 0 | 3 ;; |
| 4 ;; This file is part of GCC. | |
| 5 | |
| 6 ;; GCC is free software; you can redistribute it and/or modify it | |
| 7 ;; under the terms of the GNU General Public License as published | |
| 8 ;; by the Free Software Foundation; either version 3, or (at your | |
| 9 ;; option) any later version. | |
| 10 | |
| 11 ;; GCC is distributed in the hope that it will be useful, but WITHOUT | |
| 12 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
| 13 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
| 14 ;; License for more details. | |
| 15 | |
| 16 ;; You should have received a copy of the GNU General Public License | |
| 17 ;; along with GCC; see the file COPYING3. If not see | |
| 18 ;; <http://www.gnu.org/licenses/>. | |
| 19 | |
| 20 (define_automaton "rios2,rios2fp") | |
| 21 (define_cpu_unit "iu1_rios2,iu2_rios2" "rios2") | |
| 22 (define_cpu_unit "fpu1_rios2,fpu2_rios2" "rios2fp") | |
| 23 (define_cpu_unit "bpu_rios2" "rios2") | |
| 24 | |
| 25 ;; RIOS2 32-bit 2xIU, 2xFPU, BPU | |
| 26 ;; IU1 can perform all integer operations | |
| 27 ;; IU2 can perform all integer operations except imul and idiv | |
| 28 | |
| 29 (define_insn_reservation "rios2-load" 2 | |
| 30 (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,\ | |
| 31 load_ux,load_u,fpload,fpload_ux,fpload_u,\ | |
| 32 load_l,store_c,sync") | |
| 33 (eq_attr "cpu" "rios2")) | |
| 34 "iu1_rios2|iu2_rios2") | |
| 35 | |
| 36 (define_insn_reservation "rios2-store" 2 | |
| 37 (and (eq_attr "type" "store,store_ux,store_u,fpstore,fpstore_ux,fpstore_u") | |
| 38 (eq_attr "cpu" "rios2")) | |
| 39 "iu1_rios2|iu2_rios2") | |
| 40 | |
| 41 (define_insn_reservation "rios2-integer" 1 | |
| 42 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\ | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
43 var_shift_rotate,cntlz,exts,isel") |
| 0 | 44 (eq_attr "cpu" "rios2")) |
| 45 "iu1_rios2|iu2_rios2") | |
| 46 | |
| 47 (define_insn_reservation "rios2-two" 1 | |
| 48 (and (eq_attr "type" "two") | |
| 49 (eq_attr "cpu" "rios2")) | |
| 50 "iu1_rios2|iu2_rios2,iu1_rios2|iu2_rios2") | |
| 51 | |
| 52 (define_insn_reservation "rios2-three" 1 | |
| 53 (and (eq_attr "type" "three") | |
| 54 (eq_attr "cpu" "rios2")) | |
| 55 "iu1_rios2|iu2_rios2,iu1_rios2|iu2_rios2,iu1_rios2|iu2_rios2") | |
| 56 | |
| 57 (define_insn_reservation "rios2-imul" 2 | |
| 58 (and (eq_attr "type" "imul,imul2,imul3,imul_compare") | |
| 59 (eq_attr "cpu" "rios2")) | |
| 60 "iu1_rios2*2") | |
| 61 | |
| 62 (define_insn_reservation "rios2-idiv" 13 | |
| 63 (and (eq_attr "type" "idiv") | |
| 64 (eq_attr "cpu" "rios2")) | |
| 65 "iu1_rios2*13") | |
| 66 | |
| 67 ; compare executes on integer unit, but feeds insns which | |
| 68 ; execute on the branch unit. | |
| 69 (define_insn_reservation "rios2-compare" 3 | |
| 70 (and (eq_attr "type" "cmp,fast_compare,compare,delayed_compare,\ | |
| 71 var_delayed_compare") | |
| 72 (eq_attr "cpu" "rios2")) | |
| 73 "(iu1_rios2|iu2_rios2),nothing,bpu_rios2") | |
| 74 | |
| 75 (define_insn_reservation "rios2-fp" 2 | |
| 76 (and (eq_attr "type" "fp") | |
| 77 (eq_attr "cpu" "rios2")) | |
| 78 "fpu1_rios2|fpu2_rios2") | |
| 79 | |
| 80 (define_insn_reservation "rios2-fpcompare" 5 | |
| 81 (and (eq_attr "type" "fpcompare") | |
| 82 (eq_attr "cpu" "rios2")) | |
| 83 "(fpu1_rios2|fpu2_rios2),nothing*3,bpu_rios2") | |
| 84 | |
| 85 (define_insn_reservation "rios2-dmul" 2 | |
| 86 (and (eq_attr "type" "dmul") | |
| 87 (eq_attr "cpu" "rios2")) | |
| 88 "fpu1_rios2|fpu2_rios2") | |
| 89 | |
| 90 (define_insn_reservation "rios2-sdiv" 17 | |
| 91 (and (eq_attr "type" "sdiv,ddiv") | |
| 92 (eq_attr "cpu" "rios2")) | |
| 93 "(fpu1_rios2*17)|(fpu2_rios2*17)") | |
| 94 | |
| 95 (define_insn_reservation "rios2-ssqrt" 26 | |
| 96 (and (eq_attr "type" "ssqrt,dsqrt") | |
| 97 (eq_attr "cpu" "rios2")) | |
| 98 "(fpu1_rios2*26)|(fpu2_rios2*26)") | |
| 99 | |
| 100 (define_insn_reservation "rios2-mfcr" 2 | |
| 101 (and (eq_attr "type" "mfcr") | |
| 102 (eq_attr "cpu" "rios2")) | |
| 103 "iu1_rios2,bpu_rios2") | |
| 104 | |
| 105 (define_insn_reservation "rios2-mtcr" 3 | |
| 106 (and (eq_attr "type" "mtcr") | |
| 107 (eq_attr "cpu" "rios2")) | |
| 108 "iu1_rios2,bpu_rios2") | |
| 109 | |
| 110 (define_insn_reservation "rios2-crlogical" 3 | |
| 111 (and (eq_attr "type" "cr_logical,delayed_cr") | |
| 112 (eq_attr "cpu" "rios2")) | |
| 113 "bpu_rios2") | |
| 114 | |
| 115 (define_insn_reservation "rios2-mtjmpr" 5 | |
| 116 (and (eq_attr "type" "mtjmpr") | |
| 117 (eq_attr "cpu" "rios2")) | |
| 118 "iu1_rios2,bpu_rios2") | |
| 119 | |
| 120 (define_insn_reservation "rios2-mfjmpr" 2 | |
| 121 (and (eq_attr "type" "mfjmpr") | |
| 122 (eq_attr "cpu" "rios2")) | |
| 123 "iu1_rios2,bpu_rios2") | |
| 124 | |
| 125 (define_insn_reservation "rios2-branch" 1 | |
| 126 (and (eq_attr "type" "jmpreg,branch,isync") | |
| 127 (eq_attr "cpu" "rios2")) | |
| 128 "bpu_rios2") | |
| 129 |