Mercurial > hg > CbC > CbC_gcc
annotate gcc/rtl.def @ 55:77e2b8dfacca gcc-4.4.5
update it from 4.4.3 to 4.5.0
| author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Fri, 12 Feb 2010 23:39:51 +0900 |
| parents | a06113de4d67 |
| children | b7f97abdc517 |
| rev | line source |
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| 0 | 1 /* This file contains the definitions and documentation for the |
| 2 Register Transfer Expressions (rtx's) that make up the | |
| 3 Register Transfer Language (rtl) used in the Back End of the GNU compiler. | |
| 4 Copyright (C) 1987, 1988, 1992, 1994, 1995, 1997, 1998, 1999, 2000, 2004, | |
|
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5 2005, 2006, 2007, 2008, 2009 |
| 0 | 6 Free Software Foundation, Inc. |
| 7 | |
| 8 This file is part of GCC. | |
| 9 | |
| 10 GCC is free software; you can redistribute it and/or modify it under | |
| 11 the terms of the GNU General Public License as published by the Free | |
| 12 Software Foundation; either version 3, or (at your option) any later | |
| 13 version. | |
| 14 | |
| 15 GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
| 16 WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 18 for more details. | |
| 19 | |
| 20 You should have received a copy of the GNU General Public License | |
| 21 along with GCC; see the file COPYING3. If not see | |
| 22 <http://www.gnu.org/licenses/>. */ | |
| 23 | |
| 24 | |
| 25 /* Expression definitions and descriptions for all targets are in this file. | |
| 26 Some will not be used for some targets. | |
| 27 | |
| 28 The fields in the cpp macro call "DEF_RTL_EXPR()" | |
| 29 are used to create declarations in the C source of the compiler. | |
| 30 | |
| 31 The fields are: | |
| 32 | |
| 33 1. The internal name of the rtx used in the C source. | |
| 34 It is a tag in the enumeration "enum rtx_code" defined in "rtl.h". | |
| 35 By convention these are in UPPER_CASE. | |
| 36 | |
| 37 2. The name of the rtx in the external ASCII format read by | |
| 38 read_rtx(), and printed by print_rtx(). | |
| 39 These names are stored in rtx_name[]. | |
| 40 By convention these are the internal (field 1) names in lower_case. | |
| 41 | |
| 42 3. The print format, and type of each rtx->u.fld[] (field) in this rtx. | |
| 43 These formats are stored in rtx_format[]. | |
| 44 The meaning of the formats is documented in front of this array in rtl.c | |
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45 |
| 0 | 46 4. The class of the rtx. These are stored in rtx_class and are accessed |
| 47 via the GET_RTX_CLASS macro. They are defined as follows: | |
| 48 | |
| 49 RTX_CONST_OBJ | |
| 50 an rtx code that can be used to represent a constant object | |
| 51 (e.g, CONST_INT) | |
| 52 RTX_OBJ | |
| 53 an rtx code that can be used to represent an object (e.g, REG, MEM) | |
| 54 RTX_COMPARE | |
| 55 an rtx code for a comparison (e.g, LT, GT) | |
| 56 RTX_COMM_COMPARE | |
| 57 an rtx code for a commutative comparison (e.g, EQ, NE, ORDERED) | |
| 58 RTX_UNARY | |
| 59 an rtx code for a unary arithmetic expression (e.g, NEG, NOT) | |
| 60 RTX_COMM_ARITH | |
| 61 an rtx code for a commutative binary operation (e.g,, PLUS, MULT) | |
| 62 RTX_TERNARY | |
| 63 an rtx code for a non-bitfield three input operation (IF_THEN_ELSE) | |
| 64 RTX_BIN_ARITH | |
| 65 an rtx code for a non-commutative binary operation (e.g., MINUS, DIV) | |
| 66 RTX_BITFIELD_OPS | |
| 67 an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT) | |
| 68 RTX_INSN | |
| 69 an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN) | |
| 70 RTX_MATCH | |
| 71 an rtx code for something that matches in insns (e.g, MATCH_DUP) | |
| 72 RTX_AUTOINC | |
| 73 an rtx code for autoincrement addressing modes (e.g. POST_DEC) | |
| 74 RTX_EXTRA | |
| 75 everything else | |
| 76 | |
| 77 All of the expressions that appear only in machine descriptions, | |
| 78 not in RTL used by the compiler itself, are at the end of the file. */ | |
| 79 | |
| 80 /* Unknown, or no such operation; the enumeration constant should have | |
| 81 value zero. */ | |
| 82 DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", RTX_EXTRA) | |
| 83 | |
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84 /* Used in the cselib routines to describe a value. Objects of this |
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85 kind are only allocated in cselib.c, in an alloc pool instead of in |
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86 GC memory. The only operand of a VALUE is a cselib_val_struct. |
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87 var-tracking requires this to have a distinct integral value from |
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88 DECL codes in trees. */ |
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89 DEF_RTL_EXPR(VALUE, "value", "0", RTX_OBJ) |
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90 |
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91 /* The RTL generated for a DEBUG_EXPR_DECL. It links back to the |
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92 DEBUG_EXPR_DECL in the first operand. */ |
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93 DEF_RTL_EXPR(DEBUG_EXPR, "debug_expr", "0", RTX_OBJ) |
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94 |
| 0 | 95 /* --------------------------------------------------------------------- |
| 96 Expressions used in constructing lists. | |
| 97 --------------------------------------------------------------------- */ | |
| 98 | |
| 99 /* a linked list of expressions */ | |
| 100 DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", RTX_EXTRA) | |
| 101 | |
| 102 /* a linked list of instructions. | |
| 103 The insns are represented in print by their uids. */ | |
| 104 DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", RTX_EXTRA) | |
| 105 | |
| 106 /* SEQUENCE appears in the result of a `gen_...' function | |
| 107 for a DEFINE_EXPAND that wants to make several insns. | |
| 108 Its elements are the bodies of the insns that should be made. | |
| 109 `emit_insn' takes the SEQUENCE apart and makes separate insns. */ | |
| 110 DEF_RTL_EXPR(SEQUENCE, "sequence", "E", RTX_EXTRA) | |
| 111 | |
| 112 /* Refers to the address of its argument. This is only used in alias.c. */ | |
| 113 DEF_RTL_EXPR(ADDRESS, "address", "e", RTX_MATCH) | |
| 114 | |
| 115 /* ---------------------------------------------------------------------- | |
| 116 Expression types used for things in the instruction chain. | |
| 117 | |
| 118 All formats must start with "iuu" to handle the chain. | |
| 119 Each insn expression holds an rtl instruction and its semantics | |
| 120 during back-end processing. | |
| 121 See macros's in "rtl.h" for the meaning of each rtx->u.fld[]. | |
| 122 | |
| 123 ---------------------------------------------------------------------- */ | |
| 124 | |
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125 /* An annotation for variable assignment tracking. */ |
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126 DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "iuuBieie", RTX_INSN) |
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127 |
| 0 | 128 /* An instruction that cannot jump. */ |
| 129 DEF_RTL_EXPR(INSN, "insn", "iuuBieie", RTX_INSN) | |
| 130 | |
| 131 /* An instruction that can possibly jump. | |
| 132 Fields ( rtx->u.fld[] ) have exact same meaning as INSN's. */ | |
| 133 DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuuBieie0", RTX_INSN) | |
| 134 | |
| 135 /* An instruction that can possibly call a subroutine | |
| 136 but which will not change which instruction comes next | |
| 137 in the current function. | |
| 138 Field ( rtx->u.fld[8] ) is CALL_INSN_FUNCTION_USAGE. | |
| 139 All other fields ( rtx->u.fld[] ) have exact same meaning as INSN's. */ | |
| 140 DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuuBieiee", RTX_INSN) | |
| 141 | |
| 142 /* A marker that indicates that control will not flow through. */ | |
| 143 DEF_RTL_EXPR(BARRIER, "barrier", "iuu00000", RTX_EXTRA) | |
| 144 | |
| 145 /* Holds a label that is followed by instructions. | |
| 146 Operand: | |
| 147 4: is used in jump.c for the use-count of the label. | |
| 148 5: is used in the sh backend. | |
| 149 6: is a number that is unique in the entire compilation. | |
| 150 7: is the user-given name of the label, if any. */ | |
| 151 DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuB00is", RTX_EXTRA) | |
| 152 | |
| 153 /* Say where in the code a source line starts, for symbol table's sake. | |
| 154 Operand: | |
| 155 4: note-specific data | |
| 156 5: enum insn_note | |
| 157 6: unique number if insn_note == note_insn_deleted_label. */ | |
| 158 DEF_RTL_EXPR(NOTE, "note", "iuuB0ni", RTX_EXTRA) | |
| 159 | |
| 160 /* ---------------------------------------------------------------------- | |
| 161 Top level constituents of INSN, JUMP_INSN and CALL_INSN. | |
| 162 ---------------------------------------------------------------------- */ | |
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163 |
| 0 | 164 /* Conditionally execute code. |
| 165 Operand 0 is the condition that if true, the code is executed. | |
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166 Operand 1 is the code to be executed (typically a SET). |
| 0 | 167 |
| 168 Semantics are that there are no side effects if the condition | |
| 169 is false. This pattern is created automatically by the if_convert | |
| 170 pass run after reload or by target-specific splitters. */ | |
| 171 DEF_RTL_EXPR(COND_EXEC, "cond_exec", "ee", RTX_EXTRA) | |
| 172 | |
| 173 /* Several operations to be done in parallel (perhaps under COND_EXEC). */ | |
| 174 DEF_RTL_EXPR(PARALLEL, "parallel", "E", RTX_EXTRA) | |
| 175 | |
| 176 /* A string that is passed through to the assembler as input. | |
| 177 One can obviously pass comments through by using the | |
| 178 assembler comment syntax. | |
| 179 These occur in an insn all by themselves as the PATTERN. | |
| 180 They also appear inside an ASM_OPERANDS | |
| 181 as a convenient way to hold a string. */ | |
| 182 DEF_RTL_EXPR(ASM_INPUT, "asm_input", "si", RTX_EXTRA) | |
| 183 | |
| 184 /* An assembler instruction with operands. | |
| 185 1st operand is the instruction template. | |
| 186 2nd operand is the constraint for the output. | |
| 187 3rd operand is the number of the output this expression refers to. | |
| 188 When an insn stores more than one value, a separate ASM_OPERANDS | |
| 189 is made for each output; this integer distinguishes them. | |
| 190 4th is a vector of values of input operands. | |
| 191 5th is a vector of modes and constraints for the input operands. | |
| 192 Each element is an ASM_INPUT containing a constraint string | |
| 193 and whose mode indicates the mode of the input operand. | |
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194 6th is a vector of labels that may be branched to by the asm. |
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195 7th is the source line number. */ |
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196 DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEEi", RTX_EXTRA) |
| 0 | 197 |
| 198 /* A machine-specific operation. | |
| 199 1st operand is a vector of operands being used by the operation so that | |
| 200 any needed reloads can be done. | |
| 201 2nd operand is a unique value saying which of a number of machine-specific | |
| 202 operations is to be performed. | |
| 203 (Note that the vector must be the first operand because of the way that | |
| 204 genrecog.c record positions within an insn.) | |
| 205 | |
| 206 UNSPEC can occur all by itself in a PATTERN, as a component of a PARALLEL, | |
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207 or inside an expression. |
| 0 | 208 UNSPEC by itself or as a component of a PARALLEL |
| 209 is currently considered not deletable. | |
| 210 | |
| 211 FIXME: Replace all uses of UNSPEC that appears by itself or as a component | |
| 212 of a PARALLEL with USE. | |
| 213 */ | |
| 214 DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", RTX_EXTRA) | |
| 215 | |
| 216 /* Similar, but a volatile operation and one which may trap. */ | |
| 217 DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", RTX_EXTRA) | |
| 218 | |
| 219 /* Vector of addresses, stored as full words. */ | |
| 220 /* Each element is a LABEL_REF to a CODE_LABEL whose address we want. */ | |
| 221 DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", RTX_EXTRA) | |
| 222 | |
| 223 /* Vector of address differences X0 - BASE, X1 - BASE, ... | |
| 224 First operand is BASE; the vector contains the X's. | |
| 225 The machine mode of this rtx says how much space to leave | |
| 226 for each difference and is adjusted by branch shortening if | |
| 227 CASE_VECTOR_SHORTEN_MODE is defined. | |
| 228 The third and fourth operands store the target labels with the | |
| 229 minimum and maximum addresses respectively. | |
| 230 The fifth operand stores flags for use by branch shortening. | |
| 231 Set at the start of shorten_branches: | |
| 232 min_align: the minimum alignment for any of the target labels. | |
| 233 base_after_vec: true iff BASE is after the ADDR_DIFF_VEC. | |
| 234 min_after_vec: true iff minimum addr target label is after the ADDR_DIFF_VEC. | |
| 235 max_after_vec: true iff maximum addr target label is after the ADDR_DIFF_VEC. | |
| 236 min_after_base: true iff minimum address target label is after BASE. | |
| 237 max_after_base: true iff maximum address target label is after BASE. | |
| 238 Set by the actual branch shortening process: | |
| 239 offset_unsigned: true iff offsets have to be treated as unsigned. | |
| 240 scale: scaling that is necessary to make offsets fit into the mode. | |
| 241 | |
| 242 The third, fourth and fifth operands are only valid when | |
| 243 CASE_VECTOR_SHORTEN_MODE is defined, and only in an optimizing | |
| 244 compilations. */ | |
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245 |
| 0 | 246 DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", RTX_EXTRA) |
| 247 | |
| 248 /* Memory prefetch, with attributes supported on some targets. | |
| 249 Operand 1 is the address of the memory to fetch. | |
| 250 Operand 2 is 1 for a write access, 0 otherwise. | |
| 251 Operand 3 is the level of temporal locality; 0 means there is no | |
| 252 temporal locality and 1, 2, and 3 are for increasing levels of temporal | |
| 253 locality. | |
| 254 | |
| 255 The attributes specified by operands 2 and 3 are ignored for targets | |
| 256 whose prefetch instructions do not support them. */ | |
| 257 DEF_RTL_EXPR(PREFETCH, "prefetch", "eee", RTX_EXTRA) | |
| 258 | |
| 259 /* ---------------------------------------------------------------------- | |
| 260 At the top level of an instruction (perhaps under PARALLEL). | |
| 261 ---------------------------------------------------------------------- */ | |
| 262 | |
| 263 /* Assignment. | |
| 264 Operand 1 is the location (REG, MEM, PC, CC0 or whatever) assigned to. | |
| 265 Operand 2 is the value stored there. | |
| 266 ALL assignment must use SET. | |
| 267 Instructions that do multiple assignments must use multiple SET, | |
| 268 under PARALLEL. */ | |
| 269 DEF_RTL_EXPR(SET, "set", "ee", RTX_EXTRA) | |
| 270 | |
| 271 /* Indicate something is used in a way that we don't want to explain. | |
| 272 For example, subroutine calls will use the register | |
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273 in which the static chain is passed. |
| 0 | 274 |
| 275 USE can not appear as an operand of other rtx except for PARALLEL. | |
| 276 USE is not deletable, as it indicates that the operand | |
| 277 is used in some unknown way. */ | |
| 278 DEF_RTL_EXPR(USE, "use", "e", RTX_EXTRA) | |
| 279 | |
| 280 /* Indicate something is clobbered in a way that we don't want to explain. | |
| 281 For example, subroutine calls will clobber some physical registers | |
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282 (the ones that are by convention not saved). |
| 0 | 283 |
| 284 CLOBBER can not appear as an operand of other rtx except for PARALLEL. | |
| 285 CLOBBER of a hard register appearing by itself (not within PARALLEL) | |
| 286 is considered undeletable before reload. */ | |
| 287 DEF_RTL_EXPR(CLOBBER, "clobber", "e", RTX_EXTRA) | |
| 288 | |
| 289 /* Call a subroutine. | |
| 290 Operand 1 is the address to call. | |
| 291 Operand 2 is the number of arguments. */ | |
| 292 | |
| 293 DEF_RTL_EXPR(CALL, "call", "ee", RTX_EXTRA) | |
| 294 | |
| 295 /* Return from a subroutine. */ | |
| 296 | |
| 297 DEF_RTL_EXPR(RETURN, "return", "", RTX_EXTRA) | |
| 298 | |
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299 /* Special for EH return from subroutine. */ |
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300 |
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301 DEF_RTL_EXPR(EH_RETURN, "eh_return", "", RTX_EXTRA) |
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302 |
| 0 | 303 /* Conditional trap. |
| 304 Operand 1 is the condition. | |
| 305 Operand 2 is the trap code. | |
| 306 For an unconditional trap, make the condition (const_int 1). */ | |
| 307 DEF_RTL_EXPR(TRAP_IF, "trap_if", "ee", RTX_EXTRA) | |
| 308 | |
| 309 /* ---------------------------------------------------------------------- | |
| 310 Primitive values for use in expressions. | |
| 311 ---------------------------------------------------------------------- */ | |
| 312 | |
| 313 /* numeric integer constant */ | |
| 314 DEF_RTL_EXPR(CONST_INT, "const_int", "w", RTX_CONST_OBJ) | |
| 315 | |
| 316 /* fixed-point constant */ | |
| 317 DEF_RTL_EXPR(CONST_FIXED, "const_fixed", "www", RTX_CONST_OBJ) | |
| 318 | |
| 319 /* numeric floating point constant. | |
| 320 Operands hold the value. They are all 'w' and there may be from 2 to 6; | |
| 321 see real.h. */ | |
| 322 DEF_RTL_EXPR(CONST_DOUBLE, "const_double", CONST_DOUBLE_FORMAT, RTX_CONST_OBJ) | |
| 323 | |
| 324 /* Describes a vector constant. */ | |
| 325 DEF_RTL_EXPR(CONST_VECTOR, "const_vector", "E", RTX_CONST_OBJ) | |
| 326 | |
| 327 /* String constant. Used for attributes in machine descriptions and | |
| 328 for special cases in DWARF2 debug output. NOT used for source- | |
| 329 language string constants. */ | |
| 330 DEF_RTL_EXPR(CONST_STRING, "const_string", "s", RTX_OBJ) | |
| 331 | |
| 332 /* This is used to encapsulate an expression whose value is constant | |
| 333 (such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be | |
| 334 recognized as a constant operand rather than by arithmetic instructions. */ | |
| 335 | |
| 336 DEF_RTL_EXPR(CONST, "const", "e", RTX_CONST_OBJ) | |
| 337 | |
| 338 /* program counter. Ordinary jumps are represented | |
| 339 by a SET whose first operand is (PC). */ | |
| 340 DEF_RTL_EXPR(PC, "pc", "", RTX_OBJ) | |
| 341 | |
| 342 /* A register. The "operand" is the register number, accessed with | |
| 343 the REGNO macro. If this number is less than FIRST_PSEUDO_REGISTER | |
| 344 than a hardware register is being referred to. The second operand | |
| 345 holds the original register number - this will be different for a | |
| 346 pseudo register that got turned into a hard register. The third | |
| 347 operand points to a reg_attrs structure. | |
| 348 This rtx needs to have as many (or more) fields as a MEM, since we | |
| 349 can change REG rtx's into MEMs during reload. */ | |
| 350 DEF_RTL_EXPR(REG, "reg", "i00", RTX_OBJ) | |
| 351 | |
| 352 /* A scratch register. This represents a register used only within a | |
| 353 single insn. It will be turned into a REG during register allocation | |
| 354 or reload unless the constraint indicates that the register won't be | |
| 355 needed, in which case it can remain a SCRATCH. This code is | |
| 356 marked as having one operand so it can be turned into a REG. */ | |
| 357 DEF_RTL_EXPR(SCRATCH, "scratch", "0", RTX_OBJ) | |
| 358 | |
| 359 /* A reference to a part of another value. The first operand is the | |
| 360 complete value and the second is the byte offset of the selected part. */ | |
| 361 DEF_RTL_EXPR(SUBREG, "subreg", "ei", RTX_EXTRA) | |
| 362 | |
| 363 /* This one-argument rtx is used for move instructions | |
| 364 that are guaranteed to alter only the low part of a destination. | |
| 365 Thus, (SET (SUBREG:HI (REG...)) (MEM:HI ...)) | |
| 366 has an unspecified effect on the high part of REG, | |
| 367 but (SET (STRICT_LOW_PART (SUBREG:HI (REG...))) (MEM:HI ...)) | |
| 368 is guaranteed to alter only the bits of REG that are in HImode. | |
| 369 | |
| 370 The actual instruction used is probably the same in both cases, | |
| 371 but the register constraints may be tighter when STRICT_LOW_PART | |
| 372 is in use. */ | |
| 373 | |
| 374 DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", RTX_EXTRA) | |
| 375 | |
| 376 /* (CONCAT a b) represents the virtual concatenation of a and b | |
| 377 to make a value that has as many bits as a and b put together. | |
| 378 This is used for complex values. Normally it appears only | |
| 379 in DECL_RTLs and during RTL generation, but not in the insn chain. */ | |
| 380 DEF_RTL_EXPR(CONCAT, "concat", "ee", RTX_OBJ) | |
| 381 | |
| 382 /* (CONCATN [a1 a2 ... an]) represents the virtual concatenation of | |
| 383 all An to make a value. This is an extension of CONCAT to larger | |
| 384 number of components. Like CONCAT, it should not appear in the | |
| 385 insn chain. Every element of the CONCATN is the same size. */ | |
| 386 DEF_RTL_EXPR(CONCATN, "concatn", "E", RTX_OBJ) | |
| 387 | |
| 388 /* A memory location; operand is the address. The second operand is the | |
| 389 alias set to which this MEM belongs. We use `0' instead of `w' for this | |
| 390 field so that the field need not be specified in machine descriptions. */ | |
| 391 DEF_RTL_EXPR(MEM, "mem", "e0", RTX_OBJ) | |
| 392 | |
| 393 /* Reference to an assembler label in the code for this function. | |
| 394 The operand is a CODE_LABEL found in the insn chain. */ | |
| 395 DEF_RTL_EXPR(LABEL_REF, "label_ref", "u", RTX_CONST_OBJ) | |
| 396 | |
|
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|
397 /* Reference to a named label: |
| 0 | 398 Operand 0: label name |
| 399 Operand 1: flags (see SYMBOL_FLAG_* in rtl.h) | |
| 400 Operand 2: tree from which this symbol is derived, or null. | |
| 401 This is either a DECL node, or some kind of constant. */ | |
| 402 DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s00", RTX_CONST_OBJ) | |
| 403 | |
| 404 /* The condition code register is represented, in our imagination, | |
| 405 as a register holding a value that can be compared to zero. | |
| 406 In fact, the machine has already compared them and recorded the | |
| 407 results; but instructions that look at the condition code | |
| 408 pretend to be looking at the entire value and comparing it. */ | |
| 409 DEF_RTL_EXPR(CC0, "cc0", "", RTX_OBJ) | |
| 410 | |
| 411 /* ---------------------------------------------------------------------- | |
| 412 Expressions for operators in an rtl pattern | |
| 413 ---------------------------------------------------------------------- */ | |
| 414 | |
| 415 /* if_then_else. This is used in representing ordinary | |
| 416 conditional jump instructions. | |
| 417 Operand: | |
| 418 0: condition | |
| 419 1: then expr | |
| 420 2: else expr */ | |
| 421 DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", RTX_TERNARY) | |
| 422 | |
| 423 /* Comparison, produces a condition code result. */ | |
| 424 DEF_RTL_EXPR(COMPARE, "compare", "ee", RTX_BIN_ARITH) | |
| 425 | |
| 426 /* plus */ | |
| 427 DEF_RTL_EXPR(PLUS, "plus", "ee", RTX_COMM_ARITH) | |
| 428 | |
| 429 /* Operand 0 minus operand 1. */ | |
| 430 DEF_RTL_EXPR(MINUS, "minus", "ee", RTX_BIN_ARITH) | |
| 431 | |
| 432 /* Minus operand 0. */ | |
| 433 DEF_RTL_EXPR(NEG, "neg", "e", RTX_UNARY) | |
| 434 | |
| 435 DEF_RTL_EXPR(MULT, "mult", "ee", RTX_COMM_ARITH) | |
| 436 | |
| 437 /* Multiplication with signed saturation */ | |
| 438 DEF_RTL_EXPR(SS_MULT, "ss_mult", "ee", RTX_COMM_ARITH) | |
| 439 /* Multiplication with unsigned saturation */ | |
| 440 DEF_RTL_EXPR(US_MULT, "us_mult", "ee", RTX_COMM_ARITH) | |
| 441 | |
| 442 /* Operand 0 divided by operand 1. */ | |
| 443 DEF_RTL_EXPR(DIV, "div", "ee", RTX_BIN_ARITH) | |
| 444 /* Division with signed saturation */ | |
| 445 DEF_RTL_EXPR(SS_DIV, "ss_div", "ee", RTX_BIN_ARITH) | |
| 446 /* Division with unsigned saturation */ | |
| 447 DEF_RTL_EXPR(US_DIV, "us_div", "ee", RTX_BIN_ARITH) | |
| 448 | |
| 449 /* Remainder of operand 0 divided by operand 1. */ | |
| 450 DEF_RTL_EXPR(MOD, "mod", "ee", RTX_BIN_ARITH) | |
| 451 | |
| 452 /* Unsigned divide and remainder. */ | |
| 453 DEF_RTL_EXPR(UDIV, "udiv", "ee", RTX_BIN_ARITH) | |
| 454 DEF_RTL_EXPR(UMOD, "umod", "ee", RTX_BIN_ARITH) | |
| 455 | |
| 456 /* Bitwise operations. */ | |
| 457 DEF_RTL_EXPR(AND, "and", "ee", RTX_COMM_ARITH) | |
| 458 DEF_RTL_EXPR(IOR, "ior", "ee", RTX_COMM_ARITH) | |
| 459 DEF_RTL_EXPR(XOR, "xor", "ee", RTX_COMM_ARITH) | |
| 460 DEF_RTL_EXPR(NOT, "not", "e", RTX_UNARY) | |
| 461 | |
| 462 /* Operand: | |
| 463 0: value to be shifted. | |
| 464 1: number of bits. */ | |
| 465 DEF_RTL_EXPR(ASHIFT, "ashift", "ee", RTX_BIN_ARITH) /* shift left */ | |
| 466 DEF_RTL_EXPR(ROTATE, "rotate", "ee", RTX_BIN_ARITH) /* rotate left */ | |
| 467 DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", RTX_BIN_ARITH) /* arithmetic shift right */ | |
| 468 DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", RTX_BIN_ARITH) /* logical shift right */ | |
| 469 DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", RTX_BIN_ARITH) /* rotate right */ | |
| 470 | |
| 471 /* Minimum and maximum values of two operands. We need both signed and | |
| 472 unsigned forms. (We cannot use MIN for SMIN because it conflicts | |
| 473 with a macro of the same name.) The signed variants should be used | |
| 474 with floating point. Further, if both operands are zeros, or if either | |
| 475 operand is NaN, then it is unspecified which of the two operands is | |
| 476 returned as the result. */ | |
| 477 | |
| 478 DEF_RTL_EXPR(SMIN, "smin", "ee", RTX_COMM_ARITH) | |
| 479 DEF_RTL_EXPR(SMAX, "smax", "ee", RTX_COMM_ARITH) | |
| 480 DEF_RTL_EXPR(UMIN, "umin", "ee", RTX_COMM_ARITH) | |
| 481 DEF_RTL_EXPR(UMAX, "umax", "ee", RTX_COMM_ARITH) | |
| 482 | |
| 483 /* These unary operations are used to represent incrementation | |
| 484 and decrementation as they occur in memory addresses. | |
| 485 The amount of increment or decrement are not represented | |
| 486 because they can be understood from the machine-mode of the | |
| 487 containing MEM. These operations exist in only two cases: | |
| 488 1. pushes onto the stack. | |
| 489 2. created automatically by the life_analysis pass in flow.c. */ | |
| 490 DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", RTX_AUTOINC) | |
| 491 DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", RTX_AUTOINC) | |
| 492 DEF_RTL_EXPR(POST_DEC, "post_dec", "e", RTX_AUTOINC) | |
| 493 DEF_RTL_EXPR(POST_INC, "post_inc", "e", RTX_AUTOINC) | |
| 494 | |
| 495 /* These binary operations are used to represent generic address | |
| 496 side-effects in memory addresses, except for simple incrementation | |
| 497 or decrementation which use the above operations. They are | |
| 498 created automatically by the life_analysis pass in flow.c. | |
| 499 The first operand is a REG which is used as the address. | |
| 500 The second operand is an expression that is assigned to the | |
| 501 register, either before (PRE_MODIFY) or after (POST_MODIFY) | |
| 502 evaluating the address. | |
| 503 Currently, the compiler can only handle second operands of the | |
| 504 form (plus (reg) (reg)) and (plus (reg) (const_int)), where | |
| 505 the first operand of the PLUS has to be the same register as | |
| 506 the first operand of the *_MODIFY. */ | |
| 507 DEF_RTL_EXPR(PRE_MODIFY, "pre_modify", "ee", RTX_AUTOINC) | |
| 508 DEF_RTL_EXPR(POST_MODIFY, "post_modify", "ee", RTX_AUTOINC) | |
| 509 | |
| 510 /* Comparison operations. The ordered comparisons exist in two | |
| 511 flavors, signed and unsigned. */ | |
| 512 DEF_RTL_EXPR(NE, "ne", "ee", RTX_COMM_COMPARE) | |
| 513 DEF_RTL_EXPR(EQ, "eq", "ee", RTX_COMM_COMPARE) | |
| 514 DEF_RTL_EXPR(GE, "ge", "ee", RTX_COMPARE) | |
| 515 DEF_RTL_EXPR(GT, "gt", "ee", RTX_COMPARE) | |
| 516 DEF_RTL_EXPR(LE, "le", "ee", RTX_COMPARE) | |
| 517 DEF_RTL_EXPR(LT, "lt", "ee", RTX_COMPARE) | |
| 518 DEF_RTL_EXPR(GEU, "geu", "ee", RTX_COMPARE) | |
| 519 DEF_RTL_EXPR(GTU, "gtu", "ee", RTX_COMPARE) | |
| 520 DEF_RTL_EXPR(LEU, "leu", "ee", RTX_COMPARE) | |
| 521 DEF_RTL_EXPR(LTU, "ltu", "ee", RTX_COMPARE) | |
| 522 | |
| 523 /* Additional floating point unordered comparison flavors. */ | |
| 524 DEF_RTL_EXPR(UNORDERED, "unordered", "ee", RTX_COMM_COMPARE) | |
| 525 DEF_RTL_EXPR(ORDERED, "ordered", "ee", RTX_COMM_COMPARE) | |
| 526 | |
| 527 /* These are equivalent to unordered or ... */ | |
| 528 DEF_RTL_EXPR(UNEQ, "uneq", "ee", RTX_COMM_COMPARE) | |
| 529 DEF_RTL_EXPR(UNGE, "unge", "ee", RTX_COMPARE) | |
| 530 DEF_RTL_EXPR(UNGT, "ungt", "ee", RTX_COMPARE) | |
| 531 DEF_RTL_EXPR(UNLE, "unle", "ee", RTX_COMPARE) | |
| 532 DEF_RTL_EXPR(UNLT, "unlt", "ee", RTX_COMPARE) | |
| 533 | |
| 534 /* This is an ordered NE, ie !UNEQ, ie false for NaN. */ | |
| 535 DEF_RTL_EXPR(LTGT, "ltgt", "ee", RTX_COMM_COMPARE) | |
| 536 | |
| 537 /* Represents the result of sign-extending the sole operand. | |
| 538 The machine modes of the operand and of the SIGN_EXTEND expression | |
| 539 determine how much sign-extension is going on. */ | |
| 540 DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", RTX_UNARY) | |
| 541 | |
| 542 /* Similar for zero-extension (such as unsigned short to int). */ | |
| 543 DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", RTX_UNARY) | |
| 544 | |
| 545 /* Similar but here the operand has a wider mode. */ | |
| 546 DEF_RTL_EXPR(TRUNCATE, "truncate", "e", RTX_UNARY) | |
| 547 | |
| 548 /* Similar for extending floating-point values (such as SFmode to DFmode). */ | |
| 549 DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", RTX_UNARY) | |
| 550 DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", RTX_UNARY) | |
| 551 | |
| 552 /* Conversion of fixed point operand to floating point value. */ | |
| 553 DEF_RTL_EXPR(FLOAT, "float", "e", RTX_UNARY) | |
| 554 | |
| 555 /* With fixed-point machine mode: | |
| 556 Conversion of floating point operand to fixed point value. | |
| 557 Value is defined only when the operand's value is an integer. | |
| 558 With floating-point machine mode (and operand with same mode): | |
| 559 Operand is rounded toward zero to produce an integer value | |
| 560 represented in floating point. */ | |
| 561 DEF_RTL_EXPR(FIX, "fix", "e", RTX_UNARY) | |
| 562 | |
| 563 /* Conversion of unsigned fixed point operand to floating point value. */ | |
| 564 DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", RTX_UNARY) | |
| 565 | |
| 566 /* With fixed-point machine mode: | |
| 567 Conversion of floating point operand to *unsigned* fixed point value. | |
| 568 Value is defined only when the operand's value is an integer. */ | |
| 569 DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", RTX_UNARY) | |
| 570 | |
| 571 /* Conversions involving fractional fixed-point types without saturation, | |
| 572 including: | |
| 573 fractional to fractional (of different precision), | |
| 574 signed integer to fractional, | |
| 575 fractional to signed integer, | |
| 576 floating point to fractional, | |
| 577 fractional to floating point. | |
| 578 NOTE: fractional can be either signed or unsigned for conversions. */ | |
| 579 DEF_RTL_EXPR(FRACT_CONVERT, "fract_convert", "e", RTX_UNARY) | |
| 580 | |
| 581 /* Conversions involving fractional fixed-point types and unsigned integer | |
| 582 without saturation, including: | |
| 583 unsigned integer to fractional, | |
| 584 fractional to unsigned integer. | |
| 585 NOTE: fractional can be either signed or unsigned for conversions. */ | |
| 586 DEF_RTL_EXPR(UNSIGNED_FRACT_CONVERT, "unsigned_fract_convert", "e", RTX_UNARY) | |
| 587 | |
| 588 /* Conversions involving fractional fixed-point types with saturation, | |
| 589 including: | |
| 590 fractional to fractional (of different precision), | |
| 591 signed integer to fractional, | |
| 592 floating point to fractional. | |
| 593 NOTE: fractional can be either signed or unsigned for conversions. */ | |
| 594 DEF_RTL_EXPR(SAT_FRACT, "sat_fract", "e", RTX_UNARY) | |
| 595 | |
| 596 /* Conversions involving fractional fixed-point types and unsigned integer | |
| 597 with saturation, including: | |
| 598 unsigned integer to fractional. | |
| 599 NOTE: fractional can be either signed or unsigned for conversions. */ | |
| 600 DEF_RTL_EXPR(UNSIGNED_SAT_FRACT, "unsigned_sat_fract", "e", RTX_UNARY) | |
| 601 | |
| 602 /* Absolute value */ | |
| 603 DEF_RTL_EXPR(ABS, "abs", "e", RTX_UNARY) | |
| 604 | |
| 605 /* Square root */ | |
| 606 DEF_RTL_EXPR(SQRT, "sqrt", "e", RTX_UNARY) | |
| 607 | |
| 608 /* Swap bytes. */ | |
| 609 DEF_RTL_EXPR(BSWAP, "bswap", "e", RTX_UNARY) | |
| 610 | |
| 611 /* Find first bit that is set. | |
| 612 Value is 1 + number of trailing zeros in the arg., | |
| 613 or 0 if arg is 0. */ | |
| 614 DEF_RTL_EXPR(FFS, "ffs", "e", RTX_UNARY) | |
| 615 | |
| 616 /* Count leading zeros. */ | |
| 617 DEF_RTL_EXPR(CLZ, "clz", "e", RTX_UNARY) | |
| 618 | |
| 619 /* Count trailing zeros. */ | |
| 620 DEF_RTL_EXPR(CTZ, "ctz", "e", RTX_UNARY) | |
| 621 | |
| 622 /* Population count (number of 1 bits). */ | |
| 623 DEF_RTL_EXPR(POPCOUNT, "popcount", "e", RTX_UNARY) | |
| 624 | |
| 625 /* Population parity (number of 1 bits modulo 2). */ | |
| 626 DEF_RTL_EXPR(PARITY, "parity", "e", RTX_UNARY) | |
| 627 | |
| 628 /* Reference to a signed bit-field of specified size and position. | |
| 629 Operand 0 is the memory unit (usually SImode or QImode) which | |
| 630 contains the field's first bit. Operand 1 is the width, in bits. | |
| 631 Operand 2 is the number of bits in the memory unit before the | |
| 632 first bit of this field. | |
| 633 If BITS_BIG_ENDIAN is defined, the first bit is the msb and | |
| 634 operand 2 counts from the msb of the memory unit. | |
| 635 Otherwise, the first bit is the lsb and operand 2 counts from | |
| 636 the lsb of the memory unit. | |
| 637 This kind of expression can not appear as an lvalue in RTL. */ | |
| 638 DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", RTX_BITFIELD_OPS) | |
| 639 | |
| 640 /* Similar for unsigned bit-field. | |
| 641 But note! This kind of expression _can_ appear as an lvalue. */ | |
| 642 DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", RTX_BITFIELD_OPS) | |
| 643 | |
| 644 /* For RISC machines. These save memory when splitting insns. */ | |
| 645 | |
| 646 /* HIGH are the high-order bits of a constant expression. */ | |
| 647 DEF_RTL_EXPR(HIGH, "high", "e", RTX_CONST_OBJ) | |
| 648 | |
| 649 /* LO_SUM is the sum of a register and the low-order bits | |
| 650 of a constant expression. */ | |
| 651 DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", RTX_OBJ) | |
| 652 | |
| 653 /* Describes a merge operation between two vector values. | |
| 654 Operands 0 and 1 are the vectors to be merged, operand 2 is a bitmask | |
| 655 that specifies where the parts of the result are taken from. Set bits | |
| 656 indicate operand 0, clear bits indicate operand 1. The parts are defined | |
| 657 by the mode of the vectors. */ | |
| 658 DEF_RTL_EXPR(VEC_MERGE, "vec_merge", "eee", RTX_TERNARY) | |
| 659 | |
| 660 /* Describes an operation that selects parts of a vector. | |
| 661 Operands 0 is the source vector, operand 1 is a PARALLEL that contains | |
| 662 a CONST_INT for each of the subparts of the result vector, giving the | |
| 663 number of the source subpart that should be stored into it. */ | |
| 664 DEF_RTL_EXPR(VEC_SELECT, "vec_select", "ee", RTX_BIN_ARITH) | |
| 665 | |
| 666 /* Describes a vector concat operation. Operands 0 and 1 are the source | |
| 667 vectors, the result is a vector that is as long as operands 0 and 1 | |
| 668 combined and is the concatenation of the two source vectors. */ | |
| 669 DEF_RTL_EXPR(VEC_CONCAT, "vec_concat", "ee", RTX_BIN_ARITH) | |
| 670 | |
| 671 /* Describes an operation that converts a small vector into a larger one by | |
| 672 duplicating the input values. The output vector mode must have the same | |
| 673 submodes as the input vector mode, and the number of output parts must be | |
| 674 an integer multiple of the number of input parts. */ | |
| 675 DEF_RTL_EXPR(VEC_DUPLICATE, "vec_duplicate", "e", RTX_UNARY) | |
|
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|
676 |
| 0 | 677 /* Addition with signed saturation */ |
| 678 DEF_RTL_EXPR(SS_PLUS, "ss_plus", "ee", RTX_COMM_ARITH) | |
| 679 | |
| 680 /* Addition with unsigned saturation */ | |
| 681 DEF_RTL_EXPR(US_PLUS, "us_plus", "ee", RTX_COMM_ARITH) | |
| 682 | |
| 683 /* Operand 0 minus operand 1, with signed saturation. */ | |
| 684 DEF_RTL_EXPR(SS_MINUS, "ss_minus", "ee", RTX_BIN_ARITH) | |
| 685 | |
| 686 /* Negation with signed saturation. */ | |
| 687 DEF_RTL_EXPR(SS_NEG, "ss_neg", "e", RTX_UNARY) | |
| 688 /* Negation with unsigned saturation. */ | |
| 689 DEF_RTL_EXPR(US_NEG, "us_neg", "e", RTX_UNARY) | |
| 690 | |
| 691 /* Absolute value with signed saturation. */ | |
| 692 DEF_RTL_EXPR(SS_ABS, "ss_abs", "e", RTX_UNARY) | |
| 693 | |
| 694 /* Shift left with signed saturation. */ | |
| 695 DEF_RTL_EXPR(SS_ASHIFT, "ss_ashift", "ee", RTX_BIN_ARITH) | |
| 696 | |
| 697 /* Shift left with unsigned saturation. */ | |
| 698 DEF_RTL_EXPR(US_ASHIFT, "us_ashift", "ee", RTX_BIN_ARITH) | |
| 699 | |
| 700 /* Operand 0 minus operand 1, with unsigned saturation. */ | |
| 701 DEF_RTL_EXPR(US_MINUS, "us_minus", "ee", RTX_BIN_ARITH) | |
| 702 | |
| 703 /* Signed saturating truncate. */ | |
| 704 DEF_RTL_EXPR(SS_TRUNCATE, "ss_truncate", "e", RTX_UNARY) | |
| 705 | |
| 706 /* Unsigned saturating truncate. */ | |
| 707 DEF_RTL_EXPR(US_TRUNCATE, "us_truncate", "e", RTX_UNARY) | |
| 708 | |
| 709 /* Information about the variable and its location. */ | |
| 710 /* Changed 'te' to 'tei'; the 'i' field is for recording | |
| 711 initialization status of variables. */ | |
| 712 DEF_RTL_EXPR(VAR_LOCATION, "var_location", "tei", RTX_EXTRA) | |
| 713 | |
| 714 /* All expressions from this point forward appear only in machine | |
| 715 descriptions. */ | |
| 716 #ifdef GENERATOR_FILE | |
| 717 | |
| 718 /* Include a secondary machine-description file at this point. */ | |
| 719 DEF_RTL_EXPR(INCLUDE, "include", "s", RTX_EXTRA) | |
| 720 | |
| 721 /* Pattern-matching operators: */ | |
| 722 | |
| 723 /* Use the function named by the second arg (the string) | |
| 724 as a predicate; if matched, store the structure that was matched | |
| 725 in the operand table at index specified by the first arg (the integer). | |
| 726 If the second arg is the null string, the structure is just stored. | |
| 727 | |
| 728 A third string argument indicates to the register allocator restrictions | |
| 729 on where the operand can be allocated. | |
| 730 | |
| 731 If the target needs no restriction on any instruction this field should | |
| 732 be the null string. | |
| 733 | |
| 734 The string is prepended by: | |
| 735 '=' to indicate the operand is only written to. | |
| 736 '+' to indicate the operand is both read and written to. | |
| 737 | |
| 738 Each character in the string represents an allocable class for an operand. | |
| 739 'g' indicates the operand can be any valid class. | |
| 740 'i' indicates the operand can be immediate (in the instruction) data. | |
| 741 'r' indicates the operand can be in a register. | |
| 742 'm' indicates the operand can be in memory. | |
| 743 'o' a subset of the 'm' class. Those memory addressing modes that | |
| 744 can be offset at compile time (have a constant added to them). | |
| 745 | |
| 746 Other characters indicate target dependent operand classes and | |
| 747 are described in each target's machine description. | |
| 748 | |
| 749 For instructions with more than one operand, sets of classes can be | |
| 750 separated by a comma to indicate the appropriate multi-operand constraints. | |
| 751 There must be a 1 to 1 correspondence between these sets of classes in | |
| 752 all operands for an instruction. | |
| 753 */ | |
| 754 DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", RTX_MATCH) | |
| 755 | |
| 756 /* Match a SCRATCH or a register. When used to generate rtl, a | |
| 757 SCRATCH is generated. As for MATCH_OPERAND, the mode specifies | |
| 758 the desired mode and the first argument is the operand number. | |
| 759 The second argument is the constraint. */ | |
| 760 DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", RTX_MATCH) | |
| 761 | |
| 762 /* Apply a predicate, AND match recursively the operands of the rtx. | |
| 763 Operand 0 is the operand-number, as in match_operand. | |
| 764 Operand 1 is a predicate to apply (as a string, a function name). | |
| 765 Operand 2 is a vector of expressions, each of which must match | |
| 766 one subexpression of the rtx this construct is matching. */ | |
| 767 DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", RTX_MATCH) | |
| 768 | |
| 769 /* Match a PARALLEL of arbitrary length. The predicate is applied | |
| 770 to the PARALLEL and the initial expressions in the PARALLEL are matched. | |
| 771 Operand 0 is the operand-number, as in match_operand. | |
| 772 Operand 1 is a predicate to apply to the PARALLEL. | |
|
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773 Operand 2 is a vector of expressions, each of which must match the |
| 0 | 774 corresponding element in the PARALLEL. */ |
| 775 DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", RTX_MATCH) | |
| 776 | |
| 777 /* Match only something equal to what is stored in the operand table | |
| 778 at the index specified by the argument. Use with MATCH_OPERAND. */ | |
| 779 DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", RTX_MATCH) | |
| 780 | |
| 781 /* Match only something equal to what is stored in the operand table | |
| 782 at the index specified by the argument. Use with MATCH_OPERATOR. */ | |
| 783 DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", RTX_MATCH) | |
| 784 | |
| 785 /* Match only something equal to what is stored in the operand table | |
| 786 at the index specified by the argument. Use with MATCH_PARALLEL. */ | |
| 787 DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", RTX_MATCH) | |
| 788 | |
| 789 /* Appears only in define_predicate/define_special_predicate | |
| 790 expressions. Evaluates true only if the operand has an RTX code | |
| 791 from the set given by the argument (a comma-separated list). If the | |
| 792 second argument is present and nonempty, it is a sequence of digits | |
| 793 and/or letters which indicates the subexpression to test, using the | |
| 794 same syntax as genextract/genrecog's location strings: 0-9 for | |
| 795 XEXP (op, n), a-z for XVECEXP (op, 0, n); each character applies to | |
| 796 the result of the one before it. */ | |
| 797 DEF_RTL_EXPR(MATCH_CODE, "match_code", "ss", RTX_MATCH) | |
| 798 | |
| 799 /* Appears only in define_predicate/define_special_predicate | |
| 800 expressions. The argument is a C expression to be injected at this | |
| 801 point in the predicate formula. */ | |
| 802 DEF_RTL_EXPR(MATCH_TEST, "match_test", "s", RTX_MATCH) | |
| 803 | |
| 804 /* Insn (and related) definitions. */ | |
| 805 | |
| 806 /* Definition of the pattern for one kind of instruction. | |
| 807 Operand: | |
| 808 0: names this instruction. | |
| 809 If the name is the null string, the instruction is in the | |
| 810 machine description just to be recognized, and will never be emitted by | |
| 811 the tree to rtl expander. | |
| 812 1: is the pattern. | |
| 813 2: is a string which is a C expression | |
| 814 giving an additional condition for recognizing this pattern. | |
| 815 A null string means no extra condition. | |
| 816 3: is the action to execute if this pattern is matched. | |
| 817 If this assembler code template starts with a * then it is a fragment of | |
| 818 C code to run to decide on a template to use. Otherwise, it is the | |
| 819 template to use. | |
| 820 4: optionally, a vector of attributes for this insn. | |
| 821 */ | |
| 822 DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEsTV", RTX_EXTRA) | |
| 823 | |
| 824 /* Definition of a peephole optimization. | |
| 825 1st operand: vector of insn patterns to match | |
| 826 2nd operand: C expression that must be true | |
| 827 3rd operand: template or C code to produce assembler output. | |
| 828 4: optionally, a vector of attributes for this insn. | |
| 829 | |
| 830 This form is deprecated; use define_peephole2 instead. */ | |
| 831 DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EsTV", RTX_EXTRA) | |
| 832 | |
| 833 /* Definition of a split operation. | |
| 834 1st operand: insn pattern to match | |
| 835 2nd operand: C expression that must be true | |
| 836 3rd operand: vector of insn patterns to place into a SEQUENCE | |
| 837 4th operand: optionally, some C code to execute before generating the | |
| 838 insns. This might, for example, create some RTX's and store them in | |
| 839 elements of `recog_data.operand' for use by the vector of | |
| 840 insn-patterns. | |
| 841 (`operands' is an alias here for `recog_data.operand'). */ | |
| 842 DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", RTX_EXTRA) | |
| 843 | |
| 844 /* Definition of an insn and associated split. | |
| 845 This is the concatenation, with a few modifications, of a define_insn | |
| 846 and a define_split which share the same pattern. | |
| 847 Operand: | |
| 848 0: names this instruction. | |
| 849 If the name is the null string, the instruction is in the | |
| 850 machine description just to be recognized, and will never be emitted by | |
| 851 the tree to rtl expander. | |
| 852 1: is the pattern. | |
| 853 2: is a string which is a C expression | |
| 854 giving an additional condition for recognizing this pattern. | |
| 855 A null string means no extra condition. | |
| 856 3: is the action to execute if this pattern is matched. | |
| 857 If this assembler code template starts with a * then it is a fragment of | |
| 858 C code to run to decide on a template to use. Otherwise, it is the | |
| 859 template to use. | |
| 860 4: C expression that must be true for split. This may start with "&&" | |
|
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861 in which case the split condition is the logical and of the insn |
| 0 | 862 condition and what follows the "&&" of this operand. |
| 863 5: vector of insn patterns to place into a SEQUENCE | |
| 864 6: optionally, some C code to execute before generating the | |
| 865 insns. This might, for example, create some RTX's and store them in | |
| 866 elements of `recog_data.operand' for use by the vector of | |
| 867 insn-patterns. | |
|
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868 (`operands' is an alias here for `recog_data.operand'). |
| 0 | 869 7: optionally, a vector of attributes for this insn. */ |
| 870 DEF_RTL_EXPR(DEFINE_INSN_AND_SPLIT, "define_insn_and_split", "sEsTsESV", RTX_EXTRA) | |
| 871 | |
| 872 /* Definition of an RTL peephole operation. | |
| 873 Follows the same arguments as define_split. */ | |
| 874 DEF_RTL_EXPR(DEFINE_PEEPHOLE2, "define_peephole2", "EsES", RTX_EXTRA) | |
| 875 | |
| 876 /* Define how to generate multiple insns for a standard insn name. | |
| 877 1st operand: the insn name. | |
| 878 2nd operand: vector of insn-patterns. | |
| 879 Use match_operand to substitute an element of `recog_data.operand'. | |
| 880 3rd operand: C expression that must be true for this to be available. | |
| 881 This may not test any operands. | |
| 882 4th operand: Extra C code to execute before generating the insns. | |
| 883 This might, for example, create some RTX's and store them in | |
| 884 elements of `recog_data.operand' for use by the vector of | |
| 885 insn-patterns. | |
| 886 (`operands' is an alias here for `recog_data.operand'). */ | |
| 887 DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", RTX_EXTRA) | |
|
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888 |
| 0 | 889 /* Define a requirement for delay slots. |
| 890 1st operand: Condition involving insn attributes that, if true, | |
| 891 indicates that the insn requires the number of delay slots | |
| 892 shown. | |
| 893 2nd operand: Vector whose length is the three times the number of delay | |
| 894 slots required. | |
| 895 Each entry gives three conditions, each involving attributes. | |
| 896 The first must be true for an insn to occupy that delay slot | |
| 897 location. The second is true for all insns that can be | |
| 898 annulled if the branch is true and the third is true for all | |
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899 insns that can be annulled if the branch is false. |
| 0 | 900 |
| 901 Multiple DEFINE_DELAYs may be present. They indicate differing | |
| 902 requirements for delay slots. */ | |
| 903 DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", RTX_EXTRA) | |
| 904 | |
| 905 /* Define attribute computation for `asm' instructions. */ | |
| 906 DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", RTX_EXTRA) | |
| 907 | |
| 908 /* Definition of a conditional execution meta operation. Automatically | |
| 909 generates new instances of DEFINE_INSN, selected by having attribute | |
| 910 "predicable" true. The new pattern will contain a COND_EXEC and the | |
| 911 predicate at top-level. | |
| 912 | |
| 913 Operand: | |
| 914 0: The predicate pattern. The top-level form should match a | |
| 915 relational operator. Operands should have only one alternative. | |
| 916 1: A C expression giving an additional condition for recognizing | |
| 917 the generated pattern. | |
| 918 2: A template or C code to produce assembler output. */ | |
| 919 DEF_RTL_EXPR(DEFINE_COND_EXEC, "define_cond_exec", "Ess", RTX_EXTRA) | |
| 920 | |
| 921 /* Definition of an operand predicate. The difference between | |
| 922 DEFINE_PREDICATE and DEFINE_SPECIAL_PREDICATE is that genrecog will | |
| 923 not warn about a match_operand with no mode if it has a predicate | |
| 924 defined with DEFINE_SPECIAL_PREDICATE. | |
| 925 | |
| 926 Operand: | |
| 927 0: The name of the predicate. | |
| 928 1: A boolean expression which computes whether or not the predicate | |
| 929 matches. This expression can use IOR, AND, NOT, MATCH_OPERAND, | |
| 930 MATCH_CODE, and MATCH_TEST. It must be specific enough that genrecog | |
| 931 can calculate the set of RTX codes that can possibly match. | |
| 932 2: A C function body which must return true for the predicate to match. | |
| 933 Optional. Use this when the test is too complicated to fit into a | |
| 934 match_test expression. */ | |
| 935 DEF_RTL_EXPR(DEFINE_PREDICATE, "define_predicate", "ses", RTX_EXTRA) | |
| 936 DEF_RTL_EXPR(DEFINE_SPECIAL_PREDICATE, "define_special_predicate", "ses", RTX_EXTRA) | |
| 937 | |
| 938 /* Definition of a register operand constraint. This simply maps the | |
| 939 constraint string to a register class. | |
| 940 | |
| 941 Operand: | |
| 942 0: The name of the constraint (often, but not always, a single letter). | |
| 943 1: A C expression which evaluates to the appropriate register class for | |
| 944 this constraint. If this is not just a constant, it should look only | |
| 945 at -m switches and the like. | |
| 946 2: A docstring for this constraint, in Texinfo syntax; not currently | |
| 947 used, in future will be incorporated into the manual's list of | |
| 948 machine-specific operand constraints. */ | |
| 949 DEF_RTL_EXPR(DEFINE_REGISTER_CONSTRAINT, "define_register_constraint", "sss", RTX_EXTRA) | |
| 950 | |
| 951 /* Definition of a non-register operand constraint. These look at the | |
| 952 operand and decide whether it fits the constraint. | |
| 953 | |
| 954 DEFINE_CONSTRAINT gets no special treatment if it fails to match. | |
| 955 It is appropriate for constant-only constraints, and most others. | |
| 956 | |
| 957 DEFINE_MEMORY_CONSTRAINT tells reload that this constraint can be made | |
| 958 to match, if it doesn't already, by converting the operand to the form | |
| 959 (mem (reg X)) where X is a base register. It is suitable for constraints | |
| 960 that describe a subset of all memory references. | |
| 961 | |
| 962 DEFINE_ADDRESS_CONSTRAINT tells reload that this constraint can be made | |
| 963 to match, if it doesn't already, by converting the operand to the form | |
| 964 (reg X) where X is a base register. It is suitable for constraints that | |
| 965 describe a subset of all address references. | |
| 966 | |
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967 When in doubt, use plain DEFINE_CONSTRAINT. |
| 0 | 968 |
| 969 Operand: | |
| 970 0: The name of the constraint (often, but not always, a single letter). | |
| 971 1: A docstring for this constraint, in Texinfo syntax; not currently | |
| 972 used, in future will be incorporated into the manual's list of | |
| 973 machine-specific operand constraints. | |
| 974 2: A boolean expression which computes whether or not the constraint | |
| 975 matches. It should follow the same rules as a define_predicate | |
| 976 expression, including the bit about specifying the set of RTX codes | |
| 977 that could possibly match. MATCH_TEST subexpressions may make use of | |
| 978 these variables: | |
| 979 `op' - the RTL object defining the operand. | |
| 980 `mode' - the mode of `op'. | |
| 981 `ival' - INTVAL(op), if op is a CONST_INT. | |
| 982 `hval' - CONST_DOUBLE_HIGH(op), if op is an integer CONST_DOUBLE. | |
| 983 `lval' - CONST_DOUBLE_LOW(op), if op is an integer CONST_DOUBLE. | |
| 984 `rval' - CONST_DOUBLE_REAL_VALUE(op), if op is a floating-point | |
| 985 CONST_DOUBLE. | |
| 986 Do not use ival/hval/lval/rval if op is not the appropriate kind of | |
| 987 RTL object. */ | |
| 988 DEF_RTL_EXPR(DEFINE_CONSTRAINT, "define_constraint", "sse", RTX_EXTRA) | |
| 989 DEF_RTL_EXPR(DEFINE_MEMORY_CONSTRAINT, "define_memory_constraint", "sse", RTX_EXTRA) | |
| 990 DEF_RTL_EXPR(DEFINE_ADDRESS_CONSTRAINT, "define_address_constraint", "sse", RTX_EXTRA) | |
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991 |
| 0 | 992 |
| 993 /* Constructions for CPU pipeline description described by NDFAs. */ | |
| 994 | |
| 995 /* (define_cpu_unit string [string]) describes cpu functional | |
| 996 units (separated by comma). | |
| 997 | |
| 998 1st operand: Names of cpu functional units. | |
| 999 2nd operand: Name of automaton (see comments for DEFINE_AUTOMATON). | |
| 1000 | |
| 1001 All define_reservations, define_cpu_units, and | |
| 1002 define_query_cpu_units should have unique names which may not be | |
| 1003 "nothing". */ | |
| 1004 DEF_RTL_EXPR(DEFINE_CPU_UNIT, "define_cpu_unit", "sS", RTX_EXTRA) | |
| 1005 | |
| 1006 /* (define_query_cpu_unit string [string]) describes cpu functional | |
| 1007 units analogously to define_cpu_unit. The reservation of such | |
| 1008 units can be queried for automaton state. */ | |
| 1009 DEF_RTL_EXPR(DEFINE_QUERY_CPU_UNIT, "define_query_cpu_unit", "sS", RTX_EXTRA) | |
| 1010 | |
| 1011 /* (exclusion_set string string) means that each CPU functional unit | |
| 1012 in the first string can not be reserved simultaneously with any | |
| 1013 unit whose name is in the second string and vise versa. CPU units | |
| 1014 in the string are separated by commas. For example, it is useful | |
| 1015 for description CPU with fully pipelined floating point functional | |
| 1016 unit which can execute simultaneously only single floating point | |
| 1017 insns or only double floating point insns. All CPU functional | |
| 1018 units in a set should belong to the same automaton. */ | |
| 1019 DEF_RTL_EXPR(EXCLUSION_SET, "exclusion_set", "ss", RTX_EXTRA) | |
| 1020 | |
| 1021 /* (presence_set string string) means that each CPU functional unit in | |
| 1022 the first string can not be reserved unless at least one of pattern | |
| 1023 of units whose names are in the second string is reserved. This is | |
| 1024 an asymmetric relation. CPU units or unit patterns in the strings | |
| 1025 are separated by commas. Pattern is one unit name or unit names | |
| 1026 separated by white-spaces. | |
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1027 |
| 0 | 1028 For example, it is useful for description that slot1 is reserved |
| 1029 after slot0 reservation for a VLIW processor. We could describe it | |
| 1030 by the following construction | |
| 1031 | |
| 1032 (presence_set "slot1" "slot0") | |
| 1033 | |
| 1034 Or slot1 is reserved only after slot0 and unit b0 reservation. In | |
| 1035 this case we could write | |
| 1036 | |
| 1037 (presence_set "slot1" "slot0 b0") | |
| 1038 | |
| 1039 All CPU functional units in a set should belong to the same | |
| 1040 automaton. */ | |
| 1041 DEF_RTL_EXPR(PRESENCE_SET, "presence_set", "ss", RTX_EXTRA) | |
| 1042 | |
| 1043 /* (final_presence_set string string) is analogous to `presence_set'. | |
| 1044 The difference between them is when checking is done. When an | |
| 1045 instruction is issued in given automaton state reflecting all | |
| 1046 current and planned unit reservations, the automaton state is | |
| 1047 changed. The first state is a source state, the second one is a | |
| 1048 result state. Checking for `presence_set' is done on the source | |
| 1049 state reservation, checking for `final_presence_set' is done on the | |
| 1050 result reservation. This construction is useful to describe a | |
| 1051 reservation which is actually two subsequent reservations. For | |
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1052 example, if we use |
| 0 | 1053 |
| 1054 (presence_set "slot1" "slot0") | |
| 1055 | |
| 1056 the following insn will be never issued (because slot1 requires | |
| 1057 slot0 which is absent in the source state). | |
| 1058 | |
| 1059 (define_reservation "insn_and_nop" "slot0 + slot1") | |
| 1060 | |
| 1061 but it can be issued if we use analogous `final_presence_set'. */ | |
| 1062 DEF_RTL_EXPR(FINAL_PRESENCE_SET, "final_presence_set", "ss", RTX_EXTRA) | |
| 1063 | |
| 1064 /* (absence_set string string) means that each CPU functional unit in | |
| 1065 the first string can be reserved only if each pattern of units | |
| 1066 whose names are in the second string is not reserved. This is an | |
| 1067 asymmetric relation (actually exclusion set is analogous to this | |
| 1068 one but it is symmetric). CPU units or unit patterns in the string | |
| 1069 are separated by commas. Pattern is one unit name or unit names | |
| 1070 separated by white-spaces. | |
| 1071 | |
| 1072 For example, it is useful for description that slot0 can not be | |
| 1073 reserved after slot1 or slot2 reservation for a VLIW processor. We | |
| 1074 could describe it by the following construction | |
| 1075 | |
| 1076 (absence_set "slot2" "slot0, slot1") | |
| 1077 | |
| 1078 Or slot2 can not be reserved if slot0 and unit b0 are reserved or | |
| 1079 slot1 and unit b1 are reserved . In this case we could write | |
| 1080 | |
| 1081 (absence_set "slot2" "slot0 b0, slot1 b1") | |
| 1082 | |
| 1083 All CPU functional units in a set should to belong the same | |
| 1084 automaton. */ | |
| 1085 DEF_RTL_EXPR(ABSENCE_SET, "absence_set", "ss", RTX_EXTRA) | |
| 1086 | |
| 1087 /* (final_absence_set string string) is analogous to `absence_set' but | |
| 1088 checking is done on the result (state) reservation. See comments | |
| 1089 for `final_presence_set'. */ | |
| 1090 DEF_RTL_EXPR(FINAL_ABSENCE_SET, "final_absence_set", "ss", RTX_EXTRA) | |
| 1091 | |
| 1092 /* (define_bypass number out_insn_names in_insn_names) names bypass | |
| 1093 with given latency (the first number) from insns given by the first | |
| 1094 string (see define_insn_reservation) into insns given by the second | |
| 1095 string. Insn names in the strings are separated by commas. The | |
| 1096 third operand is optional name of function which is additional | |
| 1097 guard for the bypass. The function will get the two insns as | |
| 1098 parameters. If the function returns zero the bypass will be | |
| 1099 ignored for this case. Additional guard is necessary to recognize | |
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1100 complicated bypasses, e.g. when consumer is load address. If there |
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1101 are more one bypass with the same output and input insns, the |
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1102 chosen bypass is the first bypass with a guard in description whose |
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1103 guard function returns nonzero. If there is no such bypass, then |
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1104 bypass without the guard function is chosen. */ |
| 0 | 1105 DEF_RTL_EXPR(DEFINE_BYPASS, "define_bypass", "issS", RTX_EXTRA) |
| 1106 | |
| 1107 /* (define_automaton string) describes names of automata generated and | |
| 1108 used for pipeline hazards recognition. The names are separated by | |
| 1109 comma. Actually it is possibly to generate the single automaton | |
| 1110 but unfortunately it can be very large. If we use more one | |
| 1111 automata, the summary size of the automata usually is less than the | |
| 1112 single one. The automaton name is used in define_cpu_unit and | |
| 1113 define_query_cpu_unit. All automata should have unique names. */ | |
| 1114 DEF_RTL_EXPR(DEFINE_AUTOMATON, "define_automaton", "s", RTX_EXTRA) | |
| 1115 | |
| 1116 /* (automata_option string) describes option for generation of | |
| 1117 automata. Currently there are the following options: | |
| 1118 | |
| 1119 o "no-minimization" which makes no minimization of automata. This | |
| 1120 is only worth to do when we are debugging the description and | |
| 1121 need to look more accurately at reservations of states. | |
| 1122 | |
| 1123 o "time" which means printing additional time statistics about | |
| 1124 generation of automata. | |
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1125 |
| 0 | 1126 o "v" which means generation of file describing the result |
| 1127 automata. The file has suffix `.dfa' and can be used for the | |
| 1128 description verification and debugging. | |
| 1129 | |
| 1130 o "w" which means generation of warning instead of error for | |
| 1131 non-critical errors. | |
| 1132 | |
| 1133 o "ndfa" which makes nondeterministic finite state automata. | |
| 1134 | |
| 1135 o "progress" which means output of a progress bar showing how many | |
| 1136 states were generated so far for automaton being processed. */ | |
| 1137 DEF_RTL_EXPR(AUTOMATA_OPTION, "automata_option", "s", RTX_EXTRA) | |
| 1138 | |
| 1139 /* (define_reservation string string) names reservation (the first | |
| 1140 string) of cpu functional units (the 2nd string). Sometimes unit | |
| 1141 reservations for different insns contain common parts. In such | |
| 1142 case, you can describe common part and use its name (the 1st | |
| 1143 parameter) in regular expression in define_insn_reservation. All | |
| 1144 define_reservations, define_cpu_units, and define_query_cpu_units | |
| 1145 should have unique names which may not be "nothing". */ | |
| 1146 DEF_RTL_EXPR(DEFINE_RESERVATION, "define_reservation", "ss", RTX_EXTRA) | |
| 1147 | |
| 1148 /* (define_insn_reservation name default_latency condition regexpr) | |
| 1149 describes reservation of cpu functional units (the 3nd operand) for | |
| 1150 instruction which is selected by the condition (the 2nd parameter). | |
| 1151 The first parameter is used for output of debugging information. | |
| 1152 The reservations are described by a regular expression according | |
| 1153 the following syntax: | |
| 1154 | |
| 1155 regexp = regexp "," oneof | |
| 1156 | oneof | |
| 1157 | |
| 1158 oneof = oneof "|" allof | |
| 1159 | allof | |
| 1160 | |
| 1161 allof = allof "+" repeat | |
| 1162 | repeat | |
|
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77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1163 |
| 0 | 1164 repeat = element "*" number |
| 1165 | element | |
| 1166 | |
| 1167 element = cpu_function_unit_name | |
| 1168 | reservation_name | |
| 1169 | result_name | |
| 1170 | "nothing" | |
| 1171 | "(" regexp ")" | |
| 1172 | |
| 1173 1. "," is used for describing start of the next cycle in | |
| 1174 reservation. | |
| 1175 | |
| 1176 2. "|" is used for describing the reservation described by the | |
| 1177 first regular expression *or* the reservation described by the | |
| 1178 second regular expression *or* etc. | |
| 1179 | |
| 1180 3. "+" is used for describing the reservation described by the | |
| 1181 first regular expression *and* the reservation described by the | |
| 1182 second regular expression *and* etc. | |
| 1183 | |
| 1184 4. "*" is used for convenience and simply means sequence in | |
| 1185 which the regular expression are repeated NUMBER times with | |
| 1186 cycle advancing (see ","). | |
| 1187 | |
| 1188 5. cpu functional unit name which means its reservation. | |
| 1189 | |
| 1190 6. reservation name -- see define_reservation. | |
| 1191 | |
| 1192 7. string "nothing" means no units reservation. */ | |
| 1193 | |
| 1194 DEF_RTL_EXPR(DEFINE_INSN_RESERVATION, "define_insn_reservation", "sies", RTX_EXTRA) | |
| 1195 | |
| 1196 /* Expressions used for insn attributes. */ | |
| 1197 | |
| 1198 /* Definition of an insn attribute. | |
| 1199 1st operand: name of the attribute | |
| 1200 2nd operand: comma-separated list of possible attribute values | |
| 1201 3rd operand: expression for the default value of the attribute. */ | |
| 1202 DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", RTX_EXTRA) | |
| 1203 | |
| 1204 /* Marker for the name of an attribute. */ | |
| 1205 DEF_RTL_EXPR(ATTR, "attr", "s", RTX_EXTRA) | |
| 1206 | |
| 1207 /* For use in the last (optional) operand of DEFINE_INSN or DEFINE_PEEPHOLE and | |
| 1208 in DEFINE_ASM_INSN to specify an attribute to assign to insns matching that | |
| 1209 pattern. | |
| 1210 | |
| 1211 (set_attr "name" "value") is equivalent to | |
| 1212 (set (attr "name") (const_string "value")) */ | |
| 1213 DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", RTX_EXTRA) | |
| 1214 | |
| 1215 /* In the last operand of DEFINE_INSN and DEFINE_PEEPHOLE, this can be used to | |
| 1216 specify that attribute values are to be assigned according to the | |
| 1217 alternative matched. | |
| 1218 | |
| 1219 The following three expressions are equivalent: | |
| 1220 | |
| 1221 (set (attr "att") (cond [(eq_attrq "alternative" "1") (const_string "a1") | |
| 1222 (eq_attrq "alternative" "2") (const_string "a2")] | |
| 1223 (const_string "a3"))) | |
| 1224 (set_attr_alternative "att" [(const_string "a1") (const_string "a2") | |
| 1225 (const_string "a3")]) | |
| 1226 (set_attr "att" "a1,a2,a3") | |
| 1227 */ | |
| 1228 DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", RTX_EXTRA) | |
| 1229 | |
| 1230 /* A conditional expression true if the value of the specified attribute of | |
| 1231 the current insn equals the specified value. The first operand is the | |
| 1232 attribute name and the second is the comparison value. */ | |
| 1233 DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", RTX_EXTRA) | |
| 1234 | |
| 1235 /* A special case of the above representing a set of alternatives. The first | |
| 1236 operand is bitmap of the set, the second one is the default value. */ | |
| 1237 DEF_RTL_EXPR(EQ_ATTR_ALT, "eq_attr_alt", "ii", RTX_EXTRA) | |
| 1238 | |
| 1239 /* A conditional expression which is true if the specified flag is | |
| 1240 true for the insn being scheduled in reorg. | |
| 1241 | |
| 1242 genattr.c defines the following flags which can be tested by | |
| 1243 (attr_flag "foo") expressions in eligible_for_delay. | |
| 1244 | |
| 1245 forward, backward, very_likely, likely, very_unlikely, and unlikely. */ | |
| 1246 | |
| 1247 DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", RTX_EXTRA) | |
| 1248 | |
| 1249 /* General conditional. The first operand is a vector composed of pairs of | |
| 1250 expressions. The first element of each pair is evaluated, in turn. | |
| 1251 The value of the conditional is the second expression of the first pair | |
| 1252 whose first expression evaluates nonzero. If none of the expressions is | |
| 1253 true, the second operand will be used as the value of the conditional. */ | |
| 1254 DEF_RTL_EXPR(COND, "cond", "Ee", RTX_EXTRA) | |
| 1255 | |
| 1256 #endif /* GENERATOR_FILE */ | |
| 1257 | |
| 1258 /* | |
| 1259 Local variables: | |
| 1260 mode:c | |
| 1261 End: | |
| 1262 */ |