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111
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1 /* Common hooks for ARM.
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131
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2 Copyright (C) 1991-2018 Free Software Foundation, Inc.
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111
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3
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4 This file is part of GCC.
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5
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6 GCC is free software; you can redistribute it and/or modify it
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7 under the terms of the GNU General Public License as published
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8 by the Free Software Foundation; either version 3, or (at your
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9 option) any later version.
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10
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11 GCC is distributed in the hope that it will be useful, but WITHOUT
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12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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14 License for more details.
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15
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16 You should have received a copy of the GNU General Public License
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17 along with GCC; see the file COPYING3. If not see
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18 <http://www.gnu.org/licenses/>. */
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19
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20 #define INCLUDE_LIST
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131
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21 #define INCLUDE_VECTOR
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111
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22 #include "config.h"
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23 #include "system.h"
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24 #include "coretypes.h"
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25 #include "tm.h"
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26 #include "memmodel.h"
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27 #include "tm_p.h"
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28 #include "common/common-target.h"
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29 #include "common/common-target-def.h"
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30 #include "opts.h"
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31 #include "flags.h"
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32 #include "sbitmap.h"
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33 #include "diagnostic.h"
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131
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34 #include <algorithm>
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111
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35
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36 /* Set default optimization options. */
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37 static const struct default_options arm_option_optimization_table[] =
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38 {
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39 /* Enable section anchors by default at -O1 or higher. */
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40 { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
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41 { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 },
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42 { OPT_LEVELS_NONE, 0, NULL, 0 }
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43 };
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44
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45 /* Implement TARGET_EXCEPT_UNWIND_INFO. */
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46
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47 enum unwind_info_type
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48 arm_except_unwind_info (struct gcc_options *opts)
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49 {
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50 /* Honor the --enable-sjlj-exceptions configure switch. */
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51 #ifdef CONFIG_SJLJ_EXCEPTIONS
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52 if (CONFIG_SJLJ_EXCEPTIONS)
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53 return UI_SJLJ;
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54 #endif
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55
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56 /* If not using ARM EABI unwind tables... */
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57 if (ARM_UNWIND_INFO)
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58 {
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59 /* For simplicity elsewhere in this file, indicate that all unwind
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60 info is disabled if we're not emitting unwind tables. */
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61 if (!opts->x_flag_exceptions && !opts->x_flag_unwind_tables)
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62 return UI_NONE;
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63 else
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64 return UI_TARGET;
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65 }
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66
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67 /* ... honor target configurations requesting DWARF2 EH... */
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68 #ifdef DWARF2_UNWIND_INFO
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69 if (DWARF2_UNWIND_INFO)
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70 return UI_DWARF2;
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71 #endif
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72
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73 /* ... or fallback to sjlj exceptions for backwards compatibility. */
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74 return UI_SJLJ;
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75 }
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76
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77 #define ARM_CPU_NAME_LENGTH 20
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78
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79 /* Truncate NAME at the first '.' or '+' character seen, or return
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80 NAME unmodified. */
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81
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82 const char *
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83 arm_rewrite_selected_cpu (const char *name)
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84 {
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85 static char output_buf[ARM_CPU_NAME_LENGTH + 1] = {0};
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86 char *arg_pos;
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87
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88 strncpy (output_buf, name, ARM_CPU_NAME_LENGTH);
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89 output_buf[ARM_CPU_NAME_LENGTH] = 0;
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90
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91 arg_pos = strchr (output_buf, '.');
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92
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93 /* If we found a '.' truncate the entry at that point. */
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94 if (arg_pos)
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95 *arg_pos = '\0';
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96
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97 arg_pos = strchr (output_buf, '+');
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98
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99 /* If we found a '+' truncate the entry at that point. */
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100 if (arg_pos)
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101 *arg_pos = '\0';
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102
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103 return output_buf;
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104 }
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105
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106 /* Called by the driver to rewrite a name passed to the -mcpu
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107 argument in preparation to be passed to the assembler. The
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108 names passed from the command line will be in ARGV, we want
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109 to use the right-most argument, which should be in
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110 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
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111
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112 const char *
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113 arm_rewrite_mcpu (int argc, const char **argv)
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114 {
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115 gcc_assert (argc);
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116 return arm_rewrite_selected_cpu (argv[argc - 1]);
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117 }
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118
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131
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119 /* Comparator for arm_rewrite_selected_arch. Compare the two arch extension
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120 strings FIRST and SECOND and return TRUE if FIRST is less than SECOND
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121 alphabetically. */
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122
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123 static bool
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124 compare_opt_names (const char *first, const char *second)
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125 {
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126 return strcmp (first, second) <= 0;
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127 }
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111
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128
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131
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129 /* Rewrite the architecture string for passing to the assembler.
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130 Although the syntax is similar we cannot assume that it supports
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131 the newer FP related options. So strip any option that only
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132 defines features in the standard -mfpu options out. We'll generate
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133 a suitable -mfpu option elsewhere to carry that information. NAME
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134 should already have been canonicalized, so we do not expect to
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135 encounter +no.. options that remove features. A final problem is
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136 that the assembler expects the feature extensions to be listed
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137 alphabetically, so we build a list of required options and then
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138 sort them into canonical order in the resulting string. */
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111
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139 const char *
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140 arm_rewrite_selected_arch (const char *name)
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141 {
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131
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142 /* The result we return needs to be semi persistent, so handle being
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143 re-invoked. */
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144 static char *asm_arch = NULL;
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145
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146 if (asm_arch)
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147 {
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148 free (asm_arch);
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149 asm_arch = NULL;
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150 }
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151
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152 const char *arg_pos = strchr (name, '+');
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153
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154 /* No extension options? just return the original string. */
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155 if (arg_pos == NULL)
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156 return name;
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111
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157
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131
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158 const arch_option *arch_opt
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159 = arm_parse_arch_option_name (all_architectures, "-march", name);
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160
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161 auto_sbitmap fpu_bits (isa_num_bits);
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162 static const enum isa_feature fpu_bitlist[]
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163 = { ISA_ALL_FPU_INTERNAL, isa_nobit };
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164
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165 arm_initialize_isa (fpu_bits, fpu_bitlist);
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166
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167 auto_sbitmap opt_bits (isa_num_bits);
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168
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169 /* Ensure that the resulting string is large enough for the result. We
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170 never add options, so using strdup here will ensure that. */
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171 asm_arch = xstrdup (name);
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172 asm_arch[arg_pos - name] = '\0';
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173
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174 std::vector<const char *>optlist;
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111
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175
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131
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176 while (arg_pos)
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177 {
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178 const char *end = strchr (arg_pos + 1, '+');
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179 size_t len = end ? end - arg_pos : strlen (arg_pos);
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111
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180
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131
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181 for (const cpu_arch_extension *entry = arch_opt->common.extensions;
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182 entry->name != NULL;
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183 entry++)
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184 {
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185 if (strncmp (entry->name, arg_pos + 1, len - 1) == 0
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186 && entry->name[len - 1] == '\0')
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187 {
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188 /* Don't expect removal options. */
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189 gcc_assert (!entry->remove);
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190 arm_initialize_isa (opt_bits, entry->isa_bits);
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191 if (!bitmap_subset_p (opt_bits, fpu_bits))
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192 optlist.push_back (entry->name);
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193 bitmap_clear (opt_bits);
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194 break;
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195 }
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196 }
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111
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197
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131
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198 arg_pos = end;
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199 }
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200
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201 std::sort (optlist.begin (), optlist.end (), compare_opt_names);
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202
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203 for (std::vector<const char *>::iterator opt_iter = optlist.begin ();
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204 opt_iter != optlist.end ();
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205 ++opt_iter)
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206 {
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207 strcat (asm_arch, "+");
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208 strcat (asm_arch, (*opt_iter));
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209 }
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210
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211 return asm_arch;
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111
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212 }
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213
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214 /* Called by the driver to rewrite a name passed to the -march
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215 argument in preparation to be passed to the assembler. The
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216 names passed from the command line will be in ARGV, we want
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217 to use the right-most argument, which should be in
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218 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
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219
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220 const char *
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221 arm_rewrite_march (int argc, const char **argv)
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222 {
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223 gcc_assert (argc);
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224 return arm_rewrite_selected_arch (argv[argc - 1]);
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225 }
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226
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227 #include "arm-cpu-cdata.h"
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228
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229 /* Scan over a raw feature array BITS checking for BIT being present.
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230 This is slower than the normal bitmask checks, but we would spend longer
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231 initializing that than doing the check this way. Returns true iff
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232 BIT is found. */
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233 static bool
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234 check_isa_bits_for (const enum isa_feature* bits, enum isa_feature bit)
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235 {
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236 while (*bits != isa_nobit)
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237 if (*bits++ == bit)
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238 return true;
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239
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240 return false;
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241 }
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242
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243 /* Called by the driver to check whether the target denoted by current
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244 command line options is a Thumb-only target. ARGV is an array of
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245 tupples (normally only one) where the first element of the tupple
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246 is 'cpu' or 'arch' and the second is the option passed to the
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247 compiler for that. An architecture tupple is always taken in
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248 preference to a cpu tupple and the last of each type always
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249 overrides any earlier setting. */
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250
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251 const char *
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252 arm_target_thumb_only (int argc, const char **argv)
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253 {
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254 const char *arch = NULL;
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255 const char *cpu = NULL;
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256
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257 if (argc % 2 != 0)
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258 fatal_error (input_location,
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259 "%%:target_mode_check takes an even number of parameters");
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260
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261 while (argc)
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262 {
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263 if (strcmp (argv[0], "arch") == 0)
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264 arch = argv[1];
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265 else if (strcmp (argv[0], "cpu") == 0)
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266 cpu = argv[1];
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267 else
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268 fatal_error (input_location,
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269 "unrecognized option passed to %%:target_mode_check");
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270 argc -= 2;
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271 argv += 2;
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272 }
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273
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274 /* No architecture, or CPU, has option extensions that change
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275 whether or not we have a Thumb-only device, so there is no need
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276 to scan any option extensions specified. */
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277
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278 /* If the architecture is specified, that overrides any CPU setting. */
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279 if (arch)
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280 {
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281 const arch_option *arch_opt
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131
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282 = arm_parse_arch_option_name (all_architectures, "-march", arch,
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283 false);
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111
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284
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285 if (arch_opt && !check_isa_bits_for (arch_opt->common.isa_bits,
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286 isa_bit_notm))
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287 return "-mthumb";
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288 }
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289 else if (cpu)
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290 {
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291 const cpu_option *cpu_opt
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131
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292 = arm_parse_cpu_option_name (all_cores, "-mcpu", cpu, false);
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111
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293
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294 if (cpu_opt && !check_isa_bits_for (cpu_opt->common.isa_bits,
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295 isa_bit_notm))
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296 return "-mthumb";
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297 }
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298
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299 /* Compiler hasn't been configured with a default, and the CPU
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300 doesn't require Thumb, so default to ARM. */
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301 return "-marm";
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302 }
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303
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304 /* List the permitted CPU option names. If TARGET is a near miss for an
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305 entry, print out the suggested alternative. */
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306 static void
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307 arm_print_hint_for_cpu_option (const char *target,
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308 const cpu_option *list)
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309 {
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310 auto_vec<const char*> candidates;
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311 for (; list->common.name != NULL; list++)
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312 candidates.safe_push (list->common.name);
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131
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313
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314 #ifdef HAVE_LOCAL_CPU_DETECT
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315 /* Add also "native" as possible value. */
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316 candidates.safe_push ("native");
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317 #endif
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318
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111
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319 char *s;
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320 const char *hint = candidates_list_and_hint (target, s, candidates);
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321 if (hint)
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322 inform (input_location, "valid arguments are: %s; did you mean %qs?",
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323 s, hint);
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324 else
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325 inform (input_location, "valid arguments are: %s", s);
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326
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327 XDELETEVEC (s);
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328 }
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329
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330 /* Parse the base component of a CPU selection in LIST. Return a
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331 pointer to the entry in the architecture table. OPTNAME is the
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332 name of the option we are parsing and can be used if a diagnostic
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131
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333 is needed. If COMPLAIN is true (the default) emit error
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334 messages and hints on invalid input. */
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111
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335 const cpu_option *
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336 arm_parse_cpu_option_name (const cpu_option *list, const char *optname,
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131
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337 const char *target, bool complain)
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111
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338 {
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339 const cpu_option *entry;
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340 const char *end = strchr (target, '+');
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341 size_t len = end ? end - target : strlen (target);
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342
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343 for (entry = list; entry->common.name != NULL; entry++)
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344 {
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345 if (strncmp (entry->common.name, target, len) == 0
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346 && entry->common.name[len] == '\0')
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347 return entry;
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348 }
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349
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131
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350 if (complain)
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351 {
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352 error_at (input_location, "unrecognized %s target: %s", optname, target);
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353 arm_print_hint_for_cpu_option (target, list);
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354 }
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111
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355 return NULL;
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356 }
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357
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358 /* List the permitted architecture option names. If TARGET is a near
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359 miss for an entry, print out the suggested alternative. */
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360 static void
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361 arm_print_hint_for_arch_option (const char *target,
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362 const arch_option *list)
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363 {
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364 auto_vec<const char*> candidates;
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365 for (; list->common.name != NULL; list++)
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366 candidates.safe_push (list->common.name);
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131
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367
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368 #ifdef HAVE_LOCAL_CPU_DETECT
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369 /* Add also "native" as possible value. */
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370 candidates.safe_push ("native");
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371 #endif
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372
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111
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373 char *s;
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374 const char *hint = candidates_list_and_hint (target, s, candidates);
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375 if (hint)
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376 inform (input_location, "valid arguments are: %s; did you mean %qs?",
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377 s, hint);
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378 else
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379 inform (input_location, "valid arguments are: %s", s);
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380
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381 XDELETEVEC (s);
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382 }
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383
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384 /* Parse the base component of a CPU or architecture selection in
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385 LIST. Return a pointer to the entry in the architecture table.
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386 OPTNAME is the name of the option we are parsing and can be used if
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131
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387 a diagnostic is needed. If COMPLAIN is true (the default) emit error
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388 messages and hints on invalid input. */
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111
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389 const arch_option *
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390 arm_parse_arch_option_name (const arch_option *list, const char *optname,
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131
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391 const char *target, bool complain)
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111
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392 {
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393 const arch_option *entry;
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394 const char *end = strchr (target, '+');
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395 size_t len = end ? end - target : strlen (target);
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396
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397 for (entry = list; entry->common.name != NULL; entry++)
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398 {
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399 if (strncmp (entry->common.name, target, len) == 0
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400 && entry->common.name[len] == '\0')
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401 return entry;
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402 }
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403
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131
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404 if (complain)
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405 {
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|
|
406 error_at (input_location, "unrecognized %s target: %s", optname, target);
|
|
|
407 arm_print_hint_for_arch_option (target, list);
|
|
|
408 }
|
|
111
|
409 return NULL;
|
|
|
410 }
|
|
|
411
|
|
|
412 /* List the permitted architecture option names. If TARGET is a near
|
|
|
413 miss for an entry, print out the suggested alternative. */
|
|
|
414 static void
|
|
|
415 arm_print_hint_for_fpu_option (const char *target)
|
|
|
416 {
|
|
|
417 auto_vec<const char*> candidates;
|
|
|
418 for (int i = 0; i < TARGET_FPU_auto; i++)
|
|
|
419 candidates.safe_push (all_fpus[i].name);
|
|
|
420 char *s;
|
|
|
421 const char *hint = candidates_list_and_hint (target, s, candidates);
|
|
|
422 if (hint)
|
|
|
423 inform (input_location, "valid arguments are: %s; did you mean %qs?",
|
|
|
424 s, hint);
|
|
|
425 else
|
|
|
426 inform (input_location, "valid arguments are: %s", s);
|
|
|
427
|
|
|
428 XDELETEVEC (s);
|
|
|
429 }
|
|
|
430
|
|
|
431 static const arm_fpu_desc *
|
|
|
432 arm_parse_fpu_option (const char *opt)
|
|
|
433 {
|
|
|
434 int i;
|
|
|
435
|
|
|
436 for (i = 0; i < TARGET_FPU_auto; i++)
|
|
|
437 {
|
|
|
438 if (strcmp (all_fpus[i].name, opt) == 0)
|
|
|
439 return all_fpus + i;
|
|
|
440 }
|
|
|
441
|
|
|
442 error_at (input_location, "unrecognized -mfpu target: %s", opt);
|
|
|
443 arm_print_hint_for_fpu_option (opt);
|
|
|
444 return NULL;
|
|
|
445 }
|
|
|
446
|
|
|
447 /* Convert a static initializer array of feature bits to sbitmap
|
|
|
448 representation. */
|
|
|
449 void
|
|
|
450 arm_initialize_isa (sbitmap isa, const enum isa_feature *isa_bits)
|
|
|
451 {
|
|
|
452 bitmap_clear (isa);
|
|
|
453 while (*isa_bits != isa_nobit)
|
|
|
454 bitmap_set_bit (isa, *(isa_bits++));
|
|
|
455 }
|
|
|
456
|
|
|
457 /* OPT isn't a recognized feature. Print a suitable error message and
|
|
|
458 suggest a possible value. Always print the list of permitted
|
|
|
459 values. */
|
|
|
460 static void
|
|
|
461 arm_unrecognized_feature (const char *opt, size_t len,
|
|
|
462 const cpu_arch_option *target)
|
|
|
463 {
|
|
|
464 char *this_opt = XALLOCAVEC (char, len+1);
|
|
|
465 auto_vec<const char*> candidates;
|
|
|
466
|
|
|
467 strncpy (this_opt, opt, len);
|
|
|
468 this_opt[len] = 0;
|
|
|
469
|
|
|
470 error_at (input_location, "%qs does not support feature %qs", target->name,
|
|
|
471 this_opt);
|
|
|
472 for (const cpu_arch_extension *list = target->extensions;
|
|
|
473 list->name != NULL;
|
|
|
474 list++)
|
|
|
475 candidates.safe_push (list->name);
|
|
|
476
|
|
|
477 char *s;
|
|
|
478 const char *hint = candidates_list_and_hint (this_opt, s, candidates);
|
|
|
479
|
|
|
480 if (hint)
|
|
|
481 inform (input_location, "valid feature names are: %s; did you mean %qs?",
|
|
|
482 s, hint);
|
|
|
483 else
|
|
|
484 inform (input_location, "valid feature names are: %s", s);
|
|
|
485
|
|
|
486 XDELETEVEC (s);
|
|
|
487 }
|
|
|
488
|
|
|
489 /* Parse any feature extensions to add to (or remove from) the
|
|
|
490 permitted ISA selection. */
|
|
|
491 void
|
|
|
492 arm_parse_option_features (sbitmap isa, const cpu_arch_option *target,
|
|
|
493 const char *opts_in)
|
|
|
494 {
|
|
|
495 const char *opts = opts_in;
|
|
|
496
|
|
|
497 if (!opts)
|
|
|
498 return;
|
|
|
499
|
|
|
500 if (!target->extensions)
|
|
|
501 {
|
|
|
502 error_at (input_location, "%s does not take any feature options",
|
|
|
503 target->name);
|
|
|
504 return;
|
|
|
505 }
|
|
|
506
|
|
|
507 while (opts)
|
|
|
508 {
|
|
|
509 gcc_assert (*opts == '+');
|
|
|
510 const struct cpu_arch_extension *entry;
|
|
|
511 const char *end = strchr (++opts, '+');
|
|
|
512 size_t len = end ? end - opts : strlen (opts);
|
|
|
513 bool matched = false;
|
|
|
514
|
|
|
515 for (entry = target->extensions;
|
|
|
516 !matched && entry->name != NULL;
|
|
|
517 entry++)
|
|
|
518 {
|
|
|
519 if (strncmp (entry->name, opts, len) == 0
|
|
|
520 && entry->name[len] == '\0')
|
|
|
521 {
|
|
|
522 if (isa)
|
|
|
523 {
|
|
|
524 const enum isa_feature *f = entry->isa_bits;
|
|
|
525 if (entry->remove)
|
|
|
526 {
|
|
|
527 while (*f != isa_nobit)
|
|
|
528 bitmap_clear_bit (isa, *(f++));
|
|
|
529 }
|
|
|
530 else
|
|
|
531 {
|
|
|
532 while (*f != isa_nobit)
|
|
|
533 bitmap_set_bit (isa, *(f++));
|
|
|
534 }
|
|
|
535 }
|
|
|
536 matched = true;
|
|
|
537 }
|
|
|
538 }
|
|
|
539
|
|
|
540 if (!matched)
|
|
|
541 arm_unrecognized_feature (opts, len, target);
|
|
|
542
|
|
|
543 opts = end;
|
|
|
544 }
|
|
|
545 }
|
|
|
546
|
|
|
547 class candidate_extension
|
|
|
548 {
|
|
|
549 public:
|
|
|
550 const cpu_arch_extension *extension;
|
|
|
551 sbitmap isa_bits;
|
|
|
552 bool required;
|
|
|
553
|
|
|
554 candidate_extension (const cpu_arch_extension *ext, sbitmap bits)
|
|
|
555 : extension (ext), isa_bits (bits), required (true)
|
|
|
556 {}
|
|
|
557 ~candidate_extension ()
|
|
|
558 {
|
|
|
559 sbitmap_free (isa_bits);
|
|
|
560 }
|
|
|
561 };
|
|
|
562
|
|
|
563 /* Generate a canonical representation of the -march option from the
|
|
|
564 current -march string (if given) and other options on the command
|
|
|
565 line that might affect the architecture. This aids multilib selection
|
|
|
566 by ensuring that:
|
|
|
567 a) the option is always present
|
|
|
568 b) only the minimal set of options are used
|
|
|
569 c) when there are multiple extensions, they are in a consistent order.
|
|
|
570
|
|
|
571 The options array consists of couplets of information where the
|
|
|
572 first item in each couplet is the string describing which option
|
|
|
573 name was selected (arch, cpu, fpu) and the second is the value
|
|
|
574 passed for that option. */
|
|
|
575 const char *
|
|
|
576 arm_canon_arch_option (int argc, const char **argv)
|
|
|
577 {
|
|
|
578 const char *arch = NULL;
|
|
|
579 const char *cpu = NULL;
|
|
|
580 const char *fpu = NULL;
|
|
|
581 const char *abi = NULL;
|
|
|
582 static char *canonical_arch = NULL;
|
|
|
583
|
|
|
584 /* Just in case we're called more than once. */
|
|
|
585 if (canonical_arch)
|
|
|
586 {
|
|
|
587 free (canonical_arch);
|
|
|
588 canonical_arch = NULL;
|
|
|
589 }
|
|
|
590
|
|
|
591 if (argc & 1)
|
|
|
592 fatal_error (input_location,
|
|
|
593 "%%:canon_for_mlib takes 1 or more pairs of parameters");
|
|
|
594
|
|
|
595 while (argc)
|
|
|
596 {
|
|
|
597 if (strcmp (argv[0], "arch") == 0)
|
|
|
598 arch = argv[1];
|
|
|
599 else if (strcmp (argv[0], "cpu") == 0)
|
|
|
600 cpu = argv[1];
|
|
|
601 else if (strcmp (argv[0], "fpu") == 0)
|
|
|
602 fpu = argv[1];
|
|
|
603 else if (strcmp (argv[0], "abi") == 0)
|
|
|
604 abi = argv[1];
|
|
|
605 else
|
|
|
606 fatal_error (input_location,
|
|
|
607 "unrecognized operand to %%:canon_for_mlib");
|
|
|
608
|
|
|
609 argc -= 2;
|
|
|
610 argv += 2;
|
|
|
611 }
|
|
|
612
|
|
|
613 auto_sbitmap target_isa (isa_num_bits);
|
|
|
614 auto_sbitmap base_isa (isa_num_bits);
|
|
|
615 auto_sbitmap fpu_isa (isa_num_bits);
|
|
|
616
|
|
|
617 bitmap_clear (fpu_isa);
|
|
|
618
|
|
|
619 const arch_option *selected_arch = NULL;
|
|
|
620
|
|
|
621 /* At least one of these must be defined by either the specs or the
|
|
|
622 user. */
|
|
|
623 gcc_assert (cpu || arch);
|
|
|
624
|
|
|
625 if (!fpu)
|
|
|
626 fpu = FPUTYPE_AUTO;
|
|
|
627
|
|
|
628 if (!abi)
|
|
|
629 {
|
|
|
630 if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFT)
|
|
|
631 abi = "soft";
|
|
|
632 else if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFTFP)
|
|
|
633 abi = "softfp";
|
|
|
634 else if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_HARD)
|
|
|
635 abi = "hard";
|
|
|
636 }
|
|
|
637
|
|
|
638 /* First build up a bitmap describing the target architecture. */
|
|
|
639 if (arch)
|
|
|
640 {
|
|
|
641 selected_arch = arm_parse_arch_option_name (all_architectures,
|
|
|
642 "-march", arch);
|
|
|
643
|
|
|
644 if (selected_arch == NULL)
|
|
|
645 return "";
|
|
|
646
|
|
|
647 arm_initialize_isa (target_isa, selected_arch->common.isa_bits);
|
|
|
648 arm_parse_option_features (target_isa, &selected_arch->common,
|
|
|
649 strchr (arch, '+'));
|
|
|
650 if (fpu && strcmp (fpu, "auto") != 0)
|
|
|
651 {
|
|
|
652 /* We assume that architectures do not have any FPU bits
|
|
|
653 enabled by default. If they did, we would need to strip
|
|
|
654 these out first. */
|
|
|
655 const arm_fpu_desc *target_fpu = arm_parse_fpu_option (fpu);
|
|
|
656 if (target_fpu == NULL)
|
|
|
657 return "";
|
|
|
658
|
|
|
659 arm_initialize_isa (fpu_isa, target_fpu->isa_bits);
|
|
|
660 bitmap_ior (target_isa, target_isa, fpu_isa);
|
|
|
661 }
|
|
|
662 }
|
|
|
663 else if (cpu)
|
|
|
664 {
|
|
|
665 const cpu_option *selected_cpu
|
|
|
666 = arm_parse_cpu_option_name (all_cores, "-mcpu", cpu);
|
|
|
667
|
|
|
668 if (selected_cpu == NULL)
|
|
|
669 return "";
|
|
|
670
|
|
|
671 arm_initialize_isa (target_isa, selected_cpu->common.isa_bits);
|
|
|
672 arm_parse_option_features (target_isa, &selected_cpu->common,
|
|
|
673 strchr (cpu, '+'));
|
|
|
674 if (fpu && strcmp (fpu, "auto") != 0)
|
|
|
675 {
|
|
|
676 /* The easiest and safest way to remove the default fpu
|
|
|
677 capabilities is to look for a '+no..' option that removes
|
|
|
678 the base FPU bit (isa_bit_vfpv2). If that doesn't exist
|
|
|
679 then the best we can do is strip out all the bits that
|
|
|
680 might be part of the most capable FPU we know about,
|
|
|
681 which is "crypto-neon-fp-armv8". */
|
|
|
682 bool default_fpu_found = false;
|
|
|
683 if (selected_cpu->common.extensions)
|
|
|
684 {
|
|
|
685 const cpu_arch_extension *ext;
|
|
|
686 for (ext = selected_cpu->common.extensions; ext->name != NULL;
|
|
|
687 ++ext)
|
|
|
688 {
|
|
|
689 if (ext->remove
|
|
|
690 && check_isa_bits_for (ext->isa_bits, isa_bit_vfpv2))
|
|
|
691 {
|
|
|
692 arm_initialize_isa (fpu_isa, ext->isa_bits);
|
|
|
693 bitmap_and_compl (target_isa, target_isa, fpu_isa);
|
|
|
694 default_fpu_found = true;
|
|
|
695 }
|
|
|
696 }
|
|
|
697
|
|
|
698 }
|
|
|
699
|
|
|
700 if (!default_fpu_found)
|
|
|
701 {
|
|
|
702 arm_initialize_isa
|
|
|
703 (fpu_isa,
|
|
|
704 all_fpus[TARGET_FPU_crypto_neon_fp_armv8].isa_bits);
|
|
|
705 bitmap_and_compl (target_isa, target_isa, fpu_isa);
|
|
|
706 }
|
|
|
707
|
|
|
708 const arm_fpu_desc *target_fpu = arm_parse_fpu_option (fpu);
|
|
|
709 if (target_fpu == NULL)
|
|
|
710 return "";
|
|
|
711
|
|
|
712 arm_initialize_isa (fpu_isa, target_fpu->isa_bits);
|
|
|
713 bitmap_ior (target_isa, target_isa, fpu_isa);
|
|
|
714 }
|
|
|
715
|
|
|
716 selected_arch = all_architectures + selected_cpu->arch;
|
|
|
717 }
|
|
|
718
|
|
|
719 /* If we have a soft-float ABI, disable the FPU. */
|
|
|
720 if (abi && strcmp (abi, "soft") == 0)
|
|
|
721 {
|
|
|
722 /* Clearing the VFPv2 bit is sufficient to stop any extention that
|
|
|
723 builds on the FPU from matching. */
|
|
|
724 bitmap_clear_bit (target_isa, isa_bit_vfpv2);
|
|
|
725 }
|
|
|
726
|
|
|
727 /* If we don't have a selected architecture by now, something's
|
|
|
728 badly wrong. */
|
|
|
729 gcc_assert (selected_arch);
|
|
|
730
|
|
|
731 arm_initialize_isa (base_isa, selected_arch->common.isa_bits);
|
|
|
732
|
|
|
733 /* Architecture has no extension options, so just return the canonical
|
|
|
734 architecture name. */
|
|
|
735 if (selected_arch->common.extensions == NULL)
|
|
|
736 return selected_arch->common.name;
|
|
|
737
|
|
|
738 /* We're only interested in extension bits. */
|
|
|
739 bitmap_and_compl (target_isa, target_isa, base_isa);
|
|
|
740
|
|
|
741 /* There are no extensions needed. Just return the canonical architecture
|
|
|
742 name. */
|
|
|
743 if (bitmap_empty_p (target_isa))
|
|
|
744 return selected_arch->common.name;
|
|
|
745
|
|
|
746 /* What is left is the architecture that the compiler will target. We
|
|
|
747 now need to map that back into a suitable option+features list.
|
|
|
748
|
|
|
749 The list is built in two passes. First we scan every additive
|
|
|
750 option feature supported by the architecture. If the option
|
|
|
751 provides a subset of the features we need we add it to the list
|
|
|
752 of candidates. We then scan backwards over the list of
|
|
|
753 candidates and if we find a feature that adds nothing to one that
|
|
|
754 was later in the list we mark it as redundant. The result is a
|
|
|
755 minimal list of required features for the target
|
|
|
756 architecture. */
|
|
|
757
|
|
|
758 std::list<candidate_extension *> extensions;
|
|
|
759
|
|
|
760 auto_sbitmap target_isa_unsatisfied (isa_num_bits);
|
|
|
761 bitmap_copy (target_isa_unsatisfied, target_isa);
|
|
|
762
|
|
|
763 sbitmap isa_bits = NULL;
|
|
|
764 for (const cpu_arch_extension *cand = selected_arch->common.extensions;
|
|
|
765 cand->name != NULL;
|
|
|
766 cand++)
|
|
|
767 {
|
|
|
768 if (cand->remove || cand->alias)
|
|
|
769 continue;
|
|
|
770
|
|
|
771 if (isa_bits == NULL)
|
|
|
772 isa_bits = sbitmap_alloc (isa_num_bits);
|
|
|
773
|
|
|
774 arm_initialize_isa (isa_bits, cand->isa_bits);
|
|
|
775 if (bitmap_subset_p (isa_bits, target_isa))
|
|
|
776 {
|
|
|
777 extensions.push_back (new candidate_extension (cand, isa_bits));
|
|
|
778 bitmap_and_compl (target_isa_unsatisfied, target_isa_unsatisfied,
|
|
|
779 isa_bits);
|
|
|
780 isa_bits = NULL;
|
|
|
781 }
|
|
|
782 }
|
|
|
783
|
|
|
784 /* There's one extra case to consider, which is that the user has
|
|
|
785 specified an FPU that is less capable than this architecture
|
|
|
786 supports. In that case the code above will fail to find a
|
|
|
787 suitable feature. We handle this by scanning the list of options
|
|
|
788 again, matching the first option that provides an FPU that is
|
|
|
789 more capable than the selected FPU.
|
|
|
790
|
|
|
791 Note that the other case (user specified a more capable FPU than
|
|
|
792 this architecture supports) should end up selecting the most
|
|
|
793 capable FPU variant that we do support. This is sufficient for
|
|
|
794 multilib selection. */
|
|
|
795
|
|
|
796 if (bitmap_bit_p (target_isa_unsatisfied, isa_bit_vfpv2)
|
|
|
797 && bitmap_bit_p (fpu_isa, isa_bit_vfpv2))
|
|
|
798 {
|
|
|
799 std::list<candidate_extension *>::iterator ipoint = extensions.begin ();
|
|
|
800
|
|
|
801 for (const cpu_arch_extension *cand = selected_arch->common.extensions;
|
|
|
802 cand->name != NULL;
|
|
|
803 cand++)
|
|
|
804 {
|
|
|
805 if (cand->remove || cand->alias)
|
|
|
806 continue;
|
|
|
807
|
|
|
808 if (isa_bits == NULL)
|
|
|
809 isa_bits = sbitmap_alloc (isa_num_bits);
|
|
|
810
|
|
|
811 /* We need to keep the features in canonical order, so move the
|
|
|
812 insertion point if this feature is a candidate. */
|
|
|
813 if (ipoint != extensions.end ()
|
|
|
814 && (*ipoint)->extension == cand)
|
|
|
815 ++ipoint;
|
|
|
816
|
|
|
817 arm_initialize_isa (isa_bits, cand->isa_bits);
|
|
|
818 if (bitmap_subset_p (fpu_isa, isa_bits))
|
|
|
819 {
|
|
|
820 extensions.insert (ipoint,
|
|
|
821 new candidate_extension (cand, isa_bits));
|
|
|
822 isa_bits = NULL;
|
|
|
823 break;
|
|
|
824 }
|
|
|
825 }
|
|
|
826 }
|
|
|
827
|
|
|
828 if (isa_bits)
|
|
|
829 sbitmap_free (isa_bits);
|
|
|
830
|
|
|
831 bitmap_clear (target_isa);
|
|
|
832 size_t len = 1;
|
|
|
833 for (std::list<candidate_extension *>::reverse_iterator riter
|
|
|
834 = extensions.rbegin ();
|
|
|
835 riter != extensions.rend (); ++riter)
|
|
|
836 {
|
|
|
837 if (bitmap_subset_p ((*riter)->isa_bits, target_isa))
|
|
|
838 (*riter)->required = false;
|
|
|
839 else
|
|
|
840 {
|
|
|
841 bitmap_ior (target_isa, target_isa, (*riter)->isa_bits);
|
|
|
842 len += strlen ((*riter)->extension->name) + 1;
|
|
|
843 }
|
|
|
844 }
|
|
|
845
|
|
|
846 canonical_arch
|
|
|
847 = (char *) xmalloc (len + strlen (selected_arch->common.name));
|
|
|
848
|
|
|
849 strcpy (canonical_arch, selected_arch->common.name);
|
|
|
850
|
|
|
851 for (std::list<candidate_extension *>::iterator iter = extensions.begin ();
|
|
|
852 iter != extensions.end (); ++iter)
|
|
|
853 {
|
|
|
854 if ((*iter)->required)
|
|
|
855 {
|
|
|
856 strcat (canonical_arch, "+");
|
|
|
857 strcat (canonical_arch, (*iter)->extension->name);
|
|
|
858 }
|
|
|
859 delete (*iter);
|
|
|
860 }
|
|
|
861
|
|
|
862 return canonical_arch;
|
|
|
863 }
|
|
|
864
|
|
|
865 /* If building big-endian on a BE8 target generate a --be8 option for
|
|
|
866 the linker. Takes four types of option: "little" - little-endian;
|
|
|
867 "big" - big-endian; "be8" - force be8 iff big-endian; and "arch"
|
|
|
868 "<arch-name>" (two arguments) - the target architecture. The
|
|
|
869 parameter names are generated by the driver from the command-line
|
|
|
870 options. */
|
|
|
871 const char *
|
|
|
872 arm_be8_option (int argc, const char **argv)
|
|
|
873 {
|
|
|
874 int endian = TARGET_ENDIAN_DEFAULT;
|
|
|
875 const char *arch = NULL;
|
|
|
876 int arg;
|
|
|
877 bool force = false;
|
|
|
878
|
|
|
879 for (arg = 0; arg < argc; arg++)
|
|
|
880 {
|
|
|
881 if (strcmp (argv[arg], "little") == 0)
|
|
|
882 endian = 0;
|
|
|
883 else if (strcmp (argv[arg], "big") == 0)
|
|
|
884 endian = 1;
|
|
|
885 else if (strcmp (argv[arg], "be8") == 0)
|
|
|
886 force = true;
|
|
|
887 else if (strcmp (argv[arg], "arch") == 0)
|
|
|
888 {
|
|
|
889 arg++;
|
|
|
890 gcc_assert (arg < argc);
|
|
|
891 arch = argv[arg];
|
|
|
892 }
|
|
|
893 else
|
|
|
894 gcc_unreachable ();
|
|
|
895 }
|
|
|
896
|
|
|
897 /* Little endian - no be8 option. */
|
|
|
898 if (!endian)
|
|
|
899 return "";
|
|
|
900
|
|
|
901 if (force)
|
|
|
902 return "--be8";
|
|
|
903
|
|
|
904 /* Arch might not be set iff arm_canon_arch (above) detected an
|
|
|
905 error. Do nothing in that case. */
|
|
|
906 if (!arch)
|
|
|
907 return "";
|
|
|
908
|
|
|
909 const arch_option *selected_arch
|
|
|
910 = arm_parse_arch_option_name (all_architectures, "-march", arch);
|
|
|
911
|
|
|
912 /* Similarly if the given arch option was itself invalid. */
|
|
|
913 if (!selected_arch)
|
|
|
914 return "";
|
|
|
915
|
|
|
916 if (check_isa_bits_for (selected_arch->common.isa_bits, isa_bit_be8))
|
|
|
917 return "--be8";
|
|
|
918
|
|
|
919 return "";
|
|
|
920 }
|
|
|
921
|
|
131
|
922 /* Generate a -mfpu= option for passing to the assembler. This is
|
|
|
923 only called when -mfpu was set (possibly defaulted) to auto and is
|
|
|
924 needed to ensure that the assembler knows the correct FPU to use.
|
|
|
925 It wouldn't really be needed except that the compiler can be used
|
|
|
926 to invoke the assembler directly on hand-written files that lack
|
|
|
927 the necessary internal .fpu directives. We assume that the architecture
|
|
|
928 canonicalization calls have already been made so that we have a final
|
|
|
929 -march= option to derive the fpu from. */
|
|
|
930 const char*
|
|
|
931 arm_asm_auto_mfpu (int argc, const char **argv)
|
|
|
932 {
|
|
|
933 static char *auto_fpu = NULL;
|
|
|
934 const char *arch = NULL;
|
|
|
935 static const enum isa_feature fpu_bitlist[]
|
|
|
936 = { ISA_ALL_FPU_INTERNAL, isa_nobit };
|
|
|
937 const arch_option *selected_arch;
|
|
|
938 static const char* fpuname = "softvfp";
|
|
|
939
|
|
|
940 /* Handle multiple calls to this routine. */
|
|
|
941 if (auto_fpu)
|
|
|
942 {
|
|
|
943 free (auto_fpu);
|
|
|
944 auto_fpu = NULL;
|
|
|
945 }
|
|
|
946
|
|
|
947 while (argc)
|
|
|
948 {
|
|
|
949 if (strcmp (argv[0], "arch") == 0)
|
|
|
950 arch = argv[1];
|
|
|
951 else
|
|
|
952 fatal_error (input_location,
|
|
|
953 "unrecognized operand to %%:asm_auto_mfpu");
|
|
|
954 argc -= 2;
|
|
|
955 argv += 2;
|
|
|
956 }
|
|
|
957
|
|
|
958 auto_sbitmap target_isa (isa_num_bits);
|
|
|
959 auto_sbitmap fpubits (isa_num_bits);
|
|
|
960
|
|
|
961 gcc_assert (arch != NULL);
|
|
|
962 selected_arch = arm_parse_arch_option_name (all_architectures,
|
|
|
963 "-march", arch);
|
|
|
964 if (selected_arch == NULL)
|
|
|
965 return "";
|
|
|
966
|
|
|
967 arm_initialize_isa (target_isa, selected_arch->common.isa_bits);
|
|
|
968 arm_parse_option_features (target_isa, &selected_arch->common,
|
|
|
969 strchr (arch, '+'));
|
|
|
970 arm_initialize_isa (fpubits, fpu_bitlist);
|
|
|
971
|
|
|
972 bitmap_and (fpubits, fpubits, target_isa);
|
|
|
973
|
|
|
974 /* The logic below is essentially identical to that in
|
|
|
975 arm.c:arm_identify_fpu_from_isa(), but that only works in the main
|
|
|
976 part of the compiler. */
|
|
|
977
|
|
|
978 /* If there are no FPU capability bits, we just pass -mfpu=softvfp. */
|
|
|
979 if (!bitmap_empty_p (fpubits))
|
|
|
980 {
|
|
|
981 unsigned int i;
|
|
|
982 auto_sbitmap cand_fpubits (isa_num_bits);
|
|
|
983 for (i = 0; i < TARGET_FPU_auto; i++)
|
|
|
984 {
|
|
|
985 arm_initialize_isa (cand_fpubits, all_fpus[i].isa_bits);
|
|
|
986 if (bitmap_equal_p (fpubits, cand_fpubits))
|
|
|
987 {
|
|
|
988 fpuname = all_fpus[i].name;
|
|
|
989 break;
|
|
|
990 }
|
|
|
991 }
|
|
|
992
|
|
|
993 gcc_assert (i != TARGET_FPU_auto);
|
|
|
994 }
|
|
|
995
|
|
|
996 auto_fpu = (char *) xmalloc (strlen (fpuname) + sizeof ("-mfpu="));
|
|
|
997 strcpy (auto_fpu, "-mfpu=");
|
|
|
998 strcat (auto_fpu, fpuname);
|
|
|
999 return auto_fpu;
|
|
|
1000 }
|
|
|
1001
|
|
111
|
1002 #undef ARM_CPU_NAME_LENGTH
|
|
|
1003
|
|
|
1004
|
|
|
1005 #undef TARGET_DEFAULT_TARGET_FLAGS
|
|
|
1006 #define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | MASK_SCHED_PROLOG)
|
|
|
1007
|
|
|
1008 #undef TARGET_OPTION_OPTIMIZATION_TABLE
|
|
|
1009 #define TARGET_OPTION_OPTIMIZATION_TABLE arm_option_optimization_table
|
|
|
1010
|
|
|
1011 #undef TARGET_EXCEPT_UNWIND_INFO
|
|
|
1012 #define TARGET_EXCEPT_UNWIND_INFO arm_except_unwind_info
|
|
|
1013
|
|
|
1014 struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
|
