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1 /* Copyright (C) 2011-2018 Free Software Foundation, Inc.
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2 Contributed by ARM Ltd.
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3
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4 This file is part of GCC.
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5
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6 GCC is free software; you can redistribute it and/or modify it
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7 under the terms of the GNU General Public License as published
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8 by the Free Software Foundation; either version 3, or (at your
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9 option) any later version.
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10
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11 GCC is distributed in the hope that it will be useful, but WITHOUT
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12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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14 License for more details.
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15
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16 You should have received a copy of the GNU General Public License
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17 along with GCC; see the file COPYING3. If not see
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18 <http://www.gnu.org/licenses/>. */
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19
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20 /* Definitions for option handling for AArch64. */
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21
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22 #ifndef GCC_AARCH64_OPTS_H
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23 #define GCC_AARCH64_OPTS_H
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24
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25 /* The various cores that implement AArch64. */
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26 enum aarch64_processor
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27 {
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28 #define AARCH64_CORE(NAME, INTERNAL_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART, VARIANT) \
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29 INTERNAL_IDENT,
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30 #include "aarch64-cores.def"
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31 /* Used to indicate that no processor has been specified. */
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32 generic,
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33 /* Used to mark the end of the processor table. */
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34 aarch64_none
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35 };
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36
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37 enum aarch64_arch
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38 {
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39 #define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
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40 AARCH64_ARCH_##ARCH_IDENT,
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41 #include "aarch64-arches.def"
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42 aarch64_no_arch
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43 };
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44
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45 /* TLS types. */
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46 enum aarch64_tls_type {
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47 TLS_TRADITIONAL,
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48 TLS_DESCRIPTORS
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49 };
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50
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51 /* The code model defines the address generation strategy.
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52 Most have a PIC and non-PIC variant. */
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53 enum aarch64_code_model {
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54 /* Static code and data fit within a 1MB region.
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55 Not fully implemented, mostly treated as SMALL. */
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56 AARCH64_CMODEL_TINY,
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57 /* Static code, data and GOT/PLT fit within a 1MB region.
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58 Not fully implemented, mostly treated as SMALL_PIC. */
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59 AARCH64_CMODEL_TINY_PIC,
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60 /* Static code and data fit within a 4GB region.
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61 The default non-PIC code model. */
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62 AARCH64_CMODEL_SMALL,
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63 /* Static code, data and GOT/PLT fit within a 4GB region.
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64 The default PIC code model. */
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65 AARCH64_CMODEL_SMALL_PIC,
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66 /* -fpic for small memory model.
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67 GOT size to 28KiB (4K*8-4K) or 3580 entries. */
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68 AARCH64_CMODEL_SMALL_SPIC,
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69 /* No assumptions about addresses of code and data.
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70 The PIC variant is not yet implemented. */
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71 AARCH64_CMODEL_LARGE
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72 };
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73
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74 /* Function types -msign-return-address should sign. */
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75 enum aarch64_function_type {
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76 /* Don't sign any function. */
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77 AARCH64_FUNCTION_NONE,
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78 /* Non-leaf functions. */
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79 AARCH64_FUNCTION_NON_LEAF,
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80 /* All functions. */
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81 AARCH64_FUNCTION_ALL
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82 };
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83
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84 /* SVE vector register sizes. */
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85 enum aarch64_sve_vector_bits_enum {
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86 SVE_SCALABLE,
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87 SVE_128 = 128,
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88 SVE_256 = 256,
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89 SVE_512 = 512,
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90 SVE_1024 = 1024,
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91 SVE_2048 = 2048
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92 };
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93
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111
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94 #endif
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