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1 ;; Cavium ThunderX 2 CN99xx pipeline description
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2 ;; Copyright (C) 2016-2018 Free Software Foundation, Inc.
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3 ;;
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4 ;; Contributed by Cavium, Broadcom and Mentor Embedded.
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5
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6 ;; This file is part of GCC.
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7
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8 ;; GCC is free software; you can redistribute it and/or modify
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9 ;; it under the terms of the GNU General Public License as published by
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10 ;; the Free Software Foundation; either version 3, or (at your option)
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11 ;; any later version.
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12
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13 ;; GCC is distributed in the hope that it will be useful,
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14 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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15 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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16 ;; GNU General Public License for more details.
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17
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18 ;; You should have received a copy of the GNU General Public License
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19 ;; along with GCC; see the file COPYING3. If not see
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20 ;; <http://www.gnu.org/licenses/>.
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21
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22 (define_automaton "thunderx2t99, thunderx2t99_advsimd, thunderx2t99_ldst")
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23 (define_automaton "thunderx2t99_mult")
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24
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25 (define_cpu_unit "thunderx2t99_i0" "thunderx2t99")
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26 (define_cpu_unit "thunderx2t99_i1" "thunderx2t99")
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27 (define_cpu_unit "thunderx2t99_i2" "thunderx2t99")
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28
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29 (define_cpu_unit "thunderx2t99_ls0" "thunderx2t99_ldst")
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30 (define_cpu_unit "thunderx2t99_ls1" "thunderx2t99_ldst")
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31 (define_cpu_unit "thunderx2t99_sd" "thunderx2t99_ldst")
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32
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33 ; Pseudo-units for multiply pipeline.
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34
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35 (define_cpu_unit "thunderx2t99_i1m1" "thunderx2t99_mult")
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36 (define_cpu_unit "thunderx2t99_i1m2" "thunderx2t99_mult")
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37 (define_cpu_unit "thunderx2t99_i1m3" "thunderx2t99_mult")
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38
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39 ; Pseudo-units for load delay (assuming dcache hit).
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40
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41 (define_cpu_unit "thunderx2t99_ls0d1" "thunderx2t99_ldst")
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42 (define_cpu_unit "thunderx2t99_ls0d2" "thunderx2t99_ldst")
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43 (define_cpu_unit "thunderx2t99_ls0d3" "thunderx2t99_ldst")
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44
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45 (define_cpu_unit "thunderx2t99_ls1d1" "thunderx2t99_ldst")
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46 (define_cpu_unit "thunderx2t99_ls1d2" "thunderx2t99_ldst")
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47 (define_cpu_unit "thunderx2t99_ls1d3" "thunderx2t99_ldst")
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48
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49 ; Make some aliases for f0/f1.
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50 (define_cpu_unit "thunderx2t99_f0" "thunderx2t99_advsimd")
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51 (define_cpu_unit "thunderx2t99_f1" "thunderx2t99_advsimd")
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52
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53 (define_reservation "thunderx2t99_i012" "thunderx2t99_i0|thunderx2t99_i1|thunderx2t99_i2")
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54 (define_reservation "thunderx2t99_ls01" "thunderx2t99_ls0|thunderx2t99_ls1")
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55 (define_reservation "thunderx2t99_f01" "thunderx2t99_f0|thunderx2t99_f1")
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56
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57 ; A load with delay in the ls0/ls1 pipes.
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58 (define_reservation "thunderx2t99_l0delay" "thunderx2t99_ls0,\
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59 thunderx2t99_ls0d1,thunderx2t99_ls0d2,\
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60 thunderx2t99_ls0d3")
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61 (define_reservation "thunderx2t99_l1delay" "thunderx2t99_ls1,\
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62 thunderx2t99_ls1d1,thunderx2t99_ls1d2,\
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63 thunderx2t99_ls1d3")
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64 (define_reservation "thunderx2t99_l01delay" "thunderx2t99_l0delay|thunderx2t99_l1delay")
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65
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66 ;; Branch and call instructions.
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67
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68 (define_insn_reservation "thunderx2t99_branch" 1
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69 (and (eq_attr "tune" "thunderx2t99")
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70 (eq_attr "type" "call,branch,trap"))
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71 "thunderx2t99_i2")
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72
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131
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73 ;; Misc instructions.
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74
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75 (define_insn_reservation "thunderx2t99_nothing" 0
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76 (and (eq_attr "tune" "thunderx2t99")
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77 (eq_attr "type" "no_insn,block"))
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78 "nothing")
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79
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80 (define_insn_reservation "thunderx2t99_mrs" 0
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81 (and (eq_attr "tune" "thunderx2t99")
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82 (eq_attr "type" "mrs"))
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83 "thunderx2t99_i2")
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84
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85 (define_insn_reservation "thunderx2t99_multiple" 1
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86 (and (eq_attr "tune" "thunderx2t99")
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87 (eq_attr "type" "multiple,untyped"))
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88 "thunderx2t99_i0+thunderx2t99_i1+thunderx2t99_i2+thunderx2t99_ls0+\
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89 thunderx2t99_ls1+thunderx2t99_sd+thunderx2t99_i1m1+thunderx2t99_i1m2+\
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90 thunderx2t99_i1m3+thunderx2t99_f0+thunderx2t99_f1")
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91
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111
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92 ;; Integer arithmetic/logic instructions.
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93
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94 ; Plain register moves are handled by renaming, and don't create any uops.
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95
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96 (define_insn_reservation "thunderx2t99_regmove" 0
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97 (and (eq_attr "tune" "thunderx2t99")
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98 (eq_attr "type" "mov_reg"))
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99 "nothing")
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100
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101 (define_insn_reservation "thunderx2t99_alu_basic" 1
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102 (and (eq_attr "tune" "thunderx2t99")
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103 (eq_attr "type" "alu_imm,alu_sreg,alus_imm,alus_sreg,\
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104 adc_reg,adc_imm,adcs_reg,adcs_imm,\
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105 logic_reg,logic_imm,logics_reg,logics_imm,\
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106 csel,adr,mov_imm,shift_reg,shift_imm,bfm,\
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107 bfx,rbit,rev,extend,rotate_imm"))
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108 "thunderx2t99_i012")
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109
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110 (define_insn_reservation "thunderx2t99_alu_shift" 2
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111 (and (eq_attr "tune" "thunderx2t99")
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131
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112 (eq_attr "type" "alu_shift_imm,alu_ext,\
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113 alus_shift_imm,alus_ext,\
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114 logic_shift_imm,logics_shift_imm"))
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115 "thunderx2t99_i012,thunderx2t99_i012")
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116
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117 (define_insn_reservation "thunderx2t99_div" 13
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118 (and (eq_attr "tune" "thunderx2t99")
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119 (eq_attr "type" "sdiv,udiv"))
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120 "thunderx2t99_i1*3")
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121
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122 (define_insn_reservation "thunderx2t99_madd" 5
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123 (and (eq_attr "tune" "thunderx2t99")
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124 (eq_attr "type" "mla,smlal,umlal"))
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125 "thunderx2t99_i1,thunderx2t99_i1m1,thunderx2t99_i1m2,thunderx2t99_i1m3,\
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126 thunderx2t99_i012")
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127
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128 ; NOTE: smull, umull are used for "high part" multiplies too.
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129 (define_insn_reservation "thunderx2t99_mul" 4
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130 (and (eq_attr "tune" "thunderx2t99")
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131 (eq_attr "type" "mul,smull,umull"))
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132 "thunderx2t99_i1,thunderx2t99_i1m1,thunderx2t99_i1m2,thunderx2t99_i1m3")
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133
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134 (define_insn_reservation "thunderx2t99_countbits" 3
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135 (and (eq_attr "tune" "thunderx2t99")
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136 (eq_attr "type" "clz"))
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137 "thunderx2t99_i1")
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138
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139 ;; Integer loads and stores.
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140
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141 (define_insn_reservation "thunderx2t99_load_basic" 4
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142 (and (eq_attr "tune" "thunderx2t99")
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143 (eq_attr "type" "load_4"))
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144 "thunderx2t99_ls01")
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145
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146 (define_insn_reservation "thunderx2t99_loadpair" 5
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147 (and (eq_attr "tune" "thunderx2t99")
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148 (eq_attr "type" "load_8,load_16"))
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149 "thunderx2t99_i012,thunderx2t99_ls01")
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150
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151 (define_insn_reservation "thunderx2t99_store_basic" 1
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152 (and (eq_attr "tune" "thunderx2t99")
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153 (eq_attr "type" "store_4"))
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154 "thunderx2t99_ls01,thunderx2t99_sd")
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155
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156 (define_insn_reservation "thunderx2t99_storepair_basic" 1
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157 (and (eq_attr "tune" "thunderx2t99")
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158 (eq_attr "type" "store_8,store_16"))
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159 "thunderx2t99_ls01,thunderx2t99_sd")
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160
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161 ;; FP data processing instructions.
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162
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163 (define_insn_reservation "thunderx2t99_fp_simple" 5
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164 (and (eq_attr "tune" "thunderx2t99")
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165 (eq_attr "type" "ffariths,ffarithd,f_minmaxs,f_minmaxd"))
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166 "thunderx2t99_f01")
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167
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168 (define_insn_reservation "thunderx2t99_fp_addsub" 6
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169 (and (eq_attr "tune" "thunderx2t99")
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170 (eq_attr "type" "fadds,faddd"))
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171 "thunderx2t99_f01")
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172
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173 (define_insn_reservation "thunderx2t99_fp_cmp" 5
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174 (and (eq_attr "tune" "thunderx2t99")
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131
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175 (eq_attr "type" "fcmps,fcmpd,fccmps,fccmpd"))
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176 "thunderx2t99_f01")
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177
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178 (define_insn_reservation "thunderx2t99_fp_divsqrt_s" 16
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179 (and (eq_attr "tune" "thunderx2t99")
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180 (eq_attr "type" "fdivs,fsqrts"))
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181 "thunderx2t99_f0*3|thunderx2t99_f1*3")
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182
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183 (define_insn_reservation "thunderx2t99_fp_divsqrt_d" 23
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184 (and (eq_attr "tune" "thunderx2t99")
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185 (eq_attr "type" "fdivd,fsqrtd"))
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186 "thunderx2t99_f0*5|thunderx2t99_f1*5")
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187
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188 (define_insn_reservation "thunderx2t99_fp_mul_mac" 6
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189 (and (eq_attr "tune" "thunderx2t99")
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190 (eq_attr "type" "fmuls,fmuld,fmacs,fmacd"))
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191 "thunderx2t99_f01")
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192
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193 (define_insn_reservation "thunderx2t99_frint" 7
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194 (and (eq_attr "tune" "thunderx2t99")
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195 (eq_attr "type" "f_rints,f_rintd"))
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196 "thunderx2t99_f01")
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197
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198 (define_insn_reservation "thunderx2t99_fcsel" 4
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199 (and (eq_attr "tune" "thunderx2t99")
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200 (eq_attr "type" "fcsel"))
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201 "thunderx2t99_f01")
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202
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203 ;; FP miscellaneous instructions.
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204
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205 (define_insn_reservation "thunderx2t99_fp_cvt" 7
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206 (and (eq_attr "tune" "thunderx2t99")
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207 (eq_attr "type" "f_cvtf2i,f_cvt,f_cvti2f"))
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208 "thunderx2t99_f01")
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209
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210 (define_insn_reservation "thunderx2t99_fp_mov" 4
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211 (and (eq_attr "tune" "thunderx2t99")
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212 (eq_attr "type" "fconsts,fconstd,fmov,f_mrc"))
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213 "thunderx2t99_f01")
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214
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215 (define_insn_reservation "thunderx2t99_fp_mov_to_gen" 5
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216 (and (eq_attr "tune" "thunderx2t99")
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217 (eq_attr "type" "f_mcr"))
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218 "thunderx2t99_f01")
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219
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220 ;; FP loads and stores.
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221
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222 (define_insn_reservation "thunderx2t99_fp_load_basic" 4
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223 (and (eq_attr "tune" "thunderx2t99")
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224 (eq_attr "type" "f_loads,f_loadd"))
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225 "thunderx2t99_ls01")
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226
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227 (define_insn_reservation "thunderx2t99_fp_store_basic" 1
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228 (and (eq_attr "tune" "thunderx2t99")
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229 (eq_attr "type" "f_stores,f_stored"))
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230 "thunderx2t99_ls01,thunderx2t99_sd")
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231
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232 ;; ASIMD integer instructions.
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233
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234 (define_insn_reservation "thunderx2t99_asimd_int" 7
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235 (and (eq_attr "tune" "thunderx2t99")
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236 (eq_attr "type" "neon_abd,neon_abd_q,\
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237 neon_arith_acc,neon_arith_acc_q,\
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238 neon_abs,neon_abs_q,\
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239 neon_add,neon_add_q,\
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131
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240 neon_sub,neon_sub_q,\
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241 neon_neg,neon_neg_q,\
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242 neon_add_long,neon_add_widen,\
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243 neon_add_halve,neon_add_halve_q,\
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244 neon_sub_long,neon_sub_widen,\
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245 neon_sub_halve,neon_sub_halve_q,\
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246 neon_add_halve_narrow_q,neon_sub_halve_narrow_q,\
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247 neon_qabs,neon_qabs_q,\
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248 neon_qadd,neon_qadd_q,\
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249 neon_qneg,neon_qneg_q,\
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250 neon_qsub,neon_qsub_q,\
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251 neon_minmax,neon_minmax_q,\
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252 neon_reduc_minmax,neon_reduc_minmax_q,\
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253 neon_mul_b,neon_mul_h,neon_mul_s,\
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254 neon_mul_b_q,neon_mul_h_q,neon_mul_s_q,\
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255 neon_sat_mul_b,neon_sat_mul_h,neon_sat_mul_s,\
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256 neon_sat_mul_b_q,neon_sat_mul_h_q,neon_sat_mul_s_q,\
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257 neon_mla_b,neon_mla_h,neon_mla_s,\
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258 neon_mla_b_q,neon_mla_h_q,neon_mla_s_q,\
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259 neon_mul_b_long,neon_mul_h_long,\
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260 neon_mul_s_long,neon_mul_d_long,\
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261 neon_sat_mul_b_long,neon_sat_mul_h_long,\
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262 neon_sat_mul_s_long,\
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263 neon_mla_b_long,neon_mla_h_long,neon_mla_s_long,\
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264 neon_sat_mla_b_long,neon_sat_mla_h_long,\
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265 neon_sat_mla_s_long,\
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266 neon_shift_acc,neon_shift_acc_q,\
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267 neon_shift_imm,neon_shift_imm_q,\
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268 neon_shift_reg,neon_shift_reg_q,\
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269 neon_shift_imm_long,neon_shift_imm_narrow_q,\
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270 neon_sat_shift_imm,neon_sat_shift_imm_q,\
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271 neon_sat_shift_reg,neon_sat_shift_reg_q,\
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272 neon_sat_shift_imm_narrow_q"))
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273 "thunderx2t99_f01")
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274
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275 (define_insn_reservation "thunderx2t99_asimd_reduc_add" 5
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276 (and (eq_attr "tune" "thunderx2t99")
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277 (eq_attr "type" "neon_reduc_add,neon_reduc_add_q"))
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278 "thunderx2t99_f01")
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279
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280 (define_insn_reservation "thunderx2t99_asimd_cmp" 7
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281 (and (eq_attr "tune" "thunderx2t99")
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282 (eq_attr "type" "neon_compare,neon_compare_q,neon_compare_zero,\
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283 neon_tst,neon_tst_q"))
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284 "thunderx2t99_f01")
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285
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286 (define_insn_reservation "thunderx2t99_asimd_logic" 5
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287 (and (eq_attr "tune" "thunderx2t99")
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288 (eq_attr "type" "neon_logic,neon_logic_q"))
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289 "thunderx2t99_f01")
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290
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291 ;; ASIMD floating-point instructions.
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292
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293 (define_insn_reservation "thunderx2t99_asimd_fp_simple" 5
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294 (and (eq_attr "tune" "thunderx2t99")
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295 (eq_attr "type" "neon_fp_abs_s,neon_fp_abs_d,\
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296 neon_fp_abs_s_q,neon_fp_abs_d_q,\
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297 neon_fp_compare_s,neon_fp_compare_d,\
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298 neon_fp_compare_s_q,neon_fp_compare_d_q,\
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299 neon_fp_minmax_s,neon_fp_minmax_d,\
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300 neon_fp_minmax_s_q,neon_fp_minmax_d_q,\
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301 neon_fp_reduc_minmax_s,neon_fp_reduc_minmax_d,\
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302 neon_fp_reduc_minmax_s_q,neon_fp_reduc_minmax_d_q,\
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303 neon_fp_neg_s,neon_fp_neg_d,\
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304 neon_fp_neg_s_q,neon_fp_neg_d_q"))
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305 "thunderx2t99_f01")
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306
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307 (define_insn_reservation "thunderx2t99_asimd_fp_arith" 6
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308 (and (eq_attr "tune" "thunderx2t99")
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309 (eq_attr "type" "neon_fp_abd_s,neon_fp_abd_d,\
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310 neon_fp_abd_s_q,neon_fp_abd_d_q,\
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311 neon_fp_addsub_s,neon_fp_addsub_d,\
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312 neon_fp_addsub_s_q,neon_fp_addsub_d_q,\
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313 neon_fp_reduc_add_s,neon_fp_reduc_add_d,\
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314 neon_fp_reduc_add_s_q,neon_fp_reduc_add_d_q,\
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315 neon_fp_mul_s,neon_fp_mul_d,\
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316 neon_fp_mul_s_q,neon_fp_mul_d_q,\
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131
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317 neon_fp_mul_s_scalar_q,neon_fp_mul_d_scalar_q,\
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111
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318 neon_fp_mla_s,neon_fp_mla_d,\
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319 neon_fp_mla_s_q,neon_fp_mla_d_q"))
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320 "thunderx2t99_f01")
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321
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322 (define_insn_reservation "thunderx2t99_asimd_fp_conv" 7
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323 (and (eq_attr "tune" "thunderx2t99")
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324 (eq_attr "type" "neon_fp_cvt_widen_s,neon_fp_cvt_narrow_d_q,\
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325 neon_fp_to_int_s,neon_fp_to_int_d,\
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326 neon_fp_to_int_s_q,neon_fp_to_int_d_q,\
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131
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327 neon_int_to_fp_s,neon_int_to_fp_d,\
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328 neon_int_to_fp_s_q,neon_int_to_fp_d_q,\
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111
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329 neon_fp_round_s,neon_fp_round_d,\
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330 neon_fp_round_s_q,neon_fp_round_d_q"))
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331 "thunderx2t99_f01")
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332
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333 (define_insn_reservation "thunderx2t99_asimd_fp_div_s" 16
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334 (and (eq_attr "tune" "thunderx2t99")
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335 (eq_attr "type" "neon_fp_div_s,neon_fp_div_s_q"))
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336 "thunderx2t99_f01")
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337
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338 (define_insn_reservation "thunderx2t99_asimd_fp_div_d" 23
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339 (and (eq_attr "tune" "thunderx2t99")
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340 (eq_attr "type" "neon_fp_div_d,neon_fp_div_d_q"))
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341 "thunderx2t99_f01")
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342
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343 ;; ASIMD miscellaneous instructions.
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344
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345 (define_insn_reservation "thunderx2t99_asimd_misc" 5
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346 (and (eq_attr "tune" "thunderx2t99")
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347 (eq_attr "type" "neon_rbit,\
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348 neon_bsl,neon_bsl_q,\
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349 neon_cls,neon_cls_q,\
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350 neon_cnt,neon_cnt_q,\
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351 neon_from_gp,neon_from_gp_q,\
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352 neon_dup,neon_dup_q,\
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353 neon_ext,neon_ext_q,\
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354 neon_ins,neon_ins_q,\
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355 neon_move,neon_move_q,\
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356 neon_fp_recpe_s,neon_fp_recpe_d,\
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357 neon_fp_recpe_s_q,neon_fp_recpe_d_q,\
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358 neon_fp_recpx_s,neon_fp_recpx_d,\
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359 neon_fp_recpx_s_q,neon_fp_recpx_d_q,\
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360 neon_rev,neon_rev_q,\
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361 neon_permute,neon_permute_q"))
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362 "thunderx2t99_f01")
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363
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364 (define_insn_reservation "thunderx2t99_asimd_recip_step" 6
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365 (and (eq_attr "tune" "thunderx2t99")
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366 (eq_attr "type" "neon_fp_recps_s,neon_fp_recps_s_q,\
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367 neon_fp_recps_d,neon_fp_recps_d_q,\
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131
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368 neon_fp_sqrt_s,neon_fp_sqrt_s_q,\
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369 neon_fp_sqrt_d,neon_fp_sqrt_d_q,\
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370 neon_fp_rsqrte_s, neon_fp_rsqrte_s_q,\
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371 neon_fp_rsqrte_d, neon_fp_rsqrte_d_q,\
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111
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372 neon_fp_rsqrts_s, neon_fp_rsqrts_s_q,\
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373 neon_fp_rsqrts_d, neon_fp_rsqrts_d_q"))
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374 "thunderx2t99_f01")
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375
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376 (define_insn_reservation "thunderx2t99_asimd_lut" 8
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377 (and (eq_attr "tune" "thunderx2t99")
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131
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378 (eq_attr "type" "neon_tbl1,neon_tbl1_q,neon_tbl2,neon_tbl2_q,\
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379 neon_tbl3,neon_tbl3_q,neon_tbl4,neon_tbl4_q"))
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111
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380 "thunderx2t99_f01")
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381
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382 (define_insn_reservation "thunderx2t99_asimd_elt_to_gr" 6
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383 (and (eq_attr "tune" "thunderx2t99")
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384 (eq_attr "type" "neon_to_gp,neon_to_gp_q"))
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385 "thunderx2t99_f01")
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386
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387 ;; ASIMD load instructions.
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388
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389 ; NOTE: These reservations attempt to model latency and throughput correctly,
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390 ; but the cycle timing of unit allocation is not necessarily accurate (because
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391 ; insns are split into uops, and those may be issued out-of-order).
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392
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131
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393 (define_insn_reservation "thunderx2t99_asimd_load1_ldp" 5
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111
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394 (and (eq_attr "tune" "thunderx2t99")
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131
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395 (eq_attr "type" "neon_ldp,neon_ldp_q"))
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396 "thunderx2t99_i012,thunderx2t99_ls01")
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111
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397
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131
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398 (define_insn_reservation "thunderx2t99_asimd_load1" 4
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111
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399 (and (eq_attr "tune" "thunderx2t99")
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131
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400 (eq_attr "type" "neon_load1_1reg,neon_load1_1reg_q,\
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401 neon_load1_2reg,neon_load1_2reg_q,\
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402 neon_load1_3reg,neon_load1_3reg_q,\
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403 neon_load1_4reg,neon_load1_4reg_q"))
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404 "thunderx2t99_ls01")
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111
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405
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406 (define_insn_reservation "thunderx2t99_asimd_load1_onelane" 5
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407 (and (eq_attr "tune" "thunderx2t99")
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408 (eq_attr "type" "neon_load1_one_lane,neon_load1_one_lane_q"))
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409 "thunderx2t99_l01delay,thunderx2t99_f01")
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410
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411 (define_insn_reservation "thunderx2t99_asimd_load1_all" 5
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412 (and (eq_attr "tune" "thunderx2t99")
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413 (eq_attr "type" "neon_load1_all_lanes,neon_load1_all_lanes_q"))
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414 "thunderx2t99_l01delay,thunderx2t99_f01")
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415
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416 (define_insn_reservation "thunderx2t99_asimd_load2" 5
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417 (and (eq_attr "tune" "thunderx2t99")
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418 (eq_attr "type" "neon_load2_2reg,neon_load2_2reg_q,\
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419 neon_load2_one_lane,neon_load2_one_lane_q,\
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420 neon_load2_all_lanes,neon_load2_all_lanes_q"))
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131
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421 "thunderx2t99_l01delay,thunderx2t99_f01")
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422
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423 (define_insn_reservation "thunderx2t99_asimd_load3" 7
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424 (and (eq_attr "tune" "thunderx2t99")
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425 (eq_attr "type" "neon_load3_3reg,neon_load3_3reg_q,\
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426 neon_load3_one_lane,neon_load3_one_lane_q,\
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427 neon_load3_all_lanes,neon_load3_all_lanes_q"))
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428 "thunderx2t99_l01delay,thunderx2t99_f01")
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429
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430 (define_insn_reservation "thunderx2t99_asimd_load4" 8
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431 (and (eq_attr "tune" "thunderx2t99")
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432 (eq_attr "type" "neon_load4_4reg,neon_load4_4reg_q,\
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433 neon_load4_one_lane,neon_load4_one_lane_q,\
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434 neon_load4_all_lanes,neon_load4_all_lanes_q"))
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435 "thunderx2t99_l01delay,thunderx2t99_f01")
|
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111
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436
|
|
|
437 ;; ASIMD store instructions.
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438
|
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439 ; Same note applies as for ASIMD load instructions.
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440
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131
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441 (define_insn_reservation "thunderx2t99_asimd_store_stp" 1
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111
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442 (and (eq_attr "tune" "thunderx2t99")
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131
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443 (eq_attr "type" "neon_stp,neon_stp_q"))
|
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444 "thunderx2t99_ls01,thunderx2t99_sd")
|
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111
|
445
|
|
131
|
446 (define_insn_reservation "thunderx2t99_asimd_store1" 1
|
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111
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447 (and (eq_attr "tune" "thunderx2t99")
|
|
131
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448 (eq_attr "type" "neon_store1_1reg,neon_store1_1reg_q,\
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449 neon_store1_2reg,neon_store1_2reg_q,\
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|
450 neon_store1_3reg,neon_store1_4reg"))
|
|
|
451 "thunderx2t99_ls01")
|
|
111
|
452
|
|
|
453 (define_insn_reservation "thunderx2t99_asimd_store1_onelane" 1
|
|
|
454 (and (eq_attr "tune" "thunderx2t99")
|
|
|
455 (eq_attr "type" "neon_store1_one_lane,neon_store1_one_lane_q"))
|
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|
456 "thunderx2t99_ls01,thunderx2t99_f01")
|
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457
|
|
131
|
458 (define_insn_reservation "thunderx2t99_asimd_store2" 1
|
|
|
459 (and (eq_attr "tune" "thunderx2t99")
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|
|
460 (eq_attr "type" "neon_store2_2reg,neon_store2_2reg_q,\
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|
461 neon_store2_one_lane,neon_store2_one_lane_q"))
|
|
|
462 "thunderx2t99_ls01,thunderx2t99_f01")
|
|
|
463
|
|
|
464 (define_insn_reservation "thunderx2t99_asimd_store3" 1
|
|
111
|
465 (and (eq_attr "tune" "thunderx2t99")
|
|
131
|
466 (eq_attr "type" "neon_store3_3reg,neon_store3_3reg_q,\
|
|
|
467 neon_store3_one_lane,neon_store3_one_lane_q"))
|
|
|
468 "thunderx2t99_ls01,thunderx2t99_f01")
|
|
111
|
469
|
|
131
|
470 (define_insn_reservation "thunderx2t99_asimd_store4" 1
|
|
111
|
471 (and (eq_attr "tune" "thunderx2t99")
|
|
131
|
472 (eq_attr "type" "neon_store4_4reg,neon_store4_4reg_q,\
|
|
|
473 neon_store4_one_lane,neon_store4_one_lane_q"))
|
|
111
|
474 "thunderx2t99_ls01,thunderx2t99_f01")
|
|
|
475
|
|
|
476 ;; Crypto extensions.
|
|
|
477
|
|
|
478 (define_insn_reservation "thunderx2t99_aes" 5
|
|
|
479 (and (eq_attr "tune" "thunderx2t99")
|
|
|
480 (eq_attr "type" "crypto_aese,crypto_aesmc"))
|
|
|
481 "thunderx2t99_f1")
|
|
|
482
|
|
|
483 (define_insn_reservation "thunderx2t99_sha" 7
|
|
|
484 (and (eq_attr "tune" "thunderx2t99")
|
|
|
485 (eq_attr "type" "crypto_sha1_fast,crypto_sha1_xor,crypto_sha1_slow,\
|
|
|
486 crypto_sha256_fast,crypto_sha256_slow"))
|
|
|
487 "thunderx2t99_f1")
|
|
|
488
|
|
|
489 ;; CRC extension.
|
|
|
490
|
|
|
491 (define_insn_reservation "thunderx2t99_crc" 4
|
|
|
492 (and (eq_attr "tune" "thunderx2t99")
|
|
|
493 (eq_attr "type" "crc"))
|
|
|
494 "thunderx2t99_i1")
|
|
|
495
|
|
|
496 ;; PMULL extension.
|
|
|
497
|
|
|
498 (define_insn_reservation "thunderx2t99_pmull" 5
|
|
|
499 (and (eq_attr "tune" "thunderx2t99")
|
|
|
500 (eq_attr "type" "crypto_pmull"))
|
|
|
501 "thunderx2t99_f1")
|
