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1 ;; ARM Cortex-A15 NEON pipeline description
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2 ;; Copyright (C) 2012-2018 Free Software Foundation, Inc.
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111
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3 ;;
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4 ;; This file is part of GCC.
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5 ;;
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6 ;; GCC is free software; you can redistribute it and/or modify it
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7 ;; under the terms of the GNU General Public License as published by
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8 ;; the Free Software Foundation; either version 3, or (at your option)
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9 ;; any later version.
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10 ;;
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11 ;; GCC is distributed in the hope that it will be useful, but
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12 ;; WITHOUT ANY WARRANTY; without even the implied warranty of
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13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 ;; General Public License for more details.
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15 ;;
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16 ;; You should have received a copy of the GNU General Public License
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17 ;; along with GCC; see the file COPYING3. If not see
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18 ;; <http://www.gnu.org/licenses/>.
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19
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20 (define_attr "cortex_a15_neon_type"
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21 "neon_abd, neon_abd_q, neon_arith_acc, neon_arith_acc_q,
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22 neon_arith_basic, neon_arith_complex,
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23 neon_reduc_add_acc, neon_multiply, neon_multiply_q,
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24 neon_multiply_long, neon_mla, neon_mla_q, neon_mla_long,
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25 neon_sat_mla_long, neon_shift_acc, neon_shift_imm_basic,\
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26 neon_shift_imm_complex,
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27 neon_shift_reg_basic, neon_shift_reg_basic_q, neon_shift_reg_complex,
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28 neon_shift_reg_complex_q, neon_fp_negabs, neon_fp_arith,
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29 neon_fp_arith_q, neon_fp_cvt_int,
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30 neon_fp_cvt_int_q, neon_fp_cvt16, neon_fp_minmax, neon_fp_mul,
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31 neon_fp_mul_q, neon_fp_mla, neon_fp_mla_q, neon_fp_recpe_rsqrte,
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32 neon_fp_recpe_rsqrte_q, neon_bitops, neon_bitops_q, neon_from_gp,
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33 neon_from_gp_q, neon_move, neon_tbl3_tbl4, neon_zip_q, neon_to_gp,
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34 neon_load_a, neon_load_b, neon_load_c, neon_load_d, neon_load_e,
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35 neon_load_f, neon_store_a, neon_store_b, neon_store_c, neon_store_d,
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36 neon_store_e, neon_store_f, neon_store_g, neon_store_h,
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37 unknown"
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38 (cond [
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39 (eq_attr "type" "neon_abd, neon_abd_long")
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40 (const_string "neon_abd")
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41 (eq_attr "type" "neon_abd_q")
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42 (const_string "neon_abd_q")
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43 (eq_attr "type" "neon_arith_acc, neon_reduc_add_acc,\
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44 neon_reduc_add_acc_q")
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45 (const_string "neon_arith_acc")
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46 (eq_attr "type" "neon_arith_acc_q")
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47 (const_string "neon_arith_acc_q")
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48 (eq_attr "type" "neon_add, neon_add_q, neon_add_long,\
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49 neon_add_widen, neon_neg, neon_neg_q,\
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50 neon_reduc_add, neon_reduc_add_q,\
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51 neon_reduc_add_long, neon_sub, neon_sub_q,\
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52 neon_sub_long, neon_sub_widen, neon_logic,\
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53 neon_logic_q, neon_tst, neon_tst_q")
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54 (const_string "neon_arith_basic")
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55 (eq_attr "type" "neon_abs, neon_abs_q, neon_add_halve_narrow_q,\
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56 neon_add_halve, neon_add_halve_q,\
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57 neon_sub_halve, neon_sub_halve_q, neon_qabs,\
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58 neon_qabs_q, neon_qadd, neon_qadd_q, neon_qneg,\
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59 neon_qneg_q, neon_qsub, neon_qsub_q,\
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60 neon_sub_halve_narrow_q,\
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61 neon_compare, neon_compare_q,\
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62 neon_compare_zero, neon_compare_zero_q,\
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63 neon_minmax, neon_minmax_q, neon_reduc_minmax,\
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64 neon_reduc_minmax_q")
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65 (const_string "neon_arith_complex")
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66
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67 (eq_attr "type" "neon_mul_b, neon_mul_h, neon_mul_s,\
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68 neon_mul_h_scalar, neon_mul_s_scalar,\
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69 neon_sat_mul_b, neon_sat_mul_h,\
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70 neon_sat_mul_s, neon_sat_mul_h_scalar,\
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71 neon_sat_mul_s_scalar,\
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72 neon_mul_b_long, neon_mul_h_long,\
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73 neon_mul_s_long,\
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74 neon_mul_h_scalar_long, neon_mul_s_scalar_long,\
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75 neon_sat_mul_b_long, neon_sat_mul_h_long,\
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76 neon_sat_mul_s_long, neon_sat_mul_h_scalar_long,\
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77 neon_sat_mul_s_scalar_long")
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78 (const_string "neon_multiply")
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79 (eq_attr "type" "neon_mul_b_q, neon_mul_h_q, neon_mul_s_q,\
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80 neon_mul_h_scalar_q, neon_mul_s_scalar_q,\
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81 neon_sat_mul_b_q, neon_sat_mul_h_q,\
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82 neon_sat_mul_s_q, neon_sat_mul_h_scalar_q,\
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83 neon_sat_mul_s_scalar_q")
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84 (const_string "neon_multiply_q")
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85 (eq_attr "type" "neon_mla_b, neon_mla_h, neon_mla_s,\
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86 neon_mla_h_scalar, neon_mla_s_scalar,\
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87 neon_mla_b_long, neon_mla_h_long,\
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88 neon_mla_s_long,\
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89 neon_mla_h_scalar_long, neon_mla_s_scalar_long")
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90 (const_string "neon_mla")
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91 (eq_attr "type" "neon_mla_b_q, neon_mla_h_q, neon_mla_s_q,\
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92 neon_mla_h_scalar_q, neon_mla_s_scalar_q")
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93 (const_string "neon_mla_q")
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94 (eq_attr "type" "neon_sat_mla_b_long, neon_sat_mla_h_long,\
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95 neon_sat_mla_s_long, neon_sat_mla_h_scalar_long,\
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96 neon_sat_mla_s_scalar_long")
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97 (const_string "neon_sat_mla_long")
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98
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99 (eq_attr "type" "neon_shift_acc, neon_shift_acc_q")
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100 (const_string "neon_shift_acc")
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101 (eq_attr "type" "neon_shift_imm, neon_shift_imm_q,\
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102 neon_shift_imm_narrow_q, neon_shift_imm_long")
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103 (const_string "neon_shift_imm_basic")
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104 (eq_attr "type" "neon_sat_shift_imm, neon_sat_shift_imm_q,\
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105 neon_sat_shift_imm_narrow_q")
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106 (const_string "neon_shift_imm_complex")
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107 (eq_attr "type" "neon_shift_reg")
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108 (const_string "neon_shift_reg_basic")
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109 (eq_attr "type" "neon_shift_reg_q")
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110 (const_string "neon_shift_reg_basic_q")
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111 (eq_attr "type" "neon_sat_shift_reg")
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112 (const_string "neon_shift_reg_complex")
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113 (eq_attr "type" "neon_sat_shift_reg_q")
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114 (const_string "neon_shift_reg_complex_q")
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115
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116 (eq_attr "type" "neon_fp_neg_s, neon_fp_neg_s_q,\
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117 neon_fp_abs_s, neon_fp_abs_s_q")
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118 (const_string "neon_fp_negabs")
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119 (eq_attr "type" "neon_fp_addsub_s, neon_fp_abd_s,\
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120 neon_fp_reduc_add_s, neon_fp_compare_s,\
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121 neon_fp_minmax_s, neon_fp_minmax_s_q,\
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122 neon_fp_reduc_minmax_s, neon_fp_reduc_minmax_s_q")
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123 (const_string "neon_fp_arith")
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124 (eq_attr "type" "neon_fp_addsub_s_q, neon_fp_abd_s_q,\
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125 neon_fp_reduc_add_s_q, neon_fp_compare_s_q")
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126 (const_string "neon_fp_arith_q")
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127 (eq_attr "type" "neon_fp_to_int_s, neon_int_to_fp_s")
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128 (const_string "neon_fp_cvt_int")
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129 (eq_attr "type" "neon_fp_to_int_s_q, neon_int_to_fp_s_q")
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130 (const_string "neon_fp_cvt_int_q")
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131 (eq_attr "type" "neon_fp_cvt_narrow_s_q, neon_fp_cvt_widen_h")
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132 (const_string "neon_fp_cvt16")
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133 (eq_attr "type" "neon_fp_mul_s, neon_fp_mul_s_scalar")
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134 (const_string "neon_fp_mul")
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135 (eq_attr "type" "neon_fp_mul_s_q, neon_fp_mul_s_scalar_q")
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136 (const_string "neon_fp_mul_q")
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137 (eq_attr "type" "neon_fp_mla_s, neon_fp_mla_s_scalar")
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138 (const_string "neon_fp_mla")
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139 (eq_attr "type" "neon_fp_mla_s_q, neon_fp_mla_s_scalar_q")
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140 (const_string "neon_fp_mla_q")
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141 (eq_attr "type" "neon_fp_recpe_s, neon_fp_rsqrte_s")
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142 (const_string "neon_fp_recpe_rsqrte")
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143 (eq_attr "type" "neon_fp_recpe_s_q, neon_fp_rsqrte_s_q")
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144 (const_string "neon_fp_recpe_rsqrte_q")
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145
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146 (eq_attr "type" "neon_bsl, neon_cls, neon_cnt,\
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147 neon_rev, neon_permute,\
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148 neon_tbl1, neon_tbl2, neon_zip,\
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149 neon_dup, neon_dup_q, neon_ext, neon_ext_q,\
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150 neon_move, neon_move_q, neon_move_narrow_q")
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151 (const_string "neon_bitops")
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152 (eq_attr "type" "neon_bsl_q, neon_cls_q, neon_cnt_q,\
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153 neon_rev_q, neon_permute_q")
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154 (const_string "neon_bitops_q")
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155 (eq_attr "type" "neon_from_gp")
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156 (const_string "neon_from_gp")
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157 (eq_attr "type" "neon_from_gp_q")
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158 (const_string "neon_from_gp_q")
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159 (eq_attr "type" "neon_tbl3, neon_tbl4")
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160 (const_string "neon_tbl3_tbl4")
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161 (eq_attr "type" "neon_zip_q")
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162 (const_string "neon_zip_q")
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163 (eq_attr "type" "neon_to_gp, neon_to_gp_q")
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164 (const_string "neon_to_gp")
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165
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166 (eq_attr "type" "f_loads, f_loadd,\
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167 neon_load1_1reg, neon_load1_1reg_q,\
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168 neon_load1_2reg, neon_load1_2reg_q")
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169 (const_string "neon_load_a")
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170 (eq_attr "type" "neon_load1_3reg, neon_load1_3reg_q,\
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171 neon_load1_4reg, neon_load1_4reg_q")
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172 (const_string "neon_load_b")
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173 (eq_attr "type" "neon_load1_one_lane, neon_load1_one_lane_q,\
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174 neon_load1_all_lanes, neon_load1_all_lanes_q,\
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175 neon_load2_2reg, neon_load2_2reg_q,\
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176 neon_load2_all_lanes, neon_load2_all_lanes_q")
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177 (const_string "neon_load_c")
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178 (eq_attr "type" "neon_load2_4reg, neon_load2_4reg_q,\
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179 neon_load3_3reg, neon_load3_3reg_q,\
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180 neon_load3_one_lane, neon_load3_one_lane_q,\
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181 neon_load4_4reg, neon_load4_4reg_q")
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182 (const_string "neon_load_d")
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183 (eq_attr "type" "neon_load2_one_lane, neon_load2_one_lane_q,\
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184 neon_load3_all_lanes, neon_load3_all_lanes_q,\
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185 neon_load4_all_lanes, neon_load4_all_lanes_q")
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186 (const_string "neon_load_e")
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187 (eq_attr "type" "neon_load4_one_lane, neon_load4_one_lane_q")
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188 (const_string "neon_load_f")
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189
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190 (eq_attr "type" "f_stores, f_stored,\
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191 neon_store1_1reg, neon_store1_1reg_q")
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192 (const_string "neon_store_a")
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193 (eq_attr "type" "neon_store1_2reg, neon_store1_2reg_q")
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194 (const_string "neon_store_b")
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195 (eq_attr "type" "neon_store1_3reg, neon_store1_3reg_q")
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196 (const_string "neon_store_c")
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197 (eq_attr "type" "neon_store1_4reg, neon_store1_4reg_q")
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198 (const_string "neon_store_d")
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199 (eq_attr "type" "neon_store1_one_lane, neon_store1_one_lane_q,\
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200 neon_store2_one_lane, neon_store2_one_lane_q")
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201 (const_string "neon_store_e")
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202 (eq_attr "type" "neon_store2_2reg, neon_store2_2reg_q,\
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203 neon_store3_one_lane, neon_store3_one_lane_q,\
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204 neon_store4_one_lane, neon_store4_one_lane_q")
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205 (const_string "neon_store_f")
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206 (eq_attr "type" "neon_store2_4reg, neon_store2_4reg_q,\
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207 neon_store4_4reg, neon_store4_4reg_q")
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208 (const_string "neon_store_g")
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209 (eq_attr "type" "neon_store3_3reg, neon_store3_3reg_q")
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210 (const_string "neon_store_h")]
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211 (const_string "unknown")))
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212
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213 (define_automaton "cortex_a15_neon")
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214
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215 ;; Dispatch unit.
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216 (define_cpu_unit "ca15_cx_ij, ca15_cx_ik" "cortex_a15_neon")
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217
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218 ;; Accumulate.
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219 (define_cpu_unit "ca15_cx_acc" "cortex_a15_neon")
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220
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221 ;; The 32x32 integer multiply-accumulate pipeline.
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222 (define_cpu_unit "ca15_cx_imac1" "cortex_a15_neon")
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223 (define_reservation "ca15_cx_imac" "(ca15_cx_ij+ca15_cx_imac1)")
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224
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225
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226 ;; The 64-bit ALU pipeline.
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227 (define_cpu_unit "ca15_cx_ialu1, ca15_cx_ialu2" "cortex_a15_neon")
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228
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229 ;; IALU with accumulate.
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230 (define_reservation "ca15_cx_ialu_with_acc" "ca15_cx_ik+ca15_cx_ialu2+ca15_cx_acc")
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231
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232 (define_reservation "ca15_cx_ialu"
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233 "((ca15_cx_ij+ca15_cx_ialu1)|(ca15_cx_ik+ca15_cx_ialu2))")
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234
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235 ;; Integer shift pipeline.
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236 (define_cpu_unit "ca15_cx_ishf" "cortex_a15_neon")
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237 (define_reservation "ca15_cx_ishf_with_acc" "ca15_cx_ik+ca15_cx_ishf+ca15_cx_acc")
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238
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239 ;; SIMD multiply pipeline.
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240 (define_cpu_unit "ca15_cx_fmul1, ca15_cx_fmul2, ca15_cx_fmul3, ca15_cx_fmul4"
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241 "cortex_a15_neon")
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242
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243 (define_reservation "ca15_cx_fmul"
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244 "(ca15_cx_ij+(ca15_cx_fmul1|ca15_cx_fmul2))|\
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245 (ca15_cx_ik+(ca15_cx_fmul3|ca15_cx_fmul4))")
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246
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247 (define_reservation "ca15_cx_fmul_2"
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248 "(ca15_cx_ij+(ca15_cx_fmul1|ca15_cx_fmul2))+\
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249 (ca15_cx_ik+(ca15_cx_fmul3|ca15_cx_fmul4))")
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250
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251 ;; SIMD ALU pipeline.
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252 (define_cpu_unit "ca15_cx_falu1, ca15_cx_falu2, ca15_cx_falu3, ca15_cx_falu4"
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253 "cortex_a15_neon")
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254
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255 (define_reservation "ca15_cx_falu"
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256 "(ca15_cx_ij+(ca15_cx_falu1|ca15_cx_falu2))|\
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257 (ca15_cx_ik+(ca15_cx_falu3|ca15_cx_falu4))")
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258
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259 (define_reservation "ca15_cx_falu_2"
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260 "(ca15_cx_ij+(ca15_cx_falu1|ca15_cx_falu2))+\
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261 (ca15_cx_ik+(ca15_cx_falu3|ca15_cx_falu4))")
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262
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263 ;; SIMD multiply-accumulate pipeline.
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264 ;; This can be used if fmul and falu are not reserved.
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265 (define_reservation "ca15_cx_fmac"
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266 "((ca15_cx_ij+ca15_cx_fmul1),nothing*2,ca15_cx_falu1)|\
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267 ((ca15_cx_ij+ca15_cx_fmul2),nothing*2,ca15_cx_falu2)|\
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268 ((ca15_cx_ik+ca15_cx_fmul3),nothing*2,ca15_cx_falu3)|\
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269 ((ca15_cx_ik+ca15_cx_fmul4),nothing*2,ca15_cx_falu4)")
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270
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271 (define_reservation "ca15_cx_fmac_2"
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272 "(((ca15_cx_ij+ca15_cx_fmul1),nothing*2,ca15_cx_falu1)|\
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273 ((ca15_cx_ij+ca15_cx_fmul2),nothing*2,ca15_cx_falu2))+\
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274 (((ca15_cx_ik+ca15_cx_fmul3),nothing*2,ca15_cx_falu3)|\
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275 ((ca15_cx_ik+ca15_cx_fmul4),nothing*2,ca15_cx_falu4))")
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276
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277
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278 ;; Vector FP multiply pipeline
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279 (define_cpu_unit "ca15_cx_vfp_i" "cortex_a15_neon")
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280
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281 (define_reservation "ca15_cx_vfp" "ca15_cx_ik+ca15_cx_vfp_i")
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282
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283 ;; Load permute pipeline
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284 (define_reservation "ca15_cx_perm" "ca15_cx_ij|ca15_cx_ik")
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285 (define_reservation "ca15_cx_perm_2" "ca15_cx_ij+ca15_cx_ik")
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286
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287 ;; Integer Arithmetic Instructions.
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288
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289 (define_insn_reservation "cortex_a15_neon_abd" 5
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290 (and (eq_attr "tune" "cortexa15")
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291 (eq_attr "cortex_a15_neon_type" "neon_abd"))
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292 "ca15_issue1,ca15_cx_ialu")
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293
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294 (define_insn_reservation "cortex_a15_neon_abd_q" 5
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295 (and (eq_attr "tune" "cortexa15")
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296 (eq_attr "cortex_a15_neon_type" "neon_abd_q"))
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297 "ca15_issue2,ca15_cx_ialu*2")
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298
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299 (define_insn_reservation "cortex_a15_neon_aba" 7
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300 (and (eq_attr "tune" "cortexa15")
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301 (eq_attr "cortex_a15_neon_type" "neon_arith_acc"))
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302 "ca15_issue1,ca15_cx_ialu_with_acc")
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303
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304 (define_insn_reservation "cortex_a15_neon_aba_q" 8
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305 (and (eq_attr "tune" "cortexa15")
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306 (eq_attr "cortex_a15_neon_type" "neon_arith_acc_q"))
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307 "ca15_issue2,ca15_cx_ialu_with_acc*2")
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308
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309 (define_insn_reservation "cortex_a15_neon_arith_basic" 4
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310 (and (eq_attr "tune" "cortexa15")
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311 (eq_attr "cortex_a15_neon_type" "neon_arith_basic"))
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312 "ca15_issue1,ca15_cx_ialu")
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313
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314 (define_insn_reservation "cortex_a15_neon_arith_complex" 5
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315 (and (eq_attr "tune" "cortexa15")
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316 (eq_attr "cortex_a15_neon_type" "neon_arith_complex"))
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317 "ca15_issue1,ca15_cx_ialu")
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318
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319 ;; Integer Multiply Instructions.
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320
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321 (define_insn_reservation "cortex_a15_neon_multiply" 6
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322 (and (eq_attr "tune" "cortexa15")
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323 (eq_attr "cortex_a15_neon_type" "neon_multiply"))
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324 "ca15_issue1,ca15_cx_imac")
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325
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326 (define_insn_reservation "cortex_a15_neon_multiply_q" 7
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327 (and (eq_attr "tune" "cortexa15")
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328 (eq_attr "cortex_a15_neon_type" "neon_multiply_q"))
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329 "ca15_issue2,ca15_cx_imac*2")
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330
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331 (define_insn_reservation "cortex_a15_neon_mla" 6
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332 (and (eq_attr "tune" "cortexa15")
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333 (eq_attr "cortex_a15_neon_type" "neon_mla"))
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334 "ca15_issue1,ca15_cx_imac")
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335
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336 (define_insn_reservation "cortex_a15_neon_mla_q" 7
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337 (and (eq_attr "tune" "cortexa15")
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338 (eq_attr "cortex_a15_neon_type" "neon_mla_q"))
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339 "ca15_issue1,ca15_cx_imac*2")
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340
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341 (define_insn_reservation "cortex_a15_neon_sat_mla_long" 6
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342 (and (eq_attr "tune" "cortexa15")
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343 (eq_attr "cortex_a15_neon_type" "neon_sat_mla_long"))
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344 "ca15_issue1,ca15_cx_imac")
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345
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346 ;; Integer Shift Instructions.
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347
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348 (define_insn_reservation
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349 "cortex_a15_neon_shift_acc" 7
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350 (and (eq_attr "tune" "cortexa15")
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351 (eq_attr "cortex_a15_neon_type" "neon_shift_acc"))
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352 "ca15_issue1,ca15_cx_ishf_with_acc")
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353
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354 (define_insn_reservation
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355 "cortex_a15_neon_shift_imm_basic" 4
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356 (and (eq_attr "tune" "cortexa15")
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357 (eq_attr "cortex_a15_neon_type" "neon_shift_imm_basic"))
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358 "ca15_issue1,ca15_cx_ik+ca15_cx_ishf")
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359
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360 (define_insn_reservation
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361 "cortex_a15_neon_shift_imm_complex" 5
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362 (and (eq_attr "tune" "cortexa15")
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363 (eq_attr "cortex_a15_neon_type" "neon_shift_imm_complex"))
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364 "ca15_issue1,ca15_cx_ik+ca15_cx_ishf")
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365
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366 (define_insn_reservation
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367 "cortex_a15_neon_shift_reg_basic" 4
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368 (and (eq_attr "tune" "cortexa15")
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369 (eq_attr "cortex_a15_neon_type" "neon_shift_reg_basic"))
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370 "ca15_issue1,ca15_cx_ik+ca15_cx_ishf")
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|
371
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372 (define_insn_reservation
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373 "cortex_a15_neon_shift_reg_basic_q" 5
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374 (and (eq_attr "tune" "cortexa15")
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375 (eq_attr "cortex_a15_neon_type" "neon_shift_reg_basic_q"))
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376 "ca15_issue2,(ca15_cx_ik+ca15_cx_ishf*2)")
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377
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378 (define_insn_reservation
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379 "cortex_a15_neon_shift_reg_complex" 5
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380 (and (eq_attr "tune" "cortexa15")
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381 (eq_attr "cortex_a15_neon_type" "neon_shift_reg_complex"))
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382 "ca15_issue2,ca15_cx_ik+ca15_cx_ishf")
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383
|
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|
384 (define_insn_reservation
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385 "cortex_a15_neon_shift_reg_complex_q" 6
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386 (and (eq_attr "tune" "cortexa15")
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387 (eq_attr "cortex_a15_neon_type" "neon_shift_reg_complex_q"))
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388 "ca15_issue2,(ca15_cx_ik+ca15_cx_ishf)*2")
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389
|
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|
390 ;; Floating Point Instructions.
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391
|
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|
392 (define_insn_reservation
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393 "cortex_a15_neon_fp_negabs" 4
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394 (and (eq_attr "tune" "cortexa15")
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395 (eq_attr "cortex_a15_neon_type" "neon_fp_negabs"))
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|
396 "ca15_issue1,ca15_cx_falu")
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397
|
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|
398 (define_insn_reservation
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399 "cortex_a15_neon_fp_arith" 6
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|
400 (and (eq_attr "tune" "cortexa15")
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|
|
401 (eq_attr "cortex_a15_neon_type" "neon_fp_arith"))
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|
402 "ca15_issue1,ca15_cx_falu")
|
|
|
403
|
|
|
404 (define_insn_reservation
|
|
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405 "cortex_a15_neon_fp_arith_q" 6
|
|
|
406 (and (eq_attr "tune" "cortexa15")
|
|
|
407 (eq_attr "cortex_a15_neon_type" "neon_fp_arith_q"))
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|
|
408 "ca15_issue2,ca15_cx_falu_2")
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|
|
409
|
|
|
410 (define_insn_reservation
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|
411 "cortex_a15_neon_fp_cvt_int" 6
|
|
|
412 (and (eq_attr "tune" "cortexa15")
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|
|
413 (eq_attr "cortex_a15_neon_type" "neon_fp_cvt_int"))
|
|
|
414 "ca15_issue1,ca15_cx_falu+ca15_cx_ishf")
|
|
|
415
|
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|
416 (define_insn_reservation
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|
417 "cortex_a15_neon_fp_cvt_int_q" 6
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|
|
418 (and (eq_attr "tune" "cortexa15")
|
|
|
419 (eq_attr "cortex_a15_neon_type" "neon_fp_cvt_int_q"))
|
|
|
420 "ca15_issue2,(ca15_cx_falu+ca15_cx_ishf)*2")
|
|
|
421
|
|
|
422 (define_insn_reservation
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|
423 "cortex_a15_neon_fp_cvt16" 10
|
|
|
424 (and (eq_attr "tune" "cortexa15")
|
|
|
425 (eq_attr "cortex_a15_neon_type" "neon_fp_cvt16"))
|
|
|
426 "ca15_issue3,(ca15_cx_falu+ca15_cx_ishf)*2+ca15_cx_falu")
|
|
|
427
|
|
|
428 (define_insn_reservation
|
|
|
429 "cortex_a15_neon_fp_mul" 5
|
|
|
430 (and (eq_attr "tune" "cortexa15")
|
|
|
431 (eq_attr "cortex_a15_neon_type" "neon_fp_mul"))
|
|
|
432 "ca15_issue1,ca15_cx_fmul")
|
|
|
433
|
|
|
434 (define_insn_reservation
|
|
|
435 "cortex_a15_neon_fp_mul_q" 5
|
|
|
436 (and (eq_attr "tune" "cortexa15")
|
|
|
437 (eq_attr "cortex_a15_neon_type" "neon_fp_mul_q"))
|
|
|
438 "ca15_issue2,ca15_cx_fmul_2")
|
|
|
439
|
|
|
440 (define_insn_reservation
|
|
|
441 "cortex_a15_neon_fp_mla" 9
|
|
|
442 (and (eq_attr "tune" "cortexa15")
|
|
|
443 (eq_attr "cortex_a15_neon_type" "neon_fp_mla"))
|
|
|
444 "ca15_issue1,ca15_cx_fmul")
|
|
|
445
|
|
|
446 (define_insn_reservation
|
|
|
447 "cortex_a15_neon_fp_mla_q" 9
|
|
|
448 (and (eq_attr "tune" "cortexa15")
|
|
|
449 (eq_attr "cortex_a15_neon_type" "neon_fp_mla_q"))
|
|
|
450 "ca15_issue2,ca15_cx_fmul_2")
|
|
|
451
|
|
|
452 (define_insn_reservation
|
|
|
453 "cortex_a15_neon_fp_recps_rsqrte" 9
|
|
|
454 (and (eq_attr "tune" "cortexa15")
|
|
|
455 (eq_attr "cortex_a15_neon_type" "neon_fp_recpe_rsqrte"))
|
|
|
456 "ca15_issue1,ca15_cx_fmac")
|
|
|
457
|
|
|
458 (define_insn_reservation
|
|
|
459 "cortex_a15_neon_fp_recps_rsqrte_q" 9
|
|
|
460 (and (eq_attr "tune" "cortexa15")
|
|
|
461 (eq_attr "cortex_a15_neon_type" "neon_fp_recpe_rsqrte_q"))
|
|
|
462 "ca15_issue2,ca15_cx_fmac_2")
|
|
|
463
|
|
|
464 ;; Miscelaaneous Instructions.
|
|
|
465
|
|
|
466 (define_insn_reservation
|
|
|
467 "cortex_a15_neon_bitops" 4
|
|
|
468 (and (eq_attr "tune" "cortexa15")
|
|
|
469 (eq_attr "cortex_a15_neon_type" "neon_bitops"))
|
|
|
470 "ca15_issue1,ca15_cx_perm")
|
|
|
471
|
|
|
472 (define_insn_reservation
|
|
|
473 "cortex_a15_neon_bitops_q" 4
|
|
|
474 (and (eq_attr "tune" "cortexa15")
|
|
|
475 (eq_attr "cortex_a15_neon_type" "neon_bitops_q"))
|
|
|
476 "ca15_issue2,ca15_cx_perm_2")
|
|
|
477
|
|
|
478 (define_insn_reservation
|
|
|
479 "cortex_a15_neon_from_gp" 9
|
|
|
480 (and (eq_attr "tune" "cortexa15")
|
|
|
481 (eq_attr "cortex_a15_neon_type" "neon_from_gp"))
|
|
|
482 "ca15_issue2,ca15_ls1+ca15_ls2+ca15_cx_perm")
|
|
|
483
|
|
|
484 (define_insn_reservation
|
|
|
485 "cortex_a15_neon_from_gp_q" 9
|
|
|
486 (and (eq_attr "tune" "cortexa15")
|
|
|
487 (eq_attr "cortex_a15_neon_type" "neon_from_gp_q"))
|
|
|
488 "ca15_issue2,ca15_ls1+ca15_ls2+ca15_cx_perm_2")
|
|
|
489
|
|
|
490 (define_insn_reservation
|
|
|
491 "cortex_a15_neon_tbl3_tbl4" 7
|
|
|
492 (and (eq_attr "tune" "cortexa15")
|
|
|
493 (eq_attr "cortex_a15_neon_type" "neon_tbl3_tbl4"))
|
|
|
494 "ca15_issue2,ca15_cx_perm_2")
|
|
|
495
|
|
|
496 (define_insn_reservation
|
|
|
497 "cortex_a15_neon_zip_q" 7
|
|
|
498 (and (eq_attr "tune" "cortexa15")
|
|
|
499 (eq_attr "cortex_a15_neon_type" "neon_zip_q"))
|
|
|
500 "ca15_issue3,ca15_cx_perm*3")
|
|
|
501
|
|
|
502 (define_insn_reservation
|
|
|
503 "cortex_a15_neon_to_gp" 7
|
|
|
504 (and (eq_attr "tune" "cortexa15")
|
|
|
505 (eq_attr "cortex_a15_neon_type" "neon_to_gp"))
|
|
|
506 "ca15_issue2,ca15_ls1+ca15_ls2")
|
|
|
507
|
|
|
508 ;; Load Instructions.
|
|
|
509
|
|
|
510 (define_insn_reservation
|
|
|
511 "cortex_a15_neon_load_a" 6
|
|
|
512 (and (eq_attr "tune" "cortexa15")
|
|
|
513 (eq_attr "cortex_a15_neon_type" "neon_load_a"))
|
|
|
514 "ca15_issue1,ca15_ls,ca15_ldr")
|
|
|
515
|
|
|
516 (define_insn_reservation
|
|
|
517 "cortex_a15_neon_load_b" 7
|
|
|
518 (and (eq_attr "tune" "cortexa15")
|
|
|
519 (eq_attr "cortex_a15_neon_type" "neon_load_b"))
|
|
|
520 "ca15_issue2,ca15_ls1+ca15_ls2,ca15_ldr,ca15_ldr")
|
|
|
521
|
|
|
522 (define_insn_reservation
|
|
|
523 "cortex_a15_neon_load_c" 9
|
|
|
524 (and (eq_attr "tune" "cortexa15")
|
|
|
525 (eq_attr "cortex_a15_neon_type" "neon_load_c"))
|
|
|
526 "ca15_issue2,ca15_ls1+ca15_ls2,ca15_ldr,ca15_ldr")
|
|
|
527
|
|
|
528 (define_insn_reservation
|
|
|
529 "cortex_a15_neon_load_d" 11
|
|
|
530 (and (eq_attr "tune" "cortexa15")
|
|
|
531 (eq_attr "cortex_a15_neon_type" "neon_load_d"))
|
|
|
532 "ca15_issue1,ca15_issue3+ca15_ls1+ca15_ls2,ca15_ldr*2")
|
|
|
533
|
|
|
534 (define_insn_reservation
|
|
|
535 "cortex_a15_neon_load_e" 9
|
|
|
536 (and (eq_attr "tune" "cortexa15")
|
|
|
537 (eq_attr "cortex_a15_neon_type" "neon_load_e"))
|
|
|
538 "ca15_issue3+ca15_ls1+ca15_ls2,ca15_ldr*2")
|
|
|
539
|
|
|
540 (define_insn_reservation
|
|
|
541 "cortex_a15_neon_load_f" 11
|
|
|
542 (and (eq_attr "tune" "cortexa15")
|
|
|
543 (eq_attr "cortex_a15_neon_type" "neon_load_f"))
|
|
|
544 "ca15_issue3,ca15_issue3+ca15_ls1+ca15_ls2,ca15_ldr*2")
|
|
|
545
|
|
|
546 ;; Store Instructions.
|
|
|
547
|
|
|
548 (define_insn_reservation
|
|
|
549 "cortex_a15_neon_store_a" 0
|
|
|
550 (and (eq_attr "tune" "cortexa15")
|
|
|
551 (eq_attr "cortex_a15_neon_type" "neon_store_a"))
|
|
|
552 "ca15_issue1,ca15_ls1+ca15_ls2,ca15_str")
|
|
|
553
|
|
|
554 (define_insn_reservation
|
|
|
555 "cortex_a15_neon_store_b" 0
|
|
|
556 (and (eq_attr "tune" "cortexa15")
|
|
|
557 (eq_attr "cortex_a15_neon_type" "neon_store_b"))
|
|
|
558 "ca15_issue2,ca15_ls1+ca15_ls2,ca15_str*2")
|
|
|
559
|
|
|
560 (define_insn_reservation
|
|
|
561 "cortex_a15_neon_store_c" 0
|
|
|
562 (and (eq_attr "tune" "cortexa15")
|
|
|
563 (eq_attr "cortex_a15_neon_type" "neon_store_c"))
|
|
|
564 "ca15_issue3,ca15_ls1+ca15_ls2,ca15_str*3")
|
|
|
565
|
|
|
566 (define_insn_reservation
|
|
|
567 "cortex_a15_neon_store_d" 0
|
|
|
568 (and (eq_attr "tune" "cortexa15")
|
|
|
569 (eq_attr "cortex_a15_neon_type" "neon_store_d"))
|
|
|
570 "ca15_issue3,ca15_issue1,ca15_ls1+ca15_ls2,ca15_str*4")
|
|
|
571
|
|
|
572 (define_insn_reservation
|
|
|
573 "cortex_a15_neon_store_e" 0
|
|
|
574 (and (eq_attr "tune" "cortexa15")
|
|
|
575 (eq_attr "cortex_a15_neon_type" "neon_store_e"))
|
|
|
576 "ca15_issue2,ca15_ls1+ca15_ls2,ca15_str+ca15_cx_perm")
|
|
|
577
|
|
|
578 (define_insn_reservation
|
|
|
579 "cortex_a15_neon_store_f" 0
|
|
|
580 (and (eq_attr "tune" "cortexa15")
|
|
|
581 (eq_attr "cortex_a15_neon_type" "neon_store_f"))
|
|
|
582 "ca15_issue3,ca15_ls1+ca15_ls2,ca15_str*2+ca15_cx_perm")
|
|
|
583
|
|
|
584 (define_insn_reservation
|
|
|
585 "cortex_a15_neon_store_g" 0
|
|
|
586 (and (eq_attr "tune" "cortexa15")
|
|
|
587 (eq_attr "cortex_a15_neon_type" "neon_store_g"))
|
|
|
588 "ca15_issue3,ca15_issue3+ca15_cx_perm+ca15_ls1+ca15_ls2,ca15_str*2")
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589
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590 (define_insn_reservation
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591 "cortex_a15_neon_store_h" 0
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592 (and (eq_attr "tune" "cortexa15")
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593 (eq_attr "cortex_a15_neon_type" "neon_store_h"))
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594 "ca15_issue3,ca15_issue2+ca15_cx_perm+ca15_ls1+ca15_ls2,ca15_str*2")
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595
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596 ;; VFP Operations.
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597
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598 (define_insn_reservation "cortex_a15_vfp_const" 4
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599 (and (eq_attr "tune" "cortexa15")
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600 (eq_attr "type" "fconsts,fconstd"))
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601 "ca15_issue1,ca15_cx_perm")
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602
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603 (define_insn_reservation "cortex_a15_vfp_adds_subs" 6
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604 (and (eq_attr "tune" "cortexa15")
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605 (eq_attr "type" "fadds"))
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606 "ca15_issue1,ca15_cx_vfp")
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607
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608 (define_insn_reservation "cortex_a15_vfp_addd_subd" 10
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609 (and (eq_attr "tune" "cortexa15")
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610 (eq_attr "type" "faddd"))
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611 "ca15_issue2,ca15_cx_vfp*2")
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612
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613 (define_insn_reservation "cortex_a15_vfp_muls" 7
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614 (and (eq_attr "tune" "cortexa15")
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615 (eq_attr "type" "fmuls"))
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616 "ca15_issue1,ca15_cx_vfp")
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617
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618 (define_insn_reservation "cortex_a15_vfp_muld" 12
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619 (and (eq_attr "tune" "cortexa15")
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620 (eq_attr "type" "fmuld"))
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621 "ca15_issue2,ca15_cx_vfp*2")
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622
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623 (define_insn_reservation "cortex_a15_vfp_macs" 6
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624 (and (eq_attr "tune" "cortexa15")
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625 (eq_attr "type" "fmacs,ffmas"))
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626 "ca15_issue1,ca15_cx_vfp")
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627
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628 (define_insn_reservation "cortex_a15_vfp_macd" 11
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629 (and (eq_attr "tune" "cortexa15")
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630 (eq_attr "type" "fmacd,ffmad"))
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631 "ca15_issue2,ca15_cx_vfp*2")
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632
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633 (define_insn_reservation "cortex_a15_vfp_cvt" 6
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634 (and (eq_attr "tune" "cortexa15")
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635 (eq_attr "type" "f_cvt,f_cvtf2i,f_cvti2f"))
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636 "ca15_issue1,ca15_cx_vfp")
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637
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638 (define_insn_reservation "cortex_a15_vfp_cmpd" 8
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639 (and (eq_attr "tune" "cortexa15")
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640 (eq_attr "type" "fcmpd"))
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641 "ca15_issue2,ca15_cx_perm,ca15_cx_vfp")
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642
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643 (define_insn_reservation "cortex_a15_vfp_cmps" 8
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644 (and (eq_attr "tune" "cortexa15")
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645 (eq_attr "type" "fcmps"))
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646 "ca15_issue2,ca15_cx_perm,ca15_cx_vfp")
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647
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648 (define_insn_reservation "cortex_a15_vfp_arithd" 7
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649 (and (eq_attr "tune" "cortexa15")
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650 (eq_attr "type" "ffarithd"))
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651 "ca15_issue2,ca15_cx_perm*2")
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652
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653 (define_insn_reservation "cortex_a15_vfp_cpys" 4
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654 (and (eq_attr "tune" "cortexa15")
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655 (eq_attr "type" "fmov"))
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656 "ca15_issue1,ca15_cx_perm")
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657
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658 (define_insn_reservation "cortex_a15_gp_to_vfp" 5
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659 (and (eq_attr "tune" "cortexa15")
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660 (eq_attr "type" "f_mcr, f_mcrr"))
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661 "ca15_issue1,ca15_ls")
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662
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663 (define_insn_reservation "cortex_a15_mov_vfp_to_gp" 5
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664 (and (eq_attr "tune" "cortexa15")
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665 (eq_attr "type" "f_mrc, f_mrrc"))
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666 "ca15_issue1,ca15_ls")
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667
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668 ;; Moves from floating point registers to general purpose registers
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669 ;; induce additional latency.
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670 (define_bypass 10 "cortex_a15_vfp*, cortex_a15_neon*, cortex_a15_gp_to_vfp" "cortex_a15_mov_vfp_to_gp")
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671
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672
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673 (define_insn_reservation "cortex_a15_vfp_ariths" 7
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674 (and (eq_attr "tune" "cortexa15")
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675 (eq_attr "type" "ffariths"))
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676 "ca15_issue1,ca15_cx_perm")
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677
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678 (define_insn_reservation "cortex_a15_vfp_divs" 10
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679 (and (eq_attr "tune" "cortexa15")
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680 (eq_attr "type" "fdivs, fsqrts"))
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681 "ca15_issue1,ca15_cx_ik")
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682
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683 (define_insn_reservation "cortex_a15_vfp_divd" 18
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684 (and (eq_attr "tune" "cortexa15")
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685 (eq_attr "type" "fdivd, fsqrtd"))
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686 "ca15_issue1,ca15_cx_ik")
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687
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