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1 ;; ARM Cortex-A17 NEON pipeline description
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2 ;; Copyright (C) 2014-2018 Free Software Foundation, Inc.
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3 ;;
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4 ;; This file is part of GCC.
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5 ;;
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6 ;; GCC is free software; you can redistribute it and/or modify it
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7 ;; under the terms of the GNU General Public License as published by
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8 ;; the Free Software Foundation; either version 3, or (at your option)
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9 ;; any later version.
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10 ;;
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11 ;; GCC is distributed in the hope that it will be useful, but
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12 ;; WITHOUT ANY WARRANTY; without even the implied warranty of
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13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 ;; General Public License for more details.
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15 ;;
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16 ;; You should have received a copy of the GNU General Public License
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17 ;; along with GCC; see the file COPYING3. If not see
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18 ;; <http://www.gnu.org/licenses/>.
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19
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20 (define_attr "cortex_a17_neon_type"
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21 "neon_abd, neon_abd_q, neon_arith_acc, neon_arith_acc_q,
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22 neon_arith_basic, neon_arith_complex,
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23 neon_reduc_add_acc, neon_multiply, neon_multiply_q,
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24 neon_multiply_long, neon_mla, neon_mla_q, neon_mla_long,
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25 neon_sat_mla_long, neon_shift_acc, neon_shift_imm_basic,\
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26 neon_shift_imm_complex,
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27 neon_shift_reg_basic, neon_shift_reg_basic_q, neon_shift_reg_complex,
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28 neon_shift_reg_complex_q, neon_fp_negabs, neon_fp_arith,
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29 neon_fp_arith_q, neon_fp_cvt_int,
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30 neon_fp_cvt_int_q, neon_fp_cvt16, neon_fp_minmax, neon_fp_mul,
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31 neon_fp_mul_q, neon_fp_mla, neon_fp_mla_q, neon_fp_recpe_rsqrte,
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32 neon_fp_recpe_rsqrte_q, neon_bitops, neon_bitops_q, neon_from_gp,
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33 neon_from_gp_q, neon_move, neon_tbl3_tbl4, neon_zip_q, neon_to_gp,
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34 neon_load_a, neon_load_b, neon_load_c, neon_load_d, neon_load_e,
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35 neon_load_f, neon_load_g, neon_load_h, neon_store_a, neon_store_b,
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36 unknown"
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37 (cond [
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38 (eq_attr "type" "neon_abd, neon_abd_long")
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39 (const_string "neon_abd")
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40 (eq_attr "type" "neon_abd_q")
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41 (const_string "neon_abd_q")
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42 (eq_attr "type" "neon_arith_acc, neon_reduc_add_acc,\
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43 neon_reduc_add_acc_q")
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44 (const_string "neon_arith_acc")
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45 (eq_attr "type" "neon_arith_acc_q")
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46 (const_string "neon_arith_acc_q")
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47 (eq_attr "type" "neon_add, neon_add_q, neon_add_long,\
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48 neon_add_widen, neon_neg, neon_neg_q,\
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49 neon_reduc_add, neon_reduc_add_q,\
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50 neon_reduc_add_long, neon_sub, neon_sub_q,\
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51 neon_sub_long, neon_sub_widen, neon_logic,\
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52 neon_logic_q, neon_tst, neon_tst_q")
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53 (const_string "neon_arith_basic")
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54 (eq_attr "type" "neon_abs, neon_abs_q, neon_add_halve_narrow_q,\
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55 neon_add_halve, neon_add_halve_q,\
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56 neon_sub_halve, neon_sub_halve_q, neon_qabs,\
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57 neon_qabs_q, neon_qadd, neon_qadd_q, neon_qneg,\
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58 neon_qneg_q, neon_qsub, neon_qsub_q,\
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59 neon_sub_halve_narrow_q,\
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60 neon_compare, neon_compare_q,\
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61 neon_compare_zero, neon_compare_zero_q,\
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62 neon_minmax, neon_minmax_q, neon_reduc_minmax,\
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63 neon_reduc_minmax_q")
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64 (const_string "neon_arith_complex")
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65
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66 (eq_attr "type" "neon_mul_b, neon_mul_h, neon_mul_s,\
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67 neon_mul_h_scalar, neon_mul_s_scalar,\
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68 neon_sat_mul_b, neon_sat_mul_h,\
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69 neon_sat_mul_s, neon_sat_mul_h_scalar,\
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70 neon_sat_mul_s_scalar,\
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71 neon_mul_b_long, neon_mul_h_long,\
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72 neon_mul_s_long,\
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73 neon_mul_h_scalar_long, neon_mul_s_scalar_long,\
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74 neon_sat_mul_b_long, neon_sat_mul_h_long,\
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75 neon_sat_mul_s_long, neon_sat_mul_h_scalar_long,\
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76 neon_sat_mul_s_scalar_long")
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77 (const_string "neon_multiply")
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78 (eq_attr "type" "neon_mul_b_q, neon_mul_h_q, neon_mul_s_q,\
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79 neon_mul_h_scalar_q, neon_mul_s_scalar_q,\
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80 neon_sat_mul_b_q, neon_sat_mul_h_q,\
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81 neon_sat_mul_s_q, neon_sat_mul_h_scalar_q,\
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82 neon_sat_mul_s_scalar_q")
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83 (const_string "neon_multiply_q")
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84 (eq_attr "type" "neon_mla_b, neon_mla_h, neon_mla_s,\
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85 neon_mla_h_scalar, neon_mla_s_scalar,\
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86 neon_mla_b_long, neon_mla_h_long,\
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87 neon_mla_s_long,\
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88 neon_mla_h_scalar_long, neon_mla_s_scalar_long")
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89 (const_string "neon_mla")
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90 (eq_attr "type" "neon_mla_b_q, neon_mla_h_q, neon_mla_s_q,\
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91 neon_mla_h_scalar_q, neon_mla_s_scalar_q")
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92 (const_string "neon_mla_q")
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93 (eq_attr "type" "neon_sat_mla_b_long, neon_sat_mla_h_long,\
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94 neon_sat_mla_s_long, neon_sat_mla_h_scalar_long,\
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95 neon_sat_mla_s_scalar_long")
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96 (const_string "neon_sat_mla_long")
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97
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98 (eq_attr "type" "neon_shift_acc, neon_shift_acc_q")
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99 (const_string "neon_shift_acc")
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100 (eq_attr "type" "neon_shift_imm, neon_shift_imm_q,\
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101 neon_shift_imm_narrow_q, neon_shift_imm_long")
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102 (const_string "neon_shift_imm_basic")
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103 (eq_attr "type" "neon_sat_shift_imm, neon_sat_shift_imm_q,\
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104 neon_sat_shift_imm_narrow_q")
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105 (const_string "neon_shift_imm_complex")
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106 (eq_attr "type" "neon_shift_reg")
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107 (const_string "neon_shift_reg_basic")
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108 (eq_attr "type" "neon_shift_reg_q")
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109 (const_string "neon_shift_reg_basic_q")
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110 (eq_attr "type" "neon_sat_shift_reg")
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111 (const_string "neon_shift_reg_complex")
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112 (eq_attr "type" "neon_sat_shift_reg_q")
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113 (const_string "neon_shift_reg_complex_q")
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114
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115 (eq_attr "type" "neon_fp_neg_s, neon_fp_neg_s_q,\
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116 neon_fp_abs_s, neon_fp_abs_s_q")
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117 (const_string "neon_fp_negabs")
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118 (eq_attr "type" "neon_fp_addsub_s, neon_fp_abd_s,\
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119 neon_fp_reduc_add_s, neon_fp_compare_s,\
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120 neon_fp_minmax_s, neon_fp_minmax_s_q,\
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121 neon_fp_reduc_minmax_s, neon_fp_round_s,\
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122 neon_fp_round_s_q, neon_fp_round_d,\
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123 neon_fp_round_d_q, neon_fp_reduc_minmax_s_q")
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124 (const_string "neon_fp_arith")
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125 (eq_attr "type" "neon_fp_addsub_s_q, neon_fp_abd_s_q,\
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126 neon_fp_reduc_add_s_q, neon_fp_compare_s_q")
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127 (const_string "neon_fp_arith_q")
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128 (eq_attr "type" "neon_fp_to_int_s, neon_int_to_fp_s")
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129 (const_string "neon_fp_cvt_int")
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130 (eq_attr "type" "neon_fp_to_int_s_q, neon_int_to_fp_s_q")
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131 (const_string "neon_fp_cvt_int_q")
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132 (eq_attr "type" "neon_fp_cvt_narrow_s_q, neon_fp_cvt_widen_h")
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133 (const_string "neon_fp_cvt16")
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134 (eq_attr "type" "neon_fp_mul_s, neon_fp_mul_s_scalar")
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135 (const_string "neon_fp_mul")
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136 (eq_attr "type" "neon_fp_mul_s_q, neon_fp_mul_s_scalar_q")
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137 (const_string "neon_fp_mul_q")
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138 (eq_attr "type" "neon_fp_mla_s, neon_fp_mla_s_scalar")
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139 (const_string "neon_fp_mla")
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140 (eq_attr "type" "neon_fp_mla_s_q, neon_fp_mla_s_scalar_q")
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141 (const_string "neon_fp_mla_q")
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142 (eq_attr "type" "neon_fp_recpe_s, neon_fp_rsqrte_s")
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143 (const_string "neon_fp_recpe_rsqrte")
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144 (eq_attr "type" "neon_fp_recpe_s_q, neon_fp_rsqrte_s_q")
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145 (const_string "neon_fp_recpe_rsqrte_q")
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146
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147 (eq_attr "type" "neon_bsl, neon_cls, neon_cnt,\
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148 neon_rev, neon_permute,\
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149 neon_tbl1, neon_tbl2, neon_zip,\
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150 neon_dup, neon_dup_q, neon_ext, neon_ext_q,\
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151 neon_move, neon_move_q, neon_move_narrow_q")
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152 (const_string "neon_bitops")
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153 (eq_attr "type" "neon_bsl_q, neon_cls_q, neon_cnt_q,\
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154 neon_rev_q, neon_permute_q")
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155 (const_string "neon_bitops_q")
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156 (eq_attr "type" "neon_from_gp")
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157 (const_string "neon_from_gp")
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158 (eq_attr "type" "neon_from_gp_q")
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159 (const_string "neon_from_gp_q")
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160 (eq_attr "type" "neon_tbl3, neon_tbl4")
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161 (const_string "neon_tbl3_tbl4")
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162 (eq_attr "type" "neon_zip_q")
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163 (const_string "neon_zip_q")
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164 (eq_attr "type" "neon_to_gp, neon_to_gp_q")
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165 (const_string "neon_to_gp")
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166
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167 (eq_attr "type" "neon_load1_1reg, neon_load1_1reg_q,\
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168 neon_load1_one_lane, neon_load1_one_lane_q")
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169 (const_string "neon_load_a")
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170
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171 (eq_attr "type" "neon_load1_2reg, neon_load1_2reg_q")
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172 (const_string "neon_load_b")
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173
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174 (eq_attr "type" "neon_load1_3reg, neon_load1_3reg_q,\
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175 neon_load1_all_lanes,neon_load1_all_lanes_q,\
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176 neon_load2_one_lane, neon_load2_one_lane_q,\
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177 neon_load2_all_lanes, neon_load2_all_lanes_q")
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178 (const_string "neon_load_c")
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179
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180 (eq_attr "type" "neon_load1_4reg, neon_load1_4reg_q,\
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181 neon_load2_2reg, neon_load2_2reg_q")
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182 (const_string "neon_load_d")
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183
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184 (eq_attr "type" "neon_load3_one_lane,\
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185 neon_load3_all_lanes,\
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186 neon_load4_one_lane, neon_load4_all_lanes")
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187 (const_string "neon_load_e")
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188
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189
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190 (eq_attr "type" "neon_load3_one_lane_q,\
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191 neon_load3_all_lanes_q,\
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192 neon_load4_one_lane_q, neon_load4_all_lanes_q")
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193 (const_string "neon_load_f")
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194
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195 (eq_attr "type" "neon_load3_3reg,neon_load3_3reg_q")
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196 (const_string "neon_load_g")
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197
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198 (eq_attr "type" "neon_load2_4reg,neon_load2_4reg_q,\
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199 neon_load4_4reg,neon_load4_4reg_q")
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200 (const_string "neon_load_h")
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201
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202 (eq_attr "type" "neon_store1_1reg, neon_store1_1reg_q,\
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203 neon_store1_2reg, neon_store1_2reg_q,\
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204 neon_store1_3reg, neon_store1_3reg_q,\
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205 neon_store1_4reg, neon_store1_4reg_q,\
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206 neon_store1_one_lane, neon_store1_one_lane_q,\
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207 neon_store2_2reg, neon_store2_2reg_q,\
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208 neon_store3_one_lane, neon_store3_one_lane_q,\
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209 neon_store4_one_lane, neon_store4_one_lane_q")
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210 (const_string "neon_store_a")
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211
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212 (eq_attr "type" "neon_store2_4reg, neon_store2_4reg_q,\
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213 neon_store2_one_lane, neon_store2_one_lane_q,\
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214 neon_store3_3reg, neon_store3_3reg_q,\
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215 neon_store4_4reg, neon_store4_4reg_q")
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216 (const_string "neon_store_b")
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217 ]
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218 (const_string "unknown")))
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219
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220 (define_automaton "cortex_a17_neon")
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221
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222 (define_cpu_unit "ca17_asimd0, ca17_asimd1" "cortex_a17_neon")
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223 (define_cpu_unit "ca17_fdiv0,ca17_simdfpadd0, ca17_simdfpmul0" "cortex_a17_neon")
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224 (define_cpu_unit "ca17_simdimac0, ca17_simdialu0, ca17_perm0" "cortex_a17_neon")
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225
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226 (define_cpu_unit "ca17_simdialu1, ca17_perm1, ca17_simdshift1" "cortex_a17_neon")
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227 (define_cpu_unit "ca17_iacc1" "cortex_a17_neon")
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228 (define_cpu_unit "ca17_fpmul1, ca17_fpadd1" "cortex_a17_neon")
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229
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230
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231 ;; Integer Arithmetic Instructions.
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232
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233 (define_insn_reservation "cortex_a17_neon_abd" 5
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234 (and (eq_attr "tune" "cortexa17")
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235 (eq_attr "cortex_a17_neon_type" "neon_abd"))
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236 "(ca17_asimd0+ca17_simdialu0) | (ca17_asimd1+ca17_simdialu1)")
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237
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238 (define_insn_reservation "cortex_a17_neon_abd_q" 5
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239 (and (eq_attr "tune" "cortexa17")
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240 (eq_attr "cortex_a17_neon_type" "neon_abd_q"))
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241 "ca17_asimd0+ca17_asimd1+ca17_simdialu0+ca17_simdialu1")
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242
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243 (define_insn_reservation "cortex_a17_neon_aba" 7
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244 (and (eq_attr "tune" "cortexa17")
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245 (eq_attr "cortex_a17_neon_type" "neon_arith_acc"))
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246 "ca17_asimd1+ca17_simdialu1, ca17_iacc1")
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247
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248 (define_insn_reservation "cortex_a17_neon_aba_q" 8
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249 (and (eq_attr "tune" "cortexa17")
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250 (eq_attr "cortex_a17_neon_type" "neon_arith_acc_q"))
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251 "ca17_asimd0+ca17_asimd1+ca17_simdialu0+ca17_simdialu1, ca17_iacc1*2")
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252
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253 (define_insn_reservation "cortex_a17_neon_arith_basic" 4
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254 (and (eq_attr "tune" "cortexa17")
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255 (eq_attr "cortex_a17_neon_type" "neon_arith_basic"))
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256 "(ca17_asimd0+ca17_simdialu0) | (ca17_asimd1+ca17_simdialu1)")
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257
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258 (define_insn_reservation "cortex_a17_neon_arith_complex" 5
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259 (and (eq_attr "tune" "cortexa17")
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260 (eq_attr "cortex_a17_neon_type" "neon_arith_complex"))
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261 "(ca17_asimd0+ca17_simdialu0) | (ca17_asimd1+ca17_simdialu1)")
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262
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263 ;; Integer Multiply Instructions.
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264
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265 (define_insn_reservation "cortex_a17_neon_multiply" 6
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266 (and (eq_attr "tune" "cortexa17")
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267 (eq_attr "cortex_a17_neon_type" "neon_multiply"))
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268 "ca17_asimd0+ca17_simdimac0")
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269
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270 (define_insn_reservation "cortex_a17_neon_multiply_q" 7
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271 (and (eq_attr "tune" "cortexa17")
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272 (eq_attr "cortex_a17_neon_type" "neon_multiply_q"))
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273 "(ca17_asimd0+ca17_simdimac0)*2")
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274
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275 (define_insn_reservation "cortex_a17_neon_mla" 6
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276 (and (eq_attr "tune" "cortexa17")
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277 (eq_attr "cortex_a17_neon_type" "neon_mla"))
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278 "ca17_asimd0+ca17_simdimac0*2")
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279
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280 (define_insn_reservation "cortex_a17_neon_mla_q" 7
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281 (and (eq_attr "tune" "cortexa17")
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282 (eq_attr "cortex_a17_neon_type" "neon_mla_q"))
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283 "(ca17_asimd0+ca17_simdimac0)*2,ca17_simdimac0")
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284
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285 (define_insn_reservation "cortex_a17_neon_sat_mla_long" 6
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286 (and (eq_attr "tune" "cortexa17")
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287 (eq_attr "cortex_a17_neon_type" "neon_sat_mla_long"))
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288 "ca17_asimd0+ca17_simdimac0*2")
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289
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290 ;; Integer Shift Instructions.
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291
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292 (define_insn_reservation
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293 "cortex_a17_neon_shift_acc" 7
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294 (and (eq_attr "tune" "cortexa17")
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295 (eq_attr "cortex_a17_neon_type" "neon_shift_acc"))
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296 "ca17_asimd1+ca17_simdshift1,ca17_iacc1")
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297
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298 (define_insn_reservation
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299 "cortex_a17_neon_shift_imm_basic" 4
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300 (and (eq_attr "tune" "cortexa17")
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301 (eq_attr "cortex_a17_neon_type" "neon_shift_imm_basic"))
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302 "ca17_asimd1+ca17_simdshift1")
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303
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304 (define_insn_reservation
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305 "cortex_a17_neon_shift_imm_complex" 5
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306 (and (eq_attr "tune" "cortexa17")
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307 (eq_attr "cortex_a17_neon_type" "neon_shift_imm_complex"))
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308 "ca17_asimd1+ca17_simdshift1")
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309
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310 (define_insn_reservation
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311 "cortex_a17_neon_shift_reg_basic" 4
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312 (and (eq_attr "tune" "cortexa17")
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313 (eq_attr "cortex_a17_neon_type" "neon_shift_reg_basic"))
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314 "ca17_asimd1+ca17_simdshift1")
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315
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316 (define_insn_reservation
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317 "cortex_a17_neon_shift_reg_basic_q" 5
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318 (and (eq_attr "tune" "cortexa17")
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319 (eq_attr "cortex_a17_neon_type" "neon_shift_reg_basic_q"))
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320 "(ca17_asimd1+ca17_simdshift1)*2")
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321
|
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322 (define_insn_reservation
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323 "cortex_a17_neon_shift_reg_complex" 5
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324 (and (eq_attr "tune" "cortexa17")
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325 (eq_attr "cortex_a17_neon_type" "neon_shift_reg_complex"))
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326 "ca17_asimd1+ca17_simdshift1")
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327
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328 (define_insn_reservation
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329 "cortex_a17_neon_shift_reg_complex_q" 6
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330 (and (eq_attr "tune" "cortexa17")
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331 (eq_attr "cortex_a17_neon_type" "neon_shift_reg_complex_q"))
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332 "(ca17_asimd1+ca17_simdshift1)*2")
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333
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334 (define_insn_reservation
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335 "cortex_a17_neon_fp_negabs" 4
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336 (and (eq_attr "tune" "cortexa17")
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337 (eq_attr "cortex_a17_neon_type" "neon_fp_negabs"))
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338 "ca17_asimd0+ca17_simdfpadd0")
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339
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340 (define_insn_reservation
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341 "cortex_a17_neon_fp_arith" 6
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342 (and (eq_attr "tune" "cortexa17")
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343 (eq_attr "cortex_a17_neon_type" "neon_fp_arith"))
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344 "ca17_asimd0+ca17_simdfpadd0")
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345
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346 (define_insn_reservation
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347 "cortex_a17_neon_fp_arith_q" 6
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348 (and (eq_attr "tune" "cortexa17")
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349 (eq_attr "cortex_a17_neon_type" "neon_fp_arith_q"))
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350 "(ca17_asimd0+ca17_simdfpadd0)*2")
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351
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352 (define_insn_reservation
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353 "cortex_a17_neon_fp_cvt_int" 6
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354 (and (eq_attr "tune" "cortexa17")
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|
355 (eq_attr "cortex_a17_neon_type" "neon_fp_cvt_int"))
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356 "ca17_asimd0+ca17_simdfpadd0")
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357
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358 (define_insn_reservation
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359 "cortex_a17_neon_fp_cvt_int_q" 6
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|
360 (and (eq_attr "tune" "cortexa17")
|
|
361 (eq_attr "cortex_a17_neon_type" "neon_fp_cvt_int_q"))
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362 "(ca17_asimd0+ca17_simdfpadd0)*2")
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|
363
|
|
364 (define_insn_reservation
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|
365 "cortex_a17_neon_fp_cvt16" 10
|
|
366 (and (eq_attr "tune" "cortexa17")
|
|
367 (eq_attr "cortex_a17_neon_type" "neon_fp_cvt16"))
|
|
368 "ca17_asimd0+ca17_simdfpadd0")
|
|
369
|
|
370 (define_insn_reservation
|
|
371 "cortex_a17_neon_fp_mul" 5
|
|
372 (and (eq_attr "tune" "cortexa17")
|
|
373 (eq_attr "cortex_a17_neon_type" "neon_fp_mul"))
|
|
374 "ca17_asimd0+ca17_simdfpmul0")
|
|
375
|
|
376 (define_insn_reservation
|
|
377 "cortex_a17_neon_fp_mul_q" 5
|
|
378 (and (eq_attr "tune" "cortexa17")
|
|
379 (eq_attr "cortex_a17_neon_type" "neon_fp_mul_q"))
|
|
380 "(ca17_asimd0+ca17_simdfpmul0)*2")
|
|
381
|
|
382 (define_insn_reservation
|
|
383 "cortex_a17_neon_fp_mla" 8
|
|
384 (and (eq_attr "tune" "cortexa17")
|
|
385 (eq_attr "cortex_a17_neon_type" "neon_fp_mla"))
|
|
386 "ca17_asimd0+ca17_simdfpmul0,ca17_simdfpadd0")
|
|
387
|
|
388 (define_insn_reservation
|
|
389 "cortex_a17_neon_fp_mla_q" 9
|
|
390 (and (eq_attr "tune" "cortexa17")
|
|
391 (eq_attr "cortex_a17_neon_type" "neon_fp_mla_q"))
|
|
392 "ca17_asimd0+ca17_simdfpmul0,ca17_asimd0+ca17_simdfpadd0+ca17_simdfpmul0,ca17_simdfpadd0")
|
|
393
|
|
394 (define_insn_reservation
|
|
395 "cortex_a17_neon_fp_recps_rsqrte" 9
|
|
396 (and (eq_attr "tune" "cortexa17")
|
|
397 (eq_attr "cortex_a17_neon_type" "neon_fp_recpe_rsqrte"))
|
|
398 "(ca17_asimd0+ca17_perm0)|(ca17_asimd1+ca17_perm1)")
|
|
399
|
|
400 (define_insn_reservation
|
|
401 "cortex_a17_neon_fp_recps_rsqrte_q" 9
|
|
402 (and (eq_attr "tune" "cortexa17")
|
|
403 (eq_attr "cortex_a17_neon_type" "neon_fp_recpe_rsqrte_q"))
|
|
404 "(ca17_asimd0+ca17_perm0)*2|(ca17_asimd1+ca17_perm1)*2")
|
|
405
|
|
406 ;; Miscelaneous Instructions.
|
|
407
|
|
408 (define_insn_reservation
|
|
409 "cortex_a17_neon_bitops" 4
|
|
410 (and (eq_attr "tune" "cortexa17")
|
|
411 (eq_attr "cortex_a17_neon_type" "neon_bitops"))
|
|
412 "(ca17_asimd0+ca17_perm0) | (ca17_asimd1+ca17_perm1)")
|
|
413
|
|
414 (define_insn_reservation
|
|
415 "cortex_a17_neon_bitops_q" 4
|
|
416 (and (eq_attr "tune" "cortexa17")
|
|
417 (eq_attr "cortex_a17_neon_type" "neon_bitops_q"))
|
|
418 "(ca17_asimd0+ca17_perm0)*2 | (ca17_asimd1+ca17_perm1)*2")
|
|
419
|
|
420 (define_insn_reservation
|
|
421 "cortex_a17_neon_from_gp" 2
|
|
422 (and (eq_attr "tune" "cortexa17")
|
|
423 (eq_attr "cortex_a17_neon_type" "neon_from_gp"))
|
|
424 "(ca17_asimd0+ca17_perm0)|(ca17_asimd1+ca17_perm1)")
|
|
425
|
|
426 (define_insn_reservation
|
|
427 "cortex_a17_neon_from_gp_q" 3
|
|
428 (and (eq_attr "tune" "cortexa17")
|
|
429 (eq_attr "cortex_a17_neon_type" "neon_from_gp_q"))
|
|
430 "(ca17_asimd0+ca17_perm0)|(ca17_asimd1+ca17_perm1)")
|
|
431
|
|
432 (define_insn_reservation
|
|
433 "cortex_a17_neon_tbl3_tbl4" 7
|
|
434 (and (eq_attr "tune" "cortexa17")
|
|
435 (eq_attr "cortex_a17_neon_type" "neon_tbl3_tbl4"))
|
|
436 "(ca17_asimd0+ca17_perm0)|(ca17_asimd1+ca17_perm1)")
|
|
437
|
|
438 (define_insn_reservation
|
|
439 "cortex_a17_neon_zip_q" 7
|
|
440 (and (eq_attr "tune" "cortexa17")
|
|
441 (eq_attr "cortex_a17_neon_type" "neon_zip_q"))
|
|
442 "(ca17_asimd0+ca17_perm0)|(ca17_asimd1+ca17_perm1)")
|
|
443
|
|
444 (define_insn_reservation
|
|
445 "cortex_a17_neon_to_gp" 2
|
|
446 (and (eq_attr "tune" "cortexa17")
|
|
447 (eq_attr "cortex_a17_neon_type" "neon_to_gp"))
|
|
448 "ca17_asimd0+ca17_perm0*3")
|
|
449
|
|
450 (define_insn_reservation
|
|
451 "cortex_a17_vfp_flag" 5
|
|
452 (and (eq_attr "tune" "cortexa17")
|
|
453 (eq_attr "type" "f_flag"))
|
|
454 "ca17_asimd0+ca17_perm0")
|
|
455
|
|
456 ;; Load Instructions.
|
|
457
|
|
458 (define_insn_reservation
|
|
459 "cortex_a17_vfp_load" 5
|
|
460 (and (eq_attr "tune" "cortexa17")
|
|
461 (eq_attr "type" "f_loads, f_loadd"))
|
|
462 "ca17_ls0|ca17_ls1")
|
|
463
|
|
464 (define_insn_reservation
|
|
465 "cortex_a17_neon_load_a" 6
|
|
466 (and (eq_attr "tune" "cortexa17")
|
|
467 (eq_attr "cortex_a17_neon_type" "neon_load_a"))
|
|
468 "ca17_ls0*2|ca17_ls1*2")
|
|
469
|
|
470 (define_insn_reservation
|
|
471 "cortex_a17_neon_load_b" 7
|
|
472 (and (eq_attr "tune" "cortexa17")
|
|
473 (eq_attr "cortex_a17_neon_type" "neon_load_b"))
|
|
474 "ca17_ls0*2|ca17_ls1*2")
|
|
475
|
|
476 (define_insn_reservation
|
|
477 "cortex_a17_neon_load_c" 8
|
|
478 (and (eq_attr "tune" "cortexa17")
|
|
479 (eq_attr "cortex_a17_neon_type" "neon_load_c"))
|
|
480 "ca17_ls0*2|ca17_ls1*2")
|
|
481
|
|
482 (define_insn_reservation
|
|
483 "cortex_a17_neon_load_d" 9
|
|
484 (and (eq_attr "tune" "cortexa17")
|
|
485 (eq_attr "cortex_a17_neon_type" "neon_load_d"))
|
|
486 "ca17_ls0*2|ca17_ls1*2")
|
|
487
|
|
488 (define_insn_reservation
|
|
489 "cortex_a17_neon_load_e" 9
|
|
490 (and (eq_attr "tune" "cortexa17")
|
|
491 (eq_attr "cortex_a17_neon_type" "neon_load_e"))
|
|
492 "ca17_ls0*2|ca17_ls1*2")
|
|
493
|
|
494 (define_insn_reservation
|
|
495 "cortex_a17_neon_load_f" 10
|
|
496 (and (eq_attr "tune" "cortexa17")
|
|
497 (eq_attr "cortex_a17_neon_type" "neon_load_f"))
|
|
498 "ca17_ls0*2+ca17_ls1*2")
|
|
499
|
|
500 (define_insn_reservation
|
|
501 "cortex_a17_neon_load_g" 10
|
|
502 (and (eq_attr "tune" "cortexa17")
|
|
503 (eq_attr "cortex_a17_neon_type" "neon_load_g"))
|
|
504 "ca17_ls0*2+ca17_ls1*2")
|
|
505
|
|
506 (define_insn_reservation
|
|
507 "cortex_a17_neon_load_h" 11
|
|
508 (and (eq_attr "tune" "cortexa17")
|
|
509 (eq_attr "cortex_a17_neon_type" "neon_load_h"))
|
|
510 "ca17_ls0*2+ca17_ls1*2")
|
|
511
|
|
512 ;; Store Instructions.
|
|
513
|
|
514 (define_insn_reservation
|
|
515 "cortex_a17_vfp_store" 0
|
|
516 (and (eq_attr "tune" "cortexa17")
|
|
517 (eq_attr "type" "f_stores, f_stored"))
|
|
518 "ca17_ls0|ca17_ls1")
|
|
519
|
|
520
|
|
521 (define_insn_reservation
|
|
522 "cortex_a17_neon_store_a" 0
|
|
523 (and (eq_attr "tune" "cortexa17")
|
|
524 (eq_attr "cortex_a17_neon_type" "neon_store_a"))
|
|
525 "ca17_ls0*2|ca17_ls1*2")
|
|
526
|
|
527 (define_insn_reservation
|
|
528 "cortex_a17_neon_store_b" 0
|
|
529 (and (eq_attr "tune" "cortexa17")
|
|
530 (eq_attr "cortex_a17_neon_type" "neon_store_b"))
|
|
531 "ca17_ls0*2+ca17_ls1*2")
|
|
532
|
|
533 ;; VFP Operations.
|
|
534
|
|
535 (define_insn_reservation "cortex_a17_vfp_const" 4
|
|
536 (and (eq_attr "tune" "cortexa17")
|
|
537 (eq_attr "type" "fconsts,fconstd"))
|
|
538 "ca17_asimd1+ca17_fpadd1")
|
|
539
|
|
540 (define_insn_reservation "cortex_a17_vfp_adds_subs" 6
|
|
541 (and (eq_attr "tune" "cortexa17")
|
|
542 (eq_attr "type" "fadds"))
|
|
543 "ca17_asimd1+ca17_fpadd1")
|
|
544
|
|
545
|
|
546 (define_insn_reservation "cortex_a17_vfp_addd_subd" 6
|
|
547 (and (eq_attr "tune" "cortexa17")
|
|
548 (eq_attr "type" "faddd"))
|
|
549 "ca17_asimd1+ca17_fpadd1")
|
|
550
|
|
551 (define_insn_reservation "cortex_a17_vfp_mul" 6
|
|
552 (and (eq_attr "tune" "cortexa17")
|
|
553 (eq_attr "type" "fmuls,fmuld"))
|
|
554 "ca17_asimd1+ca17_fpmul1")
|
|
555
|
|
556 (define_insn_reservation "cortex_a17_vfp_mac" 11
|
|
557 (and (eq_attr "tune" "cortexa17")
|
|
558 (eq_attr "type" "fmacs,ffmas,fmacd,ffmad"))
|
|
559 "ca17_asimd1+ca17_fpmul1,ca17_fpadd1")
|
|
560
|
|
561 (define_insn_reservation "cortex_a17_vfp_cvt" 6
|
|
562 (and (eq_attr "tune" "cortexa17")
|
|
563 (eq_attr "type" "f_cvt,f_cvtf2i,f_cvti2f,f_rints,f_rintd"))
|
|
564 "ca17_asimd1+ca17_fpadd1")
|
|
565
|
|
566 (define_insn_reservation "cortex_a17_vfp_cmp" 4
|
|
567 (and (eq_attr "tune" "cortexa17")
|
|
568 (eq_attr "type" "fcmps,fcmpd"))
|
|
569 "ca17_asimd1+ca17_fpadd1")
|
|
570
|
|
571 (define_insn_reservation "cortex_a17_vfp_arithd" 4
|
|
572 (and (eq_attr "tune" "cortexa17")
|
|
573 (eq_attr "type" "ffarithd"))
|
|
574 "ca17_asimd1+ca17_fpadd1")
|
|
575
|
|
576 (define_insn_reservation "cortex_a17_vfp_cpys" 4
|
|
577 (and (eq_attr "tune" "cortexa17")
|
|
578 (eq_attr "type" "fmov,fcsel"))
|
|
579 "ca17_asimd1+ca17_fpadd1")
|
|
580
|
|
581 (define_insn_reservation "cortex_a17_gp_to_vfp" 2
|
|
582 (and (eq_attr "tune" "cortexa17")
|
|
583 (eq_attr "type" "f_mcr, f_mcrr"))
|
|
584 "(ca17_asimd0+ca17_perm0)|(ca17_asimd1+ca17_perm1)")
|
|
585
|
|
586 (define_insn_reservation "cortex_a17_mov_vfp_to_gp" 4
|
|
587 (and (eq_attr "tune" "cortexa17")
|
|
588 (eq_attr "type" "f_mrc, f_mrrc"))
|
|
589 "ca17_asimd0+ca17_perm0*3")
|
|
590
|
|
591 (define_insn_reservation "cortex_a17_vfp_ariths" 4
|
|
592 (and (eq_attr "tune" "cortexa17")
|
|
593 (eq_attr "type" "ffariths"))
|
|
594 "ca17_asimd1+ca17_fpadd1")
|
|
595
|
|
596 (define_insn_reservation "cortex_a17_vfp_divs" 18
|
|
597 (and (eq_attr "tune" "cortexa17")
|
|
598 (eq_attr "type" "fdivs, fsqrts"))
|
|
599 "ca17_asimd0+ca17_fdiv0*10")
|
|
600
|
|
601 (define_insn_reservation "cortex_a17_vfp_divd" 32
|
|
602 (and (eq_attr "tune" "cortexa17")
|
|
603 (eq_attr "type" "fdivd, fsqrtd"))
|
|
604 "ca17_asimd0+ca17_fdiv0*10")
|
|
605
|