131
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1 /* Copyright (C) 2017-2018 Free Software Foundation, Inc.
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2
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3 This file is part of GCC.
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4
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5 GCC is free software; you can redistribute it and/or modify
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6 it under the terms of the GNU General Public License as published by
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7 the Free Software Foundation; either version 3, or (at your option)
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8 any later version.
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9
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10 GCC is distributed in the hope that it will be useful,
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11 but WITHOUT ANY WARRANTY; without even the implied warranty of
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12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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13 GNU General Public License for more details.
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14
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15 Under Section 7 of GPL version 3, you are granted additional
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16 permissions described in the GCC Runtime Library Exception, version
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17 3.1, as published by the Free Software Foundation.
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18
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19 You should have received a copy of the GNU General Public License and
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20 a copy of the GCC Runtime Library Exception along with this program;
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21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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22 <http://www.gnu.org/licenses/>. */
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23
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24 #ifndef _IMMINTRIN_H_INCLUDED
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25 #error "Never use <gfniintrin.h> directly; include <immintrin.h> instead."
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26 #endif
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27
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28 #ifndef _GFNIINTRIN_H_INCLUDED
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29 #define _GFNIINTRIN_H_INCLUDED
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30
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31 #if !defined(__GFNI__) || !defined(__SSE2__)
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32 #pragma GCC push_options
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33 #pragma GCC target("gfni,sse2")
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34 #define __DISABLE_GFNI__
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35 #endif /* __GFNI__ */
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36
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37 extern __inline __m128i
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38 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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39 _mm_gf2p8mul_epi8 (__m128i __A, __m128i __B)
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40 {
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41 return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi((__v16qi) __A,
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42 (__v16qi) __B);
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43 }
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44
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45 #ifdef __OPTIMIZE__
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46 extern __inline __m128i
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47 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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48 _mm_gf2p8affineinv_epi64_epi8 (__m128i __A, __m128i __B, const int __C)
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49 {
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50 return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi ((__v16qi) __A,
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51 (__v16qi) __B,
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52 __C);
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53 }
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54
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55 extern __inline __m128i
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56 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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57 _mm_gf2p8affine_epi64_epi8 (__m128i __A, __m128i __B, const int __C)
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58 {
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59 return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi ((__v16qi) __A,
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60 (__v16qi) __B, __C);
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61 }
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62 #else
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63 #define _mm_gf2p8affineinv_epi64_epi8(A, B, C) \
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64 ((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi((__v16qi)(__m128i)(A), \
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65 (__v16qi)(__m128i)(B), (int)(C)))
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66 #define _mm_gf2p8affine_epi64_epi8(A, B, C) \
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67 ((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi ((__v16qi)(__m128i)(A), \
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68 (__v16qi)(__m128i)(B), (int)(C)))
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69 #endif
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70
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71 #ifdef __DISABLE_GFNI__
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72 #undef __DISABLE_GFNI__
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73 #pragma GCC pop_options
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74 #endif /* __DISABLE_GFNI__ */
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75
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76 #if !defined(__GFNI__) || !defined(__AVX__)
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77 #pragma GCC push_options
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78 #pragma GCC target("gfni,avx")
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79 #define __DISABLE_GFNIAVX__
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80 #endif /* __GFNIAVX__ */
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81
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82 extern __inline __m256i
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83 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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84 _mm256_gf2p8mul_epi8 (__m256i __A, __m256i __B)
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85 {
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86 return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi ((__v32qi) __A,
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87 (__v32qi) __B);
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88 }
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89
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90 #ifdef __OPTIMIZE__
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91 extern __inline __m256i
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92 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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93 _mm256_gf2p8affineinv_epi64_epi8 (__m256i __A, __m256i __B, const int __C)
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94 {
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95 return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi ((__v32qi) __A,
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96 (__v32qi) __B,
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97 __C);
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98 }
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99
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100 extern __inline __m256i
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101 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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102 _mm256_gf2p8affine_epi64_epi8 (__m256i __A, __m256i __B, const int __C)
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103 {
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104 return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi ((__v32qi) __A,
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105 (__v32qi) __B, __C);
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106 }
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107 #else
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108 #define _mm256_gf2p8affineinv_epi64_epi8(A, B, C) \
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109 ((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi((__v32qi)(__m256i)(A), \
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110 (__v32qi)(__m256i)(B), \
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111 (int)(C)))
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112 #define _mm256_gf2p8affine_epi64_epi8(A, B, C) \
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113 ((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi ((__v32qi)(__m256i)(A), \
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114 ( __v32qi)(__m256i)(B), (int)(C)))
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115 #endif
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116
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117 #ifdef __DISABLE_GFNIAVX__
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118 #undef __DISABLE_GFNIAVX__
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119 #pragma GCC pop_options
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120 #endif /* __GFNIAVX__ */
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121
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122 #if !defined(__GFNI__) || !defined(__AVX512VL__)
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123 #pragma GCC push_options
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124 #pragma GCC target("gfni,avx512vl")
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125 #define __DISABLE_GFNIAVX512VL__
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126 #endif /* __GFNIAVX512VL__ */
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127
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128 extern __inline __m128i
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129 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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130 _mm_mask_gf2p8mul_epi8 (__m128i __A, __mmask16 __B, __m128i __C, __m128i __D)
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131 {
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132 return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi_mask ((__v16qi) __C,
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133 (__v16qi) __D,
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134 (__v16qi)__A, __B);
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135 }
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136
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137 extern __inline __m128i
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138 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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139 _mm_maskz_gf2p8mul_epi8 (__mmask16 __A, __m128i __B, __m128i __C)
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140 {
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141 return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi_mask ((__v16qi) __B,
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142 (__v16qi) __C, (__v16qi) _mm_setzero_si128 (), __A);
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143 }
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144
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145 #ifdef __OPTIMIZE__
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146 extern __inline __m128i
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147 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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148 _mm_mask_gf2p8affineinv_epi64_epi8 (__m128i __A, __mmask16 __B, __m128i __C,
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149 __m128i __D, const int __E)
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150 {
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151 return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask ((__v16qi) __C,
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152 (__v16qi) __D,
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153 __E,
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154 (__v16qi)__A,
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155 __B);
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156 }
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157
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158 extern __inline __m128i
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159 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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160 _mm_maskz_gf2p8affineinv_epi64_epi8 (__mmask16 __A, __m128i __B, __m128i __C,
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161 const int __D)
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162 {
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163 return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask ((__v16qi) __B,
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164 (__v16qi) __C, __D,
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165 (__v16qi) _mm_setzero_si128 (),
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166 __A);
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167 }
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168
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169 extern __inline __m128i
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170 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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171 _mm_mask_gf2p8affine_epi64_epi8 (__m128i __A, __mmask16 __B, __m128i __C,
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172 __m128i __D, const int __E)
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173 {
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174 return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask ((__v16qi) __C,
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175 (__v16qi) __D, __E, (__v16qi)__A, __B);
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176 }
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177
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178 extern __inline __m128i
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179 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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180 _mm_maskz_gf2p8affine_epi64_epi8 (__mmask16 __A, __m128i __B, __m128i __C,
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181 const int __D)
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182 {
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183 return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask ((__v16qi) __B,
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184 (__v16qi) __C, __D, (__v16qi) _mm_setzero_si128 (), __A);
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185 }
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186 #else
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187 #define _mm_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E) \
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188 ((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask( \
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189 (__v16qi)(__m128i)(C), (__v16qi)(__m128i)(D), \
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190 (int)(E), (__v16qi)(__m128i)(A), (__mmask16)(B)))
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191 #define _mm_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D) \
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192 ((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask( \
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193 (__v16qi)(__m128i)(B), (__v16qi)(__m128i)(C), \
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194 (int)(D), (__v16qi)(__m128i) _mm_setzero_si128 (), \
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195 (__mmask16)(A)))
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196 #define _mm_mask_gf2p8affine_epi64_epi8(A, B, C, D, E) \
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197 ((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask((__v16qi)(__m128i)(C),\
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198 (__v16qi)(__m128i)(D), (int)(E), (__v16qi)(__m128i)(A), (__mmask16)(B)))
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199 #define _mm_maskz_gf2p8affine_epi64_epi8(A, B, C, D) \
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200 ((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask((__v16qi)(__m128i)(B),\
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201 (__v16qi)(__m128i)(C), (int)(D), \
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202 (__v16qi)(__m128i) _mm_setzero_si128 (), (__mmask16)(A)))
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203 #endif
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204
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205 #ifdef __DISABLE_GFNIAVX512VL__
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206 #undef __DISABLE_GFNIAVX512VL__
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207 #pragma GCC pop_options
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208 #endif /* __GFNIAVX512VL__ */
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209
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210 #if !defined(__GFNI__) || !defined(__AVX512VL__) || !defined(__AVX512BW__)
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211 #pragma GCC push_options
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212 #pragma GCC target("gfni,avx512vl,avx512bw")
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213 #define __DISABLE_GFNIAVX512VLBW__
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214 #endif /* __GFNIAVX512VLBW__ */
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215
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216 extern __inline __m256i
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217 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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218 _mm256_mask_gf2p8mul_epi8 (__m256i __A, __mmask32 __B, __m256i __C,
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219 __m256i __D)
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220 {
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221 return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi_mask ((__v32qi) __C,
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222 (__v32qi) __D,
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223 (__v32qi)__A, __B);
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224 }
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225
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226 extern __inline __m256i
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227 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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228 _mm256_maskz_gf2p8mul_epi8 (__mmask32 __A, __m256i __B, __m256i __C)
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229 {
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230 return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi_mask ((__v32qi) __B,
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231 (__v32qi) __C, (__v32qi) _mm256_setzero_si256 (), __A);
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232 }
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233
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234 #ifdef __OPTIMIZE__
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235 extern __inline __m256i
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236 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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237 _mm256_mask_gf2p8affineinv_epi64_epi8 (__m256i __A, __mmask32 __B,
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238 __m256i __C, __m256i __D, const int __E)
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239 {
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240 return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask ((__v32qi) __C,
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241 (__v32qi) __D,
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242 __E,
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243 (__v32qi)__A,
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244 __B);
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245 }
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246
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247 extern __inline __m256i
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248 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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249 _mm256_maskz_gf2p8affineinv_epi64_epi8 (__mmask32 __A, __m256i __B,
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250 __m256i __C, const int __D)
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251 {
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252 return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask ((__v32qi) __B,
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253 (__v32qi) __C, __D,
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254 (__v32qi) _mm256_setzero_si256 (), __A);
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255 }
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256
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257 extern __inline __m256i
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258 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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259 _mm256_mask_gf2p8affine_epi64_epi8 (__m256i __A, __mmask32 __B, __m256i __C,
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260 __m256i __D, const int __E)
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261 {
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262 return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask ((__v32qi) __C,
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263 (__v32qi) __D,
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264 __E,
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265 (__v32qi)__A,
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266 __B);
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267 }
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268
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269 extern __inline __m256i
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270 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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271 _mm256_maskz_gf2p8affine_epi64_epi8 (__mmask32 __A, __m256i __B,
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272 __m256i __C, const int __D)
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273 {
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274 return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask ((__v32qi) __B,
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275 (__v32qi) __C, __D, (__v32qi)_mm256_setzero_si256 (), __A);
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276 }
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277 #else
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278 #define _mm256_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E) \
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279 ((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask( \
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280 (__v32qi)(__m256i)(C), (__v32qi)(__m256i)(D), (int)(E), \
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281 (__v32qi)(__m256i)(A), (__mmask32)(B)))
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282 #define _mm256_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D) \
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283 ((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask( \
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284 (__v32qi)(__m256i)(B), (__v32qi)(__m256i)(C), (int)(D), \
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285 (__v32qi)(__m256i) _mm256_setzero_si256 (), (__mmask32)(A)))
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286 #define _mm256_mask_gf2p8affine_epi64_epi8(A, B, C, D, E) \
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287 ((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask((__v32qi)(__m256i)(C),\
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288 (__v32qi)(__m256i)(D), (int)(E), (__v32qi)(__m256i)(A), (__mmask32)(B)))
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289 #define _mm256_maskz_gf2p8affine_epi64_epi8(A, B, C, D) \
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290 ((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask((__v32qi)(__m256i)(B),\
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291 (__v32qi)(__m256i)(C), (int)(D), \
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292 (__v32qi)(__m256i) _mm256_setzero_si256 (), (__mmask32)(A)))
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293 #endif
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294
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295 #ifdef __DISABLE_GFNIAVX512VLBW__
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296 #undef __DISABLE_GFNIAVX512VLBW__
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297 #pragma GCC pop_options
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298 #endif /* __GFNIAVX512VLBW__ */
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299
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300 #if !defined(__GFNI__) || !defined(__AVX512F__) || !defined(__AVX512BW__)
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301 #pragma GCC push_options
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302 #pragma GCC target("gfni,avx512f,avx512bw")
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303 #define __DISABLE_GFNIAVX512FBW__
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304 #endif /* __GFNIAVX512FBW__ */
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305
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306 extern __inline __m512i
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307 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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308 _mm512_mask_gf2p8mul_epi8 (__m512i __A, __mmask64 __B, __m512i __C,
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309 __m512i __D)
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310 {
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311 return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi_mask ((__v64qi) __C,
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312 (__v64qi) __D, (__v64qi)__A, __B);
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313 }
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314
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315 extern __inline __m512i
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316 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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317 _mm512_maskz_gf2p8mul_epi8 (__mmask64 __A, __m512i __B, __m512i __C)
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318 {
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319 return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi_mask ((__v64qi) __B,
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320 (__v64qi) __C, (__v64qi) _mm512_setzero_si512 (), __A);
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321 }
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322 extern __inline __m512i
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323 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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324 _mm512_gf2p8mul_epi8 (__m512i __A, __m512i __B)
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325 {
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326 return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi ((__v64qi) __A,
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327 (__v64qi) __B);
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328 }
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329
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330 #ifdef __OPTIMIZE__
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331 extern __inline __m512i
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332 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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333 _mm512_mask_gf2p8affineinv_epi64_epi8 (__m512i __A, __mmask64 __B, __m512i __C,
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334 __m512i __D, const int __E)
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335 {
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336 return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask ((__v64qi) __C,
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337 (__v64qi) __D,
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338 __E,
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339 (__v64qi)__A,
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340 __B);
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341 }
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342
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343 extern __inline __m512i
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344 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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345 _mm512_maskz_gf2p8affineinv_epi64_epi8 (__mmask64 __A, __m512i __B,
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346 __m512i __C, const int __D)
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347 {
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348 return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask ((__v64qi) __B,
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349 (__v64qi) __C, __D,
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350 (__v64qi) _mm512_setzero_si512 (), __A);
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351 }
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352
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353 extern __inline __m512i
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354 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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355 _mm512_gf2p8affineinv_epi64_epi8 (__m512i __A, __m512i __B, const int __C)
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356 {
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357 return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi ((__v64qi) __A,
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358 (__v64qi) __B, __C);
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359 }
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360
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361 extern __inline __m512i
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362 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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363 _mm512_mask_gf2p8affine_epi64_epi8 (__m512i __A, __mmask64 __B, __m512i __C,
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364 __m512i __D, const int __E)
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365 {
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366 return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask ((__v64qi) __C,
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367 (__v64qi) __D, __E, (__v64qi)__A, __B);
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368 }
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369
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370 extern __inline __m512i
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371 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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372 _mm512_maskz_gf2p8affine_epi64_epi8 (__mmask64 __A, __m512i __B, __m512i __C,
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373 const int __D)
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374 {
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375 return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask ((__v64qi) __B,
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376 (__v64qi) __C, __D, (__v64qi) _mm512_setzero_si512 (), __A);
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377 }
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378 extern __inline __m512i
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379 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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380 _mm512_gf2p8affine_epi64_epi8 (__m512i __A, __m512i __B, const int __C)
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381 {
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382 return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi ((__v64qi) __A,
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383 (__v64qi) __B, __C);
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384 }
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385 #else
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386 #define _mm512_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E) \
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387 ((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask( \
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388 (__v64qi)(__m512i)(C), (__v64qi)(__m512i)(D), (int)(E), \
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389 (__v64qi)(__m512i)(A), (__mmask64)(B)))
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390 #define _mm512_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D) \
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391 ((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask( \
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392 (__v64qi)(__m512i)(B), (__v64qi)(__m512i)(C), (int)(D), \
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393 (__v64qi)(__m512i) _mm512_setzero_si512 (), (__mmask64)(A)))
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394 #define _mm512_gf2p8affineinv_epi64_epi8(A, B, C) \
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395 ((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi ( \
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396 (__v64qi)(__m512i)(A), (__v64qi)(__m512i)(B), (int)(C)))
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397 #define _mm512_mask_gf2p8affine_epi64_epi8(A, B, C, D, E) \
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398 ((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask((__v64qi)(__m512i)(C),\
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399 (__v64qi)(__m512i)(D), (int)(E), (__v64qi)(__m512i)(A), (__mmask64)(B)))
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400 #define _mm512_maskz_gf2p8affine_epi64_epi8(A, B, C, D) \
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401 ((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask((__v64qi)(__m512i)(B),\
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402 (__v64qi)(__m512i)(C), (int)(D), \
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403 (__v64qi)(__m512i) _mm512_setzero_si512 (), (__mmask64)(A)))
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404 #define _mm512_gf2p8affine_epi64_epi8(A, B, C) \
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405 ((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi ((__v64qi)(__m512i)(A), \
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406 (__v64qi)(__m512i)(B), (int)(C)))
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407 #endif
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408
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409 #ifdef __DISABLE_GFNIAVX512FBW__
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410 #undef __DISABLE_GFNIAVX512FBW__
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411 #pragma GCC pop_options
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412 #endif /* __GFNIAVX512FBW__ */
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413
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414 #endif /* _GFNIINTRIN_H_INCLUDED */
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