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annotate gcc/config/mips/p6600.md @ 131:84e7813d76e9

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gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents
children 1830386684a0
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131
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1 ;; DFA-based pipeline description for P6600.
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2 ;;
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3 ;; Copyright (C) 2018 Free Software Foundation, Inc.
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4 ;;
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5 ;; This file is part of GCC.
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6 ;;
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7 ;; GCC is free software; you can redistribute it and/or modify it
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8 ;; under the terms of the GNU General Public License as published
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9 ;; by the Free Software Foundation; either version 3, or (at your
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10 ;; option) any later version.
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11
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12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 ;; License for more details.
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16
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17 ;; You should have received a copy of the GNU General Public License
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18 ;; along with GCC; see the file COPYING3. If not see
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19 ;; <http://www.gnu.org/licenses/>.
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20
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21 (define_automaton "p6600_agen_alq_pipe, p6600_mdu_pipe, p6600_fpu_pipe")
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22
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23 ;; The address generation queue (AGQ) has AL2, CTISTD and LDSTA pipes
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24 (define_cpu_unit "p6600_agq, p6600_al2, p6600_ctistd, p6600_lsu"
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25 "p6600_agen_alq_pipe")
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26
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27 (define_cpu_unit "p6600_gpmul, p6600_gpdiv" "p6600_mdu_pipe")
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28
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29 ;; The arithmetic-logic-unit queue (ALQ) has ALU pipe
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30 (define_cpu_unit "p6600_alq, p6600_alu" "p6600_agen_alq_pipe")
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31
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32 ;; The floating-point-unit queue (FPQ) has short and long pipes
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33 (define_cpu_unit "p6600_fpu_short, p6600_fpu_long" "p6600_fpu_pipe")
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34
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35 ;; Short FPU pipeline.
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36 (define_cpu_unit "p6600_fpu_intadd, p6600_fpu_cmp, p6600_fpu_float,
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37 p6600_fpu_logic_a, p6600_fpu_logic_b, p6600_fpu_div,
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38 p6600_fpu_store" "p6600_fpu_pipe")
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39
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40 ;; Long FPU pipeline.
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41 (define_cpu_unit "p6600_fpu_logic, p6600_fpu_float_a, p6600_fpu_float_b,
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42 p6600_fpu_float_c, p6600_fpu_float_d" "p6600_fpu_pipe")
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43 (define_cpu_unit "p6600_fpu_mult, p6600_fpu_fdiv, p6600_fpu_apu" "p6600_fpu_pipe")
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44
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45 (define_reservation "p6600_agq_al2" "p6600_agq, p6600_al2")
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46 (define_reservation "p6600_agq_ctistd" "p6600_agq, p6600_ctistd")
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47 (define_reservation "p6600_agq_lsu" "p6600_agq, p6600_lsu")
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48 (define_reservation "p6600_alq_alu" "p6600_alq, p6600_alu")
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49
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50 ;;
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51 ;; FPU-MSA pipe
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52 ;;
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53
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54 ;; Arithmetic
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55 ;; add, hadd, sub, hsub, average, min, max, compare
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56 (define_insn_reservation "p6600_msa_short_int_add" 2
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57 (and (eq_attr "cpu" "p6600")
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58 (eq_attr "type" "simd_int_arith"))
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59 "p6600_fpu_short, p6600_fpu_intadd")
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60
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61 ;; Bitwise Instructions
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62 ;; and, or, xor, bit-clear, leading-bits-count, shift, shuffle
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63 (define_insn_reservation "p6600_msa_short_logic" 2
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64 (and (eq_attr "cpu" "p6600")
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65 (eq_attr "type" "simd_shift,simd_bit,simd_splat,simd_fill,simd_shf,
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66 simd_permute,simd_logic"))
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67 "p6600_fpu_short, p6600_fpu_logic_a")
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68
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69 ;; move.v
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70 (define_insn_reservation "p6600_msa_short_logic_move_v" 2
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71 (and (eq_attr "cpu" "p6600")
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72 (eq_attr "type" "simd_move"))
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73 "p6600_fpu_short, p6600_fpu_logic_a")
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74
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75 ;; Float compare
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76 (define_insn_reservation "p6600_msa_short_cmp" 2
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77 (and (eq_attr "cpu" "p6600")
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78 (eq_attr "type" "simd_fcmp"))
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79 "p6600_fpu_short, p6600_fpu_cmp")
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80
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81 ;; Float exp2, min, max
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82 (define_insn_reservation "p6600_msa_short_float2" 2
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83 (and (eq_attr "cpu" "p6600")
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84 (eq_attr "type" "simd_fexp2,simd_fminmax"))
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85 "p6600_fpu_short, p6600_fpu_float")
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86
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87 ;; Vector sat
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88 (define_insn_reservation "p6600_msa_short_logic3" 3
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89 (and (eq_attr "cpu" "p6600")
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90 (eq_attr "type" "simd_sat,simd_pcnt"))
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91 "p6600_fpu_short, p6600_fpu_logic_a, p6600_fpu_logic_b")
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92
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93 ;; Vector copy, bz, bnz
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94 (define_insn_reservation "p6600_msa_short_store4" 4
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95 (and (eq_attr "cpu" "p6600")
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96 (eq_attr "type" "simd_copy,simd_branch,simd_cmsa"))
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97 "p6600_fpu_short, p6600_fpu_store")
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98
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99 ;; Vector load
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100 (define_insn_reservation "p6600_msa_load" 8
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101 (and (eq_attr "cpu" "p6600")
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102 (eq_attr "type" "simd_load"))
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103 "p6600_agq_lsu")
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104
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105 ;; Vector store
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106 (define_insn_reservation "p6600_msa_short_store" 1
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107 (and (eq_attr "cpu" "p6600")
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108 (eq_attr "type" "simd_store"))
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109 "p6600_agq_lsu")
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110
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111 ;; binsl, binsr, insert, vshf, sld
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112 (define_insn_reservation "p6600_msa_long_logic" 2
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113 (and (eq_attr "cpu" "p6600")
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114 (eq_attr "type" "simd_bitins,simd_bitmov,simd_insert,simd_sld"))
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115 "p6600_fpu_long, p6600_fpu_logic")
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116
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117 ;; Float fclass, flog2
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118 (define_insn_reservation "p6600_msa_long_float2" 2
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119 (and (eq_attr "cpu" "p6600")
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120 (eq_attr "type" "simd_fclass,simd_flog2"))
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121 "p6600_fpu_long, p6600_fpu_float_a")
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122
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123 ;; fadd, fsub
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124 (define_insn_reservation "p6600_msa_long_float4" 4
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125 (and (eq_attr "cpu" "p6600")
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126 (eq_attr "type" "simd_fadd,simd_fcvt"))
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127 "p6600_fpu_long, p6600_fpu_float_a, p6600_fpu_float_b")
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128
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129 ;; fmul
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130 (define_insn_reservation "p6600_msa_long_float5" 5
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131 (and (eq_attr "cpu" "p6600")
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132 (eq_attr "type" "simd_fmul"))
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133 "p6600_fpu_long, p6600_fpu_float_a, p6600_fpu_float_b, p6600_fpu_float_c")
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134
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135 ;; fmadd, fmsub
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136 (define_insn_reservation "p6600_msa_long_float8" 8
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137 (and (eq_attr "cpu" "p6600")
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138 (eq_attr "type" "simd_fmadd"))
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139 "p6600_fpu_long, p6600_fpu_float_a,
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140 p6600_fpu_float_b, p6600_fpu_float_c, p6600_fpu_float_d")
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141
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142 ;; Vector mul, dotp, madd, msub
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143 (define_insn_reservation "p6600_msa_long_mult" 5
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144 (and (eq_attr "cpu" "p6600")
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145 (eq_attr "type" "simd_mul"))
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146 "p6600_fpu_long, p6600_fpu_mult")
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147
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148 ;; fdiv, fmod (semi-pipelined)
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149 (define_insn_reservation "p6600_msa_long_fdiv" 10
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150 (and (eq_attr "cpu" "p6600")
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151 (eq_attr "type" "simd_fdiv"))
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152 "p6600_fpu_long, nothing, nothing, p6600_fpu_fdiv*8")
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153
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154 ;; div, mod (non-pipelined)
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155 (define_insn_reservation "p6600_msa_long_div" 10
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156 (and (eq_attr "cpu" "p6600")
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157 (eq_attr "type" "simd_div"))
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158 "p6600_fpu_long, p6600_fpu_div*9, p6600_fpu_div + p6600_fpu_logic_a")
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159
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160 ;;
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161 ;; FPU pipe
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162 ;;
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163
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164 ;; fadd, fsub
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165 (define_insn_reservation "p6600_fpu_fadd" 4
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166 (and (eq_attr "cpu" "p6600")
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167 (eq_attr "type" "fadd"))
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168 "p6600_fpu_long, p6600_fpu_apu")
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169
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170 ;; fabs, fneg, fcmp
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171 (define_insn_reservation "p6600_fpu_fabs" 2
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172 (and (eq_attr "cpu" "p6600")
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173 (ior (eq_attr "type" "fabs,fneg,fcmp,fmove")
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174 (and (eq_attr "type" "condmove")
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175 (eq_attr "mode" "SF,DF"))))
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diff changeset
176 "p6600_fpu_short, p6600_fpu_apu")
84e7813d76e9 gcc-8.2
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177
84e7813d76e9 gcc-8.2
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178 ;; fload
84e7813d76e9 gcc-8.2
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diff changeset
179 (define_insn_reservation "p6600_fpu_fload" 8
84e7813d76e9 gcc-8.2
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diff changeset
180 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
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diff changeset
181 (eq_attr "type" "fpload,fpidxload"))
84e7813d76e9 gcc-8.2
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diff changeset
182 "p6600_agq_lsu")
84e7813d76e9 gcc-8.2
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diff changeset
183
84e7813d76e9 gcc-8.2
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184 ;; fstore
84e7813d76e9 gcc-8.2
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diff changeset
185 (define_insn_reservation "p6600_fpu_fstore" 1
84e7813d76e9 gcc-8.2
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diff changeset
186 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
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diff changeset
187 (eq_attr "type" "fpstore,fpidxstore"))
84e7813d76e9 gcc-8.2
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diff changeset
188 "p6600_agq_lsu")
84e7813d76e9 gcc-8.2
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diff changeset
189
84e7813d76e9 gcc-8.2
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190 ;; fmadd
84e7813d76e9 gcc-8.2
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191 (define_insn_reservation "p6600_fpu_fmadd" 8
84e7813d76e9 gcc-8.2
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192 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
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diff changeset
193 (eq_attr "type" "fmadd"))
84e7813d76e9 gcc-8.2
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diff changeset
194 "p6600_fpu_long, p6600_fpu_apu")
84e7813d76e9 gcc-8.2
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195
84e7813d76e9 gcc-8.2
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196 ;; fmul
84e7813d76e9 gcc-8.2
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diff changeset
197 (define_insn_reservation "p6600_fpu_fmul" 5
84e7813d76e9 gcc-8.2
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diff changeset
198 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
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diff changeset
199 (eq_attr "type" "fmul"))
84e7813d76e9 gcc-8.2
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diff changeset
200 "p6600_fpu_long, p6600_fpu_apu")
84e7813d76e9 gcc-8.2
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201
84e7813d76e9 gcc-8.2
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diff changeset
202 ;; fdiv, fsqrt
84e7813d76e9 gcc-8.2
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diff changeset
203 (define_insn_reservation "p6600_fpu_div" 17
84e7813d76e9 gcc-8.2
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diff changeset
204 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
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parents:
diff changeset
205 (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt"))
84e7813d76e9 gcc-8.2
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diff changeset
206 "p6600_fpu_long, p6600_fpu_apu*17")
84e7813d76e9 gcc-8.2
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207
84e7813d76e9 gcc-8.2
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diff changeset
208 ;; fcvt
84e7813d76e9 gcc-8.2
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diff changeset
209 (define_insn_reservation "p6600_fpu_fcvt" 4
84e7813d76e9 gcc-8.2
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diff changeset
210 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
211 (eq_attr "type" "fcvt"))
84e7813d76e9 gcc-8.2
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diff changeset
212 "p6600_fpu_long, p6600_fpu_apu")
84e7813d76e9 gcc-8.2
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213
84e7813d76e9 gcc-8.2
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diff changeset
214 ;; mtc
84e7813d76e9 gcc-8.2
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diff changeset
215 (define_insn_reservation "p6600_fpu_fmtc" 7
84e7813d76e9 gcc-8.2
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diff changeset
216 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
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diff changeset
217 (eq_attr "type" "mtc"))
84e7813d76e9 gcc-8.2
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diff changeset
218 "p6600_agq_lsu")
84e7813d76e9 gcc-8.2
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diff changeset
219
84e7813d76e9 gcc-8.2
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diff changeset
220 ;; mfc
84e7813d76e9 gcc-8.2
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diff changeset
221 (define_insn_reservation "p6600_fpu_fmfc" 7
84e7813d76e9 gcc-8.2
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diff changeset
222 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
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diff changeset
223 (eq_attr "type" "mfc"))
84e7813d76e9 gcc-8.2
mir3636
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diff changeset
224 "p6600_agq_lsu")
84e7813d76e9 gcc-8.2
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diff changeset
225
84e7813d76e9 gcc-8.2
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226 ;;
84e7813d76e9 gcc-8.2
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diff changeset
227 ;; Integer pipe
84e7813d76e9 gcc-8.2
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diff changeset
228 ;;
84e7813d76e9 gcc-8.2
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229
84e7813d76e9 gcc-8.2
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diff changeset
230 ;; and
84e7813d76e9 gcc-8.2
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diff changeset
231 (define_insn_reservation "p6600_int_and" 1
84e7813d76e9 gcc-8.2
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diff changeset
232 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
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diff changeset
233 (eq_attr "move_type" "logical"))
84e7813d76e9 gcc-8.2
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diff changeset
234 "p6600_alq_alu")
84e7813d76e9 gcc-8.2
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diff changeset
235
84e7813d76e9 gcc-8.2
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diff changeset
236 ;; lui
84e7813d76e9 gcc-8.2
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diff changeset
237 (define_insn_reservation "p6600_int_lui" 1
84e7813d76e9 gcc-8.2
mir3636
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diff changeset
238 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
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diff changeset
239 (eq_attr "move_type" "const"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
240 "p6600_alq_alu")
84e7813d76e9 gcc-8.2
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diff changeset
241
84e7813d76e9 gcc-8.2
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diff changeset
242 ;; Load lb, lbu, lh, lhu, lq, lw, lw_i2f, lwxs
84e7813d76e9 gcc-8.2
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diff changeset
243 (define_insn_reservation "p6600_int_load" 4
84e7813d76e9 gcc-8.2
mir3636
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diff changeset
244 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
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diff changeset
245 (eq_attr "type" "load"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
246 "p6600_agq_lsu")
84e7813d76e9 gcc-8.2
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diff changeset
247
84e7813d76e9 gcc-8.2
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diff changeset
248 ;; store
84e7813d76e9 gcc-8.2
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diff changeset
249 (define_insn_reservation "p6600_int_store" 3
84e7813d76e9 gcc-8.2
mir3636
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diff changeset
250 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
251 (eq_attr "type" "store"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
252 "p6600_agq_lsu")
84e7813d76e9 gcc-8.2
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diff changeset
253
84e7813d76e9 gcc-8.2
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diff changeset
254 ;; andi, sll, srl, seb, seh
84e7813d76e9 gcc-8.2
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diff changeset
255 (define_insn_reservation "p6600_int_arith_1" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
256 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
257 (eq_attr "move_type" "andi,sll0,signext"))
84e7813d76e9 gcc-8.2
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diff changeset
258 "p6600_alq_alu | p6600_agq_al2")
84e7813d76e9 gcc-8.2
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259
84e7813d76e9 gcc-8.2
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diff changeset
260 ;; addi, addiu, ori, xori, add, addu
84e7813d76e9 gcc-8.2
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diff changeset
261 (define_insn_reservation "p6600_int_arith_2" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
262 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
263 (eq_attr "alu_type" "add,or,xor"))
84e7813d76e9 gcc-8.2
mir3636
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diff changeset
264 "p6600_alq_alu | p6600_agq_al2")
84e7813d76e9 gcc-8.2
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265
84e7813d76e9 gcc-8.2
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diff changeset
266 ;; nor, sub
84e7813d76e9 gcc-8.2
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diff changeset
267 (define_insn_reservation "p6600_int_arith_3" 1
84e7813d76e9 gcc-8.2
mir3636
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diff changeset
268 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
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parents:
diff changeset
269 (eq_attr "alu_type" "and,not,nor,sub"))
84e7813d76e9 gcc-8.2
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diff changeset
270 "p6600_alq_alu")
84e7813d76e9 gcc-8.2
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diff changeset
271
84e7813d76e9 gcc-8.2
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diff changeset
272 ;; srl, sra, rotr, slt, sllv, srlv
84e7813d76e9 gcc-8.2
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273 (define_insn_reservation "p6600_int_arith_4" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
274 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
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diff changeset
275 (eq_attr "type" "shift,slt,move"))
84e7813d76e9 gcc-8.2
mir3636
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diff changeset
276 "p6600_alq_alu | p6600_agq_al2")
84e7813d76e9 gcc-8.2
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277
84e7813d76e9 gcc-8.2
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diff changeset
278 ;; nop
84e7813d76e9 gcc-8.2
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diff changeset
279 (define_insn_reservation "p6600_int_nop" 0
84e7813d76e9 gcc-8.2
mir3636
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diff changeset
280 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
281 (eq_attr "type" "nop"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
282 "p6600_alq_alu | p6600_agq_al2")
84e7813d76e9 gcc-8.2
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diff changeset
283
84e7813d76e9 gcc-8.2
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diff changeset
284 ;; clo, clz
84e7813d76e9 gcc-8.2
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diff changeset
285 (define_insn_reservation "p6600_int_countbits" 2
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
286 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
287 (eq_attr "type" "clz"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
288 "p6600_agq_al2")
84e7813d76e9 gcc-8.2
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diff changeset
289
84e7813d76e9 gcc-8.2
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parents:
diff changeset
290 ;; Conditional moves
84e7813d76e9 gcc-8.2
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diff changeset
291 (define_insn_reservation "p6600_int_condmove" 2
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
292 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
293 (eq_attr "type" "condmove"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
294 "p6600_agq_al2")
84e7813d76e9 gcc-8.2
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diff changeset
295
84e7813d76e9 gcc-8.2
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diff changeset
296 ;; mfhi/lo
84e7813d76e9 gcc-8.2
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diff changeset
297 (define_insn_reservation "p6600_dsp_mfhilo" 5
84e7813d76e9 gcc-8.2
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diff changeset
298 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
299 (eq_attr "type" "mfhi,mflo"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
300 "p6600_agq_lsu")
84e7813d76e9 gcc-8.2
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diff changeset
301
84e7813d76e9 gcc-8.2
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diff changeset
302 ;; mthi/lo
84e7813d76e9 gcc-8.2
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diff changeset
303 (define_insn_reservation "p6600_dsp_mthilo" 5
84e7813d76e9 gcc-8.2
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diff changeset
304 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
305 (eq_attr "type" "mthi,mtlo"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
306 "p6600_agq_lsu")
84e7813d76e9 gcc-8.2
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diff changeset
307
84e7813d76e9 gcc-8.2
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parents:
diff changeset
308 ;; mul, mulu, muh, muhu
84e7813d76e9 gcc-8.2
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parents:
diff changeset
309 (define_insn_reservation "p6600_dsp_mult" 4
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
310 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
311 (eq_attr "type" "imul3,imul,imul3nc"))
84e7813d76e9 gcc-8.2
mir3636
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diff changeset
312 "p6600_gpmul")
84e7813d76e9 gcc-8.2
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diff changeset
313
84e7813d76e9 gcc-8.2
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diff changeset
314 ;; branch and jump
84e7813d76e9 gcc-8.2
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diff changeset
315 (define_insn_reservation "p6600_int_branch" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
316 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
317 (eq_attr "type" "branch,jump"))
84e7813d76e9 gcc-8.2
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parents:
diff changeset
318 "p6600_agq_ctistd")
84e7813d76e9 gcc-8.2
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diff changeset
319
84e7813d76e9 gcc-8.2
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parents:
diff changeset
320 ;; prefetch
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
321 (define_insn_reservation "p6600_int_prefetch" 0
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
322 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
323 (eq_attr "type" "prefetch,prefetchx"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
324 "p6600_agq_lsu")
84e7813d76e9 gcc-8.2
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diff changeset
325
84e7813d76e9 gcc-8.2
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parents:
diff changeset
326 ;; divide
84e7813d76e9 gcc-8.2
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parents:
diff changeset
327 (define_insn_reservation "p6600_int_div" 8
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
328 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
329 (eq_attr "type" "idiv,idiv3"))
84e7813d76e9 gcc-8.2
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parents:
diff changeset
330 "p6600_gpdiv*5")
84e7813d76e9 gcc-8.2
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diff changeset
331
84e7813d76e9 gcc-8.2
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parents:
diff changeset
332 ;; arith
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
333 (define_insn_reservation "p6600_int_arith_5" 2
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
334 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
335 (eq_attr "type" "arith"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
336 "p6600_agq_al2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
337
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
338 ;; call
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
339 (define_insn_reservation "p6600_int_call" 2
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
340 (and (eq_attr "cpu" "p6600")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
341 (eq_attr "jal" "indirect,direct"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
342 "p6600_agq_ctistd")