Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/mn10300/mn10300.h @ 131:84e7813d76e9
gcc-8.2
| author | mir3636 |
|---|---|
| date | Thu, 25 Oct 2018 07:37:49 +0900 |
| parents | 04ced10e8804 |
| children | 1830386684a0 |
| rev | line source |
|---|---|
| 0 | 1 /* Definitions of target machine for GNU compiler. |
| 2 Matsushita MN10300 series | |
| 131 | 3 Copyright (C) 1996-2018 Free Software Foundation, Inc. |
| 0 | 4 Contributed by Jeff Law (law@cygnus.com). |
| 5 | |
|
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6 This file is part of GCC. |
| 0 | 7 |
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8 GCC is free software; you can redistribute it and/or modify |
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9 it under the terms of the GNU General Public License as published by |
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10 the Free Software Foundation; either version 3, or (at your option) |
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11 any later version. |
| 0 | 12 |
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13 GCC is distributed in the hope that it will be useful, |
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14 but WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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16 GNU General Public License for more details. |
| 0 | 17 |
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18 You should have received a copy of the GNU General Public License |
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19 along with GCC; see the file COPYING3. If not see |
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20 <http://www.gnu.org/licenses/>. */ |
| 0 | 21 |
| 22 #undef ASM_SPEC | |
| 23 #undef LIB_SPEC | |
| 24 #undef ENDFILE_SPEC | |
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25 #undef LINK_SPEC |
| 111 | 26 #define LINK_SPEC "%{mrelax:%{!r:--relax}}" |
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27 #undef STARTFILE_SPEC |
| 0 | 28 #define STARTFILE_SPEC "%{!mno-crt0:%{!shared:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}" |
| 29 | |
| 30 /* Names to predefine in the preprocessor for this target machine. */ | |
| 31 | |
| 32 #define TARGET_CPU_CPP_BUILTINS() \ | |
| 33 do \ | |
| 34 { \ | |
| 35 builtin_define ("__mn10300__"); \ | |
| 36 builtin_define ("__MN10300__"); \ | |
| 37 builtin_assert ("cpu=mn10300"); \ | |
| 38 builtin_assert ("machine=mn10300"); \ | |
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39 \ |
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40 if (TARGET_AM34) \ |
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41 { \ |
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42 builtin_define ("__AM33__=4"); \ |
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43 builtin_define ("__AM34__"); \ |
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44 } \ |
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45 else if (TARGET_AM33_2) \ |
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46 { \ |
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47 builtin_define ("__AM33__=2"); \ |
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48 builtin_define ("__AM33_2__"); \ |
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49 } \ |
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50 else if (TARGET_AM33) \ |
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51 builtin_define ("__AM33__=1"); \ |
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52 \ |
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53 builtin_define (TARGET_ALLOW_LIW ? \ |
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54 "__LIW__" : "__NO_LIW__");\ |
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55 \ |
| 111 | 56 builtin_define (TARGET_ALLOW_SETLB ? \ |
| 57 "__SETLB__" : "__NO_SETLB__");\ | |
| 0 | 58 } \ |
| 59 while (0) | |
| 60 | |
| 111 | 61 #ifndef MN10300_OPTS_H |
| 62 #include "config/mn10300/mn10300-opts.h" | |
| 63 #endif | |
| 0 | 64 |
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65 extern enum processor_type mn10300_tune_cpu; |
| 0 | 66 |
| 67 #define TARGET_AM33 (mn10300_processor >= PROCESSOR_AM33) | |
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68 #define TARGET_AM33_2 (mn10300_processor >= PROCESSOR_AM33_2) |
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69 #define TARGET_AM34 (mn10300_processor >= PROCESSOR_AM34) |
| 0 | 70 |
| 71 #ifndef PROCESSOR_DEFAULT | |
| 72 #define PROCESSOR_DEFAULT PROCESSOR_MN10300 | |
| 73 #endif | |
| 74 | |
| 75 | |
| 76 /* Target machine storage layout */ | |
| 77 | |
| 78 /* Define this if most significant bit is lowest numbered | |
| 79 in instructions that operate on numbered bit-fields. | |
| 80 This is not true on the Matsushita MN1003. */ | |
| 81 #define BITS_BIG_ENDIAN 0 | |
| 82 | |
| 83 /* Define this if most significant byte of a word is the lowest numbered. */ | |
| 84 /* This is not true on the Matsushita MN10300. */ | |
| 85 #define BYTES_BIG_ENDIAN 0 | |
| 86 | |
| 87 /* Define this if most significant word of a multiword number is lowest | |
| 88 numbered. | |
| 89 This is not true on the Matsushita MN10300. */ | |
| 90 #define WORDS_BIG_ENDIAN 0 | |
| 91 | |
| 92 /* Width of a word, in units (bytes). */ | |
| 93 #define UNITS_PER_WORD 4 | |
| 94 | |
| 95 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
| 96 #define PARM_BOUNDARY 32 | |
| 97 | |
| 98 /* The stack goes in 32-bit lumps. */ | |
| 99 #define STACK_BOUNDARY 32 | |
| 100 | |
| 101 /* Allocation boundary (in *bits*) for the code of a function. | |
| 102 8 is the minimum boundary; it's unclear if bigger alignments | |
| 103 would improve performance. */ | |
| 104 #define FUNCTION_BOUNDARY 8 | |
| 105 | |
| 106 /* No data type wants to be aligned rounder than this. */ | |
| 107 #define BIGGEST_ALIGNMENT 32 | |
| 108 | |
| 109 /* Alignment of field after `int : 0' in a structure. */ | |
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110 #define EMPTY_FIELD_BOUNDARY 32 |
| 0 | 111 |
| 112 /* Define this if move instructions will actually fail to work | |
| 113 when given unaligned data. */ | |
| 114 #define STRICT_ALIGNMENT 1 | |
| 115 | |
| 116 /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
| 117 #define DEFAULT_SIGNED_CHAR 0 | |
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118 |
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119 #undef SIZE_TYPE |
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120 #define SIZE_TYPE "unsigned int" |
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121 |
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122 #undef PTRDIFF_TYPE |
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123 #define PTRDIFF_TYPE "int" |
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124 |
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125 #undef WCHAR_TYPE |
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126 #define WCHAR_TYPE "long int" |
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127 |
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128 #undef WCHAR_TYPE_SIZE |
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129 #define WCHAR_TYPE_SIZE BITS_PER_WORD |
| 0 | 130 |
| 131 /* Standard register usage. */ | |
| 132 | |
| 133 /* Number of actual hardware registers. | |
| 134 The hardware registers are assigned numbers for the compiler | |
| 135 from 0 to just below FIRST_PSEUDO_REGISTER. | |
| 136 | |
| 137 All registers that the compiler knows about must be given numbers, | |
| 138 even those that are not normally considered general registers. */ | |
| 139 | |
|
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140 #define FIRST_PSEUDO_REGISTER 52 |
| 0 | 141 |
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142 /* Specify machine-specific register numbers. The commented out entries |
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143 are defined in mn10300.md. */ |
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144 #define FIRST_DATA_REGNUM 0 |
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145 #define LAST_DATA_REGNUM 3 |
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146 #define FIRST_ADDRESS_REGNUM 4 |
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147 /* #define PIC_REG 6 */ |
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148 #define LAST_ADDRESS_REGNUM 8 |
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149 /* #define SP_REG 9 */ |
| 0 | 150 #define FIRST_EXTENDED_REGNUM 10 |
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151 #define LAST_EXTENDED_REGNUM 17 |
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152 #define FIRST_FP_REGNUM 18 |
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153 #define LAST_FP_REGNUM 49 |
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154 /* #define MDR_REG 50 */ |
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155 /* #define CC_REG 51 */ |
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156 #define FIRST_ARGUMENT_REGNUM 0 |
| 0 | 157 |
| 158 /* Specify the registers used for certain standard purposes. | |
| 159 The values of these macros are register numbers. */ | |
| 160 | |
| 161 /* Register to use for pushing function arguments. */ | |
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162 #define STACK_POINTER_REGNUM (LAST_ADDRESS_REGNUM + 1) |
| 0 | 163 |
| 164 /* Base register for access to local variables of the function. */ | |
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165 #define FRAME_POINTER_REGNUM (LAST_ADDRESS_REGNUM - 1) |
| 0 | 166 |
| 167 /* Base register for access to arguments of the function. This | |
| 168 is a fake register and will be eliminated into either the frame | |
| 169 pointer or stack pointer. */ | |
| 170 #define ARG_POINTER_REGNUM LAST_ADDRESS_REGNUM | |
| 171 | |
| 172 /* Register in which static-chain is passed to a function. */ | |
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173 #define STATIC_CHAIN_REGNUM (FIRST_ADDRESS_REGNUM + 1) |
| 0 | 174 |
| 175 /* 1 for registers that have pervasive standard uses | |
| 176 and are not available for the register allocator. */ | |
| 177 | |
| 178 #define FIXED_REGISTERS \ | |
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179 { 0, 0, 0, 0, /* data regs */ \ |
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180 0, 0, 0, 0, /* addr regs */ \ |
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181 1, /* arg reg */ \ |
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182 1, /* sp reg */ \ |
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183 0, 0, 0, 0, 0, 0, 0, 0, /* extended regs */ \ |
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184 0, 0, /* fp regs (18-19) */ \ |
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185 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* fp regs (20-29) */ \ |
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186 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* fp regs (30-39) */ \ |
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187 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* fp regs (40-49) */ \ |
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188 0, /* mdr reg */ \ |
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189 1 /* cc reg */ \ |
| 0 | 190 } |
| 191 | |
| 192 /* 1 for registers not available across function calls. | |
| 193 These must include the FIXED_REGISTERS and also any | |
| 194 registers that can be used without being saved. | |
| 195 The latter must include the registers where values are returned | |
| 196 and the register where structure-value addresses are passed. | |
| 197 Aside from that, you can include as many other registers as you | |
| 198 like. */ | |
| 199 | |
| 200 #define CALL_USED_REGISTERS \ | |
|
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201 { 1, 1, 0, 0, /* data regs */ \ |
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202 1, 1, 0, 0, /* addr regs */ \ |
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203 1, /* arg reg */ \ |
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204 1, /* sp reg */ \ |
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205 1, 1, 1, 1, 0, 0, 0, 0, /* extended regs */ \ |
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206 1, 1, /* fp regs (18-19) */ \ |
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207 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, /* fp regs (20-29) */ \ |
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208 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, /* fp regs (30-39) */ \ |
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209 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* fp regs (40-49) */ \ |
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210 1, /* mdr reg */ \ |
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211 1 /* cc reg */ \ |
| 0 | 212 } |
| 213 | |
| 214 /* Note: The definition of CALL_REALLY_USED_REGISTERS is not | |
| 215 redundant. It is needed when compiling in PIC mode because | |
| 216 the a2 register becomes fixed (and hence must be marked as | |
| 217 call_used) but in order to preserve the ABI it is not marked | |
| 218 as call_really_used. */ | |
| 219 #define CALL_REALLY_USED_REGISTERS CALL_USED_REGISTERS | |
| 220 | |
| 221 #define REG_ALLOC_ORDER \ | |
| 222 { 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9 \ | |
| 223 , 42, 43, 44, 45, 46, 47, 48, 49, 34, 35, 36, 37, 38, 39, 40, 41 \ | |
|
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224 , 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 50, 51 \ |
| 0 | 225 } |
| 226 | |
| 227 /* 4 data, and effectively 3 address registers is small as far as I'm | |
| 228 concerned. */ | |
|
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229 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
| 0 | 230 |
| 231 /* Define the classes of registers for register constraints in the | |
| 232 machine description. Also define ranges of constants. | |
| 233 | |
| 234 One of the classes must always be named ALL_REGS and include all hard regs. | |
| 235 If there is more than one class, another class must be named NO_REGS | |
| 236 and contain no registers. | |
| 237 | |
| 238 The name GENERAL_REGS must be the name of a class (or an alias for | |
| 239 another name such as ALL_REGS). This is the class of registers | |
| 240 that is allowed by "g" or "r" in a register constraint. | |
| 241 Also, registers outside this class are allocated only when | |
| 242 instructions express preferences for them. | |
| 243 | |
| 244 The classes must be numbered in nondecreasing order; that is, | |
| 245 a larger-numbered class must never be contained completely | |
| 246 in a smaller-numbered class. | |
| 247 | |
| 248 For any two classes, it is very desirable that there be another | |
| 249 class that represents their union. */ | |
| 250 | |
|
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251 enum reg_class |
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252 { |
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253 NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS, SP_OR_ADDRESS_REGS, |
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254 EXTENDED_REGS, FP_REGS, FP_ACC_REGS, CC_REGS, MDR_REGS, |
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255 GENERAL_REGS, SP_OR_GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES |
| 0 | 256 }; |
| 257 | |
| 258 #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
| 259 | |
| 260 /* Give names of register classes as strings for dump file. */ | |
| 261 | |
|
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262 #define REG_CLASS_NAMES \ |
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263 { "NO_REGS", "DATA_REGS", "ADDRESS_REGS", "SP_REGS", "SP_OR_ADDRESS_REGS", \ |
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264 "EXTENDED_REGS", "FP_REGS", "FP_ACC_REGS", "CC_REGS", "MDR_REGS", \ |
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265 "GENERAL_REGS", "SP_OR_GENERAL_REGS", "ALL_REGS", "LIM_REGS" \ |
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266 } |
| 0 | 267 |
| 268 /* Define which registers fit in which classes. | |
| 269 This is an initializer for a vector of HARD_REG_SET | |
| 270 of length N_REG_CLASSES. */ | |
| 271 | |
|
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272 #define REG_CLASS_CONTENTS \ |
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273 { { 0, 0 }, /* No regs */ \ |
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274 { 0x0000000f, 0 }, /* DATA_REGS */ \ |
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275 { 0x000001f0, 0 }, /* ADDRESS_REGS */ \ |
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276 { 0x00000200, 0 }, /* SP_REGS */ \ |
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277 { 0x000003f0, 0 }, /* SP_OR_ADDRESS_REGS */ \ |
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278 { 0x0003fc00, 0 }, /* EXTENDED_REGS */ \ |
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279 { 0xfffc0000, 0x3ffff },/* FP_REGS */ \ |
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280 { 0x03fc0000, 0 }, /* FP_ACC_REGS */ \ |
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281 { 0x00000000, 0x80000 },/* CC_REGS */ \ |
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282 { 0x00000000, 0x40000 },/* MDR_REGS */ \ |
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283 { 0x0003fdff, 0 }, /* GENERAL_REGS */ \ |
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284 { 0x0003ffff, 0 }, /* SP_OR_GENERAL_REGS */ \ |
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285 { 0xffffffff, 0xfffff } /* ALL_REGS */ \ |
| 0 | 286 } |
| 287 | |
| 288 /* The same information, inverted: | |
| 289 Return the class number of the smallest class containing | |
| 290 reg number REGNO. This could be a conditional expression | |
| 291 or could index an array. */ | |
| 292 | |
|
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293 #define REGNO_REG_CLASS(REGNO) \ |
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294 ((REGNO) <= LAST_DATA_REGNUM ? DATA_REGS : \ |
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295 (REGNO) <= LAST_ADDRESS_REGNUM ? ADDRESS_REGS : \ |
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296 (REGNO) == STACK_POINTER_REGNUM ? SP_REGS : \ |
| 0 | 297 (REGNO) <= LAST_EXTENDED_REGNUM ? EXTENDED_REGS : \ |
|
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298 (REGNO) <= LAST_FP_REGNUM ? FP_REGS : \ |
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299 (REGNO) == MDR_REG ? MDR_REGS : \ |
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300 (REGNO) == CC_REG ? CC_REGS : \ |
| 0 | 301 NO_REGS) |
| 302 | |
| 303 /* The class value for index registers, and the one for base regs. */ | |
|
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304 #define INDEX_REG_CLASS \ |
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305 (TARGET_AM33 ? GENERAL_REGS : DATA_REGS) |
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306 #define BASE_REG_CLASS \ |
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307 (TARGET_AM33 ? SP_OR_GENERAL_REGS : SP_OR_ADDRESS_REGS) |
| 0 | 308 |
| 309 /* Macros to check register numbers against specific register classes. */ | |
| 310 | |
| 311 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
| 312 and check its validity for a certain class. | |
| 313 We have two alternate definitions for each of them. | |
| 314 The usual definition accepts all pseudo regs; the other rejects | |
| 315 them unless they have been allocated suitable hard regs. | |
| 316 The symbol REG_OK_STRICT causes the latter definition to be used. | |
| 317 | |
| 318 Most source files want to accept pseudo regs in the hope that | |
| 319 they will get allocated to the class that the insn wants them to be in. | |
| 320 Source files for reload pass need to be strict. | |
| 321 After reload, it makes no difference, since pseudo regs have | |
| 322 been eliminated by then. */ | |
| 323 | |
| 324 /* These assume that REGNO is a hard or pseudo reg number. | |
| 325 They give nonzero only if REGNO is a hard reg of the suitable class | |
| 326 or a pseudo reg currently allocated to a suitable hard reg. | |
| 327 Since they use reg_renumber, they are safe only once reg_renumber | |
| 111 | 328 has been allocated, which happens in reginfo.c during register |
| 329 allocation. */ | |
| 0 | 330 |
| 331 #ifndef REG_OK_STRICT | |
| 332 # define REG_STRICT 0 | |
| 333 #else | |
| 334 # define REG_STRICT 1 | |
| 335 #endif | |
| 336 | |
| 337 #define REGNO_DATA_P(regno, strict) \ | |
|
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338 mn10300_regno_in_class_p (regno, DATA_REGS, strict) |
| 0 | 339 #define REGNO_ADDRESS_P(regno, strict) \ |
|
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340 mn10300_regno_in_class_p (regno, ADDRESS_REGS, strict) |
| 0 | 341 #define REGNO_EXTENDED_P(regno, strict) \ |
|
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342 mn10300_regno_in_class_p (regno, EXTENDED_REGS, strict) |
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343 #define REGNO_GENERAL_P(regno, strict) \ |
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344 mn10300_regno_in_class_p (regno, GENERAL_REGS, strict) |
| 0 | 345 |
| 346 #define REGNO_STRICT_OK_FOR_BASE_P(regno, strict) \ | |
|
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347 mn10300_regno_in_class_p (regno, BASE_REG_CLASS, strict) |
| 0 | 348 #define REGNO_OK_FOR_BASE_P(regno) \ |
| 349 (REGNO_STRICT_OK_FOR_BASE_P ((regno), REG_STRICT)) | |
| 350 #define REG_OK_FOR_BASE_P(X) \ | |
| 351 (REGNO_OK_FOR_BASE_P (REGNO (X))) | |
| 352 | |
| 353 #define REGNO_STRICT_OK_FOR_BIT_BASE_P(regno, strict) \ | |
|
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354 mn10300_regno_in_class_p (regno, ADDRESS_REGS, strict) |
| 0 | 355 #define REGNO_OK_FOR_BIT_BASE_P(regno) \ |
| 356 (REGNO_STRICT_OK_FOR_BIT_BASE_P ((regno), REG_STRICT)) | |
| 357 #define REG_OK_FOR_BIT_BASE_P(X) \ | |
| 358 (REGNO_OK_FOR_BIT_BASE_P (REGNO (X))) | |
| 359 | |
| 360 #define REGNO_STRICT_OK_FOR_INDEX_P(regno, strict) \ | |
|
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361 mn10300_regno_in_class_p (regno, INDEX_REG_CLASS, strict) |
| 0 | 362 #define REGNO_OK_FOR_INDEX_P(regno) \ |
| 363 (REGNO_STRICT_OK_FOR_INDEX_P ((regno), REG_STRICT)) | |
| 364 #define REG_OK_FOR_INDEX_P(X) \ | |
| 365 (REGNO_OK_FOR_INDEX_P (REGNO (X))) | |
| 366 | |
| 367 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \ | |
| 368 (!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS) | |
| 369 | |
| 370 /* A class that contains registers which the compiler must always | |
| 371 access in a mode that is the same size as the mode in which it | |
| 372 loaded the register. */ | |
| 373 #define CLASS_CANNOT_CHANGE_SIZE FP_REGS | |
| 374 | |
| 375 /* Return 1 if VALUE is in the range specified. */ | |
| 376 | |
| 377 #define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100) | |
| 378 #define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000) | |
| 379 | |
| 380 | |
| 381 /* Stack layout; function entry, exit and calling. */ | |
| 382 | |
| 383 /* Define this if pushing a word on the stack | |
| 384 makes the stack pointer a smaller address. */ | |
| 385 | |
| 111 | 386 #define STACK_GROWS_DOWNWARD 1 |
| 0 | 387 |
| 388 /* Define this to nonzero if the nominal address of the stack frame | |
| 389 is at the high-address end of the local variables; | |
| 390 that is, each additional local variable allocated | |
| 391 goes at a more negative offset in the frame. */ | |
| 392 | |
| 393 #define FRAME_GROWS_DOWNWARD 1 | |
| 394 | |
| 395 /* Offset of first parameter from the argument pointer register value. */ | |
| 396 /* Is equal to the size of the saved fp + pc, even if an fp isn't | |
| 397 saved since the value is used before we know. */ | |
| 398 | |
| 399 #define FIRST_PARM_OFFSET(FNDECL) 4 | |
| 400 | |
|
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401 /* But the CFA is at the arg pointer directly, not at the first argument. */ |
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402 #define ARG_POINTER_CFA_OFFSET(FNDECL) 0 |
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403 |
| 0 | 404 #define ELIMINABLE_REGS \ |
| 405 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
| 406 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
| 407 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} | |
| 408 | |
| 409 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
|
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410 OFFSET = mn10300_initial_offset (FROM, TO) |
| 0 | 411 |
| 412 /* We use d0/d1 for passing parameters, so allocate 8 bytes of space | |
| 413 for a register flushback area. */ | |
| 414 #define REG_PARM_STACK_SPACE(DECL) 8 | |
| 415 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 | |
| 416 #define ACCUMULATE_OUTGOING_ARGS 1 | |
| 417 | |
| 418 /* So we can allocate space for return pointers once for the function | |
| 419 instead of around every call. */ | |
| 420 #define STACK_POINTER_OFFSET 4 | |
| 421 | |
| 422 /* 1 if N is a possible register number for function argument passing. | |
|
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423 On the MN10300, d0 and d1 are used in this way. */ |
| 0 | 424 |
| 425 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 1) | |
| 426 | |
| 427 | |
| 428 /* Define a data type for recording info about an argument list | |
| 429 during the scan of that argument list. This data type should | |
| 430 hold all necessary information about the function itself | |
| 431 and about the args processed so far, enough to enable macros | |
| 432 such as FUNCTION_ARG to determine where the next arg should go. | |
| 433 | |
| 434 On the MN10300, this is a single integer, which is a number of bytes | |
| 435 of arguments scanned so far. */ | |
| 436 | |
| 437 #define CUMULATIVE_ARGS struct cum_arg | |
|
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438 |
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439 struct cum_arg |
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440 { |
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441 int nbytes; |
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442 }; |
| 0 | 443 |
| 444 /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
| 445 for a call to a function whose data type is FNTYPE. | |
| 446 For a library call, FNTYPE is 0. | |
| 447 | |
| 448 On the MN10300, the offset starts at 0. */ | |
| 449 | |
| 450 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ | |
| 451 ((CUM).nbytes = 0) | |
| 452 | |
|
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453 #define FUNCTION_VALUE_REGNO_P(N) mn10300_function_value_regno_p (N) |
| 0 | 454 |
| 455 #define DEFAULT_PCC_STRUCT_RETURN 0 | |
| 456 | |
| 457 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
| 458 the stack pointer does not matter. The value is tested only in | |
| 459 functions that have frame pointers. | |
| 460 No definition is equivalent to always zero. */ | |
| 461 | |
| 462 #define EXIT_IGNORE_STACK 1 | |
| 463 | |
| 464 /* Output assembler code to FILE to increment profiler label # LABELNO | |
| 465 for profiling a function entry. */ | |
| 466 | |
| 467 #define FUNCTION_PROFILER(FILE, LABELNO) ; | |
| 468 | |
| 469 /* Length in units of the trampoline for entering a nested function. */ | |
| 470 | |
|
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471 #define TRAMPOLINE_SIZE 16 |
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472 #define TRAMPOLINE_ALIGNMENT 32 |
| 0 | 473 |
| 474 /* A C expression whose value is RTL representing the value of the return | |
| 475 address for the frame COUNT steps up from the current frame. | |
| 476 | |
| 477 On the mn10300, the return address is not at a constant location | |
| 478 due to the frame layout. Luckily, it is at a constant offset from | |
| 479 the argument pointer, so we define RETURN_ADDR_RTX to return a | |
| 480 MEM using arg_pointer_rtx. Reload will replace arg_pointer_rtx | |
| 481 with a reference to the stack/frame pointer + an appropriate offset. */ | |
| 482 | |
| 483 #define RETURN_ADDR_RTX(COUNT, FRAME) \ | |
| 484 ((COUNT == 0) \ | |
| 485 ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \ | |
| 486 : (rtx) 0) | |
|
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487 |
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488 /* The return address is saved both in the stack and in MDR. Using |
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489 the stack location is handiest for what unwinding needs. */ |
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490 #define INCOMING_RETURN_ADDR_RTX \ |
| 111 | 491 gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, STACK_POINTER_REGNUM)) |
| 0 | 492 |
| 493 /* Maximum number of registers that can appear in a valid memory address. */ | |
| 494 | |
| 495 #define MAX_REGS_PER_ADDRESS 2 | |
| 496 | |
| 497 | |
|
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498 /* We have post-increments. */ |
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499 #define HAVE_POST_INCREMENT TARGET_AM33 |
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500 #define HAVE_POST_MODIFY_DISP TARGET_AM33 |
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501 |
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502 /* ... But we don't want to use them for block moves. Small offsets are |
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503 just as effective, at least for inline block move sizes, and appears |
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504 to produce cleaner code. */ |
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505 #define USE_LOAD_POST_INCREMENT(M) 0 |
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506 #define USE_STORE_POST_INCREMENT(M) 0 |
| 0 | 507 |
| 508 /* Accept either REG or SUBREG where a register is valid. */ | |
| 509 | |
| 510 #define RTX_OK_FOR_BASE_P(X, strict) \ | |
| 511 ((REG_P (X) && REGNO_STRICT_OK_FOR_BASE_P (REGNO (X), \ | |
| 512 (strict))) \ | |
| 513 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \ | |
| 514 && REGNO_STRICT_OK_FOR_BASE_P (REGNO (SUBREG_REG (X)), \ | |
| 515 (strict)))) | |
| 516 | |
|
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517 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \ |
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518 do { \ |
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519 rtx new_x = mn10300_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \ |
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520 if (new_x) \ |
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521 { \ |
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522 X = new_x; \ |
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523 goto WIN; \ |
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524 } \ |
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525 } while (0) |
| 0 | 526 |
| 527 | |
| 528 /* Zero if this needs fixing up to become PIC. */ | |
| 529 | |
|
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530 #define LEGITIMATE_PIC_OPERAND_P(X) \ |
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531 mn10300_legitimate_pic_operand_p (X) |
| 0 | 532 |
| 533 /* Register to hold the addressing base for | |
| 534 position independent code access to data items. */ | |
| 535 #define PIC_OFFSET_TABLE_REGNUM PIC_REG | |
| 536 | |
| 537 /* The name of the pseudo-symbol representing the Global Offset Table. */ | |
| 538 #define GOT_SYMBOL_NAME "*_GLOBAL_OFFSET_TABLE_" | |
| 539 | |
| 540 #define SYMBOLIC_CONST_P(X) \ | |
| 541 ((GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF) \ | |
| 542 && ! LEGITIMATE_PIC_OPERAND_P (X)) | |
| 543 | |
| 544 /* Non-global SYMBOL_REFs have SYMBOL_REF_FLAG enabled. */ | |
| 545 #define MN10300_GLOBAL_P(X) (! SYMBOL_REF_FLAG (X)) | |
| 546 | |
|
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547 #define SELECT_CC_MODE(OP, X, Y) mn10300_select_cc_mode (OP, X, Y) |
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548 #define REVERSIBLE_CC_MODE(MODE) 0 |
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549 |
| 0 | 550 /* Nonzero if access to memory by bytes or half words is no faster |
| 551 than accessing full words. */ | |
| 552 #define SLOW_BYTE_ACCESS 1 | |
| 553 | |
| 111 | 554 #define NO_FUNCTION_CSE 1 |
| 0 | 555 |
| 556 /* According expr.c, a value of around 6 should minimize code size, and | |
| 557 for the MN10300 series, that's our primary concern. */ | |
| 558 #define MOVE_RATIO(speed) 6 | |
| 559 | |
| 560 #define TEXT_SECTION_ASM_OP "\t.section .text" | |
| 561 #define DATA_SECTION_ASM_OP "\t.section .data" | |
|
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562 #define BSS_SECTION_ASM_OP "\t.section .bss" |
| 0 | 563 |
| 564 #define ASM_COMMENT_START "#" | |
| 565 | |
| 566 /* Output to assembler file text saying following lines | |
| 567 may contain character constants, extra white space, comments, etc. */ | |
| 568 | |
| 569 #define ASM_APP_ON "#APP\n" | |
| 570 | |
| 571 /* Output to assembler file text saying following lines | |
| 572 no longer contain unusual constructs. */ | |
| 573 | |
| 574 #define ASM_APP_OFF "#NO_APP\n" | |
| 575 | |
|
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576 #undef USER_LABEL_PREFIX |
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577 #define USER_LABEL_PREFIX "_" |
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578 |
| 0 | 579 /* This says how to output the assembler to define a global |
| 580 uninitialized but not common symbol. | |
| 581 Try to use asm_output_bss to implement this macro. */ | |
| 582 | |
| 583 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ | |
| 584 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN)) | |
| 585 | |
| 586 /* Globalizing directive for a label. */ | |
| 587 #define GLOBAL_ASM_OP "\t.global " | |
| 588 | |
| 589 /* This is how to output a reference to a user-level label named NAME. | |
| 590 `assemble_name' uses this. */ | |
| 591 | |
|
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592 #undef ASM_OUTPUT_LABELREF |
| 0 | 593 #define ASM_OUTPUT_LABELREF(FILE, NAME) \ |
|
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594 asm_fprintf (FILE, "%U%s", (*targetm.strip_name_encoding) (NAME)) |
| 0 | 595 |
| 596 /* This is how we tell the assembler that two symbols have the same value. */ | |
| 597 | |
| 598 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \ | |
|
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599 do \ |
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600 { \ |
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601 assemble_name (FILE, NAME1); \ |
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602 fputs (" = ", FILE); \ |
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603 assemble_name (FILE, NAME2); \ |
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604 fputc ('\n', FILE); \ |
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605 } \ |
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606 while (0) |
| 0 | 607 |
| 608 /* How to refer to registers in assembler output. | |
| 609 This sequence is indexed by compiler's hard-register-number (see above). */ | |
| 610 | |
|
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611 #define REGISTER_NAMES \ |
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612 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp", \ |
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613 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7" \ |
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614 , "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7" \ |
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615 , "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15" \ |
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616 , "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23" \ |
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617 , "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" \ |
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618 , "mdr", "EPSW" \ |
| 0 | 619 } |
| 620 | |
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621 #define ADDITIONAL_REGISTER_NAMES \ |
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622 { {"r8", 4}, {"r9", 5}, {"r10", 6}, {"r11", 7}, \ |
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623 {"r12", 0}, {"r13", 1}, {"r14", 2}, {"r15", 3}, \ |
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624 {"e0", 10}, {"e1", 11}, {"e2", 12}, {"e3", 13}, \ |
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625 {"e4", 14}, {"e5", 15}, {"e6", 16}, {"e7", 17} \ |
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626 , {"fd0", 18}, {"fd2", 20}, {"fd4", 22}, {"fd6", 24} \ |
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627 , {"fd8", 26}, {"fd10", 28}, {"fd12", 30}, {"fd14", 32} \ |
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628 , {"fd16", 34}, {"fd18", 36}, {"fd20", 38}, {"fd22", 40} \ |
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629 , {"fd24", 42}, {"fd26", 44}, {"fd28", 46}, {"fd30", 48} \ |
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630 , {"cc", CC_REG} \ |
| 0 | 631 } |
| 632 | |
| 633 /* Print an instruction operand X on file FILE. | |
| 634 look in mn10300.c for details */ | |
| 635 | |
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636 #define PRINT_OPERAND(FILE, X, CODE) \ |
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637 mn10300_print_operand (FILE, X, CODE) |
| 0 | 638 |
| 639 /* Print a memory operand whose address is X, on file FILE. | |
| 640 This uses a function in output-vax.c. */ | |
| 641 | |
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642 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ |
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643 mn10300_print_operand_address (FILE, ADDR) |
| 0 | 644 |
| 645 /* This is how to output an element of a case-vector that is absolute. */ | |
| 646 | |
| 647 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
| 648 fprintf (FILE, "\t%s .L%d\n", ".long", VALUE) | |
| 649 | |
| 650 /* This is how to output an element of a case-vector that is relative. */ | |
| 651 | |
| 652 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ | |
| 653 fprintf (FILE, "\t%s .L%d-.L%d\n", ".long", VALUE, REL) | |
| 654 | |
| 655 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
| 656 if ((LOG) != 0) \ | |
| 657 fprintf (FILE, "\t.align %d\n", (LOG)) | |
| 658 | |
| 659 /* We don't have to worry about dbx compatibility for the mn10300. */ | |
| 660 #define DEFAULT_GDB_EXTENSIONS 1 | |
| 661 | |
| 662 /* Use dwarf2 debugging info by default. */ | |
|
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663 #undef PREFERRED_DEBUGGING_TYPE |
| 0 | 664 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG |
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665 #define DWARF2_DEBUGGING_INFO 1 |
| 0 | 666 #define DWARF2_ASM_LINE_DEBUG_INFO 1 |
| 667 | |
| 668 /* Specify the machine mode that this machine uses | |
| 669 for the index in the tablejump instruction. */ | |
| 670 #define CASE_VECTOR_MODE Pmode | |
| 671 | |
| 672 /* Define if operations between registers always perform the operation | |
| 673 on the full register even if a narrower mode is specified. */ | |
| 111 | 674 #define WORD_REGISTER_OPERATIONS 1 |
| 0 | 675 |
| 676 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
| 677 | |
| 678 /* Max number of bytes we can move from memory to memory | |
| 679 in one reasonably fast instruction. */ | |
| 680 #define MOVE_MAX 4 | |
| 681 | |
| 682 /* Define if shifts truncate the shift count | |
| 683 which implies one can omit a sign-extension or zero-extension | |
| 684 of a shift count. */ | |
| 685 #define SHIFT_COUNT_TRUNCATED 1 | |
| 686 | |
| 687 /* Specify the machine mode that pointers have. | |
| 688 After generation of rtl, the compiler makes no further distinction | |
| 689 between pointers and any other objects of this machine mode. */ | |
| 690 #define Pmode SImode | |
| 691 | |
| 692 /* A function address in a call instruction | |
| 693 is a byte address (for indexing purposes) | |
| 694 so give the MEM rtx a byte's mode. */ | |
| 695 #define FUNCTION_MODE QImode | |
| 696 | |
| 697 /* The assembler op to get a word. */ | |
| 698 | |
| 699 #define FILE_ASM_OP "\t.file\n" | |
| 700 |