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annotate gcc/config/nds32/nds32-graywolf.md @ 131:84e7813d76e9

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gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents
children 1830386684a0
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131
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1 ;; Pipeline descriptions of Andes NDS32 cpu for GNU compiler
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2 ;; Copyright (C) 2012-2013 Free Software Foundation, Inc.
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3 ;; Contributed by Andes Technology Corporation.
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4 ;;
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5 ;; This file is part of GCC.
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6 ;;
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7 ;; GCC is free software; you can redistribute it and/or modify it
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8 ;; under the terms of the GNU General Public License as published
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9 ;; by the Free Software Foundation; either version 3, or (at your
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10 ;; option) any later version.
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11 ;;
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12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 ;; License for more details.
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16 ;;
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17 ;; You should have received a copy of the GNU General Public License
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18 ;; along with GCC; see the file COPYING3. If not see
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19 ;; <http://www.gnu.org/licenses/>.
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20
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21 ;; ------------------------------------------------------------------------
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22 ;; Define Graywolf pipeline settings.
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23 ;; ------------------------------------------------------------------------
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24
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25 (define_automaton "nds32_graywolf_machine")
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26
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27 (define_cpu_unit "gw_ii_0" "nds32_graywolf_machine")
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28 (define_cpu_unit "gw_ii_1" "nds32_graywolf_machine")
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29 (define_cpu_unit "gw_ex_p0" "nds32_graywolf_machine")
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30 (define_cpu_unit "gw_mm_p0" "nds32_graywolf_machine")
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31 (define_cpu_unit "gw_wb_p0" "nds32_graywolf_machine")
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32 (define_cpu_unit "gw_ex_p1" "nds32_graywolf_machine")
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33 (define_cpu_unit "gw_mm_p1" "nds32_graywolf_machine")
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34 (define_cpu_unit "gw_wb_p1" "nds32_graywolf_machine")
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35 (define_cpu_unit "gw_iq_p2" "nds32_graywolf_machine")
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36 (define_cpu_unit "gw_rf_p2" "nds32_graywolf_machine")
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37 (define_cpu_unit "gw_e1_p2" "nds32_graywolf_machine")
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38 (define_cpu_unit "gw_e2_p2" "nds32_graywolf_machine")
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39 (define_cpu_unit "gw_e3_p2" "nds32_graywolf_machine")
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40 (define_cpu_unit "gw_e4_p2" "nds32_graywolf_machine")
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41
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42 (define_reservation "gw_ii" "gw_ii_0 | gw_ii_1")
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43 (define_reservation "gw_ex" "gw_ex_p0 | gw_ex_p1")
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44 (define_reservation "gw_mm" "gw_mm_p0 | gw_mm_p1")
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45 (define_reservation "gw_wb" "gw_wb_p0 | gw_wb_p1")
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46
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47 (define_reservation "gw_ii_all" "gw_ii_0 + gw_ii_1")
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48
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49 (define_insn_reservation "nds_gw_unknown" 1
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50 (and (eq_attr "type" "unknown")
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51 (eq_attr "pipeline_model" "graywolf"))
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52 "gw_ii, gw_ex, gw_mm, gw_wb")
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53
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54 (define_insn_reservation "nds_gw_misc" 1
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55 (and (eq_attr "type" "misc")
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56 (eq_attr "pipeline_model" "graywolf"))
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57 "gw_ii, gw_ex, gw_mm, gw_wb")
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58
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59 (define_insn_reservation "nds_gw_mmu" 1
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60 (and (eq_attr "type" "mmu")
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61 (eq_attr "pipeline_model" "graywolf"))
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62 "gw_ii, gw_ex, gw_mm, gw_wb")
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63
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64 (define_insn_reservation "nds_gw_alu" 1
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65 (and (and (eq_attr "type" "alu")
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66 (match_test "!nds32::movd44_insn_p (insn)"))
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67 (eq_attr "pipeline_model" "graywolf"))
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68 "gw_ii, gw_ex, gw_mm, gw_wb")
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69
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70 (define_insn_reservation "nds_gw_movd44" 1
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71 (and (and (eq_attr "type" "alu")
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72 (match_test "nds32::movd44_insn_p (insn)"))
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73 (eq_attr "pipeline_model" "graywolf"))
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74 "gw_ii_1, gw_ex, gw_mm, gw_wb")
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75
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76 (define_insn_reservation "nds_gw_alu_shift" 1
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77 (and (eq_attr "type" "alu_shift")
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78 (eq_attr "pipeline_model" "graywolf"))
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79 "gw_ii, gw_ex*2, gw_mm, gw_wb")
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80
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81 (define_insn_reservation "nds_gw_pbsad" 1
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82 (and (eq_attr "type" "pbsad")
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83 (eq_attr "pipeline_model" "graywolf"))
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84 "gw_ii, gw_ex*3, gw_mm, gw_wb")
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85
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86 (define_insn_reservation "nds_gw_pbsada" 1
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87 (and (eq_attr "type" "pbsada")
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88 (eq_attr "pipeline_model" "graywolf"))
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89 "gw_ii, gw_ex*3, gw_mm, gw_wb")
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90
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91 (define_insn_reservation "nds_gw_load" 1
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92 (and (and (eq_attr "type" "load")
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93 (match_test "!nds32::post_update_insn_p (insn)"))
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94 (eq_attr "pipeline_model" "graywolf"))
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95 "gw_ii_1, gw_ex_p1, gw_mm_p1, gw_wb_p1")
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96
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97 (define_insn_reservation "nds_gw_load_2w" 1
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98 (and (and (eq_attr "type" "load")
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99 (match_test "nds32::post_update_insn_p (insn)"))
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100 (eq_attr "pipeline_model" "graywolf"))
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101 "gw_ii_all, gw_ex_p1, gw_mm_p1, gw_wb_p1")
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102
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103 (define_insn_reservation "nds_gw_store" 1
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104 (and (and (eq_attr "type" "store")
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105 (match_test "!nds32::store_offset_reg_p (insn)"))
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106 (eq_attr "pipeline_model" "graywolf"))
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107 "gw_ii_1, gw_ex_p1, gw_mm_p1, gw_wb_p1")
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108
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109 (define_insn_reservation "nds_gw_store_3r" 1
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110 (and (and (eq_attr "type" "store")
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111 (match_test "nds32::store_offset_reg_p (insn)"))
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112 (eq_attr "pipeline_model" "graywolf"))
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113 "gw_ii_all, gw_ex_p1, gw_mm_p1, gw_wb_p1")
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114
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115 (define_insn_reservation "nds_gw_load_multiple_1" 1
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116 (and (and (eq_attr "type" "load_multiple")
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117 (eq_attr "combo" "1"))
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118 (eq_attr "pipeline_model" "graywolf"))
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119 "gw_ii_1, gw_ex_p1, gw_mm_p1, gw_wb_p1")
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120
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121 (define_insn_reservation "nds_gw_load_multiple_2" 1
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122 (and (and (eq_attr "type" "load_multiple")
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123 (eq_attr "combo" "2"))
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124 (eq_attr "pipeline_model" "graywolf"))
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125 "gw_ii_1, gw_ex_p1*2, gw_mm_p1, gw_wb_p1")
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126
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127 (define_insn_reservation "nds_gw_load_multiple_3" 1
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128 (and (and (eq_attr "type" "load_multiple")
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129 (eq_attr "combo" "3"))
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130 (eq_attr "pipeline_model" "graywolf"))
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131 "gw_ii_1, gw_ex_p1*3, gw_mm_p1, gw_wb_p1")
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132
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133 (define_insn_reservation "nds_gw_load_multiple_4" 1
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134 (and (and (eq_attr "type" "load_multiple")
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135 (eq_attr "combo" "4"))
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136 (eq_attr "pipeline_model" "graywolf"))
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137 "gw_ii_1, gw_ex_p1*4, gw_mm_p1, gw_wb_p1")
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138
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139 (define_insn_reservation "nds_gw_load_multiple_5" 1
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140 (and (and (eq_attr "type" "load_multiple")
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141 (eq_attr "combo" "5"))
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142 (eq_attr "pipeline_model" "graywolf"))
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143 "gw_ii_1, gw_ex_p1*4, gw_mm_p1, gw_wb_p1")
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144
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145 (define_insn_reservation "nds_gw_load_multiple_6" 1
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146 (and (and (eq_attr "type" "load_multiple")
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147 (eq_attr "combo" "6"))
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148 (eq_attr "pipeline_model" "graywolf"))
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149 "gw_ii_1, gw_ex_p1*4, gw_mm_p1, gw_wb_p1")
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150
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151 (define_insn_reservation "nds_gw_load_multiple_7" 1
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152 (and (and (eq_attr "type" "load_multiple")
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153 (eq_attr "combo" "7"))
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154 (eq_attr "pipeline_model" "graywolf"))
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155 "gw_ii_1, gw_ex_p1*4, gw_mm_p1, gw_wb_p1")
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156
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157 (define_insn_reservation "nds_gw_load_multiple_8" 1
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158 (and (and (eq_attr "type" "load_multiple")
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159 (eq_attr "combo" "8"))
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160 (eq_attr "pipeline_model" "graywolf"))
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161 "gw_ii_1, gw_ex_p1*4, gw_mm_p1, gw_wb_p1")
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162
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163 (define_insn_reservation "nds_gw_load_multiple_12" 1
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164 (and (and (eq_attr "type" "load_multiple")
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165 (eq_attr "combo" "12"))
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166 (eq_attr "pipeline_model" "graywolf"))
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167 "gw_ii_1, gw_ex_p1*4, gw_mm_p1, gw_wb_p1")
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168
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169 (define_insn_reservation "nds_gw_store_multiple_1" 1
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170 (and (and (eq_attr "type" "store_multiple")
84e7813d76e9 gcc-8.2
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parents:
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171 (eq_attr "combo" "1"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
172 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
173 "gw_ii_1, gw_ex_p1, gw_mm_p1, gw_wb_p1")
84e7813d76e9 gcc-8.2
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174
84e7813d76e9 gcc-8.2
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parents:
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175 (define_insn_reservation "nds_gw_store_multiple_2" 1
84e7813d76e9 gcc-8.2
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parents:
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176 (and (and (eq_attr "type" "store_multiple")
84e7813d76e9 gcc-8.2
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parents:
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177 (eq_attr "combo" "2"))
84e7813d76e9 gcc-8.2
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178 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
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179 "gw_ii_1, gw_ex_p1*2, gw_mm_p1, gw_wb_p1")
84e7813d76e9 gcc-8.2
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180
84e7813d76e9 gcc-8.2
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181 (define_insn_reservation "nds_gw_store_multiple_3" 1
84e7813d76e9 gcc-8.2
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182 (and (and (eq_attr "type" "store_multiple")
84e7813d76e9 gcc-8.2
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parents:
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183 (eq_attr "combo" "3"))
84e7813d76e9 gcc-8.2
mir3636
parents:
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184 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
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parents:
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185 "gw_ii_1, gw_ex_p1*3, gw_mm_p1, gw_wb_p1")
84e7813d76e9 gcc-8.2
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186
84e7813d76e9 gcc-8.2
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187 (define_insn_reservation "nds_gw_store_multiple_4" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
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188 (and (and (eq_attr "type" "store_multiple")
84e7813d76e9 gcc-8.2
mir3636
parents:
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189 (eq_attr "combo" "4"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
190 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
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191 "gw_ii_1, gw_ex_p1*4, gw_mm_p1, gw_wb_p1")
84e7813d76e9 gcc-8.2
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192
84e7813d76e9 gcc-8.2
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193 (define_insn_reservation "nds_gw_store_multiple_5" 1
84e7813d76e9 gcc-8.2
mir3636
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194 (and (and (eq_attr "type" "store_multiple")
84e7813d76e9 gcc-8.2
mir3636
parents:
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195 (eq_attr "combo" "5"))
84e7813d76e9 gcc-8.2
mir3636
parents:
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196 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
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197 "gw_ii_1, gw_ex_p1*4, gw_mm_p1, gw_wb_p1")
84e7813d76e9 gcc-8.2
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198
84e7813d76e9 gcc-8.2
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parents:
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199 (define_insn_reservation "nds_gw_store_multiple_6" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
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200 (and (and (eq_attr "type" "store_multiple")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
201 (eq_attr "combo" "6"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
202 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
203 "gw_ii_1, gw_ex_p1*4, gw_mm_p1, gw_wb_p1")
84e7813d76e9 gcc-8.2
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204
84e7813d76e9 gcc-8.2
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parents:
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205 (define_insn_reservation "nds_gw_store_multiple_7" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
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206 (and (and (eq_attr "type" "store_multiple")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
207 (eq_attr "combo" "7"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
208 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
209 "gw_ii_1, gw_ex_p1*4, gw_mm_p1, gw_wb_p1")
84e7813d76e9 gcc-8.2
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210
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
211 (define_insn_reservation "nds_gw_store_multiple_8" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
212 (and (and (eq_attr "type" "store_multiple")
84e7813d76e9 gcc-8.2
mir3636
parents:
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213 (eq_attr "combo" "8"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
214 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
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215 "gw_ii_1, gw_ex_p1*4, gw_mm_p1, gw_wb_p1")
84e7813d76e9 gcc-8.2
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216
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
217 (define_insn_reservation "nds_gw_store_multiple_12" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
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218 (and (and (eq_attr "type" "store_multiple")
84e7813d76e9 gcc-8.2
mir3636
parents:
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219 (eq_attr "combo" "12"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
220 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
221 "gw_ii_1, gw_ex_p1*4, gw_mm_p1, gw_wb_p1")
84e7813d76e9 gcc-8.2
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222
84e7813d76e9 gcc-8.2
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parents:
diff changeset
223 (define_insn_reservation "nds_gw_mul_fast1" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
224 (and (match_test "nds32_mul_config == MUL_TYPE_FAST_1")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
225 (and (eq_attr "type" "mul")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
226 (eq_attr "pipeline_model" "graywolf")))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
227 "gw_ii_0, gw_ex_p0, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
228
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
229 (define_insn_reservation "nds_gw_mul_fast2" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
230 (and (match_test "nds32_mul_config == MUL_TYPE_FAST_2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
231 (and (eq_attr "type" "mul")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
232 (eq_attr "pipeline_model" "graywolf")))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
233 "gw_ii_0, gw_ex_p0*2, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
mir3636
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diff changeset
234
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
235 (define_insn_reservation "nds_gw_mul_slow" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
236 (and (match_test "nds32_mul_config == MUL_TYPE_SLOW")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
237 (and (eq_attr "type" "mul")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
238 (eq_attr "pipeline_model" "graywolf")))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
239 "gw_ii_0, gw_ex_p0*4, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
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240
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
241 (define_insn_reservation "nds_gw_mac_fast1" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
242 (and (match_test "nds32_mul_config == MUL_TYPE_FAST_1")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
243 (and (eq_attr "type" "mac")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
244 (eq_attr "pipeline_model" "graywolf")))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
245 "gw_ii_all, gw_ex_p0, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
246
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
247 (define_insn_reservation "nds_gw_mac_fast2" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
248 (and (match_test "nds32_mul_config == MUL_TYPE_FAST_2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
249 (and (eq_attr "type" "mac")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
250 (eq_attr "pipeline_model" "graywolf")))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
251 "gw_ii_all, gw_ex_p0*2, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
252
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
253 (define_insn_reservation "nds_gw_mac_slow" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
254 (and (match_test "nds32_mul_config == MUL_TYPE_SLOW")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
255 (and (eq_attr "type" "mac")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
256 (eq_attr "pipeline_model" "graywolf")))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
257 "gw_ii_all, gw_ex_p0*4, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
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parents:
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258
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
259 (define_insn_reservation "nds_gw_div" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
260 (and (and (eq_attr "type" "div")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
261 (match_test "!nds32::divmod_p (insn)"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
262 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
263 "gw_ii_0, gw_ex_p0*4, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
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264
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
265 (define_insn_reservation "nds_gw_div_2w" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
266 (and (and (eq_attr "type" "div")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
267 (match_test "nds32::divmod_p (insn)"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
268 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
269 "gw_ii_all, gw_ex_p0*4, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
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270
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
271 (define_insn_reservation "nds_gw_branch" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
272 (and (eq_attr "type" "branch")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
273 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
274 "gw_ii_0, gw_ex_p0, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
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parents:
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275
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
276 (define_insn_reservation "nds_gw_dsp_alu" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
277 (and (eq_attr "type" "dalu")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
278 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
279 "gw_ii, gw_ex, gw_mm, gw_wb")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
280
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
281 (define_insn_reservation "nds_gw_dsp_alu64" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
282 (and (eq_attr "type" "dalu64")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
283 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
284 "gw_ii_all, gw_ex_p0, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
285
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
286 (define_insn_reservation "nds_gw_dsp_alu_round" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
287 (and (eq_attr "type" "daluround")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
288 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
289 "gw_ii_0, gw_ex_p0, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
290
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
291 (define_insn_reservation "nds_gw_dsp_cmp" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
292 (and (eq_attr "type" "dcmp")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
293 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
294 "gw_ii_0, gw_ex_p0, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
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parents:
diff changeset
295
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
296 (define_insn_reservation "nds_gw_dsp_clip" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
297 (and (eq_attr "type" "dclip")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
298 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
299 "gw_ii_0, gw_ex_p0, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
300
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
301 (define_insn_reservation "nds_gw_dsp_mul" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
302 (and (eq_attr "type" "dmul")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
303 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
304 "gw_ii_0, gw_ex_p0, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
305
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
306 (define_insn_reservation "nds_gw_dsp_mac" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
307 (and (eq_attr "type" "dmac")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
308 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
309 "gw_ii_all, gw_ex_p0, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
310
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
311 (define_insn_reservation "nds_gw_dsp_insb" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
312 (and (eq_attr "type" "dinsb")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
313 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
314 "gw_ii_0, gw_ex_p0, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
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parents:
diff changeset
315
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
316 (define_insn_reservation "nds_gw_dsp_pack" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
317 (and (eq_attr "type" "dpack")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
318 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
319 "gw_ii_0, gw_ex_p0, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
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parents:
diff changeset
320
84e7813d76e9 gcc-8.2
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parents:
diff changeset
321 (define_insn_reservation "nds_gw_dsp_bpick" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
322 (and (eq_attr "type" "dbpick")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
323 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
324 "gw_ii_0, gw_ex_p0, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
325
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
326 (define_insn_reservation "nds_gw_dsp_wext" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
327 (and (eq_attr "type" "dwext")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
328 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
329 "gw_ii_all, gw_ex_p0, gw_mm_p0, gw_wb_p0")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
330
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
331 (define_insn_reservation "nds_gw_fpu_alu" 4
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
332 (and (eq_attr "type" "falu")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
333 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
334 "gw_ii, gw_iq_p2, gw_rf_p2, gw_e1_p2, gw_e2_p2, gw_e3_p2, gw_e4_p2")
84e7813d76e9 gcc-8.2
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parents:
diff changeset
335
84e7813d76e9 gcc-8.2
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parents:
diff changeset
336 (define_insn_reservation "nds_gw_fpu_muls" 4
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
337 (and (eq_attr "type" "fmuls")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
338 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
339 "gw_ii, gw_iq_p2, gw_rf_p2, gw_e1_p2, gw_e2_p2, gw_e3_p2, gw_e4_p2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
340
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
341 (define_insn_reservation "nds_gw_fpu_muld" 4
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
342 (and (eq_attr "type" "fmuld")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
343 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
344 "gw_ii, gw_iq_p2, gw_rf_p2, gw_e1_p2, gw_e2_p2*2, gw_e3_p2, gw_e4_p2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
345
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
346 (define_insn_reservation "nds_gw_fpu_macs" 4
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
347 (and (eq_attr "type" "fmacs")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
348 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
349 "gw_ii, gw_iq_p2, gw_rf_p2, gw_e1_p2, gw_e2_p2*3, gw_e3_p2, gw_e4_p2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
350
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
351 (define_insn_reservation "nds_gw_fpu_macd" 4
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
352 (and (eq_attr "type" "fmacd")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
353 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
354 "gw_ii, gw_iq_p2, gw_rf_p2, gw_e1_p2, gw_e2_p2*4, gw_e3_p2, gw_e4_p2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
355
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
356 (define_insn_reservation "nds_gw_fpu_divs" 4
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
357 (and (ior (eq_attr "type" "fdivs")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
358 (eq_attr "type" "fsqrts"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
359 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
360 "gw_ii, gw_iq_p2, gw_rf_p2, gw_e1_p2, gw_e2_p2*14, gw_e3_p2, gw_e4_p2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
361
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
362 (define_insn_reservation "nds_gw_fpu_divd" 4
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
363 (and (ior (eq_attr "type" "fdivd")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
364 (eq_attr "type" "fsqrtd"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
365 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
366 "gw_ii, gw_iq_p2, gw_rf_p2, gw_e1_p2, gw_e2_p2*28, gw_e3_p2, gw_e4_p2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
367
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
368 (define_insn_reservation "nds_gw_fpu_fast_alu" 2
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
369 (and (ior (eq_attr "type" "fcmp")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
370 (ior (eq_attr "type" "fabs")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
371 (ior (eq_attr "type" "fcpy")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
372 (eq_attr "type" "fcmov"))))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
373 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
374 "gw_ii, gw_iq_p2, gw_rf_p2, gw_e1_p2, gw_e2_p2, gw_e3_p2, gw_e4_p2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
375
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
376 (define_insn_reservation "nds_gw_fpu_fmtsr" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
377 (and (eq_attr "type" "fmtsr")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
378 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
379 "gw_ii, gw_iq_p2, gw_rf_p2, gw_e1_p2, gw_e2_p2, gw_e3_p2, gw_e4_p2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
380
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
381 (define_insn_reservation "nds_gw_fpu_fmtdr" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
382 (and (eq_attr "type" "fmtdr")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
383 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
384 "gw_ii, gw_ii+gw_iq_p2, gw_iq_p2+gw_rf_p2, gw_rf_p2+gw_e1_p2, gw_e1_p2+gw_e2_p2, gw_e2_p2+gw_e3_p2, gw_e3_p2+gw_e4_p2, gw_e4_p2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
385
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
386 (define_insn_reservation "nds_gw_fpu_fmfsr" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
387 (and (eq_attr "type" "fmfsr")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
388 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
389 "gw_ii, gw_iq_p2, gw_rf_p2, gw_e1_p2, gw_e2_p2, gw_e3_p2, gw_e4_p2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
390
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
391 (define_insn_reservation "nds_gw_fpu_fmfdr" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
392 (and (eq_attr "type" "fmfdr")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
393 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
394 "gw_ii, gw_ii+gw_iq_p2, gw_iq_p2+gw_rf_p2, gw_rf_p2+gw_e1_p2, gw_e1_p2+gw_e2_p2, gw_e2_p2+gw_e3_p2, gw_e3_p2+gw_e4_p2, gw_e4_p2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
395
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
396 (define_insn_reservation "nds_gw_fpu_load" 3
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
397 (and (eq_attr "type" "fload")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
398 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
399 "gw_ii, gw_iq_p2, gw_rf_p2, gw_e1_p2, gw_e2_p2, gw_e3_p2, gw_e4_p2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
400
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
401 (define_insn_reservation "nds_gw_fpu_store" 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
402 (and (eq_attr "type" "fstore")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
403 (eq_attr "pipeline_model" "graywolf"))
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
404 "gw_ii, gw_iq_p2, gw_rf_p2, gw_e1_p2, gw_e2_p2, gw_e3_p2, gw_e4_p2")
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
405
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
406 ;; FPU_ADDR_OUT -> FPU_ADDR_IN
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
407 ;; Main pipeline rules don't need this because those default latency is 1.
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
408 (define_bypass 1
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
409 "nds_gw_fpu_load, nds_gw_fpu_store"
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
410 "nds_gw_fpu_load, nds_gw_fpu_store"
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
411 "nds32_gw_ex_to_ex_p"
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
412 )
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
413
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
414 ;; LD, MUL, MAC, DIV, DALU64, DMUL, DMAC, DALUROUND, DBPICK, DWEXT
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
415 ;; -> ALU, ALU_SHIFT_Rb, PBSAD, PBSADA_RaRb, MOVD44, MUL, MAC_RaRb, DIV, ADDR_IN, BR, MMU,
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
416 ;; DALU, DALUROUND, DMUL, DMAC_RaRb, DPACK, DINSB, DCMP, DCLIP, WEXT_O, BPICK_RaRb
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
417 (define_bypass 2
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
418 "nds_gw_load, nds_gw_load_2w,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
419 nds_gw_mul_fast1, nds_gw_mul_fast2, nds_gw_mul_slow,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
420 nds_gw_mac_fast1, nds_gw_mac_fast2, nds_gw_mac_slow,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
421 nds_gw_div, nds_gw_div_2w,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
422 nds_gw_dsp_alu64, nds_gw_dsp_mul, nds_gw_dsp_mac,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
423 nds_gw_dsp_alu_round, nds_gw_dsp_bpick, nds_gw_dsp_wext"
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
424 "nds_gw_alu, nds_gw_movd44, nds_gw_alu_shift,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
425 nds_gw_pbsad, nds_gw_pbsada,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
426 nds_gw_mul_fast1, nds_gw_mul_fast2, nds_gw_mul_slow,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
427 nds_gw_mac_fast1, nds_gw_mac_fast2, nds_gw_mac_slow,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
428 nds_gw_branch,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
429 nds_gw_div, nds_gw_div_2w,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
430 nds_gw_load, nds_gw_load_2w, nds_gw_store, nds_gw_store_3r,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
431 nds_gw_load_multiple_1,nds_gw_load_multiple_2, nds_gw_load_multiple_3,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
432 nds_gw_load_multiple_4,nds_gw_load_multiple_5, nds_gw_load_multiple_6,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
433 nds_gw_load_multiple_7,nds_gw_load_multiple_8, nds_gw_load_multiple_12,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
434 nds_gw_store_multiple_1,nds_gw_store_multiple_2, nds_gw_store_multiple_3,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
435 nds_gw_store_multiple_4,nds_gw_store_multiple_5, nds_gw_store_multiple_6,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
436 nds_gw_store_multiple_7,nds_gw_store_multiple_8, nds_gw_store_multiple_12,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
437 nds_gw_mmu,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
438 nds_gw_dsp_alu, nds_gw_dsp_alu_round,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
439 nds_gw_dsp_mul, nds_gw_dsp_mac, nds_gw_dsp_pack,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
440 nds_gw_dsp_insb, nds_gw_dsp_cmp, nds_gw_dsp_clip,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
441 nds_gw_dsp_wext, nds_gw_dsp_bpick"
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
442 "nds32_gw_mm_to_ex_p"
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
443 )
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
444
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
445 ;; LMW(N, N)
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
446 ;; -> ALU, ALU_SHIFT_Rb, PBSAD, PBSADA_RaRb, MOVD44, MUL, MAC_RaRb, DIV, ADDR_IN, BR, MMU
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
447 ;; DALU, DALUROUND, DMUL, DMAC_RaRb, DPACK, DINSB, DCMP, DCLIP, WEXT_O, BPICK_RaRb
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
448 (define_bypass 2
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
449 "nds_gw_load_multiple_1,nds_gw_load_multiple_2, nds_gw_load_multiple_3,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
450 nds_gw_load_multiple_4,nds_gw_load_multiple_5, nds_gw_load_multiple_6,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
451 nds_gw_load_multiple_7,nds_gw_load_multiple_8, nds_gw_load_multiple_12"
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
452 "nds_gw_alu, nds_gw_movd44, nds_gw_alu_shift,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
453 nds_gw_pbsad, nds_gw_pbsada,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
454 nds_gw_mul_fast1, nds_gw_mul_fast2, nds_gw_mul_slow,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
455 nds_gw_mac_fast1, nds_gw_mac_fast2, nds_gw_mac_slow,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
456 nds_gw_branch,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
457 nds_gw_div, nds_gw_div_2w,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
458 nds_gw_load, nds_gw_load_2w, nds_gw_store, nds_gw_store_3r,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
459 nds_gw_load_multiple_1,nds_gw_load_multiple_2, nds_gw_load_multiple_3,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
460 nds_gw_load_multiple_4,nds_gw_load_multiple_5, nds_gw_load_multiple_6,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
461 nds_gw_load_multiple_7,nds_gw_load_multiple_8, nds_gw_load_multiple_12,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
462 nds_gw_store_multiple_1,nds_gw_store_multiple_2, nds_gw_store_multiple_3,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
463 nds_gw_store_multiple_4,nds_gw_store_multiple_5, nds_gw_store_multiple_6,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
464 nds_gw_store_multiple_7,nds_gw_store_multiple_8, nds_gw_store_multiple_12,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
465 nds_gw_mmu,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
466 nds_gw_dsp_alu, nds_gw_dsp_alu_round,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
467 nds_gw_dsp_mul, nds_gw_dsp_mac, nds_gw_dsp_pack,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
468 nds_gw_dsp_insb, nds_gw_dsp_cmp, nds_gw_dsp_clip,\
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
469 nds_gw_dsp_wext, nds_gw_dsp_bpick"
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
470 "nds32_gw_last_load_to_ex_p"
84e7813d76e9 gcc-8.2
mir3636
parents:
diff changeset
471 )