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annotate gcc/config/nds32/nds32.opt @ 131:84e7813d76e9

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gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children 1830386684a0
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1 ; Options of Andes NDS32 cpu for GNU compiler
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2 ; Copyright (C) 2012-2018 Free Software Foundation, Inc.
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3 ; Contributed by Andes Technology Corporation.
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4 ;
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5 ; This file is part of GCC.
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6 ;
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7 ; GCC is free software; you can redistribute it and/or modify it
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8 ; under the terms of the GNU General Public License as published
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9 ; by the Free Software Foundation; either version 3, or (at your
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10 ; option) any later version.
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11 ;
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12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 ; License for more details.
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16 ;
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17 ; You should have received a copy of the GNU General Public License
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18 ; along with GCC; see the file COPYING3. If not see
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19 ; <http://www.gnu.org/licenses/>.
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20
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21 HeaderInclude
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22 config/nds32/nds32-opts.h
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23
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24 ; ---------------------------------------------------------------
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25 ; The following options are designed for aliasing and compatibility options.
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26
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27 EB
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28 Target RejectNegative Alias(mbig-endian)
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29 Generate code in big-endian mode.
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30
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31 EL
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32 Target RejectNegative Alias(mlittle-endian)
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33 Generate code in little-endian mode.
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34
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35 mfp-as-gp
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36 Target RejectNegative Alias(mforce-fp-as-gp)
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37 Force performing fp-as-gp optimization.
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38
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39 mno-fp-as-gp
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40 Target RejectNegative Alias(mforbid-fp-as-gp)
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41 Forbid performing fp-as-gp optimization.
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42
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43 ; ---------------------------------------------------------------
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44
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45 mabi=
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46 Target RejectNegative Joined Enum(abi_type) Var(nds32_abi) Init(TARGET_DEFAULT_ABI)
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47 Specify which ABI type to generate code for: 2, 2fp+.
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48
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49 Enum
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50 Name(abi_type) Type(enum abi_type)
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51 Known ABIs (for use with the -mabi= option):
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52
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53 EnumValue
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54 Enum(abi_type) String(2) Value(NDS32_ABI_V2)
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55
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56 EnumValue
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57 Enum(abi_type) String(2fp+) Value(NDS32_ABI_V2_FP_PLUS)
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58
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59 mfloat-abi=soft
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60 Target RejectNegative Alias(mabi=, 2)
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61 Specify use soft floating point ABI which mean alias to -mabi=2.
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62
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63 mfloat-abi=hard
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64 Target RejectNegative Alias(mabi=, 2fp+)
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65 Specify use soft floating point ABI which mean alias to -mabi=2fp+.
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66
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67 ; ---------------------------------------------------------------
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68
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69 mreduced-regs
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70 Target Report RejectNegative Negative(mfull-regs) Mask(REDUCED_REGS)
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71 Use reduced-set registers for register allocation.
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72
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73 mfull-regs
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74 Target Report RejectNegative Negative(mreduced-regs) InverseMask(REDUCED_REGS)
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75 Use full-set registers for register allocation.
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76
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77 ; ---------------------------------------------------------------
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78
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79 malways-align
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80 Target Mask(ALWAYS_ALIGN)
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81 Always align function entry, jump target and return address.
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82
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83 malign-functions
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84 Target Mask(ALIGN_FUNCTION)
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85 Align function entry to 4 byte.
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86
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87 mbig-endian
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88 Target Undocumented RejectNegative Negative(mlittle-endian) Mask(BIG_ENDIAN)
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89 Generate code in big-endian mode.
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90
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91 mlittle-endian
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92 Target Undocumented RejectNegative Negative(mbig-endian) InverseMask(BIG_ENDIAN)
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93 Generate code in little-endian mode.
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94
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95 mforce-fp-as-gp
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96 Target Undocumented Mask(FORCE_FP_AS_GP)
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97 Prevent $fp being allocated during register allocation so that compiler is able to force performing fp-as-gp optimization.
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98
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99 mforbid-fp-as-gp
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100 Target Undocumented Mask(FORBID_FP_AS_GP)
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101 Forbid using $fp to access static and global variables. This option strictly forbids fp-as-gp optimization regardless of '-mforce-fp-as-gp'.
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102
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103 mict-model=
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104 Target Undocumented RejectNegative Joined Enum(nds32_ict_model_type) Var(nds32_ict_model) Init(ICT_MODEL_SMALL)
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105 Specify the address generation strategy for ICT call's code model.
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106
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107 Enum
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108 Name(nds32_ict_model_type) Type(enum nds32_ict_model_type)
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109 Known cmodel types (for use with the -mict-model= option):
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110
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111 EnumValue
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112 Enum(nds32_ict_model_type) String(small) Value(ICT_MODEL_SMALL)
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113
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114 EnumValue
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115 Enum(nds32_ict_model_type) String(large) Value(ICT_MODEL_LARGE)
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116
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117 mcmov
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118 Target Report Mask(CMOV)
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119 Generate conditional move instructions.
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120
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121 mhw-abs
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122 Target Report Mask(HW_ABS)
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123 Generate hardware abs instructions.
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124
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125 mext-perf
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126 Target Report Mask(EXT_PERF)
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127 Generate performance extension instructions.
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128
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129 mext-perf2
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130 Target Report Mask(EXT_PERF2)
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131 Generate performance extension version 2 instructions.
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132
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133 mext-string
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134 Target Report Mask(EXT_STRING)
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135 Generate string extension instructions.
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136
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137 mext-dsp
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138 Target Report Mask(EXT_DSP)
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139 Generate DSP extension instructions.
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140
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141 mv3push
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142 Target Report Mask(V3PUSH)
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143 Generate v3 push25/pop25 instructions.
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144
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145 m16-bit
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146 Target Report Mask(16_BIT)
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147 Generate 16-bit instructions.
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148
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149 mrelax-hint
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150 Target Report Mask(RELAX_HINT)
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151 Insert relax hint for linker to do relaxation.
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152
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153 mvh
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154 Target Report Mask(VH) Condition(!TARGET_LINUX_ABI)
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155 Enable Virtual Hosting support.
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156
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157 misr-vector-size=
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158 Target RejectNegative Joined UInteger Var(nds32_isr_vector_size) Init(NDS32_DEFAULT_ISR_VECTOR_SIZE)
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159 Specify the size of each interrupt vector, which must be 4 or 16.
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160
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161 misr-secure=
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162 Target RejectNegative Joined UInteger Var(nds32_isr_secure_level) Init(0)
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163 Specify the security level of c-isr for the whole file.
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164
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165 mcache-block-size=
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166 Target RejectNegative Joined UInteger Var(nds32_cache_block_size) Init(NDS32_DEFAULT_CACHE_BLOCK_SIZE)
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167 Specify the size of each cache block, which must be a power of 2 between 4 and 512.
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168
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169 march=
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170 Target RejectNegative Joined Enum(nds32_arch_type) Var(nds32_arch_option) Init(ARCH_V3)
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171 Specify the name of the target architecture.
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172
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173 Enum
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174 Name(nds32_arch_type) Type(enum nds32_arch_type)
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175 Known arch types (for use with the -march= option):
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176
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177 EnumValue
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178 Enum(nds32_arch_type) String(v2) Value(ARCH_V2)
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179
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180 EnumValue
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181 Enum(nds32_arch_type) String(v3) Value(ARCH_V3)
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182
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183 EnumValue
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184 Enum(nds32_arch_type) String(v3j) Value(ARCH_V3J)
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185
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186 EnumValue
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187 Enum(nds32_arch_type) String(v3m) Value(ARCH_V3M)
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188
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189 EnumValue
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190 Enum(nds32_arch_type) String(v3f) Value(ARCH_V3F)
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191
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192 EnumValue
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193 Enum(nds32_arch_type) String(v3s) Value(ARCH_V3S)
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194
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195 mcpu=
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196 Target RejectNegative Joined Enum(nds32_cpu_type) Var(nds32_cpu_option) Init(CPU_N9)
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197 Specify the cpu for pipeline model.
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198
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199 Enum
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200 Name(nds32_cpu_type) Type(enum nds32_cpu_type)
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201 Known cpu types (for use with the -mcpu= option):
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202
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203 EnumValue
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204 Enum(nds32_cpu_type) String(n6) Value(CPU_N6)
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205
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206 EnumValue
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207 Enum(nds32_cpu_type) String(n650) Value(CPU_N6)
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208
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209 EnumValue
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210 Enum(nds32_cpu_type) String(n7) Value(CPU_N7)
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211
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212 EnumValue
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213 Enum(nds32_cpu_type) String(n705) Value(CPU_N7)
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214
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215 EnumValue
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216 Enum(nds32_cpu_type) String(n8) Value(CPU_N8)
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217
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218 EnumValue
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219 Enum(nds32_cpu_type) String(n801) Value(CPU_N8)
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220
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221 EnumValue
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222 Enum(nds32_cpu_type) String(sn8) Value(CPU_N8)
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223
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224 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
225 Enum(nds32_cpu_type) String(sn801) Value(CPU_N8)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
226
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
227 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
228 Enum(nds32_cpu_type) String(s8) Value(CPU_N8)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
229
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
230 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
231 Enum(nds32_cpu_type) String(s801) Value(CPU_N8)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
232
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
233 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
234 Enum(nds32_cpu_type) String(e8) Value(CPU_E8)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
235
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
236 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
237 Enum(nds32_cpu_type) String(e801) Value(CPU_E8)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
238
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
239 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
240 Enum(nds32_cpu_type) String(n820) Value(CPU_E8)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
241
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
242 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
243 Enum(nds32_cpu_type) String(s830) Value(CPU_E8)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
244
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
245 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
246 Enum(nds32_cpu_type) String(e830) Value(CPU_E8)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
247
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
248 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
249 Enum(nds32_cpu_type) String(n9) Value(CPU_N9)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
250
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
251 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
252 Enum(nds32_cpu_type) String(n903) Value(CPU_N9)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
253
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
254 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
255 Enum(nds32_cpu_type) String(n903a) Value(CPU_N9)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
256
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
257 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
258 Enum(nds32_cpu_type) String(n968) Value(CPU_N9)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
259
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
260 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
261 Enum(nds32_cpu_type) String(n968a) Value(CPU_N9)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
262
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
263 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
264 Enum(nds32_cpu_type) String(n10) Value(CPU_N10)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
265
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
266 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
267 Enum(nds32_cpu_type) String(n1033) Value(CPU_N10)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
268
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
269 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
270 Enum(nds32_cpu_type) String(n1033a) Value(CPU_N10)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
271
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
272 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
273 Enum(nds32_cpu_type) String(n1033-fpu) Value(CPU_N10)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
274
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
275 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
276 Enum(nds32_cpu_type) String(n1033-spu) Value(CPU_N10)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
277
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
278 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
279 Enum(nds32_cpu_type) String(n1068) Value(CPU_N10)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
280
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
281 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
282 Enum(nds32_cpu_type) String(n1068a) Value(CPU_N10)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
283
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
284 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
285 Enum(nds32_cpu_type) String(n1068-fpu) Value(CPU_N10)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
286
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
287 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
288 Enum(nds32_cpu_type) String(n1068a-fpu) Value(CPU_N10)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
289
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
290 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
291 Enum(nds32_cpu_type) String(n1068-spu) Value(CPU_N10)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
292
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
293 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
294 Enum(nds32_cpu_type) String(n1068a-spu) Value(CPU_N10)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
295
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
296 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
297 Enum(nds32_cpu_type) String(d10) Value(CPU_N10)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
298
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
299 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
300 Enum(nds32_cpu_type) String(d1088) Value(CPU_N10)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
301
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
302 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
303 Enum(nds32_cpu_type) String(d1088-fpu) Value(CPU_N10)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
304
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
305 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
306 Enum(nds32_cpu_type) String(d1088-spu) Value(CPU_N10)
111
kono
parents:
diff changeset
307
kono
parents:
diff changeset
308 EnumValue
131
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
309 Enum(nds32_cpu_type) Undocumented String(graywolf) Value(CPU_GRAYWOLF)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
310
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
311 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
312 Enum(nds32_cpu_type) String(n15) Value(CPU_GRAYWOLF)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
313
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
314 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
315 Enum(nds32_cpu_type) String(d15) Value(CPU_GRAYWOLF)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
316
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
317 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
318 Enum(nds32_cpu_type) String(n15s) Value(CPU_GRAYWOLF)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
319
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
320 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
321 Enum(nds32_cpu_type) String(d15s) Value(CPU_GRAYWOLF)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
322
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
323 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
324 Enum(nds32_cpu_type) String(n15f) Value(CPU_GRAYWOLF)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
325
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
326 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
327 Enum(nds32_cpu_type) String(d15f) Value(CPU_GRAYWOLF)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
328
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
329 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
330 Enum(nds32_cpu_type) String(n12) Value(CPU_N12)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
331
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
332 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
333 Enum(nds32_cpu_type) String(n1213) Value(CPU_N12)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
334
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
335 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
336 Enum(nds32_cpu_type) String(n1233) Value(CPU_N12)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
337
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
338 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
339 Enum(nds32_cpu_type) String(n1233-fpu) Value(CPU_N12)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
340
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
341 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
342 Enum(nds32_cpu_type) String(n1233-spu) Value(CPU_N12)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
343
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
344 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
345 Enum(nds32_cpu_type) String(n13) Value(CPU_N13)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
346
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
347 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
348 Enum(nds32_cpu_type) String(n1337) Value(CPU_N13)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
349
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
350 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
351 Enum(nds32_cpu_type) String(n1337-fpu) Value(CPU_N13)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
352
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
353 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
354 Enum(nds32_cpu_type) String(n1337-spu) Value(CPU_N13)
111
kono
parents:
diff changeset
355
kono
parents:
diff changeset
356 EnumValue
131
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
357 Enum(nds32_cpu_type) String(simple) Value(CPU_SIMPLE)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
358
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
359 mconfig-fpu=
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
360 Target RejectNegative Joined Enum(float_reg_number) Var(nds32_fp_regnum) Init(TARGET_CONFIG_FPU_DEFAULT)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
361 Specify a fpu configuration value from 0 to 7; 0-3 is as FPU spec says, and 4-7 is corresponding to 0-3.
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
362
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
363 Enum
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
364 Name(float_reg_number) Type(enum float_reg_number)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
365 Known floating-point number of registers (for use with the -mconfig-fpu= option):
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
366
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
367 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
368 Enum(float_reg_number) String(0) Value(NDS32_CONFIG_FPU_0)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
369
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
370 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
371 Enum(float_reg_number) String(1) Value(NDS32_CONFIG_FPU_1)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
372
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
373 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
374 Enum(float_reg_number) String(2) Value(NDS32_CONFIG_FPU_2)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
375
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
376 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
377 Enum(float_reg_number) String(3) Value(NDS32_CONFIG_FPU_3)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
378
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
379 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
380 Enum(float_reg_number) String(4) Value(NDS32_CONFIG_FPU_4)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
381
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
382 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
383 Enum(float_reg_number) String(5) Value(NDS32_CONFIG_FPU_5)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
384
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
385 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
386 Enum(float_reg_number) String(6) Value(NDS32_CONFIG_FPU_6)
111
kono
parents:
diff changeset
387
kono
parents:
diff changeset
388 EnumValue
131
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
389 Enum(float_reg_number) String(7) Value(NDS32_CONFIG_FPU_7)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
390
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
391 mconfig-mul=
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
392 Target RejectNegative Joined Enum(nds32_mul_type) Var(nds32_mul_config) Init(MUL_TYPE_FAST_1)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
393 Specify configuration of instruction mul: fast1, fast2 or slow. The default is fast1.
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
394
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
395 Enum
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
396 Name(nds32_mul_type) Type(enum nds32_mul_type)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
397
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
398 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
399 Enum(nds32_mul_type) String(fast) Value(MUL_TYPE_FAST_1)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
400
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
401 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
402 Enum(nds32_mul_type) String(fast1) Value(MUL_TYPE_FAST_1)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
403
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
404 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
405 Enum(nds32_mul_type) String(fast2) Value(MUL_TYPE_FAST_2)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
406
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
407 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
408 Enum(nds32_mul_type) String(slow) Value(MUL_TYPE_SLOW)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
409
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
410 mconfig-register-ports=
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
411 Target RejectNegative Joined Enum(nds32_register_ports) Var(nds32_register_ports_config) Init(REG_PORT_3R2W)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
412 Specify how many read/write ports for n9/n10 cores. The value should be 3r2w or 2r1w.
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
413
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
414 Enum
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
415 Name(nds32_register_ports) Type(enum nds32_register_ports)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
416
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
417 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
418 Enum(nds32_register_ports) String(3r2w) Value(REG_PORT_3R2W)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
419
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
420 EnumValue
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
421 Enum(nds32_register_ports) String(2r1w) Value(REG_PORT_2R1W)
111
kono
parents:
diff changeset
422
kono
parents:
diff changeset
423 mctor-dtor
kono
parents:
diff changeset
424 Target Report
kono
parents:
diff changeset
425 Enable constructor/destructor feature.
kono
parents:
diff changeset
426
kono
parents:
diff changeset
427 mrelax
kono
parents:
diff changeset
428 Target Report
kono
parents:
diff changeset
429 Guide linker to relax instructions.
131
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
430
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
431 mext-fpu-fma
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
432 Target Report Mask(EXT_FPU_FMA)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
433 Generate floating-point multiply-accumulation instructions.
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
434
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
435 mext-fpu-sp
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
436 Target Report Mask(FPU_SINGLE)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
437 Generate single-precision floating-point instructions.
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
438
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
439 mext-fpu-dp
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
440 Target Report Mask(FPU_DOUBLE)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
441 Generate double-precision floating-point instructions.
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
442
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
443 mforce-no-ext-dsp
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
444 Target Undocumented Report Mask(FORCE_NO_EXT_DSP)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
445 Force disable hardware loop, even use -mext-dsp.
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
446
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
447 msched-prolog-epilog
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
448 Target Var(flag_sched_prolog_epilog) Init(0)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
449 Permit scheduling of a function's prologue and epilogue sequence.
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
450
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
451 mret-in-naked-func
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
452 Target Var(flag_ret_in_naked_func) Init(1)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
453 Generate return instruction in naked function.
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
454
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
455 malways-save-lp
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
456 Target Var(flag_always_save_lp) Init(0)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
457 Always save $lp in the stack.
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
458
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
459 munaligned-access
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
460 Target Report Var(flag_unaligned_access) Init(0)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
461 Enable unaligned word and halfword accesses to packed data.
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
462
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
463 minline-asm-r15
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
464 Target Report Var(flag_inline_asm_r15) Init(0)
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
465 Allow use r15 for inline ASM.