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1 ;; Predicate definitions of Andes NDS32 cpu for GNU compiler
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2 ;; Copyright (C) 2012-2018 Free Software Foundation, Inc.
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3 ;; Contributed by Andes Technology Corporation.
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4 ;;
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5 ;; This file is part of GCC.
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6 ;;
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7 ;; GCC is free software; you can redistribute it and/or modify it
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8 ;; under the terms of the GNU General Public License as published
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9 ;; by the Free Software Foundation; either version 3, or (at your
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10 ;; option) any later version.
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11 ;;
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12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 ;; License for more details.
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16 ;;
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17 ;; You should have received a copy of the GNU General Public License
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18 ;; along with GCC; see the file COPYING3. If not see
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19 ;; <http://www.gnu.org/licenses/>.
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20
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21 (define_predicate "nds32_equality_comparison_operator"
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22 (match_code "eq,ne"))
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23
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24 (define_predicate "nds32_greater_less_comparison_operator"
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25 (match_code "gt,ge,lt,le"))
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26
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131
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27 (define_predicate "nds32_float_comparison_operator"
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28 (match_code "eq,ne,le,lt,ge,gt,ordered,unordered,ungt,unge,unlt,unle"))
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29
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30 (define_predicate "nds32_movecc_comparison_operator"
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31 (match_code "eq,ne,le,leu,ge,geu"))
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32
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111
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33 (define_special_predicate "nds32_logical_binary_operator"
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34 (match_code "and,ior,xor"))
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35
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131
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36 (define_special_predicate "nds32_conditional_call_comparison_operator"
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37 (match_code "lt,ge"))
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38
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39 (define_special_predicate "nds32_have_33_inst_operator"
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40 (match_code "mult,and,ior,xor"))
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41
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111
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42 (define_predicate "nds32_symbolic_operand"
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131
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43 (and (match_code "const,symbol_ref,label_ref")
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44 (match_test "!(TARGET_ICT_MODEL_LARGE
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45 && nds32_indirect_call_referenced_p (op))")))
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46
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47 (define_predicate "nds32_nonunspec_symbolic_operand"
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48 (and (match_code "const,symbol_ref,label_ref")
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49 (match_test "!flag_pic && nds32_const_unspec_p (op)
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50 && !(TARGET_ICT_MODEL_LARGE
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51 && nds32_indirect_call_referenced_p (op))")))
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111
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52
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53 (define_predicate "nds32_reg_constant_operand"
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54 (ior (match_operand 0 "register_operand")
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55 (match_operand 0 "const_int_operand")))
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56
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57 (define_predicate "nds32_rimm15s_operand"
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58 (ior (match_operand 0 "register_operand")
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59 (and (match_operand 0 "const_int_operand")
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60 (match_test "satisfies_constraint_Is15 (op)"))))
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61
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131
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62 (define_predicate "nds32_rimm11s_operand"
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63 (ior (match_operand 0 "register_operand")
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64 (and (match_operand 0 "const_int_operand")
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65 (match_test "satisfies_constraint_Is11 (op)"))))
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66
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67 (define_predicate "nds32_imm_0_1_operand"
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68 (and (match_operand 0 "const_int_operand")
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69 (ior (match_test "satisfies_constraint_Iv00 (op)")
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70 (match_test "satisfies_constraint_Iv01 (op)"))))
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71
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72 (define_predicate "nds32_imm_1_2_operand"
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73 (and (match_operand 0 "const_int_operand")
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74 (ior (match_test "satisfies_constraint_Iv01 (op)")
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75 (match_test "satisfies_constraint_Iv02 (op)"))))
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76
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77 (define_predicate "nds32_imm_1_2_4_8_operand"
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78 (and (match_operand 0 "const_int_operand")
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79 (ior (ior (match_test "satisfies_constraint_Iv01 (op)")
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80 (match_test "satisfies_constraint_Iv02 (op)"))
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81 (ior (match_test "satisfies_constraint_Iv04 (op)")
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82 (match_test "satisfies_constraint_Iv08 (op)")))))
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83
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84 (define_predicate "nds32_imm2u_operand"
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85 (and (match_operand 0 "const_int_operand")
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86 (match_test "satisfies_constraint_Iu02 (op)")))
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87
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88 (define_predicate "nds32_imm4u_operand"
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89 (and (match_operand 0 "const_int_operand")
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90 (match_test "satisfies_constraint_Iu04 (op)")))
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91
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92 (define_predicate "nds32_imm5u_operand"
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93 (and (match_operand 0 "const_int_operand")
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94 (match_test "satisfies_constraint_Iu05 (op)")))
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95
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131
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96 (define_predicate "nds32_imm6u_operand"
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97 (and (match_operand 0 "const_int_operand")
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98 (match_test "satisfies_constraint_Iu06 (op)")))
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99
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100 (define_predicate "nds32_rimm4u_operand"
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101 (ior (match_operand 0 "register_operand")
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102 (match_operand 0 "nds32_imm4u_operand")))
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103
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104 (define_predicate "nds32_rimm5u_operand"
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105 (ior (match_operand 0 "register_operand")
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106 (match_operand 0 "nds32_imm5u_operand")))
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107
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108 (define_predicate "nds32_rimm6u_operand"
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109 (ior (match_operand 0 "register_operand")
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110 (match_operand 0 "nds32_imm6u_operand")))
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111
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111
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112 (define_predicate "nds32_move_operand"
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113 (and (match_operand 0 "general_operand")
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114 (not (match_code "high,const,symbol_ref,label_ref")))
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115 {
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116 /* If the constant op does NOT satisfy Is20 nor Ihig,
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117 we can not perform move behavior by a single instruction. */
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118 if (CONST_INT_P (op)
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119 && !satisfies_constraint_Is20 (op)
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120 && !satisfies_constraint_Ihig (op))
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121 return false;
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122
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123 return true;
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124 })
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125
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131
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126 (define_predicate "nds32_vmove_operand"
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127 (and (match_operand 0 "general_operand")
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128 (not (match_code "high,const,symbol_ref,label_ref")))
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129 {
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130 /* If the constant op does NOT satisfy Is20 nor Ihig,
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131 we can not perform move behavior by a single instruction. */
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132 if (GET_CODE (op) == CONST_VECTOR
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133 && !satisfies_constraint_CVs2 (op)
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134 && !satisfies_constraint_CVhi (op))
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135 return false;
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136
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137 return true;
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138 })
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139
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140 (define_predicate "nds32_and_operand"
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141 (match_operand 0 "nds32_reg_constant_operand")
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142 {
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143 return REG_P (op)
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144 || GET_CODE (op) == SUBREG
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145 || satisfies_constraint_Izeb (op)
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146 || satisfies_constraint_Izeh (op)
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147 || satisfies_constraint_Ixls (op)
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148 || satisfies_constraint_Ix11 (op)
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149 || satisfies_constraint_Ibms (op)
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150 || satisfies_constraint_Ifex (op)
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151 || satisfies_constraint_Iu15 (op)
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152 || satisfies_constraint_Ii15 (op)
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153 || satisfies_constraint_Ic15 (op);
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154 })
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155
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156 (define_predicate "nds32_ior_operand"
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157 (match_operand 0 "nds32_reg_constant_operand")
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158 {
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159 return REG_P (op)
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160 || GET_CODE (op) == SUBREG
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161 || satisfies_constraint_Iu15 (op)
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162 || satisfies_constraint_Ie15 (op);
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163 })
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164
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165 (define_predicate "nds32_xor_operand"
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166 (match_operand 0 "nds32_reg_constant_operand")
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167 {
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168 return REG_P (op)
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169 || GET_CODE (op) == SUBREG
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170 || satisfies_constraint_Iu15 (op)
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171 || satisfies_constraint_It15 (op);
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172 })
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173
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174 (define_predicate "nds32_general_register_operand"
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175 (match_code "reg,subreg")
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176 {
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177 if (GET_CODE (op) == SUBREG)
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178 op = SUBREG_REG (op);
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179
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180 return (REG_P (op)
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181 && (REGNO (op) >= FIRST_PSEUDO_REGISTER
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182 || REGNO (op) <= NDS32_LAST_GPR_REGNUM));
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183 })
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184
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185 (define_predicate "nds32_call_address_operand"
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186 (ior (match_operand 0 "nds32_symbolic_operand")
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187 (match_operand 0 "nds32_general_register_operand")))
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188
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189 (define_predicate "nds32_insv_operand"
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190 (match_code "const_int")
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191 {
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192 return INTVAL (op) == 0
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193 || INTVAL (op) == 8
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194 || INTVAL (op) == 16
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195 || INTVAL (op) == 24;
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196 })
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197
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198 (define_predicate "nds32_lmw_smw_base_operand"
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199 (and (match_code "mem")
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200 (match_test "nds32_valid_smw_lwm_base_p (op)")))
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201
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202 (define_predicate "float_even_register_operand"
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203 (and (match_code "reg")
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204 (and (match_test "REGNO (op) >= NDS32_FIRST_FPR_REGNUM")
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205 (match_test "REGNO (op) <= NDS32_LAST_FPR_REGNUM")
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206 (match_test "(REGNO (op) & 1) == 0"))))
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207
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208 (define_predicate "float_odd_register_operand"
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209 (and (match_code "reg")
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210 (and (match_test "REGNO (op) >= NDS32_FIRST_FPR_REGNUM")
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211 (match_test "REGNO (op) <= NDS32_LAST_FPR_REGNUM")
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212 (match_test "(REGNO (op) & 1) != 0"))))
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213
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214 (define_special_predicate "nds32_load_multiple_operation"
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215 (match_code "parallel")
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216 {
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217 /* To verify 'load' operation, pass 'true' for the second argument.
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218 See the implementation in nds32.c for details. */
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131
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219 return nds32_valid_multiple_load_store_p (op, true, false);
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220 })
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221
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222 (define_special_predicate "nds32_load_multiple_and_update_address_operation"
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223 (match_code "parallel")
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224 {
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225 /* To verify 'load' operation, pass 'true' for the second argument.
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226 to verify 'update address' operation, pass 'true' for the third argument
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227 See the implementation in nds32.c for details. */
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228 return nds32_valid_multiple_load_store_p (op, true, true);
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229 })
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230
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231 (define_special_predicate "nds32_store_multiple_operation"
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232 (match_code "parallel")
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233 {
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234 /* To verify 'store' operation, pass 'false' for the second argument.
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235 See the implementation in nds32.c for details. */
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236 return nds32_valid_multiple_load_store_p (op, false, false);
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237 })
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238
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239 (define_special_predicate "nds32_store_multiple_and_update_address_operation"
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240 (match_code "parallel")
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241 {
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242 /* To verify 'store' operation, pass 'false' for the second argument,
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243 to verify 'update address' operation, pass 'true' for the third argument
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244 See the implementation in nds32.c for details. */
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245 return nds32_valid_multiple_load_store_p (op, false, true);
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111
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246 })
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247
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248 (define_special_predicate "nds32_stack_push_operation"
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249 (match_code "parallel")
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250 {
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251 /* To verify 'push' operation, pass 'true' for the second argument.
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252 See the implementation in nds32-predicates.c for details. */
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253 return nds32_valid_stack_push_pop_p (op, true);
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254 })
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255
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256 (define_special_predicate "nds32_stack_pop_operation"
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257 (match_code "parallel")
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258 {
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259 /* To verify 'pop' operation, pass 'false' for the second argument.
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260 See the implementation in nds32-predicates.c for details. */
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261 return nds32_valid_stack_push_pop_p (op, false);
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262 })
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263
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264 ;; ------------------------------------------------------------------------
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