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1 /* Hardware Transactional Memory (HTM) intrinsics.
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2 Copyright (C) 2013-2018 Free Software Foundation, Inc.
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3 Contributed by Peter Bergner <bergner@vnet.ibm.com>.
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4
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5 This file is free software; you can redistribute it and/or modify it under
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6 the terms of the GNU General Public License as published by the Free
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7 Software Foundation; either version 3 of the License, or (at your option)
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8 any later version.
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9
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10 This file is distributed in the hope that it will be useful, but WITHOUT
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11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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13 for more details.
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14
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15 Under Section 7 of GPL version 3, you are granted additional
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16 permissions described in the GCC Runtime Library Exception, version
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17 3.1, as published by the Free Software Foundation.
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18
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19 You should have received a copy of the GNU General Public License and
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20 a copy of the GCC Runtime Library Exception along with this program;
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21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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22 <http://www.gnu.org/licenses/>. */
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23
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24 #ifndef __HTM__
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25 # error "HTM instruction set not enabled"
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26 #endif /* __HTM__ */
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27
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28 #ifndef _HTMINTRIN_H
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29 #define _HTMINTRIN_H
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30
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31 #include <stdint.h>
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32
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33 typedef uint64_t texasr_t;
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34 typedef uint32_t texasru_t;
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35 typedef uint32_t texasrl_t;
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36 typedef uintptr_t tfiar_t;
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37 typedef uintptr_t tfhar_t;
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38
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39 #define _HTM_STATE(CR0) ((CR0 >> 1) & 0x3)
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40 #define _HTM_NONTRANSACTIONAL 0x0
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41 #define _HTM_SUSPENDED 0x1
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42 #define _HTM_TRANSACTIONAL 0x2
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43
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44 /* The following macros use the IBM bit numbering for BITNUM
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45 as used in the ISA documentation. */
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46
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47 #define _TEXASR_EXTRACT_BITS(TEXASR,BITNUM,SIZE) \
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48 (((TEXASR) >> (63-(BITNUM))) & ((1<<(SIZE))-1))
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49 #define _TEXASRU_EXTRACT_BITS(TEXASR,BITNUM,SIZE) \
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50 (((TEXASR) >> (31-(BITNUM))) & ((1<<(SIZE))-1))
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51
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52 #define _TEXASR_FAILURE_CODE(TEXASR) \
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53 _TEXASR_EXTRACT_BITS(TEXASR, 7, 8)
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54 #define _TEXASRU_FAILURE_CODE(TEXASRU) \
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55 _TEXASRU_EXTRACT_BITS(TEXASRU, 7, 8)
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56
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57 #define _TEXASR_FAILURE_PERSISTENT(TEXASR) \
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58 _TEXASR_EXTRACT_BITS(TEXASR, 7, 1)
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59 #define _TEXASRU_FAILURE_PERSISTENT(TEXASRU) \
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60 _TEXASRU_EXTRACT_BITS(TEXASRU, 7, 1)
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61
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62 #define _TEXASR_DISALLOWED(TEXASR) \
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63 _TEXASR_EXTRACT_BITS(TEXASR, 8, 1)
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64 #define _TEXASRU_DISALLOWED(TEXASRU) \
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65 _TEXASRU_EXTRACT_BITS(TEXASRU, 8, 1)
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66
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67 #define _TEXASR_NESTING_OVERFLOW(TEXASR) \
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68 _TEXASR_EXTRACT_BITS(TEXASR, 9, 1)
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69 #define _TEXASRU_NESTING_OVERFLOW(TEXASRU) \
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70 _TEXASRU_EXTRACT_BITS(TEXASRU, 9, 1)
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71
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72 #define _TEXASR_FOOTPRINT_OVERFLOW(TEXASR) \
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73 _TEXASR_EXTRACT_BITS(TEXASR, 10, 1)
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74 #define _TEXASRU_FOOTPRINT_OVERFLOW(TEXASRU) \
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75 _TEXASRU_EXTRACT_BITS(TEXASRU, 10, 1)
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76
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77 #define _TEXASR_SELF_INDUCED_CONFLICT(TEXASR) \
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78 _TEXASR_EXTRACT_BITS(TEXASR, 11, 1)
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79 #define _TEXASRU_SELF_INDUCED_CONFLICT(TEXASRU) \
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80 _TEXASRU_EXTRACT_BITS(TEXASRU, 11, 1)
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81
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82 #define _TEXASR_NON_TRANSACTIONAL_CONFLICT(TEXASR) \
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83 _TEXASR_EXTRACT_BITS(TEXASR, 12, 1)
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84 #define _TEXASRU_NON_TRANSACTIONAL_CONFLICT(TEXASRU) \
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85 _TEXASRU_EXTRACT_BITS(TEXASRU, 12, 1)
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86
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87 #define _TEXASR_TRANSACTION_CONFLICT(TEXASR) \
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88 _TEXASR_EXTRACT_BITS(TEXASR, 13, 1)
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89 #define _TEXASRU_TRANSACTION_CONFLICT(TEXASRU) \
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90 _TEXASRU_EXTRACT_BITS(TEXASRU, 13, 1)
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91
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92 #define _TEXASR_TRANSLATION_INVALIDATION_CONFLICT(TEXASR) \
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93 _TEXASR_EXTRACT_BITS(TEXASR, 14, 1)
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94 #define _TEXASRU_TRANSLATION_INVALIDATION_CONFLICT(TEXASRU) \
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95 _TEXASRU_EXTRACT_BITS(TEXASRU, 14, 1)
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96
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97 #define _TEXASR_IMPLEMENTAION_SPECIFIC(TEXASR) \
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98 _TEXASR_EXTRACT_BITS(TEXASR, 15, 1)
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99 #define _TEXASRU_IMPLEMENTAION_SPECIFIC(TEXASRU) \
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100 _TEXASRU_EXTRACT_BITS(TEXASRU, 15, 1)
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101
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102 #define _TEXASR_INSTRUCTION_FETCH_CONFLICT(TEXASR) \
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103 _TEXASR_EXTRACT_BITS(TEXASR, 16, 1)
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104 #define _TEXASRU_INSTRUCTION_FETCH_CONFLICT(TEXASRU) \
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105 _TEXASRU_EXTRACT_BITS(TEXASRU, 16, 1)
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106
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107 #define _TEXASR_ABORT(TEXASR) \
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108 _TEXASR_EXTRACT_BITS(TEXASR, 31, 1)
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109 #define _TEXASRU_ABORT(TEXASRU) \
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110 _TEXASRU_EXTRACT_BITS(TEXASRU, 31, 1)
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111
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112
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113 #define _TEXASR_SUSPENDED(TEXASR) \
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114 _TEXASR_EXTRACT_BITS(TEXASR, 32, 1)
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115
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116 #define _TEXASR_PRIVILEGE(TEXASR) \
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117 _TEXASR_EXTRACT_BITS(TEXASR, 35, 2)
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118
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119 #define _TEXASR_FAILURE_SUMMARY(TEXASR) \
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120 _TEXASR_EXTRACT_BITS(TEXASR, 36, 1)
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121
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122 #define _TEXASR_TFIAR_EXACT(TEXASR) \
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123 _TEXASR_EXTRACT_BITS(TEXASR, 37, 1)
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124
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125 #define _TEXASR_ROT(TEXASR) \
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126 _TEXASR_EXTRACT_BITS(TEXASR, 38, 1)
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127
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128 #define _TEXASR_TRANSACTION_LEVEL(TEXASR) \
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129 _TEXASR_EXTRACT_BITS(TEXASR, 63, 12)
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130
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131 #endif /* _HTMINTRIN_H */
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