annotate gcc/config/rl78/constraints.md @ 131:84e7813d76e9

gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children 1830386684a0
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1 ;; Machine Description for Renesas RL78 processors
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2 ;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
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3 ;; Contributed by Red Hat.
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4
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5 ;; This file is part of GCC.
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6
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7 ;; GCC is free software; you can redistribute it and/or modify
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8 ;; it under the terms of the GNU General Public License as published by
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9 ;; the Free Software Foundation; either version 3, or (at your option)
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10 ;; any later version.
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11
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12 ;; GCC is distributed in the hope that it will be useful,
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13 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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15 ;; GNU General Public License for more details.
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16
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17 ;; You should have received a copy of the GNU General Public License
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18 ;; along with GCC; see the file COPYING3. If not see
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19 ;; <http://www.gnu.org/licenses/>.
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20
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21 ; Constraints in use:
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22
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23 ; core:
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24 ; V X g i m n o p r s < >
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25 ; 0..9
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26 ; I..Q - integers
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27 ; Int8 = 0..255
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28 ; Int3 = 1..7
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29 ; J = -255..0
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30 ; K = 1
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31 ; L = -1
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32 ; M = 0
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33 ; N = 2
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34 ; O = -2
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35 ; P = 1..15
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36
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37 ; E..H - float constants
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38
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39 ; RL78-specific
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40 ; a x b c d e h l w - 8-bit regs
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41 ; A B D T S - 16-bit regs
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42 ; R = all regular registers (A-L)
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43 ; Y - any valid memory
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44 ; Wxx - various memory addressing modes
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45 ; Qxx - conditionals
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46 ; U = usual memory references mov-able to/from AX
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47 ; v = virtual registers
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48 ; Zxx = specific virtual registers
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49
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50 (define_constraint "Int8"
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51 "Integer constant in the range 0 @dots{} 255."
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52 (and (match_code "const_int")
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53 (match_test "IN_RANGE (ival, 0, 255)")))
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54
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55 (define_constraint "Int3"
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56 "Integer constant in the range 1 @dots{} 7."
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57 (and (match_code "const_int")
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58 (match_test "IN_RANGE (ival, 1, 7)")))
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59
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60 (define_constraint "Iv08"
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61 "@internal
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62 Integer constant equal to 8."
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63 (and (match_code "const_int")
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64 (match_test "IN_RANGE (ival, 8, 8)")))
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65
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66 (define_constraint "Iv16"
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67 "@internal
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68 Integer constant equal to 16."
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69 (and (match_code "const_int")
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70 (match_test "IN_RANGE (ival, 16, 16)")))
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71
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72 (define_constraint "Iv24"
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73 "@internal
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74 Integer constant equal to 24."
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75 (and (match_code "const_int")
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76 (match_test "IN_RANGE (ival, 24, 24)")))
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77
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78 (define_constraint "Is09"
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79 "@internal
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80 Integer constant in the range 9 @dots{} 15 (for shifts)."
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81 (and (match_code "const_int")
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82 (match_test "IN_RANGE (ival, 9, 15)")))
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83
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84 (define_constraint "Is17"
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85 "@internal
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86 Integer constant in the range 17 @dots{} 23 (for shifts)."
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87 (and (match_code "const_int")
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88 (match_test "IN_RANGE (ival, 17, 23)")))
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89
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90 (define_constraint "Is25"
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91 "@internal
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92 Integer constant in the range 25 @dots{} 31 (for shifts)."
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93 (and (match_code "const_int")
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94 (match_test "IN_RANGE (ival, 25, 31)")))
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95
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96 (define_constraint "ISsi"
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97 "@internal
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98 Integer constant with bit 31 set."
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99 (and (match_code "const_int")
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100 (match_test "(ival & 0x80000000) != 0")))
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101
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102 (define_constraint "IShi"
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103 "@internal
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104 Integer constant with bit 15 set."
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105 (and (match_code "const_int")
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106 (match_test "(ival & 0x8000) != 0")))
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107
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108 (define_constraint "ISqi"
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109 "@internal
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110 Integer constant with bit 7 set."
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111 (and (match_code "const_int")
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112 (match_test "(ival & 0x80) != 0")))
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113
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114 (define_constraint "Ibqi"
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115 "@internal
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116 Integer constant with one bit in 0..7 set."
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117 (and (match_code "const_int")
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118 (match_test "(ival & 0xff) && (exact_log2 (ival & 0xff) >= 0)")))
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119 (define_constraint "IBqi"
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120 "@internal
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121 Integer constant with one bit in 0..7 clear."
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122 (and (match_code "const_int")
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123 (match_test "(~ival & 0xff) && (exact_log2 (~ival & 0xff) >= 0)")))
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124
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125 (define_constraint "J"
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126 "Integer constant in the range -255 @dots{} 0"
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127 (and (match_code "const_int")
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128 (match_test "IN_RANGE (ival, -255, 0)")))
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129
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130 (define_constraint "K"
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131 "Integer constant 1."
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132 (and (match_code "const_int")
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133 (match_test "IN_RANGE (ival, 1, 1)")))
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134
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135 (define_constraint "L"
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136 "Integer constant -1."
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137 (and (match_code "const_int")
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138 (match_test "IN_RANGE (ival, -1, -1)")))
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139
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140 (define_constraint "M"
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141 "Integer constant 0."
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142 (and (match_code "const_int")
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143 (match_test "IN_RANGE (ival, 0, 0)")))
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144
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145 (define_constraint "N"
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146 "Integer constant 2."
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147 (and (match_code "const_int")
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148 (match_test "IN_RANGE (ival, 2, 2)")))
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149
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150 (define_constraint "O"
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151 "Integer constant -2."
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152 (and (match_code "const_int")
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153 (match_test "IN_RANGE (ival, -2, -2)")))
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154
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155 (define_constraint "P"
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156 "Integer constant 1..15"
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157 (and (match_code "const_int")
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158 (match_test "IN_RANGE (ival, 1, 15)")))
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159
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160 (define_register_constraint "R" "QI_REGS"
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161 "@code{A} through @code{L} registers.")
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162
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163 (define_register_constraint "a" "AREG"
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164 "The @code{A} register.")
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165
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166 (define_register_constraint "x" "XREG"
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167 "The @code{X} register.")
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168
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169 (define_register_constraint "b" "BREG"
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170 "The @code{B} register.")
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171
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172 (define_register_constraint "c" "CREG"
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173 "The @code{C} register.")
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174
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175 (define_register_constraint "d" "DREG"
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176 "The @code{D} register.")
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177
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178 (define_register_constraint "e" "EREG"
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179 "The @code{E} register.")
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180
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181 (define_register_constraint "h" "HREG"
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182 "The @code{H} register.")
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183
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184 (define_register_constraint "l" "LREG"
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185 "The @code{L} register.")
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186
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187 (define_register_constraint "w" "PSWREG"
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188 "The @code{PSW} register.")
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189
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190 (define_register_constraint "A" "AXREG"
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191 "The @code{AX} register.")
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192
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193 (define_register_constraint "B" "BCREG"
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194 "The @code{BC} register.")
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195
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196 (define_register_constraint "D" "DEREG"
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197 "The @code{DE} register.")
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198
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199 ; because H + L = T, assuming A=1.
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200 (define_register_constraint "T" "HLREG"
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201 "The @code{HL} register.")
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202
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203 (define_register_constraint "S" "SPREG"
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204 "The @code{SP} register.")
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205
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206 (define_register_constraint "v" "V_REGS"
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207 "The virtual registers.")
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208
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209 (define_register_constraint "Z08W" "R8W_REGS"
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210 "The R8 register, HImode.")
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211
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212 (define_register_constraint "Z10W" "R10W_REGS"
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213 "The R10 register, HImode.")
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214
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215 (define_register_constraint "Zint" "INT_REGS"
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216 "The interrupt registers.")
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217
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218 ; All the memory addressing schemes the RL78 supports
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219 ; of the form W {register} {bytes of offset}
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220 ; or W {register} {register}
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221 ; Additionally, the Cxx forms are the same as the Wxx forms, but without
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222 ; the ES: override.
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223
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224 ; absolute address
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225 (define_memory_constraint "Cab"
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226 "[addr]"
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227 (and (match_code "mem")
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228 (ior (match_test "CONSTANT_P (XEXP (op, 0))")
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229 (match_test "GET_CODE (XEXP (op, 0)) == PLUS && GET_CODE (XEXP (XEXP (op, 0), 0)) == SYMBOL_REF"))
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230 )
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231 )
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232 (define_memory_constraint "Wab"
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233 "es:[addr]"
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234 (match_test "(rl78_es_addr (op) && satisfies_constraint_Cab (rl78_es_base (op)))
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235 || satisfies_constraint_Cab (op)")
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236 )
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237
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238 (define_memory_constraint "Cbc"
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239 "word16[BC]"
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240 (and (match_code "mem")
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241 (ior
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242 (and (match_code "reg" "0")
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243 (match_test "REGNO (XEXP (op, 0)) == BC_REG"))
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244 (and (match_code "plus" "0")
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245 (and (and (match_code "reg" "00")
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246 (match_test "REGNO (XEXP (XEXP (op, 0), 0)) == BC_REG"))
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247 (match_test "uword_operand (XEXP (XEXP (op, 0), 1), VOIDmode)"))))
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248 )
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249 )
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250 (define_memory_constraint "Wbc"
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251 "es:word16[BC]"
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252 (match_test "(rl78_es_addr (op) && satisfies_constraint_Cbc (rl78_es_base (op)))
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253 || satisfies_constraint_Cbc (op)")
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254 )
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255
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256 (define_memory_constraint "Cde"
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257 "[DE]"
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258 (and (match_code "mem")
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259 (and (match_code "reg" "0")
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260 (match_test "REGNO (XEXP (op, 0)) == DE_REG")))
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261 )
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262 (define_memory_constraint "Wde"
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263 "es:[DE]"
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264 (match_test "(rl78_es_addr (op) && satisfies_constraint_Cde (rl78_es_base (op)))
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265 || satisfies_constraint_Cde (op)")
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266 )
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267
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268 (define_memory_constraint "Cca"
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269 "[AX..HL] for calls"
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270 (and (match_code "mem")
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271 (and (match_code "reg" "0")
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272 (match_test "REGNO (XEXP (op, 0)) <= HL_REG")))
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273 )
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274 (define_memory_constraint "Wca"
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275 "es:[AX..HL] for calls"
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276 (match_test "(rl78_es_addr (op) && satisfies_constraint_Cca (rl78_es_base (op)))
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277 || satisfies_constraint_Cca (op)")
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278 )
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279
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280 (define_memory_constraint "Ccv"
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281 "[AX..HL,r8-r31] for calls"
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282 (and (match_code "mem")
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283 (and (match_code "reg" "0")
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284 (match_test "REGNO (XEXP (op, 0)) < 32")))
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285 )
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286 (define_memory_constraint "Wcv"
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287 "es:[AX..HL,r8-r31] for calls"
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288 (match_test "(rl78_es_addr (op) && satisfies_constraint_Ccv (rl78_es_base (op)))
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289 || satisfies_constraint_Ccv (op)")
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290 )
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291
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292 (define_memory_constraint "Cd2"
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293 "word16[DE]"
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294 (and (match_code "mem")
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295 (ior
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296 (and (match_code "reg" "0")
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297 (match_test "REGNO (XEXP (op, 0)) == DE_REG"))
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298 (and (match_code "plus" "0")
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299 (and (and (match_code "reg" "00")
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300 (match_test "REGNO (XEXP (XEXP (op, 0), 0)) == DE_REG"))
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301 (match_test "uword_operand (XEXP (XEXP (op, 0), 1), VOIDmode)"))))
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302 )
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303 )
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304 (define_memory_constraint "Wd2"
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305 "es:word16[DE]"
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306 (match_test "(rl78_es_addr (op) && satisfies_constraint_Cd2 (rl78_es_base (op)))
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307 || satisfies_constraint_Cd2 (op)")
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308 )
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309
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310 (define_memory_constraint "Chl"
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311 "[HL]"
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312 (and (match_code "mem")
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313 (and (match_code "reg" "0")
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314 (match_test "REGNO (XEXP (op, 0)) == HL_REG")))
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315 )
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316 (define_memory_constraint "Whl"
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317 "es:[HL]"
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318 (match_test "(rl78_es_addr (op) && satisfies_constraint_Chl (rl78_es_base (op)))
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319 || satisfies_constraint_Chl (op)")
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320 )
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321
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322 (define_memory_constraint "Ch1"
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323 "byte8[HL]"
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324 (and (match_code "mem")
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325 (and (match_code "plus" "0")
kono
parents:
diff changeset
326 (and (and (match_code "reg" "00")
kono
parents:
diff changeset
327 (match_test "REGNO (XEXP (XEXP (op, 0), 0)) == HL_REG"))
kono
parents:
diff changeset
328 (match_test "ubyte_operand (XEXP (XEXP (op, 0), 1), VOIDmode)"))))
kono
parents:
diff changeset
329 )
kono
parents:
diff changeset
330 (define_memory_constraint "Wh1"
kono
parents:
diff changeset
331 "es:byte8[HL]"
kono
parents:
diff changeset
332 (match_test "(rl78_es_addr (op) && satisfies_constraint_Ch1 (rl78_es_base (op)))
kono
parents:
diff changeset
333 || satisfies_constraint_Ch1 (op)")
kono
parents:
diff changeset
334 )
kono
parents:
diff changeset
335
kono
parents:
diff changeset
336 (define_memory_constraint "Chb"
kono
parents:
diff changeset
337 "[HL+B]"
kono
parents:
diff changeset
338 (and (match_code "mem")
kono
parents:
diff changeset
339 (match_test "rl78_hl_b_c_addr_p (XEXP (op, 0))"))
kono
parents:
diff changeset
340 )
kono
parents:
diff changeset
341 (define_memory_constraint "Whb"
kono
parents:
diff changeset
342 "es:[HL+B]"
kono
parents:
diff changeset
343 (match_test "(rl78_es_addr (op) && satisfies_constraint_Chb (rl78_es_base (op)))
kono
parents:
diff changeset
344 || satisfies_constraint_Chb (op)")
kono
parents:
diff changeset
345 )
kono
parents:
diff changeset
346
kono
parents:
diff changeset
347 (define_memory_constraint "Cs1"
kono
parents:
diff changeset
348 "word8[SP]"
kono
parents:
diff changeset
349 (and (match_code "mem")
kono
parents:
diff changeset
350 (ior
kono
parents:
diff changeset
351 (and (match_code "reg" "0")
kono
parents:
diff changeset
352 (match_test "REGNO (XEXP (op, 0)) == SP_REG"))
kono
parents:
diff changeset
353 (and (match_code "plus" "0")
kono
parents:
diff changeset
354 (and (and (match_code "reg" "00")
kono
parents:
diff changeset
355 (match_test "REGNO (XEXP (XEXP (op, 0), 0)) == SP_REG"))
kono
parents:
diff changeset
356 (and (match_code "const_int" "01")
kono
parents:
diff changeset
357 (match_test "IN_RANGE (INTVAL (XEXP (XEXP (op, 0), 1)), 0, 256 - GET_MODE_SIZE (GET_MODE (op)))")))))
kono
parents:
diff changeset
358 )
kono
parents:
diff changeset
359 )
kono
parents:
diff changeset
360
kono
parents:
diff changeset
361 (define_memory_constraint "Ws1"
kono
parents:
diff changeset
362 "es:word8[SP]"
kono
parents:
diff changeset
363 (match_test "(rl78_es_addr (op) && satisfies_constraint_Cs1 (rl78_es_base (op)))
kono
parents:
diff changeset
364 || satisfies_constraint_Cs1 (op)")
kono
parents:
diff changeset
365 )
kono
parents:
diff changeset
366
kono
parents:
diff changeset
367 (define_constraint "Wfr"
kono
parents:
diff changeset
368 "ES/CS far pointer"
kono
parents:
diff changeset
369 (and (match_code "mem")
kono
parents:
diff changeset
370 (match_test "rl78_far_p (op)"))
kono
parents:
diff changeset
371 )
kono
parents:
diff changeset
372
kono
parents:
diff changeset
373 (define_memory_constraint "Wsa"
kono
parents:
diff changeset
374 "any SADDR memory access"
kono
parents:
diff changeset
375 (and (match_code "mem")
kono
parents:
diff changeset
376 (match_test "rl78_saddr_p (op)"))
kono
parents:
diff changeset
377 )
kono
parents:
diff changeset
378
kono
parents:
diff changeset
379 (define_memory_constraint "Wsf"
kono
parents:
diff changeset
380 "any SFR memory access"
kono
parents:
diff changeset
381 (and (match_code "mem")
kono
parents:
diff changeset
382 (match_test "rl78_sfr_p (op)"))
kono
parents:
diff changeset
383 )
kono
parents:
diff changeset
384
kono
parents:
diff changeset
385 (define_memory_constraint "Y"
kono
parents:
diff changeset
386 "any near legitimate memory access"
kono
parents:
diff changeset
387 (and (match_code "mem")
kono
parents:
diff changeset
388 (match_test "!rl78_far_p (op) && rl78_as_legitimate_address (VOIDmode, XEXP (op, 0), true, ADDR_SPACE_GENERIC)"))
kono
parents:
diff changeset
389 )
kono
parents:
diff changeset
390
kono
parents:
diff changeset
391 (define_memory_constraint "U"
kono
parents:
diff changeset
392 "memory references valid with mov to/from a/ax"
kono
parents:
diff changeset
393 (and (match_code "mem")
kono
parents:
diff changeset
394 (match_test "rl78_virt_insns_ok ()
kono
parents:
diff changeset
395 || satisfies_constraint_Wab (op)
kono
parents:
diff changeset
396 || satisfies_constraint_Wbc (op)
kono
parents:
diff changeset
397 || satisfies_constraint_Wde (op)
kono
parents:
diff changeset
398 || satisfies_constraint_Wd2 (op)
kono
parents:
diff changeset
399 || satisfies_constraint_Whl (op)
kono
parents:
diff changeset
400 || satisfies_constraint_Wh1 (op)
kono
parents:
diff changeset
401 || satisfies_constraint_Whb (op)
kono
parents:
diff changeset
402 || satisfies_constraint_Ws1 (op)
kono
parents:
diff changeset
403 || satisfies_constraint_Wfr (op) ")))
kono
parents:
diff changeset
404
kono
parents:
diff changeset
405 (define_memory_constraint "Qbi"
kono
parents:
diff changeset
406 "built-in compare types"
kono
parents:
diff changeset
407 (match_code "eq,ne,gtu,ltu,geu,leu"))
kono
parents:
diff changeset
408
kono
parents:
diff changeset
409 (define_memory_constraint "Qsc"
kono
parents:
diff changeset
410 "synthetic compares"
kono
parents:
diff changeset
411 (match_code "gt,lt,ge,le"))
kono
parents:
diff changeset
412
kono
parents:
diff changeset
413 (define_constraint "Qs8"
kono
parents:
diff changeset
414 "Integer constant computed from (SUBREG (SYMREF))."
kono
parents:
diff changeset
415 (and (match_code "subreg")
kono
parents:
diff changeset
416 (match_test "GET_CODE (XEXP (op, 0)) == SYMBOL_REF"))
kono
parents:
diff changeset
417 )