Mercurial > hg > CbC > CbC_gcc

annotate gcc/config/rs6000/dfp.md @ 131:84e7813d76e9

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gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children 1830386684a0
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 ;; Decimal Floating Point (DFP) patterns.
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2 ;; Copyright (C) 2007-2018 Free Software Foundation, Inc.
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3 ;; Contributed by Ben Elliston (bje@au.ibm.com) and Peter Bergner
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4 ;; (bergner@vnet.ibm.com).
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5
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6 ;; This file is part of GCC.
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7
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8 ;; GCC is free software; you can redistribute it and/or modify it
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9 ;; under the terms of the GNU General Public License as published
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10 ;; by the Free Software Foundation; either version 3, or (at your
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11 ;; option) any later version.
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12
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13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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14 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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15 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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16 ;; License for more details.
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17
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18 ;; You should have received a copy of the GNU General Public License
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19 ;; along with GCC; see the file COPYING3. If not see
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20 ;; <http://www.gnu.org/licenses/>.
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21
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22 ;;
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23 ;; UNSPEC usage
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24 ;;
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25
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26 (define_c_enum "unspec"
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27 [UNSPEC_MOVSD_LOAD
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28 UNSPEC_MOVSD_STORE
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29 ])
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30
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31
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32 (define_insn "movsd_store"
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33 [(set (match_operand:DD 0 "nonimmediate_operand" "=m")
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34 (unspec:DD [(match_operand:SD 1 "input_operand" "d")]
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35 UNSPEC_MOVSD_STORE))]
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36 "(gpc_reg_operand (operands[0], DDmode)
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37 || gpc_reg_operand (operands[1], SDmode))
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38 && TARGET_HARD_FLOAT"
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39 "stfd%U0%X0 %1,%0"
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40 [(set_attr "type" "fpstore")])
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41
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42 (define_insn "movsd_load"
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43 [(set (match_operand:SD 0 "nonimmediate_operand" "=f")
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44 (unspec:SD [(match_operand:DD 1 "input_operand" "m")]
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45 UNSPEC_MOVSD_LOAD))]
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46 "(gpc_reg_operand (operands[0], SDmode)
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47 || gpc_reg_operand (operands[1], DDmode))
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48 && TARGET_HARD_FLOAT"
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49 "lfd%U1%X1 %0,%1"
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50 [(set_attr "type" "fpload")])
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51
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52 ;; Hardware support for decimal floating point operations.
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53
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54 (define_insn "extendsddd2"
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55 [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
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56 (float_extend:DD (match_operand:SD 1 "gpc_reg_operand" "f")))]
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57 "TARGET_DFP"
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58 "dctdp %0,%1"
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59 [(set_attr "type" "dfp")])
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60
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61 (define_expand "extendsdtd2"
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62 [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
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63 (float_extend:TD (match_operand:SD 1 "gpc_reg_operand" "d")))]
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64 "TARGET_DFP"
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65 {
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66 rtx tmp = gen_reg_rtx (DDmode);
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67 emit_insn (gen_extendsddd2 (tmp, operands[1]));
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68 emit_insn (gen_extendddtd2 (operands[0], tmp));
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69 DONE;
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70 })
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71
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72 (define_insn "truncddsd2"
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73 [(set (match_operand:SD 0 "gpc_reg_operand" "=f")
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74 (float_truncate:SD (match_operand:DD 1 "gpc_reg_operand" "d")))]
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75 "TARGET_DFP"
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76 "drsp %0,%1"
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77 [(set_attr "type" "dfp")])
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78
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79 (define_insn "negdd2"
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80 [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
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81 (neg:DD (match_operand:DD 1 "gpc_reg_operand" "d")))]
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82 "TARGET_HARD_FLOAT"
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83 "fneg %0,%1"
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84 [(set_attr "type" "fpsimple")])
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85
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86 (define_insn "absdd2"
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87 [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
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88 (abs:DD (match_operand:DD 1 "gpc_reg_operand" "d")))]
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89 "TARGET_HARD_FLOAT"
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90 "fabs %0,%1"
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91 [(set_attr "type" "fpsimple")])
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92
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93 (define_insn "*nabsdd2_fpr"
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94 [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
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95 (neg:DD (abs:DD (match_operand:DD 1 "gpc_reg_operand" "d"))))]
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96 "TARGET_HARD_FLOAT"
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97 "fnabs %0,%1"
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98 [(set_attr "type" "fpsimple")])
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99
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100 (define_insn "negtd2"
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101 [(set (match_operand:TD 0 "gpc_reg_operand" "=d,d")
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102 (neg:TD (match_operand:TD 1 "gpc_reg_operand" "0,d")))]
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103 "TARGET_HARD_FLOAT"
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104 "@
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105 fneg %0,%1
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106 fneg %0,%1\;fmr %L0,%L1"
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107 [(set_attr "type" "fpsimple")
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108 (set_attr "length" "4,8")])
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109
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110 (define_insn "abstd2"
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111 [(set (match_operand:TD 0 "gpc_reg_operand" "=d,d")
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112 (abs:TD (match_operand:TD 1 "gpc_reg_operand" "0,d")))]
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113 "TARGET_HARD_FLOAT"
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114 "@
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115 fabs %0,%1
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116 fabs %0,%1\;fmr %L0,%L1"
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117 [(set_attr "type" "fpsimple")
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118 (set_attr "length" "4,8")])
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119
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120 (define_insn "*nabstd2_fpr"
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121 [(set (match_operand:TD 0 "gpc_reg_operand" "=d,d")
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122 (neg:TD (abs:TD (match_operand:TD 1 "gpc_reg_operand" "0,d"))))]
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123 "TARGET_HARD_FLOAT"
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124 "@
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125 fnabs %0,%1
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126 fnabs %0,%1\;fmr %L0,%L1"
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127 [(set_attr "type" "fpsimple")
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128 (set_attr "length" "4,8")])
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129
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130 ;; Hardware support for decimal floating point operations.
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131
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132 (define_insn "extendddtd2"
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133 [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
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134 (float_extend:TD (match_operand:DD 1 "gpc_reg_operand" "d")))]
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135 "TARGET_DFP"
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136 "dctqpq %0,%1"
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137 [(set_attr "type" "dfp")])
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138
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139 ;; The result of drdpq is an even/odd register pair with the converted
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140 ;; value in the even register and zero in the odd register.
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141 ;; FIXME: Avoid the register move by using a reload constraint to ensure
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142 ;; that the result is the first of the pair receiving the result of drdpq.
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143
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144 (define_insn "trunctddd2"
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145 [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
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146 (float_truncate:DD (match_operand:TD 1 "gpc_reg_operand" "d")))
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147 (clobber (match_scratch:TD 2 "=d"))]
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148 "TARGET_DFP"
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149 "drdpq %2,%1\;fmr %0,%2"
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150 [(set_attr "type" "dfp")
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151 (set_attr "length" "8")])
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152
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153 (define_insn "adddd3"
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154 [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
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155 (plus:DD (match_operand:DD 1 "gpc_reg_operand" "%d")
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156 (match_operand:DD 2 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
157 "TARGET_DFP"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
158 "dadd %0,%1,%2"
111
kono
parents: 63
diff changeset
159 [(set_attr "type" "dfp")])
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
160
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
161 (define_insn "addtd3"
55
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
162 [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
163 (plus:TD (match_operand:TD 1 "gpc_reg_operand" "%d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
164 (match_operand:TD 2 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
165 "TARGET_DFP"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
166 "daddq %0,%1,%2"
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kono
parents: 63
diff changeset
167 [(set_attr "type" "dfp")])
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
168
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
169 (define_insn "subdd3"
55
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
170 [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
171 (minus:DD (match_operand:DD 1 "gpc_reg_operand" "d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
172 (match_operand:DD 2 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
173 "TARGET_DFP"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
174 "dsub %0,%1,%2"
111
kono
parents: 63
diff changeset
175 [(set_attr "type" "dfp")])
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
176
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
177 (define_insn "subtd3"
55
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
178 [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
179 (minus:TD (match_operand:TD 1 "gpc_reg_operand" "d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
180 (match_operand:TD 2 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
181 "TARGET_DFP"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
182 "dsubq %0,%1,%2"
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kono
parents: 63
diff changeset
183 [(set_attr "type" "dfp")])
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
184
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
185 (define_insn "muldd3"
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
186 [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
187 (mult:DD (match_operand:DD 1 "gpc_reg_operand" "%d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
188 (match_operand:DD 2 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
189 "TARGET_DFP"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
190 "dmul %0,%1,%2"
111
kono
parents: 63
diff changeset
191 [(set_attr "type" "dfp")])
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
192
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
193 (define_insn "multd3"
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
194 [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
195 (mult:TD (match_operand:TD 1 "gpc_reg_operand" "%d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
196 (match_operand:TD 2 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
197 "TARGET_DFP"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
198 "dmulq %0,%1,%2"
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kono
parents: 63
diff changeset
199 [(set_attr "type" "dfp")])
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
200
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
201 (define_insn "divdd3"
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
202 [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
203 (div:DD (match_operand:DD 1 "gpc_reg_operand" "d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
204 (match_operand:DD 2 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
205 "TARGET_DFP"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
206 "ddiv %0,%1,%2"
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kono
parents: 63
diff changeset
207 [(set_attr "type" "dfp")])
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
208
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
209 (define_insn "divtd3"
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
210 [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
211 (div:TD (match_operand:TD 1 "gpc_reg_operand" "d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
212 (match_operand:TD 2 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
213 "TARGET_DFP"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
214 "ddivq %0,%1,%2"
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kono
parents: 63
diff changeset
215 [(set_attr "type" "dfp")])
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
216
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
217 (define_insn "*cmpdd_internal1"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
218 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
219 (compare:CCFP (match_operand:DD 1 "gpc_reg_operand" "d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
220 (match_operand:DD 2 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
221 "TARGET_DFP"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
222 "dcmpu %0,%1,%2"
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kono
parents: 63
diff changeset
223 [(set_attr "type" "dfp")])
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
224
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
225 (define_insn "*cmptd_internal1"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
226 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
227 (compare:CCFP (match_operand:TD 1 "gpc_reg_operand" "d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
228 (match_operand:TD 2 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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229 "TARGET_DFP"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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230 "dcmpuq %0,%1,%2"
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kono
parents: 63
diff changeset
231 [(set_attr "type" "dfp")])
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diff changeset
232
kono
parents: 63
diff changeset
233 (define_insn "floatdidd2"
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diff changeset
234 [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
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parents: 63
diff changeset
235 (float:DD (match_operand:DI 1 "gpc_reg_operand" "d")))]
kono
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diff changeset
236 "TARGET_DFP && TARGET_POPCNTD"
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parents: 63
diff changeset
237 "dcffix %0,%1"
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parents: 63
diff changeset
238 [(set_attr "type" "dfp")])
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
239
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
240 (define_insn "floatditd2"
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
241 [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
242 (float:TD (match_operand:DI 1 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
243 "TARGET_DFP"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
244 "dcffixq %0,%1"
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kono
parents: 63
diff changeset
245 [(set_attr "type" "dfp")])
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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246
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
247 ;; Convert a decimal64 to a decimal64 whose value is an integer.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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248 ;; This is the first stage of converting it to an integer type.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
249
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 (define_insn "ftruncdd2"
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
251 [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
252 (fix:DD (match_operand:DD 1 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
253 "TARGET_DFP"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
254 "drintn. 0,%0,%1,1"
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kono
parents: 63
diff changeset
255 [(set_attr "type" "dfp")])
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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256
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
257 ;; Convert a decimal64 whose value is an integer to an actual integer.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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258 ;; This is the second stage of converting decimal float to integer type.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
259
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
260 (define_insn "fixdddi2"
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
261 [(set (match_operand:DI 0 "gpc_reg_operand" "=d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
262 (fix:DI (match_operand:DD 1 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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263 "TARGET_DFP"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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264 "dctfix %0,%1"
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kono
parents: 63
diff changeset
265 [(set_attr "type" "dfp")])
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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266
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
267 ;; Convert a decimal128 to a decimal128 whose value is an integer.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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268 ;; This is the first stage of converting it to an integer type.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
269
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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270 (define_insn "ftrunctd2"
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
271 [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
272 (fix:TD (match_operand:TD 1 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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273 "TARGET_DFP"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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274 "drintnq. 0,%0,%1,1"
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kono
parents: 63
diff changeset
275 [(set_attr "type" "dfp")])
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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276
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
277 ;; Convert a decimal128 whose value is an integer to an actual integer.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
278 ;; This is the second stage of converting decimal float to integer type.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
279
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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280 (define_insn "fixtddi2"
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
281 [(set (match_operand:DI 0 "gpc_reg_operand" "=d")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
282 (fix:DI (match_operand:TD 1 "gpc_reg_operand" "d")))]
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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283 "TARGET_DFP"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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284 "dctfixq %0,%1"
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kono
parents: 63
diff changeset
285 [(set_attr "type" "dfp")])
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286
kono
parents: 63
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287
kono
parents: 63
diff changeset
288 ;; Decimal builtin support
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parents: 63
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289
kono
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diff changeset
290 (define_c_enum "unspec"
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parents: 63
diff changeset
291 [UNSPEC_DDEDPD
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parents: 63
diff changeset
292 UNSPEC_DENBCD
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parents: 63
diff changeset
293 UNSPEC_DXEX
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parents: 63
diff changeset
294 UNSPEC_DIEX
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diff changeset
295 UNSPEC_DSCLI
kono
parents: 63
diff changeset
296 UNSPEC_DTSTSFI
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parents: 63
diff changeset
297 UNSPEC_DSCRI])
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298
kono
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diff changeset
299 (define_code_iterator DFP_TEST [eq lt gt unordered])
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300
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parents: 63
diff changeset
301 (define_mode_iterator D64_D128 [DD TD])
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302
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parents: 63
diff changeset
303 (define_mode_attr dfp_suffix [(DD "")
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parents: 63
diff changeset
304 (TD "q")])
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parents: 63
diff changeset
305
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parents: 63
diff changeset
306 (define_insn "dfp_ddedpd_<mode>"
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parents: 63
diff changeset
307 [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")
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parents: 63
diff changeset
308 (unspec:D64_D128 [(match_operand:QI 1 "const_0_to_3_operand" "i")
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parents: 63
diff changeset
309 (match_operand:D64_D128 2 "gpc_reg_operand" "d")]
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diff changeset
310 UNSPEC_DDEDPD))]
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parents: 63
diff changeset
311 "TARGET_DFP"
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parents: 63
diff changeset
312 "ddedpd<dfp_suffix> %1,%0,%2"
kono
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313 [(set_attr "type" "dfp")])
kono
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314
kono
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315 (define_insn "dfp_denbcd_<mode>"
kono
parents: 63
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316 [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")
kono
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317 (unspec:D64_D128 [(match_operand:QI 1 "const_0_to_1_operand" "i")
kono
parents: 63
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318 (match_operand:D64_D128 2 "gpc_reg_operand" "d")]
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parents: 63
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319 UNSPEC_DENBCD))]
kono
parents: 63
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320 "TARGET_DFP"
kono
parents: 63
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321 "denbcd<dfp_suffix> %1,%0,%2"
kono
parents: 63
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322 [(set_attr "type" "dfp")])
kono
parents: 63
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323
kono
parents: 63
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324 (define_insn "dfp_dxex_<mode>"
kono
parents: 63
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325 [(set (match_operand:DI 0 "gpc_reg_operand" "=d")
kono
parents: 63
diff changeset
326 (unspec:DI [(match_operand:D64_D128 1 "gpc_reg_operand" "d")]
kono
parents: 63
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327 UNSPEC_DXEX))]
kono
parents: 63
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328 "TARGET_DFP"
kono
parents: 63
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329 "dxex<dfp_suffix> %0,%1"
kono
parents: 63
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330 [(set_attr "type" "dfp")])
kono
parents: 63
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331
kono
parents: 63
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332 (define_insn "dfp_diex_<mode>"
kono
parents: 63
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333 [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")
kono
parents: 63
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334 (unspec:D64_D128 [(match_operand:DI 1 "gpc_reg_operand" "d")
kono
parents: 63
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335 (match_operand:D64_D128 2 "gpc_reg_operand" "d")]
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parents: 63
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336 UNSPEC_DXEX))]
kono
parents: 63
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337 "TARGET_DFP"
kono
parents: 63
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338 "diex<dfp_suffix> %0,%1,%2"
kono
parents: 63
diff changeset
339 [(set_attr "type" "dfp")])
kono
parents: 63
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340
kono
parents: 63
diff changeset
341 (define_expand "dfptstsfi_<code>_<mode>"
kono
parents: 63
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342 [(set (match_dup 3)
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parents: 63
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343 (compare:CCFP
kono
parents: 63
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344 (unspec:D64_D128
131
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
345 [(match_operand:SI 1 "const_int_operand")
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
346 (match_operand:D64_D128 2 "gpc_reg_operand")]
111
kono
parents: 63
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347 UNSPEC_DTSTSFI)
kono
parents: 63
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348 (match_dup 4)))
131
84e7813d76e9 gcc-8.2
mir3636
parents: 111
diff changeset
349 (set (match_operand:SI 0 "register_operand")
111
kono
parents: 63
diff changeset
350 (DFP_TEST:SI (match_dup 3)
kono
parents: 63
diff changeset
351 (const_int 0)))
kono
parents: 63
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352 ]
kono
parents: 63
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353 "TARGET_P9_MISC"
kono
parents: 63
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354 {
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parents: 63
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355 operands[3] = gen_reg_rtx (CCFPmode);
kono
parents: 63
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356 operands[4] = const0_rtx;
kono
parents: 63
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357 })
kono
parents: 63
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358
kono
parents: 63
diff changeset
359 (define_insn "*dfp_sgnfcnc_<mode>"
kono
parents: 63
diff changeset
360 [(set (match_operand:CCFP 0 "" "=y")
kono
parents: 63
diff changeset
361 (compare:CCFP
kono
parents: 63
diff changeset
362 (unspec:D64_D128 [(match_operand:SI 1 "const_int_operand" "n")
kono
parents: 63
diff changeset
363 (match_operand:D64_D128 2 "gpc_reg_operand" "d")]
kono
parents: 63
diff changeset
364 UNSPEC_DTSTSFI)
kono
parents: 63
diff changeset
365 (match_operand:SI 3 "zero_constant" "j")))]
kono
parents: 63
diff changeset
366 "TARGET_P9_MISC"
kono
parents: 63
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367 {
kono
parents: 63
diff changeset
368 /* If immediate operand is greater than 63, it will behave as if
kono
parents: 63
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369 the value had been 63. The code generator does not support
kono
parents: 63
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370 immediate operand values greater than 63. */
kono
parents: 63
diff changeset
371 if (!(IN_RANGE (INTVAL (operands[1]), 0, 63)))
kono
parents: 63
diff changeset
372 operands[1] = GEN_INT (63);
kono
parents: 63
diff changeset
373 return "dtstsfi<dfp_suffix> %0,%1,%2";
kono
parents: 63
diff changeset
374 }
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
375 [(set_attr "type" "fp")])
111
kono
parents: 63
diff changeset
376
kono
parents: 63
diff changeset
377 (define_insn "dfp_dscli_<mode>"
kono
parents: 63
diff changeset
378 [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")
kono
parents: 63
diff changeset
379 (unspec:D64_D128 [(match_operand:D64_D128 1 "gpc_reg_operand" "d")
kono
parents: 63
diff changeset
380 (match_operand:QI 2 "immediate_operand" "i")]
kono
parents: 63
diff changeset
381 UNSPEC_DSCLI))]
kono
parents: 63
diff changeset
382 "TARGET_DFP"
kono
parents: 63
diff changeset
383 "dscli<dfp_suffix> %0,%1,%2"
kono
parents: 63
diff changeset
384 [(set_attr "type" "dfp")])
kono
parents: 63
diff changeset
385
kono
parents: 63
diff changeset
386 (define_insn "dfp_dscri_<mode>"
kono
parents: 63
diff changeset
387 [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")
kono
parents: 63
diff changeset
388 (unspec:D64_D128 [(match_operand:D64_D128 1 "gpc_reg_operand" "d")
kono
parents: 63
diff changeset
389 (match_operand:QI 2 "immediate_operand" "i")]
kono
parents: 63
diff changeset
390 UNSPEC_DSCRI))]
kono
parents: 63
diff changeset
391 "TARGET_DFP"
kono
parents: 63
diff changeset
392 "dscri<dfp_suffix> %0,%1,%2"
kono
parents: 63
diff changeset
393 [(set_attr "type" "dfp")])