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1 /* PowerPC support for accessing the AUXV AT_PLATFORM, AT_HWCAP and AT_HWCAP2
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2 values from the Thread Control Block (TCB).
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3
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4 Copyright (C) 2016-2018 Free Software Foundation, Inc.
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5 Contributed by Peter Bergner <bergner@vnet.ibm.com>.
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6
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7 This file is part of GCC.
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8
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9 GCC is free software; you can redistribute it and/or modify it
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10 under the terms of the GNU General Public License as published
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11 by the Free Software Foundation; either version 3, or (at your
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12 option) any later version.
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13
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14 GCC is distributed in the hope that it will be useful, but WITHOUT
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15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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17 License for more details.
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18
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19 Under Section 7 of GPL version 3, you are granted additional
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20 permissions described in the GCC Runtime Library Exception, version
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21 3.1, as published by the Free Software Foundation.
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22
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23 You should have received a copy of the GNU General Public License and
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24 a copy of the GCC Runtime Library Exception along with this program;
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25 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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26 <http://www.gnu.org/licenses/>. */
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27
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28 #ifndef _PPC_AUXV_H
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29 #define _PPC_AUXV_H
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30
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31 /* The PLATFORM value stored in the TCB is offset by _DL_FIRST_PLATFORM. */
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32 #define _DL_FIRST_PLATFORM 32
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33
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34 /* AT_PLATFORM bits. These must match the values defined in GLIBC. */
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35 #define PPC_PLATFORM_POWER4 0
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36 #define PPC_PLATFORM_PPC970 1
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37 #define PPC_PLATFORM_POWER5 2
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38 #define PPC_PLATFORM_POWER5_PLUS 3
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39 #define PPC_PLATFORM_POWER6 4
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40 #define PPC_PLATFORM_CELL_BE 5
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41 #define PPC_PLATFORM_POWER6X 6
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42 #define PPC_PLATFORM_POWER7 7
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43 #define PPC_PLATFORM_PPCA2 8
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44 #define PPC_PLATFORM_PPC405 9
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45 #define PPC_PLATFORM_PPC440 10
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46 #define PPC_PLATFORM_PPC464 11
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47 #define PPC_PLATFORM_PPC476 12
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48 #define PPC_PLATFORM_POWER8 13
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49 #define PPC_PLATFORM_POWER9 14
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50
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51 /* AT_HWCAP bits. These must match the values defined in the Linux kernel. */
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52 #define PPC_FEATURE_32 0x80000000
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53 #define PPC_FEATURE_64 0x40000000
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54 #define PPC_FEATURE_601_INSTR 0x20000000
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55 #define PPC_FEATURE_HAS_ALTIVEC 0x10000000
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56 #define PPC_FEATURE_HAS_FPU 0x08000000
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57 #define PPC_FEATURE_HAS_MMU 0x04000000
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58 #define PPC_FEATURE_HAS_4xxMAC 0x02000000
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59 #define PPC_FEATURE_UNIFIED_CACHE 0x01000000
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60 #define PPC_FEATURE_HAS_SPE 0x00800000
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61 #define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000
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62 #define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000
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63 #define PPC_FEATURE_NO_TB 0x00100000
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64 #define PPC_FEATURE_POWER4 0x00080000
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65 #define PPC_FEATURE_POWER5 0x00040000
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66 #define PPC_FEATURE_POWER5_PLUS 0x00020000
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67 #define PPC_FEATURE_CELL_BE 0x00010000
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68 #define PPC_FEATURE_BOOKE 0x00008000
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69 #define PPC_FEATURE_SMT 0x00004000
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70 #define PPC_FEATURE_ICACHE_SNOOP 0x00002000
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71 #define PPC_FEATURE_ARCH_2_05 0x00001000
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72 #define PPC_FEATURE_PA6T 0x00000800
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73 #define PPC_FEATURE_HAS_DFP 0x00000400
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74 #define PPC_FEATURE_POWER6_EXT 0x00000200
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75 #define PPC_FEATURE_ARCH_2_06 0x00000100
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76 #define PPC_FEATURE_HAS_VSX 0x00000080
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77 #define PPC_FEATURE_PERFMON_COMPAT 0x00000040
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78 #define PPC_FEATURE_TRUE_LE 0x00000002
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79 #define PPC_FEATURE_PPC_LE 0x00000001
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80
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81 /* AT_HWCAP2 bits. These must match the values defined in the Linux kernel. */
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82 #define PPC_FEATURE2_ARCH_2_07 0x80000000
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83 #define PPC_FEATURE2_HAS_HTM 0x40000000
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84 #define PPC_FEATURE2_HAS_DSCR 0x20000000
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85 #define PPC_FEATURE2_HAS_EBB 0x10000000
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86 #define PPC_FEATURE2_HAS_ISEL 0x08000000
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87 #define PPC_FEATURE2_HAS_TAR 0x04000000
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88 #define PPC_FEATURE2_HAS_VEC_CRYPTO 0x02000000
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89 #define PPC_FEATURE2_HTM_NOSC 0x01000000
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90 #define PPC_FEATURE2_ARCH_3_00 0x00800000
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91 #define PPC_FEATURE2_HAS_IEEE128 0x00400000
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92 #define PPC_FEATURE2_DARN 0x00200000
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93 #define PPC_FEATURE2_SCV 0x00100000
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94 #define PPC_FEATURE2_HTM_NO_SUSPEND 0x00080000
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95
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96
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97 /* Thread Control Block (TCB) offsets of the AT_PLATFORM, AT_HWCAP and
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98 AT_HWCAP2 values. These must match the values defined in GLIBC. */
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99 #define TCB_PLATFORM_OFFSET ((TARGET_64BIT) ? -28764 : -28724)
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100 #define TCB_HWCAP_BASE_OFFSET ((TARGET_64BIT) ? -28776 : -28736)
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101 #define TCB_HWCAP1_OFFSET \
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102 ((BYTES_BIG_ENDIAN) ? TCB_HWCAP_BASE_OFFSET : TCB_HWCAP_BASE_OFFSET+4)
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103 #define TCB_HWCAP2_OFFSET \
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104 ((BYTES_BIG_ENDIAN) ? TCB_HWCAP_BASE_OFFSET+4 : TCB_HWCAP_BASE_OFFSET)
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105 #define TCB_HWCAP_OFFSET(ID) \
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106 (((ID) == 0) ? TCB_HWCAP1_OFFSET : TCB_HWCAP2_OFFSET)
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107
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108 #endif /* _PPC_AUXV_H */
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