Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/s390/s390.h @ 131:84e7813d76e9
gcc-8.2
| author | mir3636 |
|---|---|
| date | Thu, 25 Oct 2018 07:37:49 +0900 |
| parents | 04ced10e8804 |
| children | 1830386684a0 |
| rev | line source |
|---|---|
| 0 | 1 /* Definitions of target machine for GNU compiler, for IBM S/390 |
| 131 | 2 Copyright (C) 1999-2018 Free Software Foundation, Inc. |
| 0 | 3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and |
| 131 | 4 Ulrich Weigand (uweigand@de.ibm.com). |
| 5 Andreas Krebbel (Andreas.Krebbel@de.ibm.com) | |
| 0 | 6 |
| 7 This file is part of GCC. | |
| 8 | |
| 9 GCC is free software; you can redistribute it and/or modify it under | |
| 10 the terms of the GNU General Public License as published by the Free | |
| 11 Software Foundation; either version 3, or (at your option) any later | |
| 12 version. | |
| 13 | |
| 14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
| 15 WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 17 for more details. | |
| 18 | |
| 19 You should have received a copy of the GNU General Public License | |
| 20 along with GCC; see the file COPYING3. If not see | |
| 21 <http://www.gnu.org/licenses/>. */ | |
| 22 | |
| 23 #ifndef _S390_H | |
| 24 #define _S390_H | |
| 25 | |
| 26 /* Optional architectural facilities supported by the processor. */ | |
| 27 | |
| 28 enum processor_flags | |
| 29 { | |
| 30 PF_IEEE_FLOAT = 1, | |
| 31 PF_ZARCH = 2, | |
| 32 PF_LONG_DISPLACEMENT = 4, | |
| 33 PF_EXTIMM = 8, | |
| 34 PF_DFP = 16, | |
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35 PF_Z10 = 32, |
| 111 | 36 PF_Z196 = 64, |
| 37 PF_ZEC12 = 128, | |
| 38 PF_TX = 256, | |
| 39 PF_Z13 = 512, | |
| 40 PF_VX = 1024, | |
| 131 | 41 PF_Z14 = 2048, |
| 111 | 42 PF_VXE = 4096 |
| 0 | 43 }; |
| 44 | |
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45 /* This is necessary to avoid a warning about comparing different enum |
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46 types. */ |
| 111 | 47 #define s390_tune_attr ((enum attr_cpu)(s390_tune > PROCESSOR_2964_Z13 ? PROCESSOR_2964_Z13 : s390_tune )) |
| 0 | 48 |
| 49 /* These flags indicate that the generated code should run on a cpu | |
| 50 providing the respective hardware facility regardless of the | |
| 51 current cpu mode (ESA or z/Architecture). */ | |
| 52 | |
| 53 #define TARGET_CPU_IEEE_FLOAT \ | |
| 54 (s390_arch_flags & PF_IEEE_FLOAT) | |
| 111 | 55 #define TARGET_CPU_IEEE_FLOAT_P(opts) \ |
| 56 (opts->x_s390_arch_flags & PF_IEEE_FLOAT) | |
| 0 | 57 #define TARGET_CPU_LONG_DISPLACEMENT \ |
| 58 (s390_arch_flags & PF_LONG_DISPLACEMENT) | |
| 111 | 59 #define TARGET_CPU_LONG_DISPLACEMENT_P(opts) \ |
| 60 (opts->x_s390_arch_flags & PF_LONG_DISPLACEMENT) | |
| 0 | 61 #define TARGET_CPU_EXTIMM \ |
| 111 | 62 (s390_arch_flags & PF_EXTIMM) |
| 63 #define TARGET_CPU_EXTIMM_P(opts) \ | |
| 64 (opts->x_s390_arch_flags & PF_EXTIMM) | |
| 0 | 65 #define TARGET_CPU_DFP \ |
| 111 | 66 (s390_arch_flags & PF_DFP) |
| 67 #define TARGET_CPU_DFP_P(opts) \ | |
| 68 (opts->x_s390_arch_flags & PF_DFP) | |
| 0 | 69 #define TARGET_CPU_Z10 \ |
| 111 | 70 (s390_arch_flags & PF_Z10) |
| 71 #define TARGET_CPU_Z10_P(opts) \ | |
| 72 (opts->x_s390_arch_flags & PF_Z10) | |
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73 #define TARGET_CPU_Z196 \ |
| 111 | 74 (s390_arch_flags & PF_Z196) |
| 75 #define TARGET_CPU_Z196_P(opts) \ | |
| 76 (opts->x_s390_arch_flags & PF_Z196) | |
| 77 #define TARGET_CPU_ZEC12 \ | |
| 78 (s390_arch_flags & PF_ZEC12) | |
| 79 #define TARGET_CPU_ZEC12_P(opts) \ | |
| 80 (opts->x_s390_arch_flags & PF_ZEC12) | |
| 81 #define TARGET_CPU_HTM \ | |
| 82 (s390_arch_flags & PF_TX) | |
| 83 #define TARGET_CPU_HTM_P(opts) \ | |
| 84 (opts->x_s390_arch_flags & PF_TX) | |
| 85 #define TARGET_CPU_Z13 \ | |
| 86 (s390_arch_flags & PF_Z13) | |
| 87 #define TARGET_CPU_Z13_P(opts) \ | |
| 88 (opts->x_s390_arch_flags & PF_Z13) | |
| 89 #define TARGET_CPU_VX \ | |
| 90 (s390_arch_flags & PF_VX) | |
| 91 #define TARGET_CPU_VX_P(opts) \ | |
| 92 (opts->x_s390_arch_flags & PF_VX) | |
| 131 | 93 #define TARGET_CPU_Z14 \ |
| 94 (s390_arch_flags & PF_Z14) | |
| 95 #define TARGET_CPU_Z14_P(opts) \ | |
| 96 (opts->x_s390_arch_flags & PF_Z14) | |
| 111 | 97 #define TARGET_CPU_VXE \ |
| 98 (s390_arch_flags & PF_VXE) | |
| 99 #define TARGET_CPU_VXE_P(opts) \ | |
| 100 (opts->x_s390_arch_flags & PF_VXE) | |
| 101 | |
| 102 #define TARGET_HARD_FLOAT_P(opts) (!TARGET_SOFT_FLOAT_P(opts)) | |
| 0 | 103 |
| 104 /* These flags indicate that the generated code should run on a cpu | |
| 105 providing the respective hardware facility when run in | |
| 106 z/Architecture mode. */ | |
| 107 | |
| 108 #define TARGET_LONG_DISPLACEMENT \ | |
| 111 | 109 (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT) |
| 110 #define TARGET_LONG_DISPLACEMENT_P(opts) \ | |
| 111 (TARGET_ZARCH_P (opts->x_target_flags) \ | |
| 112 && TARGET_CPU_LONG_DISPLACEMENT_P (opts)) | |
| 0 | 113 #define TARGET_EXTIMM \ |
| 111 | 114 (TARGET_ZARCH && TARGET_CPU_EXTIMM) |
| 115 #define TARGET_EXTIMM_P(opts) \ | |
| 116 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_EXTIMM_P (opts)) | |
| 0 | 117 #define TARGET_DFP \ |
| 111 | 118 (TARGET_ZARCH && TARGET_CPU_DFP && TARGET_HARD_FLOAT) |
| 119 #define TARGET_DFP_P(opts) \ | |
| 120 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_DFP_P (opts) \ | |
| 121 && TARGET_HARD_FLOAT_P (opts->x_target_flags)) | |
| 0 | 122 #define TARGET_Z10 \ |
| 111 | 123 (TARGET_ZARCH && TARGET_CPU_Z10) |
| 124 #define TARGET_Z10_P(opts) \ | |
| 125 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z10_P (opts)) | |
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126 #define TARGET_Z196 \ |
| 111 | 127 (TARGET_ZARCH && TARGET_CPU_Z196) |
| 128 #define TARGET_Z196_P(opts) \ | |
| 129 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z196_P (opts)) | |
| 130 #define TARGET_ZEC12 \ | |
| 131 (TARGET_ZARCH && TARGET_CPU_ZEC12) | |
| 132 #define TARGET_ZEC12_P(opts) \ | |
| 133 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_ZEC12_P (opts)) | |
| 134 #define TARGET_HTM (TARGET_OPT_HTM) | |
| 135 #define TARGET_HTM_P(opts) (TARGET_OPT_HTM_P (opts->x_target_flags)) | |
| 136 #define TARGET_Z13 \ | |
| 137 (TARGET_ZARCH && TARGET_CPU_Z13) | |
| 138 #define TARGET_Z13_P(opts) \ | |
| 139 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z13_P (opts)) | |
| 140 #define TARGET_VX \ | |
| 141 (TARGET_ZARCH && TARGET_CPU_VX && TARGET_OPT_VX && TARGET_HARD_FLOAT) | |
| 142 #define TARGET_VX_P(opts) \ | |
| 143 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_VX_P (opts) \ | |
| 144 && TARGET_OPT_VX_P (opts->x_target_flags) \ | |
| 145 && TARGET_HARD_FLOAT_P (opts->x_target_flags)) | |
| 131 | 146 #define TARGET_Z14 (TARGET_ZARCH && TARGET_CPU_Z14) |
| 147 #define TARGET_Z14_P(opts) \ | |
| 148 (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z14_P (opts)) | |
| 111 | 149 #define TARGET_VXE \ |
| 150 (TARGET_VX && TARGET_CPU_VXE) | |
| 151 #define TARGET_VXE_P(opts) \ | |
| 152 (TARGET_VX_P (opts) && TARGET_CPU_VXE_P (opts)) | |
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153 |
| 111 | 154 #ifdef HAVE_AS_MACHINE_MACHINEMODE |
| 155 #define S390_USE_TARGET_ATTRIBUTE 1 | |
| 156 #else | |
| 157 #define S390_USE_TARGET_ATTRIBUTE 0 | |
| 158 #endif | |
| 159 | |
| 160 #ifdef HAVE_AS_ARCHITECTURE_MODIFIERS | |
| 161 #define S390_USE_ARCHITECTURE_MODIFIERS 1 | |
| 162 #else | |
| 163 #define S390_USE_ARCHITECTURE_MODIFIERS 0 | |
| 164 #endif | |
| 165 | |
| 166 #if S390_USE_TARGET_ATTRIBUTE | |
| 167 /* For switching between functions with different target attributes. */ | |
| 168 #define SWITCHABLE_TARGET 1 | |
| 169 #endif | |
| 170 | |
| 171 #define TARGET_SUPPORTS_WIDE_INT 1 | |
| 172 | |
| 173 /* Use the ABI introduced with IBM z13: | |
| 174 - pass vector arguments <= 16 bytes in VRs | |
| 175 - align *all* vector types to 8 bytes */ | |
| 176 #define TARGET_VX_ABI TARGET_VX | |
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177 |
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178 #define TARGET_AVOID_CMP_AND_BRANCH (s390_tune == PROCESSOR_2817_Z196) |
| 0 | 179 |
| 131 | 180 /* Issue a write prefetch for the +4 cache line. */ |
| 181 #define TARGET_SETMEM_PREFETCH_DISTANCE 1024 | |
| 182 | |
| 183 /* Expand to a C expressions evaluating to true if a setmem to VAL of | |
| 184 length LEN should be emitted using prefetch instructions. */ | |
| 185 #define TARGET_SETMEM_PFD(VAL,LEN) \ | |
| 186 (TARGET_Z10 \ | |
| 187 && (s390_tune < PROCESSOR_2964_Z13 || (VAL) != const0_rtx) \ | |
| 188 && (!CONST_INT_P (LEN) || INTVAL ((LEN)) > TARGET_SETMEM_PREFETCH_DISTANCE)) | |
| 189 | |
| 0 | 190 /* Run-time target specification. */ |
| 191 | |
| 192 /* Defaults for option flags defined only on some subtargets. */ | |
| 193 #ifndef TARGET_TPF_PROFILING | |
| 194 #define TARGET_TPF_PROFILING 0 | |
| 195 #endif | |
| 196 | |
| 197 /* This will be overridden by OS headers. */ | |
| 198 #define TARGET_TPF 0 | |
| 199 | |
| 200 /* Target CPU builtins. */ | |
| 111 | 201 #define TARGET_CPU_CPP_BUILTINS() s390_cpu_cpp_builtins (pfile) |
| 0 | 202 |
| 203 #ifdef DEFAULT_TARGET_64BIT | |
| 111 | 204 #define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP \ |
| 131 | 205 | MASK_OPT_HTM | MASK_OPT_VX) |
| 0 | 206 #else |
| 207 #define TARGET_DEFAULT 0 | |
| 208 #endif | |
| 209 | |
| 210 /* Support for configure-time defaults. */ | |
| 131 | 211 #define OPTION_DEFAULT_SPECS \ |
| 0 | 212 { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" }, \ |
| 213 { "arch", "%{!march=*:-march=%(VALUE)}" }, \ | |
| 131 | 214 { "tune", "%{!mtune=*:%{!march=*:-mtune=%(VALUE)}}" } |
| 0 | 215 |
| 111 | 216 #ifdef __s390__ |
| 217 extern const char *s390_host_detect_local_cpu (int argc, const char **argv); | |
| 218 # define EXTRA_SPEC_FUNCTIONS \ | |
| 219 { "local_cpu_detect", s390_host_detect_local_cpu }, | |
| 220 | |
| 221 #define MARCH_MTUNE_NATIVE_SPECS \ | |
| 222 "%{mtune=native:%<mtune=native %:local_cpu_detect(tune)} " \ | |
| 223 "%{march=native:%<march=native" \ | |
| 224 " %:local_cpu_detect(arch %{mesa|mzarch:mesa_mzarch})}" | |
| 0 | 225 #else |
| 111 | 226 # define MARCH_MTUNE_NATIVE_SPECS "" |
| 0 | 227 #endif |
| 228 | |
| 229 #ifdef DEFAULT_TARGET_64BIT | |
| 111 | 230 #define S390_TARGET_BITS_STRING "64" |
| 0 | 231 #else |
| 111 | 232 #define S390_TARGET_BITS_STRING "31" |
| 0 | 233 #endif |
| 234 | |
| 111 | 235 /* Defaulting rules. */ |
| 236 #define DRIVER_SELF_SPECS \ | |
| 237 MARCH_MTUNE_NATIVE_SPECS, \ | |
| 238 "%{!m31:%{!m64:-m" S390_TARGET_BITS_STRING "}}", \ | |
| 239 "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \ | |
| 240 "%{!march=*:-march=z900}" | |
| 241 | |
| 0 | 242 /* Constants needed to control the TEST DATA CLASS (TDC) instruction. */ |
| 243 #define S390_TDC_POSITIVE_ZERO (1 << 11) | |
| 244 #define S390_TDC_NEGATIVE_ZERO (1 << 10) | |
| 245 #define S390_TDC_POSITIVE_NORMALIZED_BFP_NUMBER (1 << 9) | |
| 246 #define S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER (1 << 8) | |
| 247 #define S390_TDC_POSITIVE_DENORMALIZED_BFP_NUMBER (1 << 7) | |
| 248 #define S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER (1 << 6) | |
| 249 #define S390_TDC_POSITIVE_INFINITY (1 << 5) | |
| 250 #define S390_TDC_NEGATIVE_INFINITY (1 << 4) | |
| 251 #define S390_TDC_POSITIVE_QUIET_NAN (1 << 3) | |
| 252 #define S390_TDC_NEGATIVE_QUIET_NAN (1 << 2) | |
| 253 #define S390_TDC_POSITIVE_SIGNALING_NAN (1 << 1) | |
| 254 #define S390_TDC_NEGATIVE_SIGNALING_NAN (1 << 0) | |
| 255 | |
| 256 /* The following values are different for DFP. */ | |
| 257 #define S390_TDC_POSITIVE_DENORMALIZED_DFP_NUMBER (1 << 9) | |
| 258 #define S390_TDC_NEGATIVE_DENORMALIZED_DFP_NUMBER (1 << 8) | |
| 259 #define S390_TDC_POSITIVE_NORMALIZED_DFP_NUMBER (1 << 7) | |
| 260 #define S390_TDC_NEGATIVE_NORMALIZED_DFP_NUMBER (1 << 6) | |
| 261 | |
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262 /* For signbit, the BFP-DFP-difference makes no difference. */ |
| 0 | 263 #define S390_TDC_SIGNBIT_SET (S390_TDC_NEGATIVE_ZERO \ |
| 131 | 264 | S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER \ |
| 265 | S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER\ | |
| 266 | S390_TDC_NEGATIVE_INFINITY \ | |
| 267 | S390_TDC_NEGATIVE_QUIET_NAN \ | |
| 0 | 268 | S390_TDC_NEGATIVE_SIGNALING_NAN ) |
| 269 | |
| 270 #define S390_TDC_INFINITY (S390_TDC_POSITIVE_INFINITY \ | |
| 271 | S390_TDC_NEGATIVE_INFINITY ) | |
| 272 | |
| 273 /* Target machine storage layout. */ | |
| 274 | |
| 275 /* Everything is big-endian. */ | |
| 276 #define BITS_BIG_ENDIAN 1 | |
| 277 #define BYTES_BIG_ENDIAN 1 | |
| 278 #define WORDS_BIG_ENDIAN 1 | |
| 279 | |
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280 #define STACK_SIZE_MODE (Pmode) |
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281 |
| 0 | 282 #ifndef IN_LIBGCC2 |
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283 |
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284 /* Width of a word, in units (bytes). */ |
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285 #define UNITS_PER_WORD (TARGET_ZARCH ? 8 : 4) |
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286 |
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287 /* Width of a pointer. To be used instead of UNITS_PER_WORD in |
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288 ABI-relevant contexts. This always matches |
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289 GET_MODE_SIZE (Pmode). */ |
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290 #define UNITS_PER_LONG (TARGET_64BIT ? 8 : 4) |
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291 #define MIN_UNITS_PER_WORD 4 |
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292 #define MAX_BITS_PER_WORD 64 |
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293 #else |
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294 |
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295 /* In libgcc, UNITS_PER_WORD has ABI-relevant effects, e.g. whether |
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296 the library should export TImode functions or not. Thus, we have |
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297 to redefine UNITS_PER_WORD depending on __s390x__ for libgcc. */ |
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298 #ifdef __s390x__ |
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299 #define UNITS_PER_WORD 8 |
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300 #else |
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301 #define UNITS_PER_WORD 4 |
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302 #endif |
| 0 | 303 #endif |
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304 |
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305 /* Width of a pointer, in bits. */ |
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306 #define POINTER_SIZE (TARGET_64BIT ? 64 : 32) |
| 0 | 307 |
| 308 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
| 309 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32) | |
| 310 | |
| 311 /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
| 312 #define STACK_BOUNDARY 64 | |
| 313 | |
| 314 /* Allocation boundary (in *bits*) for the code of a function. */ | |
| 111 | 315 #define FUNCTION_BOUNDARY 64 |
| 0 | 316 |
| 317 /* There is no point aligning anything to a rounder boundary than this. */ | |
| 318 #define BIGGEST_ALIGNMENT 64 | |
| 319 | |
| 320 /* Alignment of field after `int : 0' in a structure. */ | |
| 321 #define EMPTY_FIELD_BOUNDARY 32 | |
| 322 | |
| 323 /* Alignment on even addresses for LARL instruction. */ | |
| 111 | 324 #define DATA_ABI_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN) |
| 0 | 325 |
| 326 /* Alignment is not required by the hardware. */ | |
| 327 #define STRICT_ALIGNMENT 0 | |
| 328 | |
| 329 /* Mode of stack savearea. | |
| 330 FUNCTION is VOIDmode because calling convention maintains SP. | |
| 331 BLOCK needs Pmode for SP. | |
| 332 NONLOCAL needs twice Pmode to maintain both backchain and SP. */ | |
| 111 | 333 #define STACK_SAVEAREA_MODE(LEVEL) \ |
| 334 ((LEVEL) == SAVE_FUNCTION ? VOIDmode \ | |
| 335 : (LEVEL) == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode) | |
| 0 | 336 |
| 337 | |
| 338 /* Type layout. */ | |
| 339 | |
| 340 /* Sizes in bits of the source language data types. */ | |
| 341 #define SHORT_TYPE_SIZE 16 | |
| 342 #define INT_TYPE_SIZE 32 | |
| 343 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32) | |
| 344 #define LONG_LONG_TYPE_SIZE 64 | |
| 345 #define FLOAT_TYPE_SIZE 32 | |
| 346 #define DOUBLE_TYPE_SIZE 64 | |
| 347 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64) | |
| 348 | |
| 349 /* Work around target_flags dependency in ada/targtyps.c. */ | |
| 350 #define WIDEST_HARDWARE_FP_SIZE 64 | |
| 351 | |
| 352 /* We use "unsigned char" as default. */ | |
| 353 #define DEFAULT_SIGNED_CHAR 0 | |
| 354 | |
| 355 | |
| 356 /* Register usage. */ | |
| 357 | |
| 358 /* We have 16 general purpose registers (registers 0-15), | |
| 359 and 16 floating point registers (registers 16-31). | |
| 360 (On non-IEEE machines, we have only 4 fp registers.) | |
| 361 | |
| 362 Amongst the general purpose registers, some are used | |
| 363 for specific purposes: | |
| 364 GPR 11: Hard frame pointer (if needed) | |
| 365 GPR 12: Global offset table pointer (if needed) | |
| 366 GPR 13: Literal pool base register | |
| 367 GPR 14: Return address register | |
| 368 GPR 15: Stack pointer | |
| 369 | |
| 370 Registers 32-35 are 'fake' hard registers that do not | |
| 371 correspond to actual hardware: | |
| 372 Reg 32: Argument pointer | |
| 373 Reg 33: Condition code | |
|
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374 Reg 34: Frame pointer |
| 0 | 375 Reg 35: Return address pointer |
| 376 | |
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377 Registers 36 and 37 are mapped to access registers |
| 111 | 378 0 and 1, used to implement thread-local storage. |
| 0 | 379 |
| 111 | 380 Reg 38-53: Vector registers v16-v31 */ |
| 381 | |
| 382 #define FIRST_PSEUDO_REGISTER 54 | |
| 0 | 383 |
| 384 /* Standard register usage. */ | |
| 385 #define GENERAL_REGNO_P(N) ((int)(N) >= 0 && (N) < 16) | |
| 386 #define ADDR_REGNO_P(N) ((N) >= 1 && (N) < 16) | |
| 387 #define FP_REGNO_P(N) ((N) >= 16 && (N) < 32) | |
| 388 #define CC_REGNO_P(N) ((N) == 33) | |
| 389 #define FRAME_REGNO_P(N) ((N) == 32 || (N) == 34 || (N) == 35) | |
| 390 #define ACCESS_REGNO_P(N) ((N) == 36 || (N) == 37) | |
| 111 | 391 #define VECTOR_NOFP_REGNO_P(N) ((N) >= 38 && (N) <= 53) |
| 392 #define VECTOR_REGNO_P(N) (FP_REGNO_P (N) || VECTOR_NOFP_REGNO_P (N)) | |
| 0 | 393 |
| 394 #define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X))) | |
| 395 #define ADDR_REG_P(X) (REG_P (X) && ADDR_REGNO_P (REGNO (X))) | |
| 396 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X))) | |
| 397 #define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X))) | |
| 398 #define FRAME_REG_P(X) (REG_P (X) && FRAME_REGNO_P (REGNO (X))) | |
| 399 #define ACCESS_REG_P(X) (REG_P (X) && ACCESS_REGNO_P (REGNO (X))) | |
| 111 | 400 #define VECTOR_NOFP_REG_P(X) (REG_P (X) && VECTOR_NOFP_REGNO_P (REGNO (X))) |
| 401 #define VECTOR_REG_P(X) (REG_P (X) && VECTOR_REGNO_P (REGNO (X))) | |
| 0 | 402 |
| 403 /* Set up fixed registers and calling convention: | |
| 404 | |
| 405 GPRs 0-5 are always call-clobbered, | |
| 406 GPRs 6-15 are always call-saved. | |
| 407 GPR 12 is fixed if used as GOT pointer. | |
| 408 GPR 13 is always fixed (as literal pool pointer). | |
| 409 GPR 14 is always fixed on S/390 machines (as return address). | |
| 410 GPR 15 is always fixed (as stack pointer). | |
| 411 The 'fake' hard registers are call-clobbered and fixed. | |
| 412 The access registers are call-saved and fixed. | |
| 413 | |
| 414 On 31-bit, FPRs 18-19 are call-clobbered; | |
| 415 on 64-bit, FPRs 24-31 are call-clobbered. | |
| 111 | 416 The remaining FPRs are call-saved. |
| 417 | |
| 418 All non-FP vector registers are call-clobbered v16-v31. */ | |
| 0 | 419 |
| 420 #define FIXED_REGISTERS \ | |
| 131 | 421 { 0, 0, 0, 0, \ |
| 422 0, 0, 0, 0, \ | |
| 423 0, 0, 0, 0, \ | |
| 0 | 424 0, 1, 1, 1, \ |
| 131 | 425 0, 0, 0, 0, \ |
| 426 0, 0, 0, 0, \ | |
| 427 0, 0, 0, 0, \ | |
| 428 0, 0, 0, 0, \ | |
| 0 | 429 1, 1, 1, 1, \ |
| 111 | 430 1, 1, \ |
| 131 | 431 0, 0, 0, 0, \ |
| 432 0, 0, 0, 0, \ | |
| 433 0, 0, 0, 0, \ | |
| 111 | 434 0, 0, 0, 0 } |
| 0 | 435 |
| 436 #define CALL_USED_REGISTERS \ | |
| 131 | 437 { 1, 1, 1, 1, \ |
| 438 1, 1, 0, 0, \ | |
| 439 0, 0, 0, 0, \ | |
| 0 | 440 0, 1, 1, 1, \ |
| 131 | 441 1, 1, 1, 1, \ |
| 442 1, 1, 1, 1, \ | |
| 443 1, 1, 1, 1, \ | |
| 444 1, 1, 1, 1, \ | |
| 0 | 445 1, 1, 1, 1, \ |
| 131 | 446 1, 1, \ |
| 111 | 447 1, 1, 1, 1, \ |
| 131 | 448 1, 1, 1, 1, \ |
| 449 1, 1, 1, 1, \ | |
| 111 | 450 1, 1, 1, 1 } |
| 0 | 451 |
| 452 #define CALL_REALLY_USED_REGISTERS \ | |
| 131 | 453 { 1, 1, 1, 1, /* r0 - r15 */ \ |
| 454 1, 1, 0, 0, \ | |
| 455 0, 0, 0, 0, \ | |
| 0 | 456 0, 0, 0, 0, \ |
| 131 | 457 1, 1, 1, 1, /* f0 (16) - f15 (31) */ \ |
| 458 1, 1, 1, 1, \ | |
| 459 1, 1, 1, 1, \ | |
| 460 1, 1, 1, 1, \ | |
| 111 | 461 1, 1, 1, 1, /* arg, cc, fp, ret addr */ \ |
| 131 | 462 0, 0, /* a0 (36), a1 (37) */ \ |
| 463 1, 1, 1, 1, /* v16 (38) - v23 (45) */ \ | |
| 0 | 464 1, 1, 1, 1, \ |
| 131 | 465 1, 1, 1, 1, /* v24 (46) - v31 (53) */ \ |
| 111 | 466 1, 1, 1, 1 } |
| 0 | 467 |
| 468 /* Preferred register allocation order. */ | |
| 111 | 469 #define REG_ALLOC_ORDER \ |
| 470 { 1, 2, 3, 4, 5, 0, 12, 11, 10, 9, 8, 7, 6, 14, 13, \ | |
| 471 16, 17, 18, 19, 20, 21, 22, 23, \ | |
| 472 24, 25, 26, 27, 28, 29, 30, 31, \ | |
| 131 | 473 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, \ |
| 111 | 474 15, 32, 33, 34, 35, 36, 37 } |
| 0 | 475 |
| 476 | |
| 477 #define HARD_REGNO_RENAME_OK(FROM, TO) \ | |
| 111 | 478 s390_hard_regno_rename_ok ((FROM), (TO)) |
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479 |
| 0 | 480 /* Maximum number of registers to represent a value of mode MODE |
| 481 in a register of class CLASS. */ | |
| 131 | 482 #define CLASS_MAX_NREGS(CLASS, MODE) \ |
| 0 | 483 s390_class_max_nregs ((CLASS), (MODE)) |
| 484 | |
| 111 | 485 /* We can reverse a CC mode safely if we know whether it comes from a |
| 486 floating point compare or not. With the vector modes it is encoded | |
| 487 as part of the mode. | |
| 488 FIXME: It might make sense to do this for other cc modes as well. */ | |
| 489 #define REVERSIBLE_CC_MODE(MODE) \ | |
| 490 ((MODE) == CCVIALLmode || (MODE) == CCVIANYmode \ | |
| 491 || (MODE) == CCVFALLmode || (MODE) == CCVFANYmode) | |
| 492 | |
| 493 /* Given a condition code and a mode, return the inverse condition. */ | |
| 494 #define REVERSE_CONDITION(CODE, MODE) s390_reverse_condition (MODE, CODE) | |
| 495 | |
| 0 | 496 |
| 497 /* Register classes. */ | |
| 498 | |
| 499 /* We use the following register classes: | |
| 500 GENERAL_REGS All general purpose registers | |
| 501 ADDR_REGS All general purpose registers except %r0 | |
| 131 | 502 (These registers can be used in address generation) |
| 0 | 503 FP_REGS All floating point registers |
| 504 CC_REGS The condition code register | |
| 505 ACCESS_REGS The access registers | |
| 506 | |
| 507 GENERAL_FP_REGS Union of GENERAL_REGS and FP_REGS | |
| 508 ADDR_FP_REGS Union of ADDR_REGS and FP_REGS | |
| 509 GENERAL_CC_REGS Union of GENERAL_REGS and CC_REGS | |
| 510 ADDR_CC_REGS Union of ADDR_REGS and CC_REGS | |
| 511 | |
| 512 NO_REGS No registers | |
| 513 ALL_REGS All registers | |
| 514 | |
| 515 Note that the 'fake' frame pointer and argument pointer registers | |
| 516 are included amongst the address registers here. */ | |
| 517 | |
| 518 enum reg_class | |
| 519 { | |
| 520 NO_REGS, CC_REGS, ADDR_REGS, GENERAL_REGS, ACCESS_REGS, | |
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521 ADDR_CC_REGS, GENERAL_CC_REGS, |
| 0 | 522 FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, |
| 111 | 523 VEC_REGS, ADDR_VEC_REGS, GENERAL_VEC_REGS, |
| 0 | 524 ALL_REGS, LIM_REG_CLASSES |
| 525 }; | |
| 526 #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
| 527 | |
| 528 #define REG_CLASS_NAMES \ | |
| 529 { "NO_REGS", "CC_REGS", "ADDR_REGS", "GENERAL_REGS", "ACCESS_REGS", \ | |
| 530 "ADDR_CC_REGS", "GENERAL_CC_REGS", \ | |
| 111 | 531 "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", \ |
| 532 "VEC_REGS", "ADDR_VEC_REGS", "GENERAL_VEC_REGS", \ | |
| 533 "ALL_REGS" } | |
| 0 | 534 |
| 535 /* Class -> register mapping. */ | |
| 111 | 536 #define REG_CLASS_CONTENTS \ |
| 537 { \ | |
| 0 | 538 { 0x00000000, 0x00000000 }, /* NO_REGS */ \ |
| 539 { 0x00000000, 0x00000002 }, /* CC_REGS */ \ | |
| 540 { 0x0000fffe, 0x0000000d }, /* ADDR_REGS */ \ | |
| 541 { 0x0000ffff, 0x0000000d }, /* GENERAL_REGS */ \ | |
| 542 { 0x00000000, 0x00000030 }, /* ACCESS_REGS */ \ | |
| 543 { 0x0000fffe, 0x0000000f }, /* ADDR_CC_REGS */ \ | |
| 544 { 0x0000ffff, 0x0000000f }, /* GENERAL_CC_REGS */ \ | |
| 545 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \ | |
| 546 { 0xfffffffe, 0x0000000d }, /* ADDR_FP_REGS */ \ | |
| 547 { 0xffffffff, 0x0000000d }, /* GENERAL_FP_REGS */ \ | |
| 111 | 548 { 0xffff0000, 0x003fffc0 }, /* VEC_REGS */ \ |
| 549 { 0xfffffffe, 0x003fffcd }, /* ADDR_VEC_REGS */ \ | |
| 550 { 0xffffffff, 0x003fffcd }, /* GENERAL_VEC_REGS */ \ | |
| 551 { 0xffffffff, 0x003fffff }, /* ALL_REGS */ \ | |
| 0 | 552 } |
| 553 | |
| 554 /* In some case register allocation order is not enough for IRA to | |
| 555 generate a good code. The following macro (if defined) increases | |
| 556 cost of REGNO for a pseudo approximately by pseudo usage frequency | |
| 557 multiplied by the macro value. | |
| 558 | |
| 559 We avoid usage of BASE_REGNUM by nonzero macro value because the | |
| 560 reload can decide not to use the hard register because some | |
| 561 constant was forced to be in memory. */ | |
| 562 #define IRA_HARD_REGNO_ADD_COST_MULTIPLIER(regno) \ | |
| 111 | 563 ((regno) != BASE_REGNUM ? 0.0 : 0.5) |
| 0 | 564 |
| 565 /* Register -> class mapping. */ | |
| 566 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; | |
| 567 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) | |
| 568 | |
| 569 /* ADDR_REGS can be used as base or index register. */ | |
| 570 #define INDEX_REG_CLASS ADDR_REGS | |
| 571 #define BASE_REG_CLASS ADDR_REGS | |
| 572 | |
| 573 /* Check whether REGNO is a hard register of the suitable class | |
| 574 or a pseudo register currently allocated to one such. */ | |
| 575 #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
| 131 | 576 (((REGNO) < FIRST_PSEUDO_REGISTER \ |
| 577 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \ | |
| 0 | 578 || ADDR_REGNO_P (reg_renumber[REGNO])) |
| 579 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO) | |
| 580 | |
| 581 | |
| 582 /* Stack layout and calling conventions. */ | |
| 583 | |
| 584 /* Our stack grows from higher to lower addresses. However, local variables | |
| 585 are accessed by positive offsets, and function arguments are stored at | |
| 586 increasing addresses. */ | |
| 111 | 587 #define STACK_GROWS_DOWNWARD 1 |
| 0 | 588 #define FRAME_GROWS_DOWNWARD 1 |
| 589 /* #undef ARGS_GROW_DOWNWARD */ | |
| 590 | |
| 591 /* The basic stack layout looks like this: the stack pointer points | |
| 592 to the register save area for called functions. Above that area | |
| 593 is the location to place outgoing arguments. Above those follow | |
| 594 dynamic allocations (alloca), and finally the local variables. */ | |
| 595 | |
| 596 /* Offset from stack-pointer to first location of outgoing args. */ | |
| 597 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96) | |
| 598 | |
| 599 /* Offset from the stack pointer register to an item dynamically | |
| 600 allocated on the stack, e.g., by `alloca'. */ | |
| 601 #define STACK_DYNAMIC_OFFSET(FUNDECL) \ | |
| 602 (STACK_POINTER_OFFSET + crtl->outgoing_args_size) | |
| 603 | |
| 604 /* Offset of first parameter from the argument pointer register value. | |
| 605 We have a fake argument pointer register that points directly to | |
| 606 the argument area. */ | |
| 607 #define FIRST_PARM_OFFSET(FNDECL) 0 | |
| 608 | |
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609 /* Defining this macro makes __builtin_frame_address(0) and |
| 0 | 610 __builtin_return_address(0) work with -fomit-frame-pointer. */ |
| 611 #define INITIAL_FRAME_ADDRESS_RTX \ | |
| 111 | 612 (plus_constant (Pmode, arg_pointer_rtx, -STACK_POINTER_OFFSET)) |
| 0 | 613 |
| 614 /* The return address of the current frame is retrieved | |
| 615 from the initial value of register RETURN_REGNUM. | |
| 616 For frames farther back, we use the stack slot where | |
| 617 the corresponding RETURN_REGNUM register was saved. */ | |
| 618 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \ | |
| 619 (TARGET_PACKED_STACK ? \ | |
| 111 | 620 plus_constant (Pmode, (FRAME), \ |
| 621 STACK_POINTER_OFFSET - UNITS_PER_LONG) : (FRAME)) | |
| 0 | 622 |
| 623 /* For -mpacked-stack this adds 160 - 8 (96 - 4) to the output of | |
| 624 builtin_frame_address. Otherwise arg pointer - | |
| 625 STACK_POINTER_OFFSET would be returned for | |
| 626 __builtin_frame_address(0) what might result in an address pointing | |
| 627 somewhere into the middle of the local variables since the packed | |
| 628 stack layout generally does not need all the bytes in the register | |
| 629 save area. */ | |
| 630 #define FRAME_ADDR_RTX(FRAME) \ | |
| 631 DYNAMIC_CHAIN_ADDRESS ((FRAME)) | |
| 632 | |
| 633 #define RETURN_ADDR_RTX(COUNT, FRAME) \ | |
| 634 s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME))) | |
| 635 | |
| 636 /* In 31-bit mode, we need to mask off the high bit of return addresses. */ | |
| 637 #define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff)) | |
| 638 | |
| 639 | |
| 640 /* Exception handling. */ | |
| 641 | |
| 642 /* Describe calling conventions for DWARF-2 exception handling. */ | |
| 643 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM) | |
| 644 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET | |
| 645 #define DWARF_FRAME_RETURN_COLUMN 14 | |
| 646 | |
| 647 /* Describe how we implement __builtin_eh_return. */ | |
| 648 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM) | |
| 649 #define EH_RETURN_HANDLER_RTX gen_rtx_MEM (Pmode, return_address_pointer_rtx) | |
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650 |
| 0 | 651 /* Select a format to encode pointers in exception handling data. */ |
| 652 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ | |
| 653 (flag_pic \ | |
| 654 ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \ | |
| 655 : DW_EH_PE_absptr) | |
| 656 | |
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657 /* Register save slot alignment. */ |
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658 #define DWARF_CIE_DATA_ALIGNMENT (-UNITS_PER_LONG) |
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659 |
| 111 | 660 /* Let the assembler generate debug line info. */ |
| 661 #define DWARF2_ASM_LINE_DEBUG_INFO 1 | |
| 662 | |
| 663 /* Define the dwarf register mapping. | |
| 664 v16-v31 -> 68-83 | |
| 665 rX -> X otherwise */ | |
| 666 #define DBX_REGISTER_NUMBER(regno) \ | |
| 667 (((regno) >= 38 && (regno) <= 53) ? (regno) + 30 : (regno)) | |
| 0 | 668 |
| 669 /* Frame registers. */ | |
| 670 | |
| 671 #define STACK_POINTER_REGNUM 15 | |
| 672 #define FRAME_POINTER_REGNUM 34 | |
| 673 #define HARD_FRAME_POINTER_REGNUM 11 | |
| 674 #define ARG_POINTER_REGNUM 32 | |
| 675 #define RETURN_ADDRESS_POINTER_REGNUM 35 | |
| 676 | |
| 677 /* The static chain must be call-clobbered, but not used for | |
| 678 function argument passing. As register 1 is clobbered by | |
| 679 the trampoline code, we only have one option. */ | |
| 680 #define STATIC_CHAIN_REGNUM 0 | |
| 681 | |
| 682 /* Number of hardware registers that go into the DWARF-2 unwind info. | |
| 683 To avoid ABI incompatibility, this number must not change even as | |
| 684 'fake' hard registers are added or removed. */ | |
| 685 #define DWARF_FRAME_REGISTERS 34 | |
| 686 | |
| 687 | |
| 688 /* Frame pointer and argument pointer elimination. */ | |
| 689 | |
| 690 #define ELIMINABLE_REGS \ | |
| 691 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ | |
| 692 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \ | |
| 693 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ | |
| 694 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \ | |
| 695 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ | |
| 696 { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \ | |
| 697 { BASE_REGNUM, BASE_REGNUM }} | |
| 698 | |
| 699 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
| 700 (OFFSET) = s390_initial_elimination_offset ((FROM), (TO)) | |
| 701 | |
| 702 | |
| 703 /* Stack arguments. */ | |
| 704 | |
| 705 /* We need current_function_outgoing_args to be valid. */ | |
| 706 #define ACCUMULATE_OUTGOING_ARGS 1 | |
| 707 | |
| 708 | |
| 709 /* Register arguments. */ | |
| 710 | |
| 711 typedef struct s390_arg_structure | |
| 712 { | |
| 713 int gprs; /* gpr so far */ | |
| 714 int fprs; /* fpr so far */ | |
| 111 | 715 int vrs; /* vr so far */ |
| 0 | 716 } |
| 717 CUMULATIVE_ARGS; | |
| 718 | |
| 719 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \ | |
| 111 | 720 ((CUM).gprs=0, (CUM).fprs=0, (CUM).vrs=0) |
| 721 | |
| 722 #define FIRST_VEC_ARG_REGNO 46 | |
| 723 #define LAST_VEC_ARG_REGNO 53 | |
| 0 | 724 |
| 725 /* Arguments can be placed in general registers 2 to 6, or in floating | |
| 726 point registers 0 and 2 for 31 bit and fprs 0, 2, 4 and 6 for 64 | |
| 727 bit. */ | |
| 111 | 728 #define FUNCTION_ARG_REGNO_P(N) \ |
| 729 (((N) >=2 && (N) < 7) || (N) == 16 || (N) == 17 \ | |
| 730 || (TARGET_64BIT && ((N) == 18 || (N) == 19)) \ | |
| 731 || (TARGET_VX && ((N) >= FIRST_VEC_ARG_REGNO && (N) <= LAST_VEC_ARG_REGNO))) | |
| 0 | 732 |
| 733 | |
| 111 | 734 /* Only gpr 2, fpr 0, and v24 are ever used as return registers. */ |
| 735 #define FUNCTION_VALUE_REGNO_P(N) \ | |
| 736 ((N) == 2 || (N) == 16 \ | |
| 737 || (TARGET_VX && (N) == FIRST_VEC_ARG_REGNO)) | |
| 0 | 738 |
| 739 | |
| 740 /* Function entry and exit. */ | |
| 741 | |
| 742 /* When returning from a function, the stack pointer does not matter. */ | |
| 743 #define EXIT_IGNORE_STACK 1 | |
| 744 | |
| 745 | |
| 746 /* Profiling. */ | |
| 747 | |
| 131 | 748 #define FUNCTION_PROFILER(FILE, LABELNO) \ |
| 0 | 749 s390_function_profiler ((FILE), ((LABELNO))) |
| 750 | |
| 751 #define PROFILE_BEFORE_PROLOGUE 1 | |
| 752 | |
| 753 | |
| 754 /* Trampolines for nested functions. */ | |
| 755 | |
|
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756 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 32 : 16) |
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757 #define TRAMPOLINE_ALIGNMENT BITS_PER_WORD |
| 0 | 758 |
| 759 /* Addressing modes, and classification of registers for them. */ | |
| 760 | |
| 761 /* Recognize any constant value that is a valid address. */ | |
| 762 #define CONSTANT_ADDRESS_P(X) 0 | |
| 763 | |
| 764 /* Maximum number of registers that can appear in a valid memory address. */ | |
| 765 #define MAX_REGS_PER_ADDRESS 2 | |
| 766 | |
| 767 /* This definition replaces the formerly used 'm' constraint with a | |
|
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768 different constraint letter in order to avoid changing semantics of |
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769 the 'm' constraint when accepting new address formats in |
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770 TARGET_LEGITIMATE_ADDRESS_P. The constraint letter defined here |
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771 must not be used in insn definitions or inline assemblies. */ |
| 0 | 772 #define TARGET_MEM_CONSTRAINT 'e' |
| 773 | |
| 774 /* Try a machine-dependent way of reloading an illegitimate address | |
| 775 operand. If we find one, push the reload and jump to WIN. This | |
| 776 macro is used in only one place: `find_reloads_address' in reload.c. */ | |
| 777 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \ | |
| 111 | 778 do { \ |
| 779 rtx new_rtx = legitimize_reload_address ((AD), (MODE), \ | |
| 780 (OPNUM), (int)(TYPE)); \ | |
| 781 if (new_rtx) \ | |
| 782 { \ | |
| 783 (AD) = new_rtx; \ | |
| 784 goto WIN; \ | |
| 785 } \ | |
| 786 } while (0) | |
| 0 | 787 |
| 788 /* Helper macro for s390.c and s390.md to check for symbolic constants. */ | |
| 111 | 789 #define SYMBOLIC_CONST(X) \ |
| 790 (GET_CODE (X) == SYMBOL_REF \ | |
| 791 || GET_CODE (X) == LABEL_REF \ | |
| 792 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X))) | |
| 0 | 793 |
| 111 | 794 #define TLS_SYMBOLIC_CONST(X) \ |
| 795 ((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X)) \ | |
| 796 || (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X))) | |
| 0 | 797 |
| 798 | |
| 799 /* Condition codes. */ | |
| 800 | |
| 801 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, | |
| 802 return the mode to be used for the comparison. */ | |
| 803 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y)) | |
| 804 | |
| 805 /* Relative costs of operations. */ | |
| 806 | |
| 807 /* A C expression for the cost of a branch instruction. A value of 1 | |
| 808 is the default; other values are interpreted relative to that. */ | |
| 111 | 809 #define BRANCH_COST(speed_p, predictable_p) s390_branch_cost |
| 0 | 810 |
| 811 /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
| 812 #define SLOW_BYTE_ACCESS 1 | |
| 813 | |
| 814 /* An integer expression for the size in bits of the largest integer machine | |
|
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815 mode that should actually be used. We allow pairs of registers. */ |
| 0 | 816 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode) |
| 817 | |
| 818 /* The maximum number of bytes that a single instruction can move quickly | |
| 819 between memory and registers or between two memory locations. */ | |
|
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820 #define MOVE_MAX (TARGET_ZARCH ? 16 : 8) |
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821 #define MOVE_MAX_PIECES (TARGET_ZARCH ? 8 : 4) |
| 0 | 822 #define MAX_MOVE_MAX 16 |
| 823 | |
| 824 /* Don't perform CSE on function addresses. */ | |
| 111 | 825 #define NO_FUNCTION_CSE 1 |
| 0 | 826 |
| 827 /* This value is used in tree-sra to decide whether it might benefical | |
| 828 to split a struct move into several word-size moves. For S/390 | |
| 829 only small values make sense here since struct moves are relatively | |
| 111 | 830 cheap thanks to mvc so the small default value chosen for archs |
| 0 | 831 with memmove patterns should be ok. But this value is multiplied |
| 832 in tree-sra with UNITS_PER_WORD to make a decision so we adjust it | |
| 833 here to compensate for that factor since mvc costs exactly the same | |
| 834 on 31 and 64 bit. */ | |
| 835 #define MOVE_RATIO(speed) (TARGET_64BIT? 2 : 4) | |
| 836 | |
| 837 | |
| 838 /* Sections. */ | |
| 839 | |
| 840 /* Output before read-only data. */ | |
| 841 #define TEXT_SECTION_ASM_OP ".text" | |
| 842 | |
| 843 /* Output before writable (initialized) data. */ | |
| 844 #define DATA_SECTION_ASM_OP ".data" | |
| 845 | |
| 846 /* Output before writable (uninitialized) data. */ | |
| 847 #define BSS_SECTION_ASM_OP ".bss" | |
| 848 | |
| 849 /* S/390 constant pool breaks the devices in crtstuff.c to control section | |
| 850 in where code resides. We have to write it as asm code. */ | |
| 851 #ifndef __s390x__ | |
| 852 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \ | |
| 853 asm (SECTION_OP "\n\ | |
| 854 bras\t%r2,1f\n\ | |
| 855 0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\ | |
| 856 1: l\t%r3,0(%r2)\n\ | |
| 857 bas\t%r14,0(%r3,%r2)\n\ | |
| 858 .previous"); | |
| 859 #endif | |
| 860 | |
| 861 | |
| 862 /* Position independent code. */ | |
| 863 | |
| 864 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM) | |
| 865 | |
| 866 #define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X) | |
| 867 | |
| 111 | 868 #ifndef TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE |
| 869 #define TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE 1 | |
| 870 #endif | |
| 871 | |
| 0 | 872 |
| 873 /* Assembler file format. */ | |
| 874 | |
| 875 /* Character to start a comment. */ | |
| 876 #define ASM_COMMENT_START "#" | |
| 877 | |
| 878 /* Declare an uninitialized external linkage data object. */ | |
| 111 | 879 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ |
| 880 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN)) | |
| 0 | 881 |
| 882 /* Globalizing directive for a label. */ | |
| 883 #define GLOBAL_ASM_OP ".globl " | |
| 884 | |
| 885 /* Advance the location counter to a multiple of 2**LOG bytes. */ | |
| 886 #define ASM_OUTPUT_ALIGN(FILE, LOG) \ | |
| 887 if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG)) | |
| 888 | |
| 889 /* Advance the location counter by SIZE bytes. */ | |
| 890 #define ASM_OUTPUT_SKIP(FILE, SIZE) \ | |
| 111 | 891 fprintf ((FILE), "\t.set\t.,.+" HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)) |
| 0 | 892 |
| 893 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h. */ | |
| 894 #define LOCAL_LABEL_PREFIX "." | |
| 895 | |
|
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896 #define LABEL_ALIGN(LABEL) \ |
| 111 | 897 s390_label_align ((LABEL)) |
|
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898 |
| 0 | 899 /* How to refer to registers in assembler output. This sequence is |
| 900 indexed by compiler's hard-register-number (see above). */ | |
| 901 #define REGISTER_NAMES \ | |
| 111 | 902 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \ |
| 903 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \ | |
| 904 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \ | |
| 905 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \ | |
| 906 "%ap", "%cc", "%fp", "%rp", "%a0", "%a1", \ | |
| 907 "%v16", "%v18", "%v20", "%v22", "%v17", "%v19", "%v21", "%v23", \ | |
| 908 "%v24", "%v26", "%v28", "%v30", "%v25", "%v27", "%v29", "%v31" \ | |
| 909 } | |
| 910 | |
| 911 #define ADDITIONAL_REGISTER_NAMES \ | |
| 912 { { "v0", 16 }, { "v2", 17 }, { "v4", 18 }, { "v6", 19 }, \ | |
| 913 { "v1", 20 }, { "v3", 21 }, { "v5", 22 }, { "v7", 23 }, \ | |
| 914 { "v8", 24 }, { "v10", 25 }, { "v12", 26 }, { "v14", 27 }, \ | |
| 915 { "v9", 28 }, { "v11", 29 }, { "v13", 30 }, { "v15", 31 } }; | |
| 0 | 916 |
| 917 /* Print operand X (an rtx) in assembler syntax to file FILE. */ | |
| 111 | 918 #define PRINT_OPERAND(FILE, X, CODE) print_operand ((FILE), (X), (CODE)) |
| 919 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address ((FILE), (ADDR)) | |
| 0 | 920 |
| 921 /* Output an element of a case-vector that is absolute. */ | |
| 922 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
| 923 do { \ | |
| 924 char buf[32]; \ | |
|
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925 fputs (integer_asm_op (UNITS_PER_LONG, TRUE), (FILE)); \ |
| 0 | 926 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \ |
| 927 assemble_name ((FILE), buf); \ | |
| 928 fputc ('\n', (FILE)); \ | |
| 929 } while (0) | |
| 930 | |
| 931 /* Output an element of a case-vector that is relative. */ | |
| 932 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ | |
| 933 do { \ | |
| 934 char buf[32]; \ | |
|
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935 fputs (integer_asm_op (UNITS_PER_LONG, TRUE), (FILE)); \ |
| 0 | 936 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \ |
| 937 assemble_name ((FILE), buf); \ | |
| 938 fputc ('-', (FILE)); \ | |
| 939 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL)); \ | |
| 940 assemble_name ((FILE), buf); \ | |
| 941 fputc ('\n', (FILE)); \ | |
| 942 } while (0) | |
| 943 | |
| 111 | 944 /* Mark the return register as used by the epilogue so that we can |
| 945 use it in unadorned (return) and (simple_return) instructions. */ | |
| 946 #define EPILOGUE_USES(REGNO) ((REGNO) == RETURN_REGNUM) | |
| 947 | |
| 948 #undef ASM_OUTPUT_FUNCTION_LABEL | |
| 949 #define ASM_OUTPUT_FUNCTION_LABEL(FILE, NAME, DECL) \ | |
| 950 s390_asm_output_function_label ((FILE), (NAME), (DECL)) | |
| 951 | |
| 952 #if S390_USE_TARGET_ATTRIBUTE | |
| 953 /* Hook to output .machine and .machinemode at start of function. */ | |
| 954 #undef ASM_OUTPUT_FUNCTION_PREFIX | |
| 955 #define ASM_OUTPUT_FUNCTION_PREFIX s390_asm_output_function_prefix | |
| 956 | |
| 957 /* Hook to output .machine and .machinemode at end of function. */ | |
| 958 #undef ASM_DECLARE_FUNCTION_SIZE | |
| 959 #define ASM_DECLARE_FUNCTION_SIZE s390_asm_declare_function_size | |
| 960 #endif | |
| 0 | 961 |
| 962 /* Miscellaneous parameters. */ | |
| 963 | |
| 964 /* Specify the machine mode that this machine uses for the index in the | |
| 965 tablejump instruction. */ | |
| 966 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode) | |
| 967 | |
| 968 /* Specify the machine mode that pointers have. | |
| 969 After generation of rtl, the compiler makes no further distinction | |
| 970 between pointers and any other objects of this machine mode. */ | |
| 111 | 971 #define Pmode (TARGET_64BIT ? DImode : SImode) |
| 0 | 972 |
| 973 /* This is -1 for "pointer mode" extend. See ptr_extend in s390.md. */ | |
| 974 #define POINTERS_EXTEND_UNSIGNED -1 | |
| 975 | |
| 976 /* A function address in a call instruction is a byte address (for | |
| 977 indexing purposes) so give the MEM rtx a byte's mode. */ | |
| 978 #define FUNCTION_MODE QImode | |
| 979 | |
| 980 /* Specify the value which is used when clz operand is zero. */ | |
| 981 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1) | |
| 982 | |
| 983 /* Machine-specific symbol_ref flags. */ | |
| 111 | 984 #define SYMBOL_FLAG_ALIGN_SHIFT SYMBOL_FLAG_MACH_DEP_SHIFT |
| 985 #define SYMBOL_FLAG_ALIGN_MASK \ | |
| 986 ((SYMBOL_FLAG_MACH_DEP << 0) | (SYMBOL_FLAG_MACH_DEP << 1)) | |
| 987 | |
| 988 #define SYMBOL_FLAG_SET_ALIGN(X, A) \ | |
| 989 (SYMBOL_REF_FLAGS (X) = (SYMBOL_REF_FLAGS (X) & ~SYMBOL_FLAG_ALIGN_MASK) \ | |
| 990 | (A << SYMBOL_FLAG_ALIGN_SHIFT)) | |
| 991 | |
| 992 #define SYMBOL_FLAG_GET_ALIGN(X) \ | |
| 993 ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ALIGN_MASK) >> SYMBOL_FLAG_ALIGN_SHIFT) | |
| 994 | |
| 995 /* Helpers to access symbol_ref flags. They are used in | |
| 996 check_symref_alignment() and larl_operand to detect if the | |
| 997 available alignment matches the required one. We do not use | |
| 998 a positive check like _ALIGN2 because in that case we would have | |
| 999 to annotate every symbol_ref. However, we only want to touch | |
| 1000 the symbol_refs that can be misaligned and assume that the others | |
| 1001 are correctly aligned. Hence, if a symbol_ref does not have | |
| 1002 a _NOTALIGN flag it is supposed to be correctly aligned. */ | |
| 1003 #define SYMBOL_FLAG_SET_NOTALIGN2(X) SYMBOL_FLAG_SET_ALIGN((X), 1) | |
| 1004 #define SYMBOL_FLAG_SET_NOTALIGN4(X) SYMBOL_FLAG_SET_ALIGN((X), 2) | |
| 1005 #define SYMBOL_FLAG_SET_NOTALIGN8(X) SYMBOL_FLAG_SET_ALIGN((X), 3) | |
| 1006 | |
| 1007 #define SYMBOL_FLAG_NOTALIGN2_P(X) (SYMBOL_FLAG_GET_ALIGN(X) == 1) | |
| 1008 #define SYMBOL_FLAG_NOTALIGN4_P(X) (SYMBOL_FLAG_GET_ALIGN(X) == 2 \ | |
| 1009 || SYMBOL_FLAG_GET_ALIGN(X) == 1) | |
| 1010 #define SYMBOL_FLAG_NOTALIGN8_P(X) (SYMBOL_FLAG_GET_ALIGN(X) == 3 \ | |
| 1011 || SYMBOL_FLAG_GET_ALIGN(X) == 2 \ | |
| 1012 || SYMBOL_FLAG_GET_ALIGN(X) == 1) | |
| 1013 | |
| 1014 /* Check whether integer displacement is in range for a short displacement. */ | |
| 1015 #define SHORT_DISP_IN_RANGE(d) ((d) >= 0 && (d) <= 4095) | |
| 0 | 1016 |
| 1017 /* Check whether integer displacement is in range. */ | |
| 111 | 1018 #define DISP_IN_RANGE(d) \ |
| 1019 (TARGET_LONG_DISPLACEMENT \ | |
| 1020 ? ((d) >= -524288 && (d) <= 524287) \ | |
| 1021 : SHORT_DISP_IN_RANGE(d)) | |
| 0 | 1022 |
|
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1023 /* Reads can reuse write prefetches, used by tree-ssa-prefetch-loops.c. */ |
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1024 #define READ_CAN_USE_WRITE_PREFETCH 1 |
| 111 | 1025 |
| 1026 extern const int processor_flags_table[]; | |
| 1027 | |
| 131 | 1028 struct s390_processor |
| 1029 { | |
| 1030 /* The preferred name to be used in user visible output. */ | |
| 1031 const char *const name; | |
| 1032 /* CPU name as it should be passed to Binutils via .machine */ | |
| 1033 const char *const binutils_name; | |
| 1034 const enum processor_type processor; | |
| 1035 const struct processor_costs *cost; | |
| 1036 int arch_level; | |
| 1037 }; | |
| 1038 | |
| 1039 extern const struct s390_processor processor_table[]; | |
| 1040 | |
| 111 | 1041 /* The truth element value for vector comparisons. Our instructions |
| 1042 always generate -1 in that case. */ | |
| 1043 #define VECTOR_STORE_FLAG_VALUE(MODE) CONSTM1_RTX (GET_MODE_INNER (MODE)) | |
| 1044 | |
| 1045 /* Target pragma. */ | |
| 1046 | |
| 1047 /* resolve_overloaded_builtin can not be defined the normal way since | |
| 1048 it is defined in code which technically belongs to the | |
| 1049 front-end. */ | |
| 1050 #define REGISTER_TARGET_PRAGMAS() \ | |
| 1051 do { \ | |
| 1052 s390_register_target_pragmas (); \ | |
| 1053 } while (0) | |
| 1054 | |
| 131 | 1055 #ifndef USED_FOR_TARGET |
| 1056 /* The following structure is embedded in the machine | |
| 1057 specific part of struct function. */ | |
| 1058 | |
| 1059 struct GTY (()) s390_frame_layout | |
| 1060 { | |
| 1061 /* Offset within stack frame. */ | |
| 1062 HOST_WIDE_INT gprs_offset; | |
| 1063 HOST_WIDE_INT f0_offset; | |
| 1064 HOST_WIDE_INT f4_offset; | |
| 1065 HOST_WIDE_INT f8_offset; | |
| 1066 HOST_WIDE_INT backchain_offset; | |
| 1067 | |
| 1068 /* Number of first and last gpr where slots in the register | |
| 1069 save area are reserved for. */ | |
| 1070 int first_save_gpr_slot; | |
| 1071 int last_save_gpr_slot; | |
| 1072 | |
| 1073 /* Location (FP register number) where GPRs (r0-r15) should | |
| 1074 be saved to. | |
| 1075 0 - does not need to be saved at all | |
| 1076 -1 - stack slot */ | |
| 1077 #define SAVE_SLOT_NONE 0 | |
| 1078 #define SAVE_SLOT_STACK -1 | |
| 1079 signed char gpr_save_slots[16]; | |
| 1080 | |
| 1081 /* Number of first and last gpr to be saved, restored. */ | |
| 1082 int first_save_gpr; | |
| 1083 int first_restore_gpr; | |
| 1084 int last_save_gpr; | |
| 1085 int last_restore_gpr; | |
| 1086 | |
| 1087 /* Bits standing for floating point registers. Set, if the | |
| 1088 respective register has to be saved. Starting with reg 16 (f0) | |
| 1089 at the rightmost bit. | |
| 1090 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 | |
| 1091 fpr 15 13 11 9 14 12 10 8 7 5 3 1 6 4 2 0 | |
| 1092 reg 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 */ | |
| 1093 unsigned int fpr_bitmap; | |
| 1094 | |
| 1095 /* Number of floating point registers f8-f15 which must be saved. */ | |
| 1096 int high_fprs; | |
| 1097 | |
| 1098 /* Set if return address needs to be saved. | |
| 1099 This flag is set by s390_return_addr_rtx if it could not use | |
| 1100 the initial value of r14 and therefore depends on r14 saved | |
| 1101 to the stack. */ | |
| 1102 bool save_return_addr_p; | |
| 1103 | |
| 1104 /* Size of stack frame. */ | |
| 1105 HOST_WIDE_INT frame_size; | |
| 1106 }; | |
| 1107 | |
| 1108 | |
| 1109 /* Define the structure for the machine field in struct function. */ | |
| 1110 | |
| 1111 struct GTY(()) machine_function | |
| 1112 { | |
| 1113 struct s390_frame_layout frame_layout; | |
| 1114 | |
| 1115 /* Literal pool base register. */ | |
| 1116 rtx base_reg; | |
| 1117 | |
| 1118 bool has_landing_pad_p; | |
| 1119 | |
| 1120 /* True if the current function may contain a tbegin clobbering | |
| 1121 FPRs. */ | |
| 1122 bool tbegin_p; | |
| 1123 | |
| 1124 /* For -fsplit-stack support: A stack local which holds a pointer to | |
| 1125 the stack arguments for a function with a variable number of | |
| 1126 arguments. This is set at the start of the function and is used | |
| 1127 to initialize the overflow_arg_area field of the va_list | |
| 1128 structure. */ | |
| 1129 rtx split_stack_varargs_pointer; | |
| 1130 | |
| 1131 enum indirect_branch indirect_branch_jump; | |
| 1132 enum indirect_branch indirect_branch_call; | |
| 1133 | |
| 1134 enum indirect_branch function_return_mem; | |
| 1135 enum indirect_branch function_return_reg; | |
| 1136 }; | |
| 1137 #endif | |
| 1138 | |
| 1139 #define TARGET_INDIRECT_BRANCH_NOBP_RET_OPTION \ | |
| 1140 (cfun->machine->function_return_reg != indirect_branch_keep \ | |
| 1141 || cfun->machine->function_return_mem != indirect_branch_keep) | |
| 1142 | |
| 1143 #define TARGET_INDIRECT_BRANCH_NOBP_RET \ | |
| 1144 ((cfun->machine->function_return_reg != indirect_branch_keep \ | |
| 1145 && !s390_return_addr_from_memory ()) \ | |
| 1146 || (cfun->machine->function_return_mem != indirect_branch_keep \ | |
| 1147 && s390_return_addr_from_memory ())) | |
| 1148 | |
| 1149 #define TARGET_INDIRECT_BRANCH_NOBP_JUMP \ | |
| 1150 (cfun->machine->indirect_branch_jump != indirect_branch_keep) | |
| 1151 | |
| 1152 #define TARGET_INDIRECT_BRANCH_NOBP_JUMP_THUNK \ | |
| 1153 (cfun->machine->indirect_branch_jump == indirect_branch_thunk \ | |
| 1154 || cfun->machine->indirect_branch_jump == indirect_branch_thunk_extern) | |
| 1155 | |
| 1156 #define TARGET_INDIRECT_BRANCH_NOBP_JUMP_INLINE_THUNK \ | |
| 1157 (cfun->machine->indirect_branch_jump == indirect_branch_thunk_inline) | |
| 1158 | |
| 1159 #define TARGET_INDIRECT_BRANCH_NOBP_CALL \ | |
| 1160 (cfun->machine->indirect_branch_call != indirect_branch_keep) | |
| 1161 | |
| 1162 #ifndef TARGET_DEFAULT_INDIRECT_BRANCH_TABLE | |
| 1163 #define TARGET_DEFAULT_INDIRECT_BRANCH_TABLE 0 | |
| 1164 #endif | |
| 1165 | |
| 1166 #define TARGET_INDIRECT_BRANCH_THUNK_NAME_EXRL "__s390_indirect_jump_r%d" | |
| 1167 #define TARGET_INDIRECT_BRANCH_THUNK_NAME_EX "__s390_indirect_jump_r%duse_r%d" | |
| 1168 | |
| 1169 #define TARGET_INDIRECT_BRANCH_TABLE s390_indirect_branch_table | |
| 1170 | |
| 1171 | |
| 111 | 1172 #endif /* S390_H */ |