Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/spu/spu.h @ 131:84e7813d76e9
gcc-8.2
author | mir3636 |
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date | Thu, 25 Oct 2018 07:37:49 +0900 |
parents | 04ced10e8804 |
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rev | line source |
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131 | 1 /* Copyright (C) 2006-2018 Free Software Foundation, Inc. |
0 | 2 |
3 This file is free software; you can redistribute it and/or modify it under | |
4 the terms of the GNU General Public License as published by the Free | |
5 Software Foundation; either version 3 of the License, or (at your option) | |
6 any later version. | |
7 | |
8 This file is distributed in the hope that it will be useful, but WITHOUT | |
9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
11 for more details. | |
12 | |
13 You should have received a copy of the GNU General Public License | |
14 along with GCC; see the file COPYING3. If not see | |
15 <http://www.gnu.org/licenses/>. */ | |
16 | |
17 | |
18 /* Run-time Target */ | |
19 #define TARGET_CPU_CPP_BUILTINS() spu_cpu_cpp_builtins(pfile) | |
20 | |
21 #define C_COMMON_OVERRIDE_OPTIONS spu_c_common_override_options() | |
22 | |
23 #define INIT_EXPANDERS spu_init_expanders() | |
24 | |
25 /* Which processor to generate code or schedule for. */ | |
26 enum processor_type | |
27 { | |
28 PROCESSOR_CELL, | |
29 PROCESSOR_CELLEDP | |
30 }; | |
31 | |
32 extern GTY(()) int spu_arch; | |
33 extern GTY(()) int spu_tune; | |
34 | |
35 /* Support for a compile-time default architecture and tuning. The rules are: | |
36 --with-arch is ignored if -march is specified. | |
37 --with-tune is ignored if -mtune is specified. */ | |
38 #define OPTION_DEFAULT_SPECS \ | |
39 {"arch", "%{!march=*:-march=%(VALUE)}" }, \ | |
40 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" } | |
41 | |
42 /* Default target_flags if no switches specified. */ | |
43 #ifndef TARGET_DEFAULT | |
44 #define TARGET_DEFAULT (MASK_ERROR_RELOC | MASK_SAFE_DMA | MASK_BRANCH_HINTS \ | |
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45 | MASK_SAFE_HINTS | MASK_ADDRESS_SPACE_CONVERSION) |
0 | 46 #endif |
47 | |
48 | |
49 /* Storage Layout */ | |
50 | |
51 #define BITS_BIG_ENDIAN 1 | |
52 | |
53 #define BYTES_BIG_ENDIAN 1 | |
54 | |
55 #define WORDS_BIG_ENDIAN 1 | |
56 | |
57 /* GCC uses word_mode in many places, assuming that it is the fastest | |
58 integer mode. That is not the case for SPU though. We can't use | |
59 32 here because (of some reason I can't remember.) */ | |
60 #define BITS_PER_WORD 128 | |
61 | |
62 #define UNITS_PER_WORD (BITS_PER_WORD/BITS_PER_UNIT) | |
63 | |
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64 /* When building libgcc, we need to assume 4 words per units even |
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65 though UNITS_PER_WORD is 16, because the SPU has basically a 32-bit |
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66 instruction set although register size is 128 bits. In particular, |
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67 this causes libgcc to contain __divdi3 instead of __divti3 etc. |
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68 However, we allow this default to be re-defined on the command |
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69 line, so that we can use the LIB2_SIDITI_CONV_FUNCS mechanism |
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70 to get (in addition) TImode versions of some routines. */ |
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71 #ifndef LIBGCC2_UNITS_PER_WORD |
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72 #define LIBGCC2_UNITS_PER_WORD 4 |
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73 #endif |
0 | 74 |
75 #define POINTER_SIZE 32 | |
76 | |
77 #define PARM_BOUNDARY 128 | |
78 | |
79 #define STACK_BOUNDARY 128 | |
80 | |
81 /* We want it 8-byte aligned so we can properly use dual-issue | |
82 instructions, which can only happen on an 8-byte aligned address. */ | |
83 #define FUNCTION_BOUNDARY 64 | |
84 | |
85 /* We would like to allow a larger alignment for data objects (for DMA) | |
86 but the aligned attribute is limited by BIGGEST_ALIGNMENT. We don't | |
87 define BIGGEST_ALIGNMENT as larger because it is used in other places | |
88 and would end up wasting space. (Is this still true?) */ | |
89 #define BIGGEST_ALIGNMENT 128 | |
90 | |
91 #define MINIMUM_ATOMIC_ALIGNMENT 128 | |
92 | |
93 /* Make all static objects 16-byte aligned. This allows us to assume | |
94 they are also padded to 16-bytes, which means we can use a single | |
95 load or store instruction to access them. Do the same for objects | |
96 on the stack. (Except a bug (?) allows some stack objects to be | |
97 unaligned.) */ | |
98 #define DATA_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128) | |
99 #define LOCAL_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128) | |
100 | |
101 #define EMPTY_FIELD_BOUNDARY 32 | |
102 | |
103 #define STRICT_ALIGNMENT 1 | |
104 | |
105 /* symbol_ref's of functions are not aligned to 16 byte boundary. */ | |
106 #define ALIGNED_SYMBOL_REF_P(X) \ | |
107 (GET_CODE (X) == SYMBOL_REF \ | |
108 && (SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ALIGN1) == 0 \ | |
109 && (! SYMBOL_REF_FUNCTION_P (X) \ | |
131 | 110 || align_functions.levels[0].get_value () >= 16)) |
0 | 111 |
112 #define PCC_BITFIELD_TYPE_MATTERS 1 | |
113 | |
114 #define MAX_FIXED_MODE_SIZE 128 | |
115 | |
116 #define STACK_SAVEAREA_MODE(save_level) \ | |
117 (save_level == SAVE_FUNCTION ? VOIDmode \ | |
118 : save_level == SAVE_NONLOCAL ? SImode \ | |
119 : Pmode) | |
120 | |
121 #define STACK_SIZE_MODE SImode | |
122 | |
123 | |
124 /* Type Layout */ | |
125 | |
126 #define INT_TYPE_SIZE 32 | |
127 | |
128 #define LONG_TYPE_SIZE 32 | |
129 | |
130 #define LONG_LONG_TYPE_SIZE 64 | |
131 | |
132 #define FLOAT_TYPE_SIZE 32 | |
133 | |
134 #define DOUBLE_TYPE_SIZE 64 | |
135 | |
136 #define LONG_DOUBLE_TYPE_SIZE 64 | |
137 | |
138 #define DEFAULT_SIGNED_CHAR 0 | |
139 | |
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140 #define STDINT_LONG32 0 |
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141 |
0 | 142 |
143 /* Register Basics */ | |
144 | |
145 /* 128-130 are special registers that never appear in assembly code. */ | |
146 #define FIRST_PSEUDO_REGISTER 131 | |
147 | |
148 #define FIXED_REGISTERS { \ | |
149 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
150 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
151 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
152 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
153 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
154 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
155 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
156 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
157 1, 1, 1 \ | |
158 } | |
159 | |
160 #define CALL_USED_REGISTERS { \ | |
161 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
162 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
163 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
164 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
165 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
166 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
167 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
168 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
169 1, 1, 1 \ | |
170 } | |
171 | |
172 | |
173 /* Register Classes */ | |
174 | |
175 enum reg_class { | |
176 NO_REGS, | |
177 GENERAL_REGS, | |
178 ALL_REGS, | |
179 LIM_REG_CLASSES | |
180 }; | |
181 | |
182 #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
183 | |
184 #define REG_CLASS_NAMES \ | |
185 { "NO_REGS", \ | |
186 "GENERAL_REGS", \ | |
187 "ALL_REGS" \ | |
188 } | |
189 | |
190 #define REG_CLASS_CONTENTS { \ | |
191 {0, 0, 0, 0, 0}, /* no regs */ \ | |
192 {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}, /* general regs */ \ | |
193 {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}} /* all regs */ | |
194 | |
111 | 195 #define REGNO_REG_CLASS(REGNO) ((void)(REGNO), GENERAL_REGS) |
196 | |
0 | 197 |
198 #define BASE_REG_CLASS GENERAL_REGS | |
199 | |
200 #define INDEX_REG_CLASS GENERAL_REGS | |
201 | |
202 #define REGNO_OK_FOR_BASE_P(regno) \ | |
203 ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0)) | |
204 | |
205 #define REGNO_OK_FOR_INDEX_P(regno) \ | |
206 ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0)) | |
207 | |
208 #define INT_REG_OK_FOR_INDEX_P(X,STRICT) \ | |
209 ((!(STRICT) || REGNO_OK_FOR_INDEX_P (REGNO (X)))) | |
210 #define INT_REG_OK_FOR_BASE_P(X,STRICT) \ | |
211 ((!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X)))) | |
212 | |
213 #define REGISTER_TARGET_PRAGMAS() do { \ | |
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214 c_register_addr_space ("__ea", ADDR_SPACE_EA); \ |
0 | 215 targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin; \ |
131 | 216 }while (0) |
0 | 217 |
218 | |
219 /* Frame Layout */ | |
220 | |
111 | 221 #define STACK_GROWS_DOWNWARD 1 |
0 | 222 |
223 #define FRAME_GROWS_DOWNWARD 1 | |
224 | |
225 #define STACK_POINTER_OFFSET 32 | |
226 | |
227 #define FIRST_PARM_OFFSET(FNDECL) (0) | |
228 | |
111 | 229 #define DYNAMIC_CHAIN_ADDRESS(FP) plus_constant (Pmode, (FP), -16) |
0 | 230 |
231 #define RETURN_ADDR_RTX(COUNT,FP) (spu_return_addr (COUNT, FP)) | |
232 | |
233 /* Should this be defined? Would it simplify our implementation. */ | |
234 /* #define RETURN_ADDR_IN_PREVIOUS_FRAME */ | |
235 | |
236 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG(Pmode, LINK_REGISTER_REGNUM) | |
237 | |
238 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_REGISTER_REGNUM) | |
239 | |
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240 #define ARG_POINTER_CFA_OFFSET(FNDECL) \ |
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241 (crtl->args.pretend_args_size - STACK_POINTER_OFFSET) |
0 | 242 |
243 | |
244 /* Stack Checking */ | |
245 | |
246 /* We store the Available Stack Size in the second slot of the stack | |
247 register. We emit stack checking code during the prologue. */ | |
248 #define STACK_CHECK_BUILTIN 1 | |
249 | |
250 | |
251 /* Frame Registers, and other registers */ | |
252 | |
253 #define STACK_POINTER_REGNUM 1 | |
254 | |
255 /* Will be eliminated. */ | |
256 #define FRAME_POINTER_REGNUM 128 | |
257 | |
258 /* This is not specified in any ABI, so could be set to anything. */ | |
259 #define HARD_FRAME_POINTER_REGNUM 127 | |
260 | |
261 /* Will be eliminated. */ | |
262 #define ARG_POINTER_REGNUM 129 | |
263 | |
264 #define STATIC_CHAIN_REGNUM 2 | |
265 | |
266 #define LINK_REGISTER_REGNUM 0 | |
267 | |
268 /* Used to keep track of instructions that have clobbered the hint | |
269 * buffer. Users can also specify it in inline asm. */ | |
270 #define HBR_REGNUM 130 | |
271 | |
272 #define MAX_REGISTER_ARGS 72 | |
273 #define FIRST_ARG_REGNUM 3 | |
274 #define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + MAX_REGISTER_ARGS - 1) | |
275 | |
276 #define MAX_REGISTER_RETURN 72 | |
277 #define FIRST_RETURN_REGNUM 3 | |
278 #define LAST_RETURN_REGNUM (FIRST_RETURN_REGNUM + MAX_REGISTER_RETURN - 1) | |
279 | |
280 | |
281 /* Elimination */ | |
282 | |
283 #define ELIMINABLE_REGS \ | |
284 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
285 {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
286 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
287 {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} | |
288 | |
289 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
290 ((OFFSET) = spu_initial_elimination_offset((FROM),(TO))) | |
291 | |
292 | |
293 /* Stack Arguments */ | |
294 | |
295 #define ACCUMULATE_OUTGOING_ARGS 1 | |
296 | |
297 #define REG_PARM_STACK_SPACE(FNDECL) 0 | |
298 | |
299 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 | |
300 | |
301 | |
302 /* Register Arguments */ | |
303 | |
304 #define CUMULATIVE_ARGS int | |
305 | |
306 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \ | |
307 ((CUM) = 0) | |
308 | |
309 #define PAD_VARARGS_DOWN 0 | |
310 | |
311 #define FUNCTION_ARG_REGNO_P(N) ((N) >= (FIRST_ARG_REGNUM) && (N) <= (LAST_ARG_REGNUM)) | |
312 | |
313 /* Scalar Return */ | |
314 | |
315 #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
316 (spu_function_value((VALTYPE),(FUNC))) | |
317 | |
318 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RETURN_REGNUM) | |
319 | |
320 #define FUNCTION_VALUE_REGNO_P(N) ((N) >= (FIRST_RETURN_REGNUM) && (N) <= (LAST_RETURN_REGNUM)) | |
321 | |
322 | |
323 /* Machine-specific symbol_ref flags. */ | |
324 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0) | |
325 | |
326 /* Aggregate Return */ | |
327 | |
328 #define DEFAULT_PCC_STRUCT_RETURN 0 | |
329 | |
330 | |
331 /* Function Entry */ | |
332 | |
333 #define EXIT_IGNORE_STACK 0 | |
334 | |
335 #define EPILOGUE_USES(REGNO) ((REGNO)==1 ? 1 : 0) | |
336 | |
337 | |
338 /* Profiling */ | |
339 | |
340 #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
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341 spu_function_profiler ((FILE), (LABELNO)); |
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342 |
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343 #define NO_PROFILE_COUNTERS 1 |
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344 |
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345 #define PROFILE_BEFORE_PROLOGUE 1 |
0 | 346 |
347 | |
348 /* Trampolines */ | |
349 | |
350 #define TRAMPOLINE_SIZE (TARGET_LARGE_MEM ? 20 : 16) | |
351 | |
352 #define TRAMPOLINE_ALIGNMENT 128 | |
353 | |
354 /* Addressing Modes */ | |
355 | |
356 #define CONSTANT_ADDRESS_P(X) spu_constant_address_p(X) | |
357 | |
358 #define MAX_REGS_PER_ADDRESS 2 | |
359 | |
111 | 360 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \ |
361 do { \ | |
362 rtx new_rtx = spu_legitimize_reload_address (AD, MODE, OPNUM, \ | |
363 (int)(TYPE)); \ | |
364 if (new_rtx) \ | |
365 { \ | |
366 (AD) = new_rtx; \ | |
367 goto WIN; \ | |
368 } \ | |
369 } while (0) | |
0 | 370 |
371 | |
372 /* Costs */ | |
373 | |
374 #define BRANCH_COST(speed_p, predictable_p) spu_branch_cost | |
375 | |
376 #define SLOW_BYTE_ACCESS 0 | |
377 | |
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378 #define MOVE_RATIO(speed) ((speed)? 32 : 4) |
0 | 379 |
111 | 380 #define NO_FUNCTION_CSE 1 |
0 | 381 |
382 | |
383 /* Sections */ | |
384 | |
385 #define TEXT_SECTION_ASM_OP ".text" | |
386 | |
387 #define DATA_SECTION_ASM_OP ".data" | |
388 | |
389 #define JUMP_TABLES_IN_TEXT_SECTION 1 | |
390 | |
391 | |
392 /* PIC */ | |
393 #define PIC_OFFSET_TABLE_REGNUM 126 | |
394 | |
395 | |
396 /* File Framework */ | |
397 | |
398 #define ASM_APP_ON "" | |
399 | |
400 #define ASM_APP_OFF "" | |
401 | |
402 | |
403 /* Uninitialized Data */ | |
404 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
405 ( fputs (".comm ", (FILE)), \ | |
406 assemble_name ((FILE), (NAME)), \ | |
407 fprintf ((FILE), ",%d\n", (ROUNDED))) | |
408 | |
409 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ | |
410 ( fputs (".lcomm ", (FILE)), \ | |
411 assemble_name ((FILE), (NAME)), \ | |
412 fprintf ((FILE), ",%d\n", (ROUNDED))) | |
413 | |
414 | |
415 /* Label Output */ | |
416 #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
417 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
418 | |
419 #define ASM_OUTPUT_LABELREF(FILE, NAME) \ | |
420 asm_fprintf (FILE, "%U%s", default_strip_name_encoding (NAME)) | |
421 | |
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422 #define ASM_OUTPUT_SYMBOL_REF(FILE, X) \ |
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423 do \ |
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424 { \ |
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425 tree decl; \ |
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426 assemble_name (FILE, XSTR ((X), 0)); \ |
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427 if ((decl = SYMBOL_REF_DECL ((X))) != 0 \ |
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428 && TREE_CODE (decl) == VAR_DECL \ |
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429 && TYPE_ADDR_SPACE (TREE_TYPE (decl))) \ |
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430 fputs ("@ppu", FILE); \ |
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431 } while (0) |
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432 |
0 | 433 |
434 /* Instruction Output */ | |
435 #define REGISTER_NAMES \ | |
436 {"$lr", "$sp", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", \ | |
437 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31", \ | |
438 "$32", "$33", "$34", "$35", "$36", "$37", "$38", "$39", "$40", "$41", "$42", "$43", "$44", "$45", "$46", "$47", \ | |
439 "$48", "$49", "$50", "$51", "$52", "$53", "$54", "$55", "$56", "$57", "$58", "$59", "$60", "$61", "$62", "$63", \ | |
440 "$64", "$65", "$66", "$67", "$68", "$69", "$70", "$71", "$72", "$73", "$74", "$75", "$76", "$77", "$78", "$79", \ | |
441 "$80", "$81", "$82", "$83", "$84", "$85", "$86", "$87", "$88", "$89", "$90", "$91", "$92", "$93", "$94", "$95", \ | |
442 "$96", "$97", "$98", "$99", "$100", "$101", "$102", "$103", "$104", "$105", "$106", "$107", "$108", "$109", "$110", "$111", \ | |
443 "$112", "$113", "$114", "$115", "$116", "$117", "$118", "$119", "$120", "$121", "$122", "$123", "$124", "$125", "$126", "$127", \ | |
444 "$vfp", "$vap", "hbr" \ | |
445 } | |
446 | |
447 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE) | |
448 | |
449 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
450 print_operand_address (FILE, ADDR) | |
451 | |
452 #define LOCAL_LABEL_PREFIX "." | |
453 | |
454 #define USER_LABEL_PREFIX "" | |
455 | |
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456 #define ASM_COMMENT_START "#" |
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457 |
0 | 458 |
459 /* Dispatch Tables */ | |
460 | |
461 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ | |
462 fprintf (FILE, "\t.word .L%d-.L%d\n", VALUE, REL) | |
463 | |
464 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
465 fprintf (FILE, "\t.word .L%d\n", VALUE) | |
466 | |
467 | |
468 /* Alignment Output */ | |
469 | |
470 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
471 do { if (LOG!=0) fprintf (FILE, "\t.align\t%d\n", (LOG)); } while (0) | |
472 | |
473 | |
474 /* Misc */ | |
475 | |
476 #define CASE_VECTOR_MODE SImode | |
477 | |
478 #define MOVE_MAX 16 | |
479 | |
480 #define STORE_FLAG_VALUE -1 | |
481 | |
482 #define Pmode SImode | |
483 | |
484 #define FUNCTION_MODE QImode | |
485 | |
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486 |
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487 /* Address spaces. */ |
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488 #define ADDR_SPACE_EA 1 |
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489 |
19
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490 |
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491 /* Builtins. */ |
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492 |
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493 enum spu_builtin_type |
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494 { |
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495 B_INSN, |
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496 B_JUMP, |
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497 B_BISLED, |
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498 B_CALL, |
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499 B_HINT, |
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500 B_OVERLOAD, |
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501 B_INTERNAL |
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502 }; |
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503 |
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504 struct spu_builtin_description |
19
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505 { |
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506 int fcode; |
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507 int icode; |
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508 const char *name; |
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509 enum spu_builtin_type type; |
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510 |
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511 /* The first element of parm is always the return type. The rest |
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512 are a zero terminated list of parameters. */ |
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513 int parm[5]; |
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514 }; |
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515 |
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516 extern struct spu_builtin_description spu_builtins[]; |
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517 |