Mercurial > hg > CbC > CbC_gcc
annotate gcc/reg-stack.c @ 131:84e7813d76e9
gcc-8.2
| author | mir3636 |
|---|---|
| date | Thu, 25 Oct 2018 07:37:49 +0900 |
| parents | 04ced10e8804 |
| children | 1830386684a0 |
| rev | line source |
|---|---|
| 0 | 1 /* Register to Stack convert for GNU compiler. |
| 131 | 2 Copyright (C) 1992-2018 Free Software Foundation, Inc. |
| 0 | 3 |
| 4 This file is part of GCC. | |
| 5 | |
| 6 GCC is free software; you can redistribute it and/or modify it | |
| 7 under the terms of the GNU General Public License as published by | |
| 8 the Free Software Foundation; either version 3, or (at your option) | |
| 9 any later version. | |
| 10 | |
| 11 GCC is distributed in the hope that it will be useful, but WITHOUT | |
| 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
| 13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
| 14 License for more details. | |
| 15 | |
| 16 You should have received a copy of the GNU General Public License | |
| 17 along with GCC; see the file COPYING3. If not see | |
| 18 <http://www.gnu.org/licenses/>. */ | |
| 19 | |
| 20 /* This pass converts stack-like registers from the "flat register | |
| 21 file" model that gcc uses, to a stack convention that the 387 uses. | |
| 22 | |
| 23 * The form of the input: | |
| 24 | |
| 25 On input, the function consists of insn that have had their | |
| 26 registers fully allocated to a set of "virtual" registers. Note that | |
| 27 the word "virtual" is used differently here than elsewhere in gcc: for | |
| 28 each virtual stack reg, there is a hard reg, but the mapping between | |
| 29 them is not known until this pass is run. On output, hard register | |
| 30 numbers have been substituted, and various pop and exchange insns have | |
| 31 been emitted. The hard register numbers and the virtual register | |
| 32 numbers completely overlap - before this pass, all stack register | |
| 33 numbers are virtual, and afterward they are all hard. | |
| 34 | |
| 35 The virtual registers can be manipulated normally by gcc, and their | |
| 36 semantics are the same as for normal registers. After the hard | |
| 37 register numbers are substituted, the semantics of an insn containing | |
| 38 stack-like regs are not the same as for an insn with normal regs: for | |
| 39 instance, it is not safe to delete an insn that appears to be a no-op | |
| 40 move. In general, no insn containing hard regs should be changed | |
| 41 after this pass is done. | |
| 42 | |
| 43 * The form of the output: | |
| 44 | |
| 45 After this pass, hard register numbers represent the distance from | |
| 46 the current top of stack to the desired register. A reference to | |
| 47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, | |
| 48 represents the register just below that, and so forth. Also, REG_DEAD | |
| 49 notes indicate whether or not a stack register should be popped. | |
| 50 | |
| 51 A "swap" insn looks like a parallel of two patterns, where each | |
| 52 pattern is a SET: one sets A to B, the other B to A. | |
| 53 | |
| 54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG | |
| 55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, | |
| 56 will replace the existing stack top, not push a new value. | |
| 57 | |
| 58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose | |
| 59 SET_SRC is REG or MEM. | |
| 60 | |
| 61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG | |
| 62 appears ambiguous. As a special case, the presence of a REG_DEAD note | |
| 63 for FIRST_STACK_REG differentiates between a load insn and a pop. | |
| 64 | |
| 65 If a REG_DEAD is present, the insn represents a "pop" that discards | |
| 66 the top of the register stack. If there is no REG_DEAD note, then the | |
| 67 insn represents a "dup" or a push of the current top of stack onto the | |
| 68 stack. | |
| 69 | |
| 70 * Methodology: | |
| 71 | |
| 72 Existing REG_DEAD and REG_UNUSED notes for stack registers are | |
| 73 deleted and recreated from scratch. REG_DEAD is never created for a | |
| 74 SET_DEST, only REG_UNUSED. | |
| 75 | |
| 76 * asm_operands: | |
| 77 | |
| 78 There are several rules on the usage of stack-like regs in | |
| 79 asm_operands insns. These rules apply only to the operands that are | |
| 80 stack-like regs: | |
| 81 | |
| 82 1. Given a set of input regs that die in an asm_operands, it is | |
| 83 necessary to know which are implicitly popped by the asm, and | |
| 84 which must be explicitly popped by gcc. | |
| 85 | |
| 86 An input reg that is implicitly popped by the asm must be | |
| 87 explicitly clobbered, unless it is constrained to match an | |
| 88 output operand. | |
| 89 | |
| 90 2. For any input reg that is implicitly popped by an asm, it is | |
| 91 necessary to know how to adjust the stack to compensate for the pop. | |
| 92 If any non-popped input is closer to the top of the reg-stack than | |
| 93 the implicitly popped reg, it would not be possible to know what the | |
| 94 stack looked like - it's not clear how the rest of the stack "slides | |
| 95 up". | |
| 96 | |
| 97 All implicitly popped input regs must be closer to the top of | |
| 98 the reg-stack than any input that is not implicitly popped. | |
| 99 | |
| 111 | 100 All explicitly referenced input operands may not "skip" a reg. |
| 101 Otherwise we can have holes in the stack. | |
| 102 | |
| 0 | 103 3. It is possible that if an input dies in an insn, reload might |
| 104 use the input reg for an output reload. Consider this example: | |
| 105 | |
| 106 asm ("foo" : "=t" (a) : "f" (b)); | |
| 107 | |
| 108 This asm says that input B is not popped by the asm, and that | |
| 109 the asm pushes a result onto the reg-stack, i.e., the stack is one | |
| 110 deeper after the asm than it was before. But, it is possible that | |
| 111 reload will think that it can use the same reg for both the input and | |
| 112 the output, if input B dies in this insn. | |
| 113 | |
| 114 If any input operand uses the "f" constraint, all output reg | |
| 115 constraints must use the "&" earlyclobber. | |
| 116 | |
| 117 The asm above would be written as | |
| 118 | |
| 119 asm ("foo" : "=&t" (a) : "f" (b)); | |
| 120 | |
| 121 4. Some operands need to be in particular places on the stack. All | |
| 122 output operands fall in this category - there is no other way to | |
| 123 know which regs the outputs appear in unless the user indicates | |
| 124 this in the constraints. | |
| 125 | |
| 126 Output operands must specifically indicate which reg an output | |
| 127 appears in after an asm. "=f" is not allowed: the operand | |
| 128 constraints must select a class with a single reg. | |
| 129 | |
| 130 5. Output operands may not be "inserted" between existing stack regs. | |
| 131 Since no 387 opcode uses a read/write operand, all output operands | |
| 132 are dead before the asm_operands, and are pushed by the asm_operands. | |
| 133 It makes no sense to push anywhere but the top of the reg-stack. | |
| 134 | |
| 135 Output operands must start at the top of the reg-stack: output | |
| 136 operands may not "skip" a reg. | |
| 137 | |
| 138 6. Some asm statements may need extra stack space for internal | |
| 139 calculations. This can be guaranteed by clobbering stack registers | |
| 140 unrelated to the inputs and outputs. | |
| 141 | |
| 142 Here are a couple of reasonable asms to want to write. This asm | |
| 143 takes one input, which is internally popped, and produces two outputs. | |
| 144 | |
| 145 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); | |
| 146 | |
| 147 This asm takes two inputs, which are popped by the fyl2xp1 opcode, | |
| 148 and replaces them with one output. The user must code the "st(1)" | |
| 149 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. | |
| 150 | |
| 151 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); | |
| 152 | |
| 153 */ | |
| 154 | |
| 155 #include "config.h" | |
| 156 #include "system.h" | |
| 157 #include "coretypes.h" | |
| 111 | 158 #include "backend.h" |
| 159 #include "target.h" | |
| 160 #include "rtl.h" | |
| 0 | 161 #include "tree.h" |
| 111 | 162 #include "df.h" |
| 0 | 163 #include "insn-config.h" |
| 111 | 164 #include "memmodel.h" |
| 131 | 165 #include "regs.h" |
| 111 | 166 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */ |
| 0 | 167 #include "recog.h" |
| 111 | 168 #include "varasm.h" |
| 169 #include "rtl-error.h" | |
| 170 #include "cfgrtl.h" | |
| 171 #include "cfganal.h" | |
| 172 #include "cfgbuild.h" | |
| 173 #include "cfgcleanup.h" | |
| 0 | 174 #include "reload.h" |
| 175 #include "tree-pass.h" | |
| 111 | 176 #include "rtl-iter.h" |
| 0 | 177 |
| 178 #ifdef STACK_REGS | |
| 179 | |
| 180 /* We use this array to cache info about insns, because otherwise we | |
| 181 spend too much time in stack_regs_mentioned_p. | |
| 182 | |
| 183 Indexed by insn UIDs. A value of zero is uninitialized, one indicates | |
| 184 the insn uses stack registers, two indicates the insn does not use | |
| 185 stack registers. */ | |
| 111 | 186 static vec<char> stack_regs_mentioned_data; |
| 0 | 187 |
| 188 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) | |
| 189 | |
| 190 int regstack_completed = 0; | |
| 191 | |
| 192 /* This is the basic stack record. TOP is an index into REG[] such | |
| 193 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. | |
| 194 | |
| 195 If TOP is -2, REG[] is not yet initialized. Stack initialization | |
| 196 consists of placing each live reg in array `reg' and setting `top' | |
| 197 appropriately. | |
| 198 | |
| 199 REG_SET indicates which registers are live. */ | |
| 200 | |
| 201 typedef struct stack_def | |
| 202 { | |
| 203 int top; /* index to top stack element */ | |
| 204 HARD_REG_SET reg_set; /* set of live registers */ | |
| 205 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ | |
| 111 | 206 } *stack_ptr; |
| 0 | 207 |
| 208 /* This is used to carry information about basic blocks. It is | |
| 209 attached to the AUX field of the standard CFG block. */ | |
| 210 | |
| 211 typedef struct block_info_def | |
| 212 { | |
| 213 struct stack_def stack_in; /* Input stack configuration. */ | |
| 214 struct stack_def stack_out; /* Output stack configuration. */ | |
| 215 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ | |
| 216 int done; /* True if block already converted. */ | |
| 217 int predecessors; /* Number of predecessors that need | |
| 218 to be visited. */ | |
| 219 } *block_info; | |
| 220 | |
| 221 #define BLOCK_INFO(B) ((block_info) (B)->aux) | |
| 222 | |
| 223 /* Passed to change_stack to indicate where to emit insns. */ | |
| 224 enum emit_where | |
| 225 { | |
| 226 EMIT_AFTER, | |
| 227 EMIT_BEFORE | |
| 228 }; | |
| 229 | |
| 230 /* The block we're currently working on. */ | |
| 231 static basic_block current_block; | |
| 232 | |
| 233 /* In the current_block, whether we're processing the first register | |
| 234 stack or call instruction, i.e. the regstack is currently the | |
| 235 same as BLOCK_INFO(current_block)->stack_in. */ | |
| 236 static bool starting_stack_p; | |
| 237 | |
| 238 /* This is the register file for all register after conversion. */ | |
| 239 static rtx | |
| 240 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; | |
| 241 | |
| 242 #define FP_MODE_REG(regno,mode) \ | |
| 243 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) | |
| 244 | |
| 245 /* Used to initialize uninitialized registers. */ | |
| 246 static rtx not_a_num; | |
| 247 | |
| 248 /* Forward declarations */ | |
| 249 | |
| 250 static int stack_regs_mentioned_p (const_rtx pat); | |
| 111 | 251 static void pop_stack (stack_ptr, int); |
| 0 | 252 static rtx *get_true_reg (rtx *); |
| 253 | |
| 111 | 254 static int check_asm_stack_operands (rtx_insn *); |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
19
diff
changeset
|
255 static void get_asm_operands_in_out (rtx, int *, int *); |
| 0 | 256 static rtx stack_result (tree); |
| 257 static void replace_reg (rtx *, int); | |
| 111 | 258 static void remove_regno_note (rtx_insn *, enum reg_note, unsigned int); |
| 259 static int get_hard_regnum (stack_ptr, rtx); | |
| 260 static rtx_insn *emit_pop_insn (rtx_insn *, stack_ptr, rtx, enum emit_where); | |
| 261 static void swap_to_top (rtx_insn *, stack_ptr, rtx, rtx); | |
| 262 static bool move_for_stack_reg (rtx_insn *, stack_ptr, rtx); | |
| 263 static bool move_nan_for_stack_reg (rtx_insn *, stack_ptr, rtx); | |
| 0 | 264 static int swap_rtx_condition_1 (rtx); |
| 111 | 265 static int swap_rtx_condition (rtx_insn *); |
| 266 static void compare_for_stack_reg (rtx_insn *, stack_ptr, rtx, bool); | |
| 267 static bool subst_stack_regs_pat (rtx_insn *, stack_ptr, rtx); | |
| 268 static void subst_asm_stack_regs (rtx_insn *, stack_ptr); | |
| 269 static bool subst_stack_regs (rtx_insn *, stack_ptr); | |
| 270 static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where); | |
| 271 static void print_stack (FILE *, stack_ptr); | |
| 272 static rtx_insn *next_flags_user (rtx_insn *); | |
| 0 | 273 |
| 274 /* Return nonzero if any stack register is mentioned somewhere within PAT. */ | |
| 275 | |
| 276 static int | |
| 277 stack_regs_mentioned_p (const_rtx pat) | |
| 278 { | |
| 279 const char *fmt; | |
| 280 int i; | |
| 281 | |
| 282 if (STACK_REG_P (pat)) | |
| 283 return 1; | |
| 284 | |
| 285 fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
| 286 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
| 287 { | |
| 288 if (fmt[i] == 'E') | |
| 289 { | |
| 290 int j; | |
| 291 | |
| 292 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) | |
| 293 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) | |
| 294 return 1; | |
| 295 } | |
| 296 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) | |
| 297 return 1; | |
| 298 } | |
| 299 | |
| 300 return 0; | |
| 301 } | |
| 302 | |
| 303 /* Return nonzero if INSN mentions stacked registers, else return zero. */ | |
| 304 | |
| 305 int | |
| 306 stack_regs_mentioned (const_rtx insn) | |
| 307 { | |
| 308 unsigned int uid, max; | |
| 309 int test; | |
| 310 | |
| 111 | 311 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ()) |
| 0 | 312 return 0; |
| 313 | |
| 314 uid = INSN_UID (insn); | |
| 111 | 315 max = stack_regs_mentioned_data.length (); |
| 0 | 316 if (uid >= max) |
| 317 { | |
| 318 /* Allocate some extra size to avoid too many reallocs, but | |
| 319 do not grow too quickly. */ | |
| 320 max = uid + uid / 20 + 1; | |
| 111 | 321 stack_regs_mentioned_data.safe_grow_cleared (max); |
| 0 | 322 } |
| 323 | |
| 111 | 324 test = stack_regs_mentioned_data[uid]; |
| 0 | 325 if (test == 0) |
| 326 { | |
| 327 /* This insn has yet to be examined. Do so now. */ | |
| 328 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; | |
| 111 | 329 stack_regs_mentioned_data[uid] = test; |
| 0 | 330 } |
| 331 | |
| 332 return test == 1; | |
| 333 } | |
| 334 | |
| 335 static rtx ix86_flags_rtx; | |
| 336 | |
| 111 | 337 static rtx_insn * |
| 338 next_flags_user (rtx_insn *insn) | |
| 0 | 339 { |
| 340 /* Search forward looking for the first use of this value. | |
| 341 Stop at block boundaries. */ | |
| 342 | |
| 343 while (insn != BB_END (current_block)) | |
| 344 { | |
| 345 insn = NEXT_INSN (insn); | |
| 346 | |
| 347 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) | |
| 348 return insn; | |
| 349 | |
| 350 if (CALL_P (insn)) | |
| 111 | 351 return NULL; |
| 0 | 352 } |
| 111 | 353 return NULL; |
| 0 | 354 } |
| 355 | |
| 356 /* Reorganize the stack into ascending numbers, before this insn. */ | |
| 357 | |
| 358 static void | |
| 111 | 359 straighten_stack (rtx_insn *insn, stack_ptr regstack) |
| 0 | 360 { |
| 361 struct stack_def temp_stack; | |
| 362 int top; | |
| 363 | |
| 364 /* If there is only a single register on the stack, then the stack is | |
| 365 already in increasing order and no reorganization is needed. | |
| 366 | |
| 367 Similarly if the stack is empty. */ | |
| 368 if (regstack->top <= 0) | |
| 369 return; | |
| 370 | |
| 371 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); | |
| 372 | |
| 373 for (top = temp_stack.top = regstack->top; top >= 0; top--) | |
| 374 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; | |
| 375 | |
| 376 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); | |
| 377 } | |
| 378 | |
| 379 /* Pop a register from the stack. */ | |
| 380 | |
| 381 static void | |
| 111 | 382 pop_stack (stack_ptr regstack, int regno) |
| 0 | 383 { |
| 384 int top = regstack->top; | |
| 385 | |
| 386 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); | |
| 387 regstack->top--; | |
| 388 /* If regno was not at the top of stack then adjust stack. */ | |
| 389 if (regstack->reg [top] != regno) | |
| 390 { | |
| 391 int i; | |
| 392 for (i = regstack->top; i >= 0; i--) | |
| 393 if (regstack->reg [i] == regno) | |
| 394 { | |
| 395 int j; | |
| 396 for (j = i; j < top; j++) | |
| 397 regstack->reg [j] = regstack->reg [j + 1]; | |
| 398 break; | |
| 399 } | |
| 400 } | |
| 401 } | |
| 402 | |
| 403 /* Return a pointer to the REG expression within PAT. If PAT is not a | |
| 404 REG, possible enclosed by a conversion rtx, return the inner part of | |
| 405 PAT that stopped the search. */ | |
| 406 | |
| 407 static rtx * | |
| 408 get_true_reg (rtx *pat) | |
| 409 { | |
| 410 for (;;) | |
| 411 switch (GET_CODE (*pat)) | |
| 412 { | |
| 413 case SUBREG: | |
| 414 /* Eliminate FP subregister accesses in favor of the | |
| 415 actual FP register in use. */ | |
| 416 { | |
| 131 | 417 rtx subreg = SUBREG_REG (*pat); |
| 418 | |
| 419 if (STACK_REG_P (subreg)) | |
| 0 | 420 { |
| 421 int regno_off = subreg_regno_offset (REGNO (subreg), | |
| 422 GET_MODE (subreg), | |
| 423 SUBREG_BYTE (*pat), | |
| 424 GET_MODE (*pat)); | |
| 425 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, | |
| 426 GET_MODE (subreg)); | |
| 427 return pat; | |
| 428 } | |
| 111 | 429 pat = &XEXP (*pat, 0); |
| 430 break; | |
| 0 | 431 } |
| 131 | 432 |
| 433 case FLOAT_TRUNCATE: | |
| 434 if (!flag_unsafe_math_optimizations) | |
| 435 return pat; | |
| 436 /* FALLTHRU */ | |
| 437 | |
| 0 | 438 case FLOAT: |
| 439 case FIX: | |
| 440 case FLOAT_EXTEND: | |
| 111 | 441 pat = &XEXP (*pat, 0); |
| 0 | 442 break; |
| 443 | |
| 444 case UNSPEC: | |
| 111 | 445 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP |
| 446 || XINT (*pat, 1) == UNSPEC_FILD_ATOMIC) | |
| 447 pat = &XVECEXP (*pat, 0, 0); | |
| 0 | 448 return pat; |
| 449 | |
| 450 default: | |
| 451 return pat; | |
| 452 } | |
| 453 } | |
| 454 | |
| 455 /* Set if we find any malformed asms in a block. */ | |
| 456 static bool any_malformed_asm; | |
| 457 | |
| 458 /* There are many rules that an asm statement for stack-like regs must | |
| 459 follow. Those rules are explained at the top of this file: the rule | |
| 460 numbers below refer to that explanation. */ | |
| 461 | |
| 462 static int | |
| 111 | 463 check_asm_stack_operands (rtx_insn *insn) |
| 0 | 464 { |
| 465 int i; | |
| 466 int n_clobbers; | |
| 467 int malformed_asm = 0; | |
| 468 rtx body = PATTERN (insn); | |
| 469 | |
| 470 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; | |
| 471 char implicitly_dies[FIRST_PSEUDO_REGISTER]; | |
| 111 | 472 char explicitly_used[FIRST_PSEUDO_REGISTER]; |
| 0 | 473 |
| 474 rtx *clobber_reg = 0; | |
| 475 int n_inputs, n_outputs; | |
| 476 | |
| 477 /* Find out what the constraints require. If no constraint | |
| 478 alternative matches, this asm is malformed. */ | |
| 111 | 479 extract_constrain_insn (insn); |
| 480 | |
| 481 preprocess_constraints (insn); | |
| 0 | 482 |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
19
diff
changeset
|
483 get_asm_operands_in_out (body, &n_outputs, &n_inputs); |
| 0 | 484 |
| 111 | 485 if (which_alternative < 0) |
| 0 | 486 { |
| 487 malformed_asm = 1; | |
| 488 /* Avoid further trouble with this insn. */ | |
| 489 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); | |
| 490 return 0; | |
| 491 } | |
| 111 | 492 const operand_alternative *op_alt = which_op_alt (); |
| 0 | 493 |
| 494 /* Strip SUBREGs here to make the following code simpler. */ | |
| 495 for (i = 0; i < recog_data.n_operands; i++) | |
| 496 if (GET_CODE (recog_data.operand[i]) == SUBREG | |
| 497 && REG_P (SUBREG_REG (recog_data.operand[i]))) | |
| 498 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); | |
| 499 | |
| 500 /* Set up CLOBBER_REG. */ | |
| 501 | |
| 502 n_clobbers = 0; | |
| 503 | |
| 504 if (GET_CODE (body) == PARALLEL) | |
| 505 { | |
| 506 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); | |
| 507 | |
| 508 for (i = 0; i < XVECLEN (body, 0); i++) | |
| 509 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
| 510 { | |
| 511 rtx clobber = XVECEXP (body, 0, i); | |
| 512 rtx reg = XEXP (clobber, 0); | |
| 513 | |
| 514 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) | |
| 515 reg = SUBREG_REG (reg); | |
| 516 | |
| 517 if (STACK_REG_P (reg)) | |
| 518 { | |
| 519 clobber_reg[n_clobbers] = reg; | |
| 520 n_clobbers++; | |
| 521 } | |
| 522 } | |
| 523 } | |
| 524 | |
| 525 /* Enforce rule #4: Output operands must specifically indicate which | |
| 526 reg an output appears in after an asm. "=f" is not allowed: the | |
| 527 operand constraints must select a class with a single reg. | |
| 528 | |
| 529 Also enforce rule #5: Output operands must start at the top of | |
| 530 the reg-stack: output operands may not "skip" a reg. */ | |
| 531 | |
| 532 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); | |
| 533 for (i = 0; i < n_outputs; i++) | |
| 534 if (STACK_REG_P (recog_data.operand[i])) | |
| 535 { | |
| 111 | 536 if (reg_class_size[(int) op_alt[i].cl] != 1) |
| 0 | 537 { |
| 538 error_for_asm (insn, "output constraint %d must specify a single register", i); | |
| 539 malformed_asm = 1; | |
| 540 } | |
| 541 else | |
| 542 { | |
| 543 int j; | |
| 544 | |
| 545 for (j = 0; j < n_clobbers; j++) | |
| 546 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) | |
| 547 { | |
| 548 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", | |
| 549 i, reg_names [REGNO (clobber_reg[j])]); | |
| 550 malformed_asm = 1; | |
| 551 break; | |
| 552 } | |
| 553 if (j == n_clobbers) | |
| 554 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; | |
| 555 } | |
| 556 } | |
| 557 | |
| 558 | |
| 559 /* Search for first non-popped reg. */ | |
| 560 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
| 561 if (! reg_used_as_output[i]) | |
| 562 break; | |
| 563 | |
| 564 /* If there are any other popped regs, that's an error. */ | |
| 565 for (; i < LAST_STACK_REG + 1; i++) | |
| 566 if (reg_used_as_output[i]) | |
| 567 break; | |
| 568 | |
| 569 if (i != LAST_STACK_REG + 1) | |
| 570 { | |
| 571 error_for_asm (insn, "output regs must be grouped at top of stack"); | |
| 572 malformed_asm = 1; | |
| 573 } | |
| 574 | |
| 575 /* Enforce rule #2: All implicitly popped input regs must be closer | |
| 576 to the top of the reg-stack than any input that is not implicitly | |
| 577 popped. */ | |
| 578 | |
| 579 memset (implicitly_dies, 0, sizeof (implicitly_dies)); | |
| 111 | 580 memset (explicitly_used, 0, sizeof (explicitly_used)); |
| 0 | 581 for (i = n_outputs; i < n_outputs + n_inputs; i++) |
| 582 if (STACK_REG_P (recog_data.operand[i])) | |
| 583 { | |
| 584 /* An input reg is implicitly popped if it is tied to an | |
| 585 output, or if there is a CLOBBER for it. */ | |
| 586 int j; | |
| 587 | |
| 588 for (j = 0; j < n_clobbers; j++) | |
| 589 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) | |
| 590 break; | |
| 591 | |
| 111 | 592 if (j < n_clobbers || op_alt[i].matches >= 0) |
| 0 | 593 implicitly_dies[REGNO (recog_data.operand[i])] = 1; |
| 111 | 594 else if (reg_class_size[(int) op_alt[i].cl] == 1) |
| 595 explicitly_used[REGNO (recog_data.operand[i])] = 1; | |
| 0 | 596 } |
| 597 | |
| 598 /* Search for first non-popped reg. */ | |
| 599 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
| 600 if (! implicitly_dies[i]) | |
| 601 break; | |
| 602 | |
| 603 /* If there are any other popped regs, that's an error. */ | |
| 604 for (; i < LAST_STACK_REG + 1; i++) | |
| 605 if (implicitly_dies[i]) | |
| 606 break; | |
| 607 | |
| 608 if (i != LAST_STACK_REG + 1) | |
| 609 { | |
| 610 error_for_asm (insn, | |
| 611 "implicitly popped regs must be grouped at top of stack"); | |
| 612 malformed_asm = 1; | |
| 613 } | |
| 614 | |
| 111 | 615 /* Search for first not-explicitly used reg. */ |
| 616 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
| 617 if (! implicitly_dies[i] && ! explicitly_used[i]) | |
| 618 break; | |
| 619 | |
| 620 /* If there are any other explicitly used regs, that's an error. */ | |
| 621 for (; i < LAST_STACK_REG + 1; i++) | |
| 622 if (explicitly_used[i]) | |
| 623 break; | |
| 624 | |
| 625 if (i != LAST_STACK_REG + 1) | |
| 626 { | |
| 627 error_for_asm (insn, | |
| 628 "explicitly used regs must be grouped at top of stack"); | |
| 629 malformed_asm = 1; | |
| 630 } | |
| 631 | |
| 0 | 632 /* Enforce rule #3: If any input operand uses the "f" constraint, all |
| 633 output constraints must use the "&" earlyclobber. | |
| 634 | |
| 635 ??? Detect this more deterministically by having constrain_asm_operands | |
| 636 record any earlyclobber. */ | |
| 637 | |
| 638 for (i = n_outputs; i < n_outputs + n_inputs; i++) | |
| 111 | 639 if (STACK_REG_P (recog_data.operand[i]) && op_alt[i].matches == -1) |
| 0 | 640 { |
| 641 int j; | |
| 642 | |
| 643 for (j = 0; j < n_outputs; j++) | |
| 644 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) | |
| 645 { | |
| 646 error_for_asm (insn, | |
| 647 "output operand %d must use %<&%> constraint", j); | |
| 648 malformed_asm = 1; | |
| 649 } | |
| 650 } | |
| 651 | |
| 652 if (malformed_asm) | |
| 653 { | |
| 654 /* Avoid further trouble with this insn. */ | |
| 655 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); | |
| 656 any_malformed_asm = true; | |
| 657 return 0; | |
| 658 } | |
| 659 | |
| 660 return 1; | |
| 661 } | |
| 662 | |
| 663 /* Calculate the number of inputs and outputs in BODY, an | |
| 664 asm_operands. N_OPERANDS is the total number of operands, and | |
| 665 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are | |
| 666 placed. */ | |
| 667 | |
|
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668 static void |
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669 get_asm_operands_in_out (rtx body, int *pout, int *pin) |
| 0 | 670 { |
|
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671 rtx asmop = extract_asm_operands (body); |
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672 |
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673 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop); |
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674 *pout = (recog_data.n_operands |
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675 - ASM_OPERANDS_INPUT_LENGTH (asmop) |
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676 - ASM_OPERANDS_LABEL_LENGTH (asmop)); |
| 0 | 677 } |
| 678 | |
| 679 /* If current function returns its result in an fp stack register, | |
| 680 return the REG. Otherwise, return 0. */ | |
| 681 | |
| 682 static rtx | |
| 683 stack_result (tree decl) | |
| 684 { | |
| 685 rtx result; | |
| 686 | |
| 687 /* If the value is supposed to be returned in memory, then clearly | |
| 688 it is not returned in a stack register. */ | |
| 689 if (aggregate_value_p (DECL_RESULT (decl), decl)) | |
| 690 return 0; | |
| 691 | |
| 692 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); | |
| 693 if (result != 0) | |
| 694 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)), | |
| 695 decl, true); | |
| 696 | |
| 697 return result != 0 && STACK_REG_P (result) ? result : 0; | |
| 698 } | |
| 699 | |
| 700 | |
| 701 /* | |
| 702 * This section deals with stack register substitution, and forms the second | |
| 703 * pass over the RTL. | |
| 704 */ | |
| 705 | |
| 706 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for | |
| 707 the desired hard REGNO. */ | |
| 708 | |
| 709 static void | |
| 710 replace_reg (rtx *reg, int regno) | |
| 711 { | |
| 712 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG)); | |
| 713 gcc_assert (STACK_REG_P (*reg)); | |
| 714 | |
| 131 | 715 gcc_assert (GET_MODE_CLASS (GET_MODE (*reg)) == MODE_FLOAT |
| 0 | 716 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT); |
| 717 | |
| 718 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); | |
| 719 } | |
| 720 | |
| 721 /* Remove a note of type NOTE, which must be found, for register | |
| 722 number REGNO from INSN. Remove only one such note. */ | |
| 723 | |
| 724 static void | |
| 111 | 725 remove_regno_note (rtx_insn *insn, enum reg_note note, unsigned int regno) |
| 0 | 726 { |
| 727 rtx *note_link, this_rtx; | |
| 728 | |
| 729 note_link = ®_NOTES (insn); | |
| 730 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1)) | |
| 731 if (REG_NOTE_KIND (this_rtx) == note | |
| 732 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno) | |
| 733 { | |
| 734 *note_link = XEXP (this_rtx, 1); | |
| 735 return; | |
| 736 } | |
| 737 else | |
| 738 note_link = &XEXP (this_rtx, 1); | |
| 739 | |
| 740 gcc_unreachable (); | |
| 741 } | |
| 742 | |
| 743 /* Find the hard register number of virtual register REG in REGSTACK. | |
| 744 The hard register number is relative to the top of the stack. -1 is | |
| 745 returned if the register is not found. */ | |
| 746 | |
| 747 static int | |
| 111 | 748 get_hard_regnum (stack_ptr regstack, rtx reg) |
| 0 | 749 { |
| 750 int i; | |
| 751 | |
| 752 gcc_assert (STACK_REG_P (reg)); | |
| 753 | |
| 754 for (i = regstack->top; i >= 0; i--) | |
| 755 if (regstack->reg[i] == REGNO (reg)) | |
| 756 break; | |
| 757 | |
| 758 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; | |
| 759 } | |
| 760 | |
| 761 /* Emit an insn to pop virtual register REG before or after INSN. | |
| 762 REGSTACK is the stack state after INSN and is updated to reflect this | |
| 763 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn | |
| 764 is represented as a SET whose destination is the register to be popped | |
| 765 and source is the top of stack. A death note for the top of stack | |
| 766 cases the movdf pattern to pop. */ | |
| 767 | |
| 111 | 768 static rtx_insn * |
| 131 | 769 emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg, |
| 770 enum emit_where where) | |
| 0 | 771 { |
| 131 | 772 machine_mode raw_mode = reg_raw_mode[FIRST_STACK_REG]; |
| 111 | 773 rtx_insn *pop_insn; |
| 774 rtx pop_rtx; | |
| 0 | 775 int hard_regno; |
| 776 | |
| 777 /* For complex types take care to pop both halves. These may survive in | |
| 778 CLOBBER and USE expressions. */ | |
| 779 if (COMPLEX_MODE_P (GET_MODE (reg))) | |
| 780 { | |
| 131 | 781 rtx reg1 = FP_MODE_REG (REGNO (reg), raw_mode); |
| 782 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, raw_mode); | |
| 0 | 783 |
| 111 | 784 pop_insn = NULL; |
| 0 | 785 if (get_hard_regnum (regstack, reg1) >= 0) |
| 786 pop_insn = emit_pop_insn (insn, regstack, reg1, where); | |
| 787 if (get_hard_regnum (regstack, reg2) >= 0) | |
| 788 pop_insn = emit_pop_insn (insn, regstack, reg2, where); | |
| 789 gcc_assert (pop_insn); | |
| 790 return pop_insn; | |
| 791 } | |
| 792 | |
| 793 hard_regno = get_hard_regnum (regstack, reg); | |
| 794 | |
| 795 gcc_assert (hard_regno >= FIRST_STACK_REG); | |
| 796 | |
| 131 | 797 pop_rtx = gen_rtx_SET (FP_MODE_REG (hard_regno, raw_mode), |
| 798 FP_MODE_REG (FIRST_STACK_REG, raw_mode)); | |
| 0 | 799 |
| 800 if (where == EMIT_AFTER) | |
| 801 pop_insn = emit_insn_after (pop_rtx, insn); | |
| 802 else | |
| 803 pop_insn = emit_insn_before (pop_rtx, insn); | |
| 804 | |
| 131 | 805 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, raw_mode)); |
| 0 | 806 |
| 807 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] | |
| 808 = regstack->reg[regstack->top]; | |
| 809 regstack->top -= 1; | |
| 810 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); | |
| 811 | |
| 812 return pop_insn; | |
| 813 } | |
| 814 | |
| 815 /* Emit an insn before or after INSN to swap virtual register REG with | |
| 816 the top of stack. REGSTACK is the stack state before the swap, and | |
| 817 is updated to reflect the swap. A swap insn is represented as a | |
| 818 PARALLEL of two patterns: each pattern moves one reg to the other. | |
| 819 | |
| 820 If REG is already at the top of the stack, no insn is emitted. */ | |
| 821 | |
| 822 static void | |
| 111 | 823 emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg) |
| 0 | 824 { |
| 825 int hard_regno; | |
| 111 | 826 int other_reg; /* swap regno temps */ |
| 827 rtx_insn *i1; /* the stack-reg insn prior to INSN */ | |
| 0 | 828 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ |
| 829 | |
| 830 hard_regno = get_hard_regnum (regstack, reg); | |
| 831 | |
| 832 if (hard_regno == FIRST_STACK_REG) | |
| 833 return; | |
| 834 if (hard_regno == -1) | |
| 835 { | |
| 836 /* Something failed if the register wasn't on the stack. If we had | |
| 837 malformed asms, we zapped the instruction itself, but that didn't | |
| 838 produce the same pattern of register sets as before. To prevent | |
| 839 further failure, adjust REGSTACK to include REG at TOP. */ | |
| 840 gcc_assert (any_malformed_asm); | |
| 841 regstack->reg[++regstack->top] = REGNO (reg); | |
| 842 return; | |
| 843 } | |
| 844 gcc_assert (hard_regno >= FIRST_STACK_REG); | |
| 845 | |
| 846 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); | |
| 111 | 847 std::swap (regstack->reg[regstack->top], regstack->reg[other_reg]); |
| 0 | 848 |
| 849 /* Find the previous insn involving stack regs, but don't pass a | |
| 850 block boundary. */ | |
| 851 i1 = NULL; | |
| 852 if (current_block && insn != BB_HEAD (current_block)) | |
| 853 { | |
| 111 | 854 rtx_insn *tmp = PREV_INSN (insn); |
| 855 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block)); | |
| 0 | 856 while (tmp != limit) |
| 857 { | |
| 858 if (LABEL_P (tmp) | |
| 859 || CALL_P (tmp) | |
| 860 || NOTE_INSN_BASIC_BLOCK_P (tmp) | |
| 861 || (NONJUMP_INSN_P (tmp) | |
| 862 && stack_regs_mentioned (tmp))) | |
| 863 { | |
| 864 i1 = tmp; | |
| 865 break; | |
| 866 } | |
| 867 tmp = PREV_INSN (tmp); | |
| 868 } | |
| 869 } | |
| 870 | |
| 871 if (i1 != NULL_RTX | |
| 872 && (i1set = single_set (i1)) != NULL_RTX) | |
| 873 { | |
| 874 rtx i1src = *get_true_reg (&SET_SRC (i1set)); | |
| 875 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); | |
| 876 | |
| 877 /* If the previous register stack push was from the reg we are to | |
| 878 swap with, omit the swap. */ | |
| 879 | |
| 880 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG | |
| 881 && REG_P (i1src) | |
| 882 && REGNO (i1src) == (unsigned) hard_regno - 1 | |
| 883 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) | |
| 884 return; | |
| 885 | |
| 886 /* If the previous insn wrote to the reg we are to swap with, | |
| 887 omit the swap. */ | |
| 888 | |
| 889 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno | |
| 890 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG | |
| 891 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) | |
| 892 return; | |
| 111 | 893 |
| 894 /* Instead of | |
| 895 fld a | |
| 896 fld b | |
| 897 fxch %st(1) | |
| 898 just use | |
| 899 fld b | |
| 900 fld a | |
| 901 if possible. Similarly for fld1, fldz, fldpi etc. instead of any | |
| 902 of the loads or for float extension from memory. */ | |
| 903 | |
| 904 i1src = SET_SRC (i1set); | |
| 905 if (GET_CODE (i1src) == FLOAT_EXTEND) | |
| 906 i1src = XEXP (i1src, 0); | |
| 907 if (REG_P (i1dest) | |
| 908 && REGNO (i1dest) == FIRST_STACK_REG | |
| 909 && (MEM_P (i1src) || GET_CODE (i1src) == CONST_DOUBLE) | |
| 910 && !side_effects_p (i1src) | |
| 911 && hard_regno == FIRST_STACK_REG + 1 | |
| 912 && i1 != BB_HEAD (current_block)) | |
| 913 { | |
| 914 /* i1 is the last insn that involves stack regs before insn, and | |
| 915 is known to be a load without other side-effects, i.e. fld b | |
| 916 in the above comment. */ | |
| 917 rtx_insn *i2 = NULL; | |
| 918 rtx i2set; | |
| 919 rtx_insn *tmp = PREV_INSN (i1); | |
| 920 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block)); | |
| 921 /* Find the previous insn involving stack regs, but don't pass a | |
| 922 block boundary. */ | |
| 923 while (tmp != limit) | |
| 924 { | |
| 925 if (LABEL_P (tmp) | |
| 926 || CALL_P (tmp) | |
| 927 || NOTE_INSN_BASIC_BLOCK_P (tmp) | |
| 928 || (NONJUMP_INSN_P (tmp) | |
| 929 && stack_regs_mentioned (tmp))) | |
| 930 { | |
| 931 i2 = tmp; | |
| 932 break; | |
| 933 } | |
| 934 tmp = PREV_INSN (tmp); | |
| 935 } | |
| 936 if (i2 != NULL_RTX | |
| 937 && (i2set = single_set (i2)) != NULL_RTX) | |
| 938 { | |
| 939 rtx i2dest = *get_true_reg (&SET_DEST (i2set)); | |
| 940 rtx i2src = SET_SRC (i2set); | |
| 941 if (GET_CODE (i2src) == FLOAT_EXTEND) | |
| 942 i2src = XEXP (i2src, 0); | |
| 943 /* If the last two insns before insn that involve | |
| 944 stack regs are loads, where the latter (i1) | |
| 945 pushes onto the register stack and thus | |
| 946 moves the value from the first load (i2) from | |
| 947 %st to %st(1), consider swapping them. */ | |
| 948 if (REG_P (i2dest) | |
| 949 && REGNO (i2dest) == FIRST_STACK_REG | |
| 950 && (MEM_P (i2src) || GET_CODE (i2src) == CONST_DOUBLE) | |
| 951 /* Ensure i2 doesn't have other side-effects. */ | |
| 952 && !side_effects_p (i2src) | |
| 953 /* And that the two instructions can actually be | |
| 954 swapped, i.e. there shouldn't be any stores | |
| 955 in between i2 and i1 that might alias with | |
| 956 the i1 memory, and the memory address can't | |
| 957 use registers set in between i2 and i1. */ | |
| 958 && !modified_between_p (SET_SRC (i1set), i2, i1)) | |
| 959 { | |
| 960 /* Move i1 (fld b above) right before i2 (fld a | |
| 961 above. */ | |
| 962 remove_insn (i1); | |
| 963 SET_PREV_INSN (i1) = NULL_RTX; | |
| 964 SET_NEXT_INSN (i1) = NULL_RTX; | |
| 965 set_block_for_insn (i1, NULL); | |
| 966 emit_insn_before (i1, i2); | |
| 967 return; | |
| 968 } | |
| 969 } | |
| 970 } | |
| 0 | 971 } |
| 972 | |
| 973 /* Avoid emitting the swap if this is the first register stack insn | |
| 974 of the current_block. Instead update the current_block's stack_in | |
| 975 and let compensate edges take care of this for us. */ | |
| 976 if (current_block && starting_stack_p) | |
| 977 { | |
| 978 BLOCK_INFO (current_block)->stack_in = *regstack; | |
| 979 starting_stack_p = false; | |
| 980 return; | |
| 981 } | |
| 982 | |
| 131 | 983 machine_mode raw_mode = reg_raw_mode[FIRST_STACK_REG]; |
| 984 rtx op1 = FP_MODE_REG (hard_regno, raw_mode); | |
| 985 rtx op2 = FP_MODE_REG (FIRST_STACK_REG, raw_mode); | |
| 986 rtx swap_rtx | |
| 987 = gen_rtx_PARALLEL (VOIDmode, | |
| 988 gen_rtvec (2, gen_rtx_SET (op1, op2), | |
| 989 gen_rtx_SET (op2, op1))); | |
| 0 | 990 if (i1) |
| 991 emit_insn_after (swap_rtx, i1); | |
| 992 else if (current_block) | |
| 993 emit_insn_before (swap_rtx, BB_HEAD (current_block)); | |
| 994 else | |
| 995 emit_insn_before (swap_rtx, insn); | |
| 996 } | |
| 997 | |
| 998 /* Emit an insns before INSN to swap virtual register SRC1 with | |
| 999 the top of stack and virtual register SRC2 with second stack | |
| 1000 slot. REGSTACK is the stack state before the swaps, and | |
| 1001 is updated to reflect the swaps. A swap insn is represented as a | |
| 1002 PARALLEL of two patterns: each pattern moves one reg to the other. | |
| 1003 | |
| 1004 If SRC1 and/or SRC2 are already at the right place, no swap insn | |
| 1005 is emitted. */ | |
| 1006 | |
| 1007 static void | |
| 111 | 1008 swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2) |
| 0 | 1009 { |
| 1010 struct stack_def temp_stack; | |
| 111 | 1011 int regno, j, k; |
| 0 | 1012 |
| 1013 temp_stack = *regstack; | |
| 1014 | |
| 1015 /* Place operand 1 at the top of stack. */ | |
| 1016 regno = get_hard_regnum (&temp_stack, src1); | |
| 1017 gcc_assert (regno >= 0); | |
| 1018 if (regno != FIRST_STACK_REG) | |
| 1019 { | |
| 1020 k = temp_stack.top - (regno - FIRST_STACK_REG); | |
| 1021 j = temp_stack.top; | |
| 1022 | |
| 111 | 1023 std::swap (temp_stack.reg[j], temp_stack.reg[k]); |
| 0 | 1024 } |
| 1025 | |
| 1026 /* Place operand 2 next on the stack. */ | |
| 1027 regno = get_hard_regnum (&temp_stack, src2); | |
| 1028 gcc_assert (regno >= 0); | |
| 1029 if (regno != FIRST_STACK_REG + 1) | |
| 1030 { | |
| 1031 k = temp_stack.top - (regno - FIRST_STACK_REG); | |
| 1032 j = temp_stack.top - 1; | |
| 1033 | |
| 111 | 1034 std::swap (temp_stack.reg[j], temp_stack.reg[k]); |
| 0 | 1035 } |
| 1036 | |
| 1037 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); | |
| 1038 } | |
| 1039 | |
| 1040 /* Handle a move to or from a stack register in PAT, which is in INSN. | |
| 1041 REGSTACK is the current stack. Return whether a control flow insn | |
| 1042 was deleted in the process. */ | |
| 1043 | |
| 1044 static bool | |
| 111 | 1045 move_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat) |
| 0 | 1046 { |
| 1047 rtx *psrc = get_true_reg (&SET_SRC (pat)); | |
| 1048 rtx *pdest = get_true_reg (&SET_DEST (pat)); | |
| 1049 rtx src, dest; | |
| 1050 rtx note; | |
| 1051 bool control_flow_insn_deleted = false; | |
| 1052 | |
| 1053 src = *psrc; dest = *pdest; | |
| 1054 | |
| 1055 if (STACK_REG_P (src) && STACK_REG_P (dest)) | |
| 1056 { | |
| 1057 /* Write from one stack reg to another. If SRC dies here, then | |
| 1058 just change the register mapping and delete the insn. */ | |
| 1059 | |
| 1060 note = find_regno_note (insn, REG_DEAD, REGNO (src)); | |
| 1061 if (note) | |
| 1062 { | |
| 1063 int i; | |
| 1064 | |
| 1065 /* If this is a no-op move, there must not be a REG_DEAD note. */ | |
| 1066 gcc_assert (REGNO (src) != REGNO (dest)); | |
| 1067 | |
| 1068 for (i = regstack->top; i >= 0; i--) | |
| 1069 if (regstack->reg[i] == REGNO (src)) | |
| 1070 break; | |
| 1071 | |
| 1072 /* The destination must be dead, or life analysis is borked. */ | |
| 1073 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); | |
| 1074 | |
| 1075 /* If the source is not live, this is yet another case of | |
| 1076 uninitialized variables. Load up a NaN instead. */ | |
| 1077 if (i < 0) | |
| 1078 return move_nan_for_stack_reg (insn, regstack, dest); | |
| 1079 | |
| 1080 /* It is possible that the dest is unused after this insn. | |
| 1081 If so, just pop the src. */ | |
| 1082 | |
| 1083 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) | |
| 1084 emit_pop_insn (insn, regstack, src, EMIT_AFTER); | |
| 1085 else | |
| 1086 { | |
| 1087 regstack->reg[i] = REGNO (dest); | |
| 1088 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
| 1089 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); | |
| 1090 } | |
| 1091 | |
| 1092 control_flow_insn_deleted |= control_flow_insn_p (insn); | |
| 1093 delete_insn (insn); | |
| 1094 return control_flow_insn_deleted; | |
| 1095 } | |
| 1096 | |
| 1097 /* The source reg does not die. */ | |
| 1098 | |
| 1099 /* If this appears to be a no-op move, delete it, or else it | |
| 1100 will confuse the machine description output patterns. But if | |
| 1101 it is REG_UNUSED, we must pop the reg now, as per-insn processing | |
| 1102 for REG_UNUSED will not work for deleted insns. */ | |
| 1103 | |
| 1104 if (REGNO (src) == REGNO (dest)) | |
| 1105 { | |
| 1106 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) | |
| 1107 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); | |
| 1108 | |
| 1109 control_flow_insn_deleted |= control_flow_insn_p (insn); | |
| 1110 delete_insn (insn); | |
| 1111 return control_flow_insn_deleted; | |
| 1112 } | |
| 1113 | |
| 1114 /* The destination ought to be dead. */ | |
| 131 | 1115 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
| 1116 gcc_assert (any_malformed_asm); | |
| 1117 else | |
| 1118 { | |
| 1119 replace_reg (psrc, get_hard_regnum (regstack, src)); | |
| 1120 | |
| 1121 regstack->reg[++regstack->top] = REGNO (dest); | |
| 1122 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
| 1123 replace_reg (pdest, FIRST_STACK_REG); | |
| 1124 } | |
| 0 | 1125 } |
| 1126 else if (STACK_REG_P (src)) | |
| 1127 { | |
| 1128 /* Save from a stack reg to MEM, or possibly integer reg. Since | |
| 1129 only top of stack may be saved, emit an exchange first if | |
| 1130 needs be. */ | |
| 1131 | |
| 1132 emit_swap_insn (insn, regstack, src); | |
| 1133 | |
| 1134 note = find_regno_note (insn, REG_DEAD, REGNO (src)); | |
| 1135 if (note) | |
| 1136 { | |
| 1137 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); | |
| 1138 regstack->top--; | |
| 1139 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); | |
| 1140 } | |
| 1141 else if ((GET_MODE (src) == XFmode) | |
| 1142 && regstack->top < REG_STACK_SIZE - 1) | |
| 1143 { | |
| 1144 /* A 387 cannot write an XFmode value to a MEM without | |
| 1145 clobbering the source reg. The output code can handle | |
| 1146 this by reading back the value from the MEM. | |
| 1147 But it is more efficient to use a temp register if one is | |
| 1148 available. Push the source value here if the register | |
| 1149 stack is not full, and then write the value to memory via | |
| 1150 a pop. */ | |
| 1151 rtx push_rtx; | |
| 1152 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); | |
| 1153 | |
| 1154 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); | |
| 1155 emit_insn_before (push_rtx, insn); | |
| 1156 add_reg_note (insn, REG_DEAD, top_stack_reg); | |
| 1157 } | |
| 1158 | |
| 1159 replace_reg (psrc, FIRST_STACK_REG); | |
| 1160 } | |
| 1161 else | |
| 1162 { | |
| 1163 rtx pat = PATTERN (insn); | |
| 1164 | |
| 1165 gcc_assert (STACK_REG_P (dest)); | |
| 1166 | |
| 1167 /* Load from MEM, or possibly integer REG or constant, into the | |
| 1168 stack regs. The actual target is always the top of the | |
| 1169 stack. The stack mapping is changed to reflect that DEST is | |
| 1170 now at top of stack. */ | |
| 1171 | |
| 1172 /* The destination ought to be dead. However, there is a | |
| 1173 special case with i387 UNSPEC_TAN, where destination is live | |
| 1174 (an argument to fptan) but inherent load of 1.0 is modelled | |
| 1175 as a load from a constant. */ | |
| 1176 if (GET_CODE (pat) == PARALLEL | |
| 1177 && XVECLEN (pat, 0) == 2 | |
| 1178 && GET_CODE (XVECEXP (pat, 0, 1)) == SET | |
| 1179 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC | |
| 1180 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN) | |
| 1181 emit_swap_insn (insn, regstack, dest); | |
| 1182 else | |
| 131 | 1183 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG |
| 1184 || any_malformed_asm); | |
| 0 | 1185 |
| 1186 gcc_assert (regstack->top < REG_STACK_SIZE); | |
| 1187 | |
| 1188 regstack->reg[++regstack->top] = REGNO (dest); | |
| 1189 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
| 1190 replace_reg (pdest, FIRST_STACK_REG); | |
| 1191 } | |
| 1192 | |
| 1193 return control_flow_insn_deleted; | |
| 1194 } | |
| 1195 | |
| 1196 /* A helper function which replaces INSN with a pattern that loads up | |
| 1197 a NaN into DEST, then invokes move_for_stack_reg. */ | |
| 1198 | |
| 1199 static bool | |
| 111 | 1200 move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest) |
| 0 | 1201 { |
| 1202 rtx pat; | |
| 1203 | |
| 1204 dest = FP_MODE_REG (REGNO (dest), SFmode); | |
| 111 | 1205 pat = gen_rtx_SET (dest, not_a_num); |
| 0 | 1206 PATTERN (insn) = pat; |
| 1207 INSN_CODE (insn) = -1; | |
| 1208 | |
| 1209 return move_for_stack_reg (insn, regstack, pat); | |
| 1210 } | |
| 1211 | |
| 1212 /* Swap the condition on a branch, if there is one. Return true if we | |
| 1213 found a condition to swap. False if the condition was not used as | |
| 1214 such. */ | |
| 1215 | |
| 1216 static int | |
| 1217 swap_rtx_condition_1 (rtx pat) | |
| 1218 { | |
| 1219 const char *fmt; | |
| 1220 int i, r = 0; | |
| 1221 | |
| 1222 if (COMPARISON_P (pat)) | |
| 1223 { | |
| 1224 PUT_CODE (pat, swap_condition (GET_CODE (pat))); | |
| 1225 r = 1; | |
| 1226 } | |
| 1227 else | |
| 1228 { | |
| 1229 fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
| 1230 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
| 1231 { | |
| 1232 if (fmt[i] == 'E') | |
| 1233 { | |
| 1234 int j; | |
| 1235 | |
| 1236 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) | |
| 1237 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); | |
| 1238 } | |
| 1239 else if (fmt[i] == 'e') | |
| 1240 r |= swap_rtx_condition_1 (XEXP (pat, i)); | |
| 1241 } | |
| 1242 } | |
| 1243 | |
| 1244 return r; | |
| 1245 } | |
| 1246 | |
| 1247 static int | |
| 111 | 1248 swap_rtx_condition (rtx_insn *insn) |
| 0 | 1249 { |
| 1250 rtx pat = PATTERN (insn); | |
| 1251 | |
| 1252 /* We're looking for a single set to cc0 or an HImode temporary. */ | |
| 1253 | |
| 1254 if (GET_CODE (pat) == SET | |
| 1255 && REG_P (SET_DEST (pat)) | |
| 1256 && REGNO (SET_DEST (pat)) == FLAGS_REG) | |
| 1257 { | |
| 1258 insn = next_flags_user (insn); | |
| 1259 if (insn == NULL_RTX) | |
| 1260 return 0; | |
| 1261 pat = PATTERN (insn); | |
| 1262 } | |
| 1263 | |
| 1264 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything | |
| 1265 with the cc value right now. We may be able to search for one | |
| 1266 though. */ | |
| 1267 | |
| 1268 if (GET_CODE (pat) == SET | |
| 1269 && GET_CODE (SET_SRC (pat)) == UNSPEC | |
| 1270 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) | |
| 1271 { | |
| 1272 rtx dest = SET_DEST (pat); | |
| 1273 | |
| 1274 /* Search forward looking for the first use of this value. | |
| 1275 Stop at block boundaries. */ | |
| 1276 while (insn != BB_END (current_block)) | |
| 1277 { | |
| 1278 insn = NEXT_INSN (insn); | |
| 1279 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) | |
| 1280 break; | |
| 1281 if (CALL_P (insn)) | |
| 1282 return 0; | |
| 1283 } | |
| 1284 | |
| 1285 /* We haven't found it. */ | |
| 1286 if (insn == BB_END (current_block)) | |
| 1287 return 0; | |
| 1288 | |
| 1289 /* So we've found the insn using this value. If it is anything | |
| 1290 other than sahf or the value does not die (meaning we'd have | |
| 1291 to search further), then we must give up. */ | |
| 1292 pat = PATTERN (insn); | |
| 1293 if (GET_CODE (pat) != SET | |
| 1294 || GET_CODE (SET_SRC (pat)) != UNSPEC | |
| 1295 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF | |
| 1296 || ! dead_or_set_p (insn, dest)) | |
| 1297 return 0; | |
| 1298 | |
| 1299 /* Now we are prepared to handle this as a normal cc0 setter. */ | |
| 1300 insn = next_flags_user (insn); | |
| 1301 if (insn == NULL_RTX) | |
| 1302 return 0; | |
| 1303 pat = PATTERN (insn); | |
| 1304 } | |
| 1305 | |
| 1306 if (swap_rtx_condition_1 (pat)) | |
| 1307 { | |
| 1308 int fail = 0; | |
| 1309 INSN_CODE (insn) = -1; | |
| 1310 if (recog_memoized (insn) == -1) | |
| 1311 fail = 1; | |
| 1312 /* In case the flags don't die here, recurse to try fix | |
| 1313 following user too. */ | |
| 1314 else if (! dead_or_set_p (insn, ix86_flags_rtx)) | |
| 1315 { | |
| 1316 insn = next_flags_user (insn); | |
| 1317 if (!insn || !swap_rtx_condition (insn)) | |
| 1318 fail = 1; | |
| 1319 } | |
| 1320 if (fail) | |
| 1321 { | |
| 1322 swap_rtx_condition_1 (pat); | |
| 1323 return 0; | |
| 1324 } | |
| 1325 return 1; | |
| 1326 } | |
| 1327 return 0; | |
| 1328 } | |
| 1329 | |
| 1330 /* Handle a comparison. Special care needs to be taken to avoid | |
| 1331 causing comparisons that a 387 cannot do correctly, such as EQ. | |
| 1332 | |
| 1333 Also, a pop insn may need to be emitted. The 387 does have an | |
| 1334 `fcompp' insn that can pop two regs, but it is sometimes too expensive | |
| 1335 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to | |
| 1336 set up. */ | |
| 1337 | |
| 1338 static void | |
| 111 | 1339 compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack, |
| 1340 rtx pat_src, bool can_pop_second_op) | |
| 0 | 1341 { |
| 1342 rtx *src1, *src2; | |
| 1343 rtx src1_note, src2_note; | |
| 1344 | |
| 1345 src1 = get_true_reg (&XEXP (pat_src, 0)); | |
| 1346 src2 = get_true_reg (&XEXP (pat_src, 1)); | |
| 1347 | |
| 1348 /* ??? If fxch turns out to be cheaper than fstp, give priority to | |
| 1349 registers that die in this insn - move those to stack top first. */ | |
| 1350 if ((! STACK_REG_P (*src1) | |
| 1351 || (STACK_REG_P (*src2) | |
| 1352 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) | |
| 1353 && swap_rtx_condition (insn)) | |
| 1354 { | |
| 111 | 1355 std::swap (XEXP (pat_src, 0), XEXP (pat_src, 1)); |
| 0 | 1356 |
| 1357 src1 = get_true_reg (&XEXP (pat_src, 0)); | |
| 1358 src2 = get_true_reg (&XEXP (pat_src, 1)); | |
| 1359 | |
| 1360 INSN_CODE (insn) = -1; | |
| 1361 } | |
| 1362 | |
| 1363 /* We will fix any death note later. */ | |
| 1364 | |
| 1365 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1366 | |
| 1367 if (STACK_REG_P (*src2)) | |
| 1368 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
| 1369 else | |
| 1370 src2_note = NULL_RTX; | |
| 1371 | |
| 1372 emit_swap_insn (insn, regstack, *src1); | |
| 1373 | |
| 1374 replace_reg (src1, FIRST_STACK_REG); | |
| 1375 | |
| 1376 if (STACK_REG_P (*src2)) | |
| 1377 replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
| 1378 | |
| 1379 if (src1_note) | |
| 1380 { | |
| 111 | 1381 if (*src2 == CONST0_RTX (GET_MODE (*src2))) |
| 1382 { | |
| 1383 /* This is `ftst' insn that can't pop register. */ | |
| 1384 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src1_note, 0))); | |
| 1385 emit_pop_insn (insn, regstack, XEXP (src1_note, 0), | |
| 1386 EMIT_AFTER); | |
| 1387 } | |
| 1388 else | |
| 1389 { | |
| 1390 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); | |
| 1391 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
| 1392 } | |
| 0 | 1393 } |
| 1394 | |
| 1395 /* If the second operand dies, handle that. But if the operands are | |
| 1396 the same stack register, don't bother, because only one death is | |
| 1397 needed, and it was just handled. */ | |
| 1398 | |
| 1399 if (src2_note | |
| 1400 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) | |
| 1401 && REGNO (*src1) == REGNO (*src2))) | |
| 1402 { | |
| 1403 /* As a special case, two regs may die in this insn if src2 is | |
| 1404 next to top of stack and the top of stack also dies. Since | |
| 1405 we have already popped src1, "next to top of stack" is really | |
| 1406 at top (FIRST_STACK_REG) now. */ | |
| 1407 | |
| 1408 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG | |
| 111 | 1409 && src1_note && can_pop_second_op) |
| 0 | 1410 { |
| 1411 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); | |
| 1412 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); | |
| 1413 } | |
| 1414 else | |
| 1415 { | |
| 1416 /* The 386 can only represent death of the first operand in | |
| 1417 the case handled above. In all other cases, emit a separate | |
| 1418 pop and remove the death note from here. */ | |
| 1419 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); | |
| 1420 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), | |
| 1421 EMIT_AFTER); | |
| 1422 } | |
| 1423 } | |
| 1424 } | |
| 1425 | |
| 111 | 1426 /* Substitute hardware stack regs in debug insn INSN, using stack |
| 1427 layout REGSTACK. If we can't find a hardware stack reg for any of | |
| 1428 the REGs in it, reset the debug insn. */ | |
| 1429 | |
| 1430 static void | |
| 1431 subst_all_stack_regs_in_debug_insn (rtx_insn *insn, struct stack_def *regstack) | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
19
diff
changeset
|
1432 { |
| 111 | 1433 subrtx_ptr_iterator::array_type array; |
| 1434 FOR_EACH_SUBRTX_PTR (iter, array, &INSN_VAR_LOCATION_LOC (insn), NONCONST) | |
| 1435 { | |
| 1436 rtx *loc = *iter; | |
| 1437 rtx x = *loc; | |
| 1438 if (STACK_REG_P (x)) | |
| 1439 { | |
| 1440 int hard_regno = get_hard_regnum (regstack, x); | |
| 1441 | |
| 1442 /* If we can't find an active register, reset this debug insn. */ | |
| 1443 if (hard_regno == -1) | |
| 1444 { | |
| 1445 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC (); | |
| 1446 return; | |
| 1447 } | |
| 1448 | |
| 1449 gcc_assert (hard_regno >= FIRST_STACK_REG); | |
| 1450 replace_reg (loc, hard_regno); | |
| 1451 iter.skip_subrtxes (); | |
| 1452 } | |
| 1453 } | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
19
diff
changeset
|
1454 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
19
diff
changeset
|
1455 |
| 0 | 1456 /* Substitute new registers in PAT, which is part of INSN. REGSTACK |
| 1457 is the current register layout. Return whether a control flow insn | |
| 1458 was deleted in the process. */ | |
| 1459 | |
| 1460 static bool | |
| 111 | 1461 subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat) |
| 0 | 1462 { |
| 1463 rtx *dest, *src; | |
| 1464 bool control_flow_insn_deleted = false; | |
| 1465 | |
| 1466 switch (GET_CODE (pat)) | |
| 1467 { | |
| 1468 case USE: | |
| 1469 /* Deaths in USE insns can happen in non optimizing compilation. | |
| 1470 Handle them by popping the dying register. */ | |
| 1471 src = get_true_reg (&XEXP (pat, 0)); | |
| 1472 if (STACK_REG_P (*src) | |
| 1473 && find_regno_note (insn, REG_DEAD, REGNO (*src))) | |
| 1474 { | |
| 1475 /* USEs are ignored for liveness information so USEs of dead | |
| 1476 register might happen. */ | |
| 1477 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src))) | |
| 1478 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); | |
| 1479 return control_flow_insn_deleted; | |
| 1480 } | |
| 1481 /* Uninitialized USE might happen for functions returning uninitialized | |
| 1482 value. We will properly initialize the USE on the edge to EXIT_BLOCK, | |
| 1483 so it is safe to ignore the use here. This is consistent with behavior | |
|
55
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|
1484 of dataflow analyzer that ignores USE too. (This also imply that |
| 0 | 1485 forcibly initializing the register to NaN here would lead to ICE later, |
| 1486 since the REG_DEAD notes are not issued.) */ | |
| 1487 break; | |
| 1488 | |
|
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1489 case VAR_LOCATION: |
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1490 gcc_unreachable (); |
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|
1491 |
| 0 | 1492 case CLOBBER: |
| 1493 { | |
| 1494 rtx note; | |
| 1495 | |
| 1496 dest = get_true_reg (&XEXP (pat, 0)); | |
| 1497 if (STACK_REG_P (*dest)) | |
| 1498 { | |
| 1499 note = find_reg_note (insn, REG_DEAD, *dest); | |
| 1500 | |
| 1501 if (pat != PATTERN (insn)) | |
| 1502 { | |
|
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1503 /* The fix_truncdi_1 pattern wants to be able to |
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1504 allocate its own scratch register. It does this by |
|
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|
1505 clobbering an fp reg so that it is assured of an |
|
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1506 empty reg-stack register. If the register is live, |
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1507 kill it now. Remove the DEAD/UNUSED note so we |
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1508 don't try to kill it later too. |
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1509 |
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1510 In reality the UNUSED note can be absent in some |
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1511 complicated cases when the register is reused for |
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|
1512 partially set variable. */ |
| 0 | 1513 |
| 1514 if (note) | |
| 1515 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); | |
| 1516 else | |
|
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1517 note = find_reg_note (insn, REG_UNUSED, *dest); |
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1518 if (note) |
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|
1519 remove_note (insn, note); |
| 0 | 1520 replace_reg (dest, FIRST_STACK_REG + 1); |
| 1521 } | |
| 1522 else | |
| 1523 { | |
| 1524 /* A top-level clobber with no REG_DEAD, and no hard-regnum | |
| 1525 indicates an uninitialized value. Because reload removed | |
| 1526 all other clobbers, this must be due to a function | |
| 1527 returning without a value. Load up a NaN. */ | |
| 1528 | |
| 1529 if (!note) | |
| 1530 { | |
| 1531 rtx t = *dest; | |
| 1532 if (COMPLEX_MODE_P (GET_MODE (t))) | |
| 1533 { | |
| 1534 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode); | |
| 1535 if (get_hard_regnum (regstack, u) == -1) | |
| 1536 { | |
| 1537 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u); | |
| 111 | 1538 rtx_insn *insn2 = emit_insn_before (pat2, insn); |
| 0 | 1539 control_flow_insn_deleted |
| 1540 |= move_nan_for_stack_reg (insn2, regstack, u); | |
| 1541 } | |
| 1542 } | |
| 1543 if (get_hard_regnum (regstack, t) == -1) | |
| 1544 control_flow_insn_deleted | |
| 1545 |= move_nan_for_stack_reg (insn, regstack, t); | |
| 1546 } | |
| 1547 } | |
| 1548 } | |
| 1549 break; | |
| 1550 } | |
| 1551 | |
| 1552 case SET: | |
| 1553 { | |
| 1554 rtx *src1 = (rtx *) 0, *src2; | |
| 1555 rtx src1_note, src2_note; | |
| 1556 rtx pat_src; | |
| 1557 | |
| 1558 dest = get_true_reg (&SET_DEST (pat)); | |
| 1559 src = get_true_reg (&SET_SRC (pat)); | |
| 1560 pat_src = SET_SRC (pat); | |
| 1561 | |
| 1562 /* See if this is a `movM' pattern, and handle elsewhere if so. */ | |
| 1563 if (STACK_REG_P (*src) | |
| 1564 || (STACK_REG_P (*dest) | |
| 1565 && (REG_P (*src) || MEM_P (*src) | |
| 111 | 1566 || CONST_DOUBLE_P (*src)))) |
| 0 | 1567 { |
| 1568 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); | |
| 1569 break; | |
| 1570 } | |
| 1571 | |
| 1572 switch (GET_CODE (pat_src)) | |
| 1573 { | |
| 1574 case CALL: | |
| 1575 { | |
| 1576 int count; | |
| 111 | 1577 for (count = REG_NREGS (*dest); --count >= 0;) |
| 0 | 1578 { |
| 1579 regstack->reg[++regstack->top] = REGNO (*dest) + count; | |
| 1580 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); | |
| 1581 } | |
| 1582 } | |
| 1583 replace_reg (dest, FIRST_STACK_REG); | |
| 1584 break; | |
| 1585 | |
| 1586 case REG: | |
| 1587 /* This is a `tstM2' case. */ | |
| 1588 gcc_assert (*dest == cc0_rtx); | |
| 1589 src1 = src; | |
| 1590 | |
| 1591 /* Fall through. */ | |
| 1592 | |
| 1593 case FLOAT_TRUNCATE: | |
| 1594 case SQRT: | |
| 1595 case ABS: | |
| 1596 case NEG: | |
| 1597 /* These insns only operate on the top of the stack. DEST might | |
| 1598 be cc0_rtx if we're processing a tstM pattern. Also, it's | |
| 1599 possible that the tstM case results in a REG_DEAD note on the | |
| 1600 source. */ | |
| 1601 | |
| 1602 if (src1 == 0) | |
| 1603 src1 = get_true_reg (&XEXP (pat_src, 0)); | |
| 1604 | |
| 1605 emit_swap_insn (insn, regstack, *src1); | |
| 1606 | |
| 1607 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1608 | |
| 1609 if (STACK_REG_P (*dest)) | |
| 1610 replace_reg (dest, FIRST_STACK_REG); | |
| 1611 | |
| 1612 if (src1_note) | |
| 1613 { | |
| 1614 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
| 1615 regstack->top--; | |
| 1616 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
| 1617 } | |
| 1618 | |
| 1619 replace_reg (src1, FIRST_STACK_REG); | |
| 1620 break; | |
| 1621 | |
| 1622 case MINUS: | |
| 1623 case DIV: | |
| 1624 /* On i386, reversed forms of subM3 and divM3 exist for | |
| 1625 MODE_FLOAT, so the same code that works for addM3 and mulM3 | |
| 1626 can be used. */ | |
| 1627 case MULT: | |
| 1628 case PLUS: | |
| 1629 /* These insns can accept the top of stack as a destination | |
| 1630 from a stack reg or mem, or can use the top of stack as a | |
| 1631 source and some other stack register (possibly top of stack) | |
| 1632 as a destination. */ | |
| 1633 | |
| 1634 src1 = get_true_reg (&XEXP (pat_src, 0)); | |
| 1635 src2 = get_true_reg (&XEXP (pat_src, 1)); | |
| 1636 | |
| 1637 /* We will fix any death note later. */ | |
| 1638 | |
| 1639 if (STACK_REG_P (*src1)) | |
| 1640 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1641 else | |
| 1642 src1_note = NULL_RTX; | |
| 1643 if (STACK_REG_P (*src2)) | |
| 1644 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
| 1645 else | |
| 1646 src2_note = NULL_RTX; | |
| 1647 | |
| 1648 /* If either operand is not a stack register, then the dest | |
| 1649 must be top of stack. */ | |
| 1650 | |
| 1651 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) | |
| 1652 emit_swap_insn (insn, regstack, *dest); | |
| 1653 else | |
| 1654 { | |
| 1655 /* Both operands are REG. If neither operand is already | |
| 1656 at the top of stack, choose to make the one that is the | |
| 1657 dest the new top of stack. */ | |
| 1658 | |
| 1659 int src1_hard_regnum, src2_hard_regnum; | |
| 1660 | |
| 1661 src1_hard_regnum = get_hard_regnum (regstack, *src1); | |
| 1662 src2_hard_regnum = get_hard_regnum (regstack, *src2); | |
| 1663 | |
| 1664 /* If the source is not live, this is yet another case of | |
| 1665 uninitialized variables. Load up a NaN instead. */ | |
| 1666 if (src1_hard_regnum == -1) | |
| 1667 { | |
| 1668 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1); | |
| 111 | 1669 rtx_insn *insn2 = emit_insn_before (pat2, insn); |
| 0 | 1670 control_flow_insn_deleted |
| 1671 |= move_nan_for_stack_reg (insn2, regstack, *src1); | |
| 1672 } | |
| 1673 if (src2_hard_regnum == -1) | |
| 1674 { | |
| 1675 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2); | |
| 111 | 1676 rtx_insn *insn2 = emit_insn_before (pat2, insn); |
| 0 | 1677 control_flow_insn_deleted |
| 1678 |= move_nan_for_stack_reg (insn2, regstack, *src2); | |
| 1679 } | |
| 1680 | |
| 1681 if (src1_hard_regnum != FIRST_STACK_REG | |
| 1682 && src2_hard_regnum != FIRST_STACK_REG) | |
| 1683 emit_swap_insn (insn, regstack, *dest); | |
| 1684 } | |
| 1685 | |
| 1686 if (STACK_REG_P (*src1)) | |
| 1687 replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
| 1688 if (STACK_REG_P (*src2)) | |
| 1689 replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
| 1690 | |
| 1691 if (src1_note) | |
| 1692 { | |
| 1693 rtx src1_reg = XEXP (src1_note, 0); | |
| 1694 | |
| 1695 /* If the register that dies is at the top of stack, then | |
| 1696 the destination is somewhere else - merely substitute it. | |
| 1697 But if the reg that dies is not at top of stack, then | |
| 1698 move the top of stack to the dead reg, as though we had | |
| 1699 done the insn and then a store-with-pop. */ | |
| 1700 | |
| 1701 if (REGNO (src1_reg) == regstack->reg[regstack->top]) | |
| 1702 { | |
| 1703 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1704 replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
| 1705 } | |
| 1706 else | |
| 1707 { | |
| 1708 int regno = get_hard_regnum (regstack, src1_reg); | |
| 1709 | |
| 1710 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1711 replace_reg (dest, regno); | |
| 1712 | |
| 1713 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
| 1714 = regstack->reg[regstack->top]; | |
| 1715 } | |
| 1716 | |
| 1717 CLEAR_HARD_REG_BIT (regstack->reg_set, | |
| 1718 REGNO (XEXP (src1_note, 0))); | |
| 1719 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
| 1720 regstack->top--; | |
| 1721 } | |
| 1722 else if (src2_note) | |
| 1723 { | |
| 1724 rtx src2_reg = XEXP (src2_note, 0); | |
| 1725 if (REGNO (src2_reg) == regstack->reg[regstack->top]) | |
| 1726 { | |
| 1727 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1728 replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
| 1729 } | |
| 1730 else | |
| 1731 { | |
| 1732 int regno = get_hard_regnum (regstack, src2_reg); | |
| 1733 | |
| 1734 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1735 replace_reg (dest, regno); | |
| 1736 | |
| 1737 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
| 1738 = regstack->reg[regstack->top]; | |
| 1739 } | |
| 1740 | |
| 1741 CLEAR_HARD_REG_BIT (regstack->reg_set, | |
| 1742 REGNO (XEXP (src2_note, 0))); | |
| 1743 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); | |
| 1744 regstack->top--; | |
| 1745 } | |
| 1746 else | |
| 1747 { | |
| 1748 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1749 replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
| 1750 } | |
| 1751 | |
| 1752 /* Keep operand 1 matching with destination. */ | |
| 1753 if (COMMUTATIVE_ARITH_P (pat_src) | |
| 1754 && REG_P (*src1) && REG_P (*src2) | |
| 1755 && REGNO (*src1) != REGNO (*dest)) | |
| 1756 { | |
| 1757 int tmp = REGNO (*src1); | |
| 1758 replace_reg (src1, REGNO (*src2)); | |
| 1759 replace_reg (src2, tmp); | |
| 1760 } | |
| 1761 break; | |
| 1762 | |
| 1763 case UNSPEC: | |
| 1764 switch (XINT (pat_src, 1)) | |
| 1765 { | |
| 1766 case UNSPEC_FIST: | |
| 111 | 1767 case UNSPEC_FIST_ATOMIC: |
| 0 | 1768 |
| 1769 case UNSPEC_FIST_FLOOR: | |
| 1770 case UNSPEC_FIST_CEIL: | |
| 1771 | |
| 1772 /* These insns only operate on the top of the stack. */ | |
| 1773 | |
| 1774 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1775 emit_swap_insn (insn, regstack, *src1); | |
| 1776 | |
| 1777 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1778 | |
| 1779 if (STACK_REG_P (*dest)) | |
| 1780 replace_reg (dest, FIRST_STACK_REG); | |
| 1781 | |
| 1782 if (src1_note) | |
| 1783 { | |
| 1784 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
| 1785 regstack->top--; | |
| 1786 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
| 1787 } | |
| 1788 | |
| 1789 replace_reg (src1, FIRST_STACK_REG); | |
| 1790 break; | |
| 1791 | |
| 1792 case UNSPEC_FXAM: | |
| 1793 | |
| 1794 /* This insn only operate on the top of the stack. */ | |
| 1795 | |
| 1796 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1797 emit_swap_insn (insn, regstack, *src1); | |
| 1798 | |
| 1799 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1800 | |
| 1801 replace_reg (src1, FIRST_STACK_REG); | |
| 1802 | |
| 1803 if (src1_note) | |
| 1804 { | |
| 1805 remove_regno_note (insn, REG_DEAD, | |
| 1806 REGNO (XEXP (src1_note, 0))); | |
| 1807 emit_pop_insn (insn, regstack, XEXP (src1_note, 0), | |
| 1808 EMIT_AFTER); | |
| 1809 } | |
| 1810 | |
| 1811 break; | |
| 1812 | |
| 1813 case UNSPEC_SIN: | |
| 1814 case UNSPEC_COS: | |
| 1815 case UNSPEC_FRNDINT: | |
| 1816 case UNSPEC_F2XM1: | |
| 1817 | |
| 1818 case UNSPEC_FRNDINT_FLOOR: | |
| 1819 case UNSPEC_FRNDINT_CEIL: | |
| 1820 case UNSPEC_FRNDINT_TRUNC: | |
| 1821 | |
| 1822 /* Above insns operate on the top of the stack. */ | |
| 1823 | |
| 1824 case UNSPEC_SINCOS_COS: | |
| 1825 case UNSPEC_XTRACT_FRACT: | |
| 1826 | |
| 1827 /* Above insns operate on the top two stack slots, | |
| 1828 first part of one input, double output insn. */ | |
| 1829 | |
| 1830 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1831 | |
| 1832 emit_swap_insn (insn, regstack, *src1); | |
| 1833 | |
| 1834 /* Input should never die, it is replaced with output. */ | |
| 1835 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1836 gcc_assert (!src1_note); | |
| 1837 | |
| 1838 if (STACK_REG_P (*dest)) | |
| 1839 replace_reg (dest, FIRST_STACK_REG); | |
| 1840 | |
| 1841 replace_reg (src1, FIRST_STACK_REG); | |
| 1842 break; | |
| 1843 | |
| 1844 case UNSPEC_SINCOS_SIN: | |
| 1845 case UNSPEC_XTRACT_EXP: | |
| 1846 | |
| 1847 /* These insns operate on the top two stack slots, | |
| 1848 second part of one input, double output insn. */ | |
| 1849 | |
| 1850 regstack->top++; | |
| 1851 /* FALLTHRU */ | |
| 1852 | |
| 1853 case UNSPEC_TAN: | |
| 1854 | |
| 1855 /* For UNSPEC_TAN, regstack->top is already increased | |
| 1856 by inherent load of constant 1.0. */ | |
| 1857 | |
| 1858 /* Output value is generated in the second stack slot. | |
| 1859 Move current value from second slot to the top. */ | |
| 1860 regstack->reg[regstack->top] | |
| 1861 = regstack->reg[regstack->top - 1]; | |
| 1862 | |
| 1863 gcc_assert (STACK_REG_P (*dest)); | |
| 1864 | |
| 1865 regstack->reg[regstack->top - 1] = REGNO (*dest); | |
| 1866 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1867 replace_reg (dest, FIRST_STACK_REG + 1); | |
| 1868 | |
| 1869 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1870 | |
| 1871 replace_reg (src1, FIRST_STACK_REG); | |
| 1872 break; | |
| 1873 | |
| 1874 case UNSPEC_FPATAN: | |
| 1875 case UNSPEC_FYL2X: | |
| 1876 case UNSPEC_FYL2XP1: | |
| 1877 /* These insns operate on the top two stack slots. */ | |
| 1878 | |
| 1879 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1880 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
| 1881 | |
| 1882 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1883 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
| 1884 | |
| 1885 swap_to_top (insn, regstack, *src1, *src2); | |
| 1886 | |
| 1887 replace_reg (src1, FIRST_STACK_REG); | |
| 1888 replace_reg (src2, FIRST_STACK_REG + 1); | |
| 1889 | |
| 1890 if (src1_note) | |
| 1891 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
| 1892 if (src2_note) | |
| 1893 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); | |
| 1894 | |
| 1895 /* Pop both input operands from the stack. */ | |
| 1896 CLEAR_HARD_REG_BIT (regstack->reg_set, | |
| 1897 regstack->reg[regstack->top]); | |
| 1898 CLEAR_HARD_REG_BIT (regstack->reg_set, | |
| 1899 regstack->reg[regstack->top - 1]); | |
| 1900 regstack->top -= 2; | |
| 1901 | |
| 1902 /* Push the result back onto the stack. */ | |
| 1903 regstack->reg[++regstack->top] = REGNO (*dest); | |
| 1904 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1905 replace_reg (dest, FIRST_STACK_REG); | |
| 1906 break; | |
| 1907 | |
| 1908 case UNSPEC_FSCALE_FRACT: | |
| 1909 case UNSPEC_FPREM_F: | |
| 1910 case UNSPEC_FPREM1_F: | |
| 1911 /* These insns operate on the top two stack slots, | |
| 1912 first part of double input, double output insn. */ | |
| 1913 | |
| 1914 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1915 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
| 1916 | |
| 1917 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1918 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
| 1919 | |
| 1920 /* Inputs should never die, they are | |
| 1921 replaced with outputs. */ | |
| 1922 gcc_assert (!src1_note); | |
| 1923 gcc_assert (!src2_note); | |
| 1924 | |
| 1925 swap_to_top (insn, regstack, *src1, *src2); | |
| 1926 | |
| 1927 /* Push the result back onto stack. Empty stack slot | |
| 1928 will be filled in second part of insn. */ | |
| 1929 if (STACK_REG_P (*dest)) | |
| 1930 { | |
| 1931 regstack->reg[regstack->top] = REGNO (*dest); | |
| 1932 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1933 replace_reg (dest, FIRST_STACK_REG); | |
| 1934 } | |
| 1935 | |
| 1936 replace_reg (src1, FIRST_STACK_REG); | |
| 1937 replace_reg (src2, FIRST_STACK_REG + 1); | |
| 1938 break; | |
| 1939 | |
| 1940 case UNSPEC_FSCALE_EXP: | |
| 1941 case UNSPEC_FPREM_U: | |
| 1942 case UNSPEC_FPREM1_U: | |
| 1943 /* These insns operate on the top two stack slots, | |
| 1944 second part of double input, double output insn. */ | |
| 1945 | |
| 1946 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1947 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
| 1948 | |
| 1949 /* Push the result back onto stack. Fill empty slot from | |
| 1950 first part of insn and fix top of stack pointer. */ | |
| 1951 if (STACK_REG_P (*dest)) | |
| 1952 { | |
| 1953 regstack->reg[regstack->top - 1] = REGNO (*dest); | |
| 1954 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1955 replace_reg (dest, FIRST_STACK_REG + 1); | |
| 1956 } | |
| 1957 | |
| 1958 replace_reg (src1, FIRST_STACK_REG); | |
| 1959 replace_reg (src2, FIRST_STACK_REG + 1); | |
| 1960 break; | |
| 1961 | |
| 1962 case UNSPEC_C2_FLAG: | |
| 1963 /* This insn operates on the top two stack slots, | |
| 1964 third part of C2 setting double input insn. */ | |
| 1965 | |
| 1966 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1967 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
| 1968 | |
| 1969 replace_reg (src1, FIRST_STACK_REG); | |
| 1970 replace_reg (src2, FIRST_STACK_REG + 1); | |
| 1971 break; | |
| 1972 | |
| 1973 case UNSPEC_FNSTSW: | |
| 1974 /* Combined fcomp+fnstsw generated for doing well with | |
| 1975 CSE. When optimizing this would have been broken | |
| 1976 up before now. */ | |
| 1977 | |
| 1978 pat_src = XVECEXP (pat_src, 0, 0); | |
| 131 | 1979 if (GET_CODE (pat_src) == COMPARE) |
| 1980 goto do_compare; | |
| 1981 | |
| 1982 /* Fall through. */ | |
| 1983 | |
| 1984 case UNSPEC_NOTRAP: | |
| 1985 | |
| 1986 pat_src = XVECEXP (pat_src, 0, 0); | |
| 0 | 1987 gcc_assert (GET_CODE (pat_src) == COMPARE); |
| 131 | 1988 goto do_compare; |
| 0 | 1989 |
| 1990 default: | |
| 1991 gcc_unreachable (); | |
| 1992 } | |
| 1993 break; | |
| 1994 | |
| 131 | 1995 case COMPARE: |
| 1996 do_compare: | |
| 1997 /* `fcomi' insn can't pop two regs. */ | |
| 1998 compare_for_stack_reg (insn, regstack, pat_src, | |
| 1999 REGNO (*dest) != FLAGS_REG); | |
| 2000 break; | |
| 2001 | |
| 0 | 2002 case IF_THEN_ELSE: |
| 2003 /* This insn requires the top of stack to be the destination. */ | |
| 2004 | |
| 2005 src1 = get_true_reg (&XEXP (pat_src, 1)); | |
| 2006 src2 = get_true_reg (&XEXP (pat_src, 2)); | |
| 2007 | |
| 2008 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 2009 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
| 2010 | |
| 2011 /* If the comparison operator is an FP comparison operator, | |
| 2012 it is handled correctly by compare_for_stack_reg () who | |
| 2013 will move the destination to the top of stack. But if the | |
| 2014 comparison operator is not an FP comparison operator, we | |
| 2015 have to handle it here. */ | |
| 2016 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG | |
| 2017 && REGNO (*dest) != regstack->reg[regstack->top]) | |
| 2018 { | |
| 2019 /* In case one of operands is the top of stack and the operands | |
| 2020 dies, it is safe to make it the destination operand by | |
| 2021 reversing the direction of cmove and avoid fxch. */ | |
| 2022 if ((REGNO (*src1) == regstack->reg[regstack->top] | |
| 2023 && src1_note) | |
| 2024 || (REGNO (*src2) == regstack->reg[regstack->top] | |
| 2025 && src2_note)) | |
| 2026 { | |
| 2027 int idx1 = (get_hard_regnum (regstack, *src1) | |
| 2028 - FIRST_STACK_REG); | |
| 2029 int idx2 = (get_hard_regnum (regstack, *src2) | |
| 2030 - FIRST_STACK_REG); | |
| 2031 | |
| 2032 /* Make reg-stack believe that the operands are already | |
| 2033 swapped on the stack */ | |
| 2034 regstack->reg[regstack->top - idx1] = REGNO (*src2); | |
| 2035 regstack->reg[regstack->top - idx2] = REGNO (*src1); | |
| 2036 | |
| 2037 /* Reverse condition to compensate the operand swap. | |
| 2038 i386 do have comparison always reversible. */ | |
| 2039 PUT_CODE (XEXP (pat_src, 0), | |
| 2040 reversed_comparison_code (XEXP (pat_src, 0), insn)); | |
| 2041 } | |
| 2042 else | |
| 2043 emit_swap_insn (insn, regstack, *dest); | |
| 2044 } | |
| 2045 | |
| 2046 { | |
| 2047 rtx src_note [3]; | |
| 2048 int i; | |
| 2049 | |
| 2050 src_note[0] = 0; | |
| 2051 src_note[1] = src1_note; | |
| 2052 src_note[2] = src2_note; | |
| 2053 | |
| 2054 if (STACK_REG_P (*src1)) | |
| 2055 replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
| 2056 if (STACK_REG_P (*src2)) | |
| 2057 replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
| 2058 | |
| 2059 for (i = 1; i <= 2; i++) | |
| 2060 if (src_note [i]) | |
| 2061 { | |
| 2062 int regno = REGNO (XEXP (src_note[i], 0)); | |
| 2063 | |
| 2064 /* If the register that dies is not at the top of | |
| 2065 stack, then move the top of stack to the dead reg. | |
| 2066 Top of stack should never die, as it is the | |
| 2067 destination. */ | |
| 2068 gcc_assert (regno != regstack->reg[regstack->top]); | |
| 2069 remove_regno_note (insn, REG_DEAD, regno); | |
| 2070 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), | |
| 2071 EMIT_AFTER); | |
| 2072 } | |
| 2073 } | |
| 2074 | |
| 2075 /* Make dest the top of stack. Add dest to regstack if | |
| 2076 not present. */ | |
| 2077 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) | |
| 2078 regstack->reg[++regstack->top] = REGNO (*dest); | |
| 2079 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 2080 replace_reg (dest, FIRST_STACK_REG); | |
| 2081 break; | |
| 2082 | |
| 2083 default: | |
| 2084 gcc_unreachable (); | |
| 2085 } | |
| 2086 break; | |
| 2087 } | |
| 2088 | |
| 2089 default: | |
| 2090 break; | |
| 2091 } | |
| 2092 | |
| 2093 return control_flow_insn_deleted; | |
| 2094 } | |
| 2095 | |
| 2096 /* Substitute hard regnums for any stack regs in INSN, which has | |
| 2097 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info | |
| 2098 before the insn, and is updated with changes made here. | |
| 2099 | |
| 2100 There are several requirements and assumptions about the use of | |
| 2101 stack-like regs in asm statements. These rules are enforced by | |
| 2102 record_asm_stack_regs; see comments there for details. Any | |
| 2103 asm_operands left in the RTL at this point may be assume to meet the | |
| 2104 requirements, since record_asm_stack_regs removes any problem asm. */ | |
| 2105 | |
| 2106 static void | |
| 111 | 2107 subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack) |
| 0 | 2108 { |
| 2109 rtx body = PATTERN (insn); | |
| 2110 | |
| 2111 rtx *note_reg; /* Array of note contents */ | |
| 2112 rtx **note_loc; /* Address of REG field of each note */ | |
| 2113 enum reg_note *note_kind; /* The type of each note */ | |
| 2114 | |
| 2115 rtx *clobber_reg = 0; | |
| 2116 rtx **clobber_loc = 0; | |
| 2117 | |
| 2118 struct stack_def temp_stack; | |
| 2119 int n_notes; | |
| 2120 int n_clobbers; | |
| 2121 rtx note; | |
| 2122 int i; | |
| 2123 int n_inputs, n_outputs; | |
| 2124 | |
| 2125 if (! check_asm_stack_operands (insn)) | |
| 2126 return; | |
| 2127 | |
| 2128 /* Find out what the constraints required. If no constraint | |
| 2129 alternative matches, that is a compiler bug: we should have caught | |
| 2130 such an insn in check_asm_stack_operands. */ | |
| 111 | 2131 extract_constrain_insn (insn); |
| 2132 | |
| 2133 preprocess_constraints (insn); | |
| 2134 const operand_alternative *op_alt = which_op_alt (); | |
| 0 | 2135 |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
19
diff
changeset
|
2136 get_asm_operands_in_out (body, &n_outputs, &n_inputs); |
| 0 | 2137 |
| 2138 /* Strip SUBREGs here to make the following code simpler. */ | |
| 2139 for (i = 0; i < recog_data.n_operands; i++) | |
| 2140 if (GET_CODE (recog_data.operand[i]) == SUBREG | |
| 2141 && REG_P (SUBREG_REG (recog_data.operand[i]))) | |
| 2142 { | |
| 2143 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); | |
| 2144 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); | |
| 2145 } | |
| 2146 | |
| 2147 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ | |
| 2148 | |
| 2149 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
| 2150 i++; | |
| 2151 | |
| 2152 note_reg = XALLOCAVEC (rtx, i); | |
| 2153 note_loc = XALLOCAVEC (rtx *, i); | |
| 2154 note_kind = XALLOCAVEC (enum reg_note, i); | |
| 2155 | |
| 2156 n_notes = 0; | |
| 2157 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
| 2158 { | |
| 111 | 2159 if (GET_CODE (note) != EXPR_LIST) |
| 2160 continue; | |
| 0 | 2161 rtx reg = XEXP (note, 0); |
| 2162 rtx *loc = & XEXP (note, 0); | |
| 2163 | |
| 2164 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) | |
| 2165 { | |
| 2166 loc = & SUBREG_REG (reg); | |
| 2167 reg = SUBREG_REG (reg); | |
| 2168 } | |
| 2169 | |
| 2170 if (STACK_REG_P (reg) | |
| 2171 && (REG_NOTE_KIND (note) == REG_DEAD | |
| 2172 || REG_NOTE_KIND (note) == REG_UNUSED)) | |
| 2173 { | |
| 2174 note_reg[n_notes] = reg; | |
| 2175 note_loc[n_notes] = loc; | |
| 2176 note_kind[n_notes] = REG_NOTE_KIND (note); | |
| 2177 n_notes++; | |
| 2178 } | |
| 2179 } | |
| 2180 | |
| 2181 /* Set up CLOBBER_REG and CLOBBER_LOC. */ | |
| 2182 | |
| 2183 n_clobbers = 0; | |
| 2184 | |
| 2185 if (GET_CODE (body) == PARALLEL) | |
| 2186 { | |
| 2187 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); | |
| 2188 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0)); | |
| 2189 | |
| 2190 for (i = 0; i < XVECLEN (body, 0); i++) | |
| 2191 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
| 2192 { | |
| 2193 rtx clobber = XVECEXP (body, 0, i); | |
| 2194 rtx reg = XEXP (clobber, 0); | |
| 2195 rtx *loc = & XEXP (clobber, 0); | |
| 2196 | |
| 2197 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) | |
| 2198 { | |
| 2199 loc = & SUBREG_REG (reg); | |
| 2200 reg = SUBREG_REG (reg); | |
| 2201 } | |
| 2202 | |
| 2203 if (STACK_REG_P (reg)) | |
| 2204 { | |
| 2205 clobber_reg[n_clobbers] = reg; | |
| 2206 clobber_loc[n_clobbers] = loc; | |
| 2207 n_clobbers++; | |
| 2208 } | |
| 2209 } | |
| 2210 } | |
| 2211 | |
| 2212 temp_stack = *regstack; | |
| 2213 | |
| 2214 /* Put the input regs into the desired place in TEMP_STACK. */ | |
| 2215 | |
| 2216 for (i = n_outputs; i < n_outputs + n_inputs; i++) | |
| 2217 if (STACK_REG_P (recog_data.operand[i]) | |
| 111 | 2218 && reg_class_subset_p (op_alt[i].cl, FLOAT_REGS) |
| 2219 && op_alt[i].cl != FLOAT_REGS) | |
| 0 | 2220 { |
| 2221 /* If an operand needs to be in a particular reg in | |
| 2222 FLOAT_REGS, the constraint was either 't' or 'u'. Since | |
| 2223 these constraints are for single register classes, and | |
| 2224 reload guaranteed that operand[i] is already in that class, | |
| 2225 we can just use REGNO (recog_data.operand[i]) to know which | |
| 2226 actual reg this operand needs to be in. */ | |
| 2227 | |
| 2228 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); | |
| 2229 | |
| 2230 gcc_assert (regno >= 0); | |
| 2231 | |
| 2232 if ((unsigned int) regno != REGNO (recog_data.operand[i])) | |
| 2233 { | |
| 2234 /* recog_data.operand[i] is not in the right place. Find | |
| 2235 it and swap it with whatever is already in I's place. | |
| 2236 K is where recog_data.operand[i] is now. J is where it | |
| 2237 should be. */ | |
| 111 | 2238 int j, k; |
| 0 | 2239 |
| 2240 k = temp_stack.top - (regno - FIRST_STACK_REG); | |
| 2241 j = (temp_stack.top | |
| 2242 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); | |
| 2243 | |
| 111 | 2244 std::swap (temp_stack.reg[j], temp_stack.reg[k]); |
| 0 | 2245 } |
| 2246 } | |
| 2247 | |
| 2248 /* Emit insns before INSN to make sure the reg-stack is in the right | |
| 2249 order. */ | |
| 2250 | |
| 2251 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); | |
| 2252 | |
| 2253 /* Make the needed input register substitutions. Do death notes and | |
| 2254 clobbers too, because these are for inputs, not outputs. */ | |
| 2255 | |
| 2256 for (i = n_outputs; i < n_outputs + n_inputs; i++) | |
| 2257 if (STACK_REG_P (recog_data.operand[i])) | |
| 2258 { | |
| 2259 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); | |
| 2260 | |
| 2261 gcc_assert (regnum >= 0); | |
| 2262 | |
| 2263 replace_reg (recog_data.operand_loc[i], regnum); | |
| 2264 } | |
| 2265 | |
| 2266 for (i = 0; i < n_notes; i++) | |
| 2267 if (note_kind[i] == REG_DEAD) | |
| 2268 { | |
| 2269 int regnum = get_hard_regnum (regstack, note_reg[i]); | |
| 2270 | |
| 2271 gcc_assert (regnum >= 0); | |
| 2272 | |
| 2273 replace_reg (note_loc[i], regnum); | |
| 2274 } | |
| 2275 | |
| 2276 for (i = 0; i < n_clobbers; i++) | |
| 2277 { | |
| 2278 /* It's OK for a CLOBBER to reference a reg that is not live. | |
| 2279 Don't try to replace it in that case. */ | |
| 2280 int regnum = get_hard_regnum (regstack, clobber_reg[i]); | |
| 2281 | |
| 2282 if (regnum >= 0) | |
| 131 | 2283 replace_reg (clobber_loc[i], regnum); |
| 0 | 2284 } |
| 2285 | |
| 2286 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ | |
| 2287 | |
| 2288 for (i = n_outputs; i < n_outputs + n_inputs; i++) | |
| 2289 if (STACK_REG_P (recog_data.operand[i])) | |
| 2290 { | |
| 2291 /* An input reg is implicitly popped if it is tied to an | |
| 2292 output, or if there is a CLOBBER for it. */ | |
| 2293 int j; | |
| 2294 | |
| 2295 for (j = 0; j < n_clobbers; j++) | |
| 2296 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) | |
| 2297 break; | |
| 2298 | |
| 111 | 2299 if (j < n_clobbers || op_alt[i].matches >= 0) |
| 0 | 2300 { |
| 2301 /* recog_data.operand[i] might not be at the top of stack. | |
| 2302 But that's OK, because all we need to do is pop the | |
| 2303 right number of regs off of the top of the reg-stack. | |
| 2304 record_asm_stack_regs guaranteed that all implicitly | |
| 2305 popped regs were grouped at the top of the reg-stack. */ | |
| 2306 | |
| 2307 CLEAR_HARD_REG_BIT (regstack->reg_set, | |
| 2308 regstack->reg[regstack->top]); | |
| 2309 regstack->top--; | |
| 2310 } | |
| 2311 } | |
| 2312 | |
| 2313 /* Now add to REGSTACK any outputs that the asm implicitly pushed. | |
| 2314 Note that there isn't any need to substitute register numbers. | |
| 2315 ??? Explain why this is true. */ | |
| 2316 | |
| 2317 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) | |
| 2318 { | |
| 2319 /* See if there is an output for this hard reg. */ | |
| 2320 int j; | |
| 2321 | |
| 2322 for (j = 0; j < n_outputs; j++) | |
| 2323 if (STACK_REG_P (recog_data.operand[j]) | |
| 2324 && REGNO (recog_data.operand[j]) == (unsigned) i) | |
| 2325 { | |
| 2326 regstack->reg[++regstack->top] = i; | |
| 2327 SET_HARD_REG_BIT (regstack->reg_set, i); | |
| 2328 break; | |
| 2329 } | |
| 2330 } | |
| 2331 | |
| 2332 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD | |
| 2333 input that the asm didn't implicitly pop. If the asm didn't | |
| 2334 implicitly pop an input reg, that reg will still be live. | |
| 2335 | |
| 2336 Note that we can't use find_regno_note here: the register numbers | |
| 2337 in the death notes have already been substituted. */ | |
| 2338 | |
| 2339 for (i = 0; i < n_outputs; i++) | |
| 2340 if (STACK_REG_P (recog_data.operand[i])) | |
| 2341 { | |
| 2342 int j; | |
| 2343 | |
| 2344 for (j = 0; j < n_notes; j++) | |
| 2345 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) | |
| 2346 && note_kind[j] == REG_UNUSED) | |
| 2347 { | |
| 2348 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], | |
| 2349 EMIT_AFTER); | |
| 2350 break; | |
| 2351 } | |
| 2352 } | |
| 2353 | |
| 2354 for (i = n_outputs; i < n_outputs + n_inputs; i++) | |
| 2355 if (STACK_REG_P (recog_data.operand[i])) | |
| 2356 { | |
| 2357 int j; | |
| 2358 | |
| 2359 for (j = 0; j < n_notes; j++) | |
| 2360 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) | |
| 2361 && note_kind[j] == REG_DEAD | |
| 2362 && TEST_HARD_REG_BIT (regstack->reg_set, | |
| 2363 REGNO (recog_data.operand[i]))) | |
| 2364 { | |
| 2365 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], | |
| 2366 EMIT_AFTER); | |
| 2367 break; | |
| 2368 } | |
| 2369 } | |
| 2370 } | |
| 2371 | |
| 2372 /* Substitute stack hard reg numbers for stack virtual registers in | |
| 2373 INSN. Non-stack register numbers are not changed. REGSTACK is the | |
| 2374 current stack content. Insns may be emitted as needed to arrange the | |
| 2375 stack for the 387 based on the contents of the insn. Return whether | |
| 2376 a control flow insn was deleted in the process. */ | |
| 2377 | |
| 2378 static bool | |
| 111 | 2379 subst_stack_regs (rtx_insn *insn, stack_ptr regstack) |
| 0 | 2380 { |
| 2381 rtx *note_link, note; | |
| 2382 bool control_flow_insn_deleted = false; | |
| 2383 int i; | |
| 2384 | |
| 2385 if (CALL_P (insn)) | |
| 2386 { | |
| 2387 int top = regstack->top; | |
| 2388 | |
| 2389 /* If there are any floating point parameters to be passed in | |
| 2390 registers for this call, make sure they are in the right | |
| 2391 order. */ | |
| 2392 | |
| 2393 if (top >= 0) | |
| 2394 { | |
| 2395 straighten_stack (insn, regstack); | |
| 2396 | |
| 2397 /* Now mark the arguments as dead after the call. */ | |
| 2398 | |
| 2399 while (regstack->top >= 0) | |
| 2400 { | |
| 2401 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); | |
| 2402 regstack->top--; | |
| 2403 } | |
| 2404 } | |
| 2405 } | |
| 2406 | |
| 2407 /* Do the actual substitution if any stack regs are mentioned. | |
| 2408 Since we only record whether entire insn mentions stack regs, and | |
| 2409 subst_stack_regs_pat only works for patterns that contain stack regs, | |
| 2410 we must check each pattern in a parallel here. A call_value_pop could | |
| 2411 fail otherwise. */ | |
| 2412 | |
| 2413 if (stack_regs_mentioned (insn)) | |
| 2414 { | |
| 2415 int n_operands = asm_noperands (PATTERN (insn)); | |
| 2416 if (n_operands >= 0) | |
| 2417 { | |
| 2418 /* This insn is an `asm' with operands. Decode the operands, | |
| 2419 decide how many are inputs, and do register substitution. | |
| 2420 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ | |
| 2421 | |
| 2422 subst_asm_stack_regs (insn, regstack); | |
| 2423 return control_flow_insn_deleted; | |
| 2424 } | |
| 2425 | |
| 2426 if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
| 2427 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) | |
| 2428 { | |
| 2429 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) | |
| 2430 { | |
| 2431 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) | |
| 2432 XVECEXP (PATTERN (insn), 0, i) | |
| 2433 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); | |
| 2434 control_flow_insn_deleted | |
| 2435 |= subst_stack_regs_pat (insn, regstack, | |
| 2436 XVECEXP (PATTERN (insn), 0, i)); | |
| 2437 } | |
| 2438 } | |
| 2439 else | |
| 2440 control_flow_insn_deleted | |
| 2441 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); | |
| 2442 } | |
| 2443 | |
| 2444 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any | |
| 2445 REG_UNUSED will already have been dealt with, so just return. */ | |
| 2446 | |
| 111 | 2447 if (NOTE_P (insn) || insn->deleted ()) |
| 0 | 2448 return control_flow_insn_deleted; |
| 2449 | |
| 2450 /* If this a noreturn call, we can't insert pop insns after it. | |
| 2451 Instead, reset the stack state to empty. */ | |
| 2452 if (CALL_P (insn) | |
| 2453 && find_reg_note (insn, REG_NORETURN, NULL)) | |
| 2454 { | |
| 2455 regstack->top = -1; | |
| 2456 CLEAR_HARD_REG_SET (regstack->reg_set); | |
| 2457 return control_flow_insn_deleted; | |
| 2458 } | |
| 2459 | |
| 2460 /* If there is a REG_UNUSED note on a stack register on this insn, | |
| 2461 the indicated reg must be popped. The REG_UNUSED note is removed, | |
| 2462 since the form of the newly emitted pop insn references the reg, | |
| 2463 making it no longer `unset'. */ | |
| 2464 | |
| 2465 note_link = ®_NOTES (insn); | |
| 2466 for (note = *note_link; note; note = XEXP (note, 1)) | |
| 2467 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) | |
| 2468 { | |
| 2469 *note_link = XEXP (note, 1); | |
| 2470 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); | |
| 2471 } | |
| 2472 else | |
| 2473 note_link = &XEXP (note, 1); | |
| 2474 | |
| 2475 return control_flow_insn_deleted; | |
| 2476 } | |
| 2477 | |
| 2478 /* Change the organization of the stack so that it fits a new basic | |
| 2479 block. Some registers might have to be popped, but there can never be | |
| 2480 a register live in the new block that is not now live. | |
| 2481 | |
| 2482 Insert any needed insns before or after INSN, as indicated by | |
| 2483 WHERE. OLD is the original stack layout, and NEW is the desired | |
| 2484 form. OLD is updated to reflect the code emitted, i.e., it will be | |
| 2485 the same as NEW upon return. | |
| 2486 | |
| 2487 This function will not preserve block_end[]. But that information | |
| 2488 is no longer needed once this has executed. */ | |
| 2489 | |
| 2490 static void | |
| 111 | 2491 change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack, |
| 2492 enum emit_where where) | |
| 0 | 2493 { |
| 2494 int reg; | |
| 131 | 2495 machine_mode raw_mode = reg_raw_mode[FIRST_STACK_REG]; |
| 2496 rtx_insn *update_end = NULL; | |
| 0 | 2497 int i; |
| 2498 | |
| 2499 /* Stack adjustments for the first insn in a block update the | |
| 2500 current_block's stack_in instead of inserting insns directly. | |
| 2501 compensate_edges will add the necessary code later. */ | |
| 2502 if (current_block | |
| 2503 && starting_stack_p | |
| 2504 && where == EMIT_BEFORE) | |
| 2505 { | |
| 2506 BLOCK_INFO (current_block)->stack_in = *new_stack; | |
| 2507 starting_stack_p = false; | |
| 2508 *old = *new_stack; | |
| 2509 return; | |
| 2510 } | |
| 2511 | |
| 2512 /* We will be inserting new insns "backwards". If we are to insert | |
| 2513 after INSN, find the next insn, and insert before it. */ | |
| 2514 | |
| 2515 if (where == EMIT_AFTER) | |
| 2516 { | |
| 2517 if (current_block && BB_END (current_block) == insn) | |
| 131 | 2518 update_end = insn; |
| 0 | 2519 insn = NEXT_INSN (insn); |
| 2520 } | |
| 2521 | |
| 2522 /* Initialize partially dead variables. */ | |
| 2523 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
| 2524 if (TEST_HARD_REG_BIT (new_stack->reg_set, i) | |
| 2525 && !TEST_HARD_REG_BIT (old->reg_set, i)) | |
| 2526 { | |
| 2527 old->reg[++old->top] = i; | |
| 2528 SET_HARD_REG_BIT (old->reg_set, i); | |
| 111 | 2529 emit_insn_before (gen_rtx_SET (FP_MODE_REG (i, SFmode), not_a_num), |
| 2530 insn); | |
| 0 | 2531 } |
| 2532 | |
| 2533 /* Pop any registers that are not needed in the new block. */ | |
| 2534 | |
| 2535 /* If the destination block's stack already has a specified layout | |
| 2536 and contains two or more registers, use a more intelligent algorithm | |
| 111 | 2537 to pop registers that minimizes the number of fxchs below. */ |
| 0 | 2538 if (new_stack->top > 0) |
| 2539 { | |
| 2540 bool slots[REG_STACK_SIZE]; | |
| 2541 int pops[REG_STACK_SIZE]; | |
| 2542 int next, dest, topsrc; | |
| 2543 | |
| 2544 /* First pass to determine the free slots. */ | |
| 2545 for (reg = 0; reg <= new_stack->top; reg++) | |
| 2546 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]); | |
| 2547 | |
| 2548 /* Second pass to allocate preferred slots. */ | |
| 2549 topsrc = -1; | |
| 2550 for (reg = old->top; reg > new_stack->top; reg--) | |
| 2551 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) | |
| 2552 { | |
| 2553 dest = -1; | |
| 2554 for (next = 0; next <= new_stack->top; next++) | |
| 2555 if (!slots[next] && new_stack->reg[next] == old->reg[reg]) | |
| 2556 { | |
| 2557 /* If this is a preference for the new top of stack, record | |
| 2558 the fact by remembering it's old->reg in topsrc. */ | |
| 2559 if (next == new_stack->top) | |
| 2560 topsrc = reg; | |
| 2561 slots[next] = true; | |
| 2562 dest = next; | |
| 2563 break; | |
| 2564 } | |
| 2565 pops[reg] = dest; | |
| 2566 } | |
| 2567 else | |
| 2568 pops[reg] = reg; | |
| 2569 | |
| 2570 /* Intentionally, avoid placing the top of stack in it's correct | |
| 2571 location, if we still need to permute the stack below and we | |
| 2572 can usefully place it somewhere else. This is the case if any | |
| 2573 slot is still unallocated, in which case we should place the | |
| 2574 top of stack there. */ | |
| 2575 if (topsrc != -1) | |
| 2576 for (reg = 0; reg < new_stack->top; reg++) | |
| 2577 if (!slots[reg]) | |
| 2578 { | |
| 2579 pops[topsrc] = reg; | |
| 2580 slots[new_stack->top] = false; | |
| 2581 slots[reg] = true; | |
| 2582 break; | |
| 2583 } | |
| 2584 | |
| 2585 /* Third pass allocates remaining slots and emits pop insns. */ | |
| 2586 next = new_stack->top; | |
| 2587 for (reg = old->top; reg > new_stack->top; reg--) | |
| 2588 { | |
| 2589 dest = pops[reg]; | |
| 2590 if (dest == -1) | |
| 2591 { | |
| 2592 /* Find next free slot. */ | |
| 2593 while (slots[next]) | |
| 2594 next--; | |
| 2595 dest = next--; | |
| 2596 } | |
| 131 | 2597 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], raw_mode), |
| 0 | 2598 EMIT_BEFORE); |
| 2599 } | |
| 2600 } | |
| 2601 else | |
| 2602 { | |
| 2603 /* The following loop attempts to maximize the number of times we | |
| 2604 pop the top of the stack, as this permits the use of the faster | |
| 2605 ffreep instruction on platforms that support it. */ | |
| 2606 int live, next; | |
| 2607 | |
| 2608 live = 0; | |
| 2609 for (reg = 0; reg <= old->top; reg++) | |
| 2610 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) | |
| 2611 live++; | |
| 2612 | |
| 2613 next = live; | |
| 2614 while (old->top >= live) | |
| 2615 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top])) | |
| 2616 { | |
| 2617 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next])) | |
| 2618 next--; | |
| 131 | 2619 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], raw_mode), |
| 0 | 2620 EMIT_BEFORE); |
| 2621 } | |
| 2622 else | |
| 131 | 2623 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], raw_mode), |
| 0 | 2624 EMIT_BEFORE); |
| 2625 } | |
| 2626 | |
| 2627 if (new_stack->top == -2) | |
| 2628 { | |
| 2629 /* If the new block has never been processed, then it can inherit | |
| 2630 the old stack order. */ | |
| 2631 | |
| 2632 new_stack->top = old->top; | |
| 2633 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg)); | |
| 2634 } | |
| 2635 else | |
| 2636 { | |
| 2637 /* This block has been entered before, and we must match the | |
| 2638 previously selected stack order. */ | |
| 2639 | |
| 2640 /* By now, the only difference should be the order of the stack, | |
| 2641 not their depth or liveliness. */ | |
| 2642 | |
| 2643 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set)); | |
| 2644 gcc_assert (old->top == new_stack->top); | |
| 2645 | |
| 2646 /* If the stack is not empty (new_stack->top != -1), loop here emitting | |
| 2647 swaps until the stack is correct. | |
| 2648 | |
| 2649 The worst case number of swaps emitted is N + 2, where N is the | |
| 2650 depth of the stack. In some cases, the reg at the top of | |
| 2651 stack may be correct, but swapped anyway in order to fix | |
| 2652 other regs. But since we never swap any other reg away from | |
| 2653 its correct slot, this algorithm will converge. */ | |
| 2654 | |
| 2655 if (new_stack->top != -1) | |
| 2656 do | |
| 2657 { | |
| 2658 /* Swap the reg at top of stack into the position it is | |
| 2659 supposed to be in, until the correct top of stack appears. */ | |
| 2660 | |
| 2661 while (old->reg[old->top] != new_stack->reg[new_stack->top]) | |
| 2662 { | |
| 2663 for (reg = new_stack->top; reg >= 0; reg--) | |
| 2664 if (new_stack->reg[reg] == old->reg[old->top]) | |
| 2665 break; | |
| 2666 | |
| 2667 gcc_assert (reg != -1); | |
| 2668 | |
| 2669 emit_swap_insn (insn, old, | |
| 131 | 2670 FP_MODE_REG (old->reg[reg], raw_mode)); |
| 0 | 2671 } |
| 2672 | |
| 2673 /* See if any regs remain incorrect. If so, bring an | |
| 2674 incorrect reg to the top of stack, and let the while loop | |
| 2675 above fix it. */ | |
| 2676 | |
| 2677 for (reg = new_stack->top; reg >= 0; reg--) | |
| 2678 if (new_stack->reg[reg] != old->reg[reg]) | |
| 2679 { | |
| 2680 emit_swap_insn (insn, old, | |
| 131 | 2681 FP_MODE_REG (old->reg[reg], raw_mode)); |
| 0 | 2682 break; |
| 2683 } | |
| 2684 } while (reg >= 0); | |
| 2685 | |
| 2686 /* At this point there must be no differences. */ | |
| 2687 | |
| 2688 for (reg = old->top; reg >= 0; reg--) | |
| 2689 gcc_assert (old->reg[reg] == new_stack->reg[reg]); | |
| 2690 } | |
| 2691 | |
| 2692 if (update_end) | |
| 131 | 2693 { |
| 2694 for (update_end = NEXT_INSN (update_end); update_end != insn; | |
| 2695 update_end = NEXT_INSN (update_end)) | |
| 2696 { | |
| 2697 set_block_for_insn (update_end, current_block); | |
| 2698 if (INSN_P (update_end)) | |
| 2699 df_insn_rescan (update_end); | |
| 2700 } | |
| 2701 BB_END (current_block) = PREV_INSN (insn); | |
| 2702 } | |
| 0 | 2703 } |
| 2704 | |
| 2705 /* Print stack configuration. */ | |
| 2706 | |
| 2707 static void | |
| 111 | 2708 print_stack (FILE *file, stack_ptr s) |
| 0 | 2709 { |
| 2710 if (! file) | |
| 2711 return; | |
| 2712 | |
| 2713 if (s->top == -2) | |
| 2714 fprintf (file, "uninitialized\n"); | |
| 2715 else if (s->top == -1) | |
| 2716 fprintf (file, "empty\n"); | |
| 2717 else | |
| 2718 { | |
| 2719 int i; | |
| 2720 fputs ("[ ", file); | |
| 2721 for (i = 0; i <= s->top; ++i) | |
| 2722 fprintf (file, "%d ", s->reg[i]); | |
| 2723 fputs ("]\n", file); | |
| 2724 } | |
| 2725 } | |
| 2726 | |
| 2727 /* This function was doing life analysis. We now let the regular live | |
| 2728 code do it's job, so we only need to check some extra invariants | |
| 2729 that reg-stack expects. Primary among these being that all registers | |
| 2730 are initialized before use. | |
| 2731 | |
| 2732 The function returns true when code was emitted to CFG edges and | |
| 2733 commit_edge_insertions needs to be called. */ | |
| 2734 | |
| 2735 static int | |
| 2736 convert_regs_entry (void) | |
| 2737 { | |
| 2738 int inserted = 0; | |
| 2739 edge e; | |
| 2740 edge_iterator ei; | |
| 2741 | |
| 2742 /* Load something into each stack register live at function entry. | |
| 2743 Such live registers can be caused by uninitialized variables or | |
| 2744 functions not returning values on all paths. In order to keep | |
| 2745 the push/pop code happy, and to not scrog the register stack, we | |
| 2746 must put something in these registers. Use a QNaN. | |
| 2747 | |
| 2748 Note that we are inserting converted code here. This code is | |
| 2749 never seen by the convert_regs pass. */ | |
| 2750 | |
| 111 | 2751 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) |
| 0 | 2752 { |
| 2753 basic_block block = e->dest; | |
| 2754 block_info bi = BLOCK_INFO (block); | |
| 2755 int reg, top = -1; | |
| 2756 | |
| 2757 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) | |
| 2758 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) | |
| 2759 { | |
| 2760 rtx init; | |
| 2761 | |
| 2762 bi->stack_in.reg[++top] = reg; | |
| 2763 | |
| 111 | 2764 init = gen_rtx_SET (FP_MODE_REG (FIRST_STACK_REG, SFmode), |
| 0 | 2765 not_a_num); |
| 2766 insert_insn_on_edge (init, e); | |
| 2767 inserted = 1; | |
| 2768 } | |
| 2769 | |
| 2770 bi->stack_in.top = top; | |
| 2771 } | |
| 2772 | |
| 2773 return inserted; | |
| 2774 } | |
| 2775 | |
| 2776 /* Construct the desired stack for function exit. This will either | |
| 2777 be `empty', or the function return value at top-of-stack. */ | |
| 2778 | |
| 2779 static void | |
| 2780 convert_regs_exit (void) | |
| 2781 { | |
| 2782 int value_reg_low, value_reg_high; | |
| 111 | 2783 stack_ptr output_stack; |
| 0 | 2784 rtx retvalue; |
| 2785 | |
| 2786 retvalue = stack_result (current_function_decl); | |
| 2787 value_reg_low = value_reg_high = -1; | |
| 2788 if (retvalue) | |
| 2789 { | |
| 2790 value_reg_low = REGNO (retvalue); | |
| 111 | 2791 value_reg_high = END_REGNO (retvalue) - 1; |
| 0 | 2792 } |
| 2793 | |
| 111 | 2794 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->stack_in; |
| 0 | 2795 if (value_reg_low == -1) |
| 2796 output_stack->top = -1; | |
| 2797 else | |
| 2798 { | |
| 2799 int reg; | |
| 2800 | |
| 2801 output_stack->top = value_reg_high - value_reg_low; | |
| 2802 for (reg = value_reg_low; reg <= value_reg_high; ++reg) | |
| 2803 { | |
| 2804 output_stack->reg[value_reg_high - reg] = reg; | |
| 2805 SET_HARD_REG_BIT (output_stack->reg_set, reg); | |
| 2806 } | |
| 2807 } | |
| 2808 } | |
| 2809 | |
| 2810 /* Copy the stack info from the end of edge E's source block to the | |
| 2811 start of E's destination block. */ | |
| 2812 | |
| 2813 static void | |
| 2814 propagate_stack (edge e) | |
| 2815 { | |
| 111 | 2816 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out; |
| 2817 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in; | |
| 0 | 2818 int reg; |
| 2819 | |
| 2820 /* Preserve the order of the original stack, but check whether | |
| 2821 any pops are needed. */ | |
| 2822 dest_stack->top = -1; | |
| 2823 for (reg = 0; reg <= src_stack->top; ++reg) | |
| 2824 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg])) | |
| 2825 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg]; | |
| 2826 | |
| 2827 /* Push in any partially dead values. */ | |
| 2828 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++) | |
| 2829 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg) | |
| 2830 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg)) | |
| 2831 dest_stack->reg[++dest_stack->top] = reg; | |
| 2832 } | |
| 2833 | |
| 2834 | |
| 2835 /* Adjust the stack of edge E's source block on exit to match the stack | |
| 2836 of it's target block upon input. The stack layouts of both blocks | |
| 2837 should have been defined by now. */ | |
| 2838 | |
| 2839 static bool | |
| 2840 compensate_edge (edge e) | |
| 2841 { | |
| 2842 basic_block source = e->src, target = e->dest; | |
| 111 | 2843 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in; |
| 2844 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out; | |
| 0 | 2845 struct stack_def regstack; |
| 2846 int reg; | |
| 2847 | |
| 2848 if (dump_file) | |
| 2849 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index); | |
| 2850 | |
| 2851 gcc_assert (target_stack->top != -2); | |
| 2852 | |
| 2853 /* Check whether stacks are identical. */ | |
| 2854 if (target_stack->top == source_stack->top) | |
| 2855 { | |
| 2856 for (reg = target_stack->top; reg >= 0; --reg) | |
| 2857 if (target_stack->reg[reg] != source_stack->reg[reg]) | |
| 2858 break; | |
| 2859 | |
| 2860 if (reg == -1) | |
| 2861 { | |
| 2862 if (dump_file) | |
| 2863 fprintf (dump_file, "no changes needed\n"); | |
| 2864 return false; | |
| 2865 } | |
| 2866 } | |
| 2867 | |
| 2868 if (dump_file) | |
| 2869 { | |
| 2870 fprintf (dump_file, "correcting stack to "); | |
| 2871 print_stack (dump_file, target_stack); | |
| 2872 } | |
| 2873 | |
| 2874 /* Abnormal calls may appear to have values live in st(0), but the | |
| 2875 abnormal return path will not have actually loaded the values. */ | |
| 2876 if (e->flags & EDGE_ABNORMAL_CALL) | |
| 2877 { | |
| 2878 /* Assert that the lifetimes are as we expect -- one value | |
| 2879 live at st(0) on the end of the source block, and no | |
| 2880 values live at the beginning of the destination block. | |
| 2881 For complex return values, we may have st(1) live as well. */ | |
| 2882 gcc_assert (source_stack->top == 0 || source_stack->top == 1); | |
| 2883 gcc_assert (target_stack->top == -1); | |
| 2884 return false; | |
| 2885 } | |
| 2886 | |
| 2887 /* Handle non-call EH edges specially. The normal return path have | |
| 2888 values in registers. These will be popped en masse by the unwind | |
| 2889 library. */ | |
| 2890 if (e->flags & EDGE_EH) | |
| 2891 { | |
| 2892 gcc_assert (target_stack->top == -1); | |
| 2893 return false; | |
| 2894 } | |
| 2895 | |
| 2896 /* We don't support abnormal edges. Global takes care to | |
| 2897 avoid any live register across them, so we should never | |
| 2898 have to insert instructions on such edges. */ | |
| 2899 gcc_assert (! (e->flags & EDGE_ABNORMAL)); | |
| 2900 | |
| 2901 /* Make a copy of source_stack as change_stack is destructive. */ | |
| 2902 regstack = *source_stack; | |
| 2903 | |
| 2904 /* It is better to output directly to the end of the block | |
| 2905 instead of to the edge, because emit_swap can do minimal | |
| 2906 insn scheduling. We can do this when there is only one | |
| 2907 edge out, and it is not abnormal. */ | |
| 2908 if (EDGE_COUNT (source->succs) == 1) | |
| 2909 { | |
| 2910 current_block = source; | |
| 2911 change_stack (BB_END (source), ®stack, target_stack, | |
| 2912 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER)); | |
| 2913 } | |
| 2914 else | |
| 2915 { | |
| 111 | 2916 rtx_insn *seq; |
| 2917 rtx_note *after; | |
| 0 | 2918 |
| 2919 current_block = NULL; | |
| 2920 start_sequence (); | |
| 2921 | |
| 2922 /* ??? change_stack needs some point to emit insns after. */ | |
| 2923 after = emit_note (NOTE_INSN_DELETED); | |
| 2924 | |
| 2925 change_stack (after, ®stack, target_stack, EMIT_BEFORE); | |
| 2926 | |
| 2927 seq = get_insns (); | |
| 2928 end_sequence (); | |
| 2929 | |
| 2930 insert_insn_on_edge (seq, e); | |
| 2931 return true; | |
| 2932 } | |
| 2933 return false; | |
| 2934 } | |
| 2935 | |
| 2936 /* Traverse all non-entry edges in the CFG, and emit the necessary | |
| 2937 edge compensation code to change the stack from stack_out of the | |
| 2938 source block to the stack_in of the destination block. */ | |
| 2939 | |
| 2940 static bool | |
| 2941 compensate_edges (void) | |
| 2942 { | |
| 2943 bool inserted = false; | |
| 2944 basic_block bb; | |
| 2945 | |
| 2946 starting_stack_p = false; | |
| 2947 | |
| 111 | 2948 FOR_EACH_BB_FN (bb, cfun) |
| 2949 if (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun)) | |
| 0 | 2950 { |
| 2951 edge e; | |
| 2952 edge_iterator ei; | |
| 2953 | |
| 2954 FOR_EACH_EDGE (e, ei, bb->succs) | |
| 2955 inserted |= compensate_edge (e); | |
| 2956 } | |
| 2957 return inserted; | |
| 2958 } | |
| 2959 | |
| 2960 /* Select the better of two edges E1 and E2 to use to determine the | |
| 2961 stack layout for their shared destination basic block. This is | |
| 2962 typically the more frequently executed. The edge E1 may be NULL | |
| 2963 (in which case E2 is returned), but E2 is always non-NULL. */ | |
| 2964 | |
| 2965 static edge | |
| 2966 better_edge (edge e1, edge e2) | |
| 2967 { | |
| 2968 if (!e1) | |
| 2969 return e2; | |
| 2970 | |
| 111 | 2971 if (e1->count () > e2->count ()) |
| 0 | 2972 return e1; |
| 111 | 2973 if (e1->count () < e2->count ()) |
| 0 | 2974 return e2; |
| 2975 | |
| 2976 /* Prefer critical edges to minimize inserting compensation code on | |
| 2977 critical edges. */ | |
| 2978 | |
| 2979 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2)) | |
| 2980 return EDGE_CRITICAL_P (e1) ? e1 : e2; | |
| 2981 | |
| 2982 /* Avoid non-deterministic behavior. */ | |
| 2983 return (e1->src->index < e2->src->index) ? e1 : e2; | |
| 2984 } | |
| 2985 | |
|
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|
2986 /* Convert stack register references in one block. Return true if the CFG |
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|
2987 has been modified in the process. */ |
|
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|
2988 |
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|
2989 static bool |
| 0 | 2990 convert_regs_1 (basic_block block) |
| 2991 { | |
| 2992 struct stack_def regstack; | |
| 2993 block_info bi = BLOCK_INFO (block); | |
| 2994 int reg; | |
| 111 | 2995 rtx_insn *insn, *next; |
| 0 | 2996 bool control_flow_insn_deleted = false; |
|
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|
2997 bool cfg_altered = false; |
|
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|
2998 int debug_insns_with_starting_stack = 0; |
| 0 | 2999 |
| 3000 any_malformed_asm = false; | |
| 3001 | |
| 3002 /* Choose an initial stack layout, if one hasn't already been chosen. */ | |
| 3003 if (bi->stack_in.top == -2) | |
| 3004 { | |
| 3005 edge e, beste = NULL; | |
| 3006 edge_iterator ei; | |
| 3007 | |
| 3008 /* Select the best incoming edge (typically the most frequent) to | |
| 3009 use as a template for this basic block. */ | |
| 3010 FOR_EACH_EDGE (e, ei, block->preds) | |
| 3011 if (BLOCK_INFO (e->src)->done) | |
| 3012 beste = better_edge (beste, e); | |
| 3013 | |
| 3014 if (beste) | |
| 3015 propagate_stack (beste); | |
| 3016 else | |
| 3017 { | |
| 3018 /* No predecessors. Create an arbitrary input stack. */ | |
| 3019 bi->stack_in.top = -1; | |
| 3020 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) | |
| 3021 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) | |
| 3022 bi->stack_in.reg[++bi->stack_in.top] = reg; | |
| 3023 } | |
| 3024 } | |
| 3025 | |
| 3026 if (dump_file) | |
| 3027 { | |
| 3028 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index); | |
| 3029 print_stack (dump_file, &bi->stack_in); | |
| 3030 } | |
| 3031 | |
| 3032 /* Process all insns in this block. Keep track of NEXT so that we | |
| 3033 don't process insns emitted while substituting in INSN. */ | |
| 3034 current_block = block; | |
| 3035 next = BB_HEAD (block); | |
| 3036 regstack = bi->stack_in; | |
| 3037 starting_stack_p = true; | |
| 3038 | |
| 3039 do | |
| 3040 { | |
| 3041 insn = next; | |
| 3042 next = NEXT_INSN (insn); | |
| 3043 | |
| 3044 /* Ensure we have not missed a block boundary. */ | |
| 3045 gcc_assert (next); | |
| 3046 if (insn == BB_END (block)) | |
| 3047 next = NULL; | |
| 3048 | |
| 3049 /* Don't bother processing unless there is a stack reg | |
| 3050 mentioned or if it's a CALL_INSN. */ | |
| 131 | 3051 if (DEBUG_BIND_INSN_P (insn)) |
|
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3052 { |
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3053 if (starting_stack_p) |
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3054 debug_insns_with_starting_stack++; |
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3055 else |
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3056 { |
| 111 | 3057 subst_all_stack_regs_in_debug_insn (insn, ®stack); |
|
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3058 |
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|
3059 /* Nothing must ever die at a debug insn. If something |
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3060 is referenced in it that becomes dead, it should have |
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3061 died before and the reference in the debug insn |
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3062 should have been removed so as to avoid changing code |
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3063 generation. */ |
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3064 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL)); |
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3065 } |
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3066 } |
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|
3067 else if (stack_regs_mentioned (insn) |
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|
3068 || CALL_P (insn)) |
| 0 | 3069 { |
| 3070 if (dump_file) | |
| 3071 { | |
| 3072 fprintf (dump_file, " insn %d input stack: ", | |
| 3073 INSN_UID (insn)); | |
| 3074 print_stack (dump_file, ®stack); | |
| 3075 } | |
| 3076 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); | |
| 3077 starting_stack_p = false; | |
| 3078 } | |
| 3079 } | |
| 3080 while (next); | |
| 3081 | |
|
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3082 if (debug_insns_with_starting_stack) |
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3083 { |
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3084 /* Since it's the first non-debug instruction that determines |
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|
3085 the stack requirements of the current basic block, we refrain |
|
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3086 from updating debug insns before it in the loop above, and |
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|
3087 fix them up here. */ |
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3088 for (insn = BB_HEAD (block); debug_insns_with_starting_stack; |
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3089 insn = NEXT_INSN (insn)) |
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3090 { |
| 131 | 3091 if (!DEBUG_BIND_INSN_P (insn)) |
|
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3092 continue; |
|
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3093 |
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|
3094 debug_insns_with_starting_stack--; |
| 111 | 3095 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in); |
|
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3096 } |
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3097 } |
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|
3098 |
| 0 | 3099 if (dump_file) |
| 3100 { | |
| 3101 fprintf (dump_file, "Expected live registers ["); | |
| 3102 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) | |
| 3103 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) | |
| 3104 fprintf (dump_file, " %d", reg); | |
| 3105 fprintf (dump_file, " ]\nOutput stack: "); | |
| 3106 print_stack (dump_file, ®stack); | |
| 3107 } | |
| 3108 | |
| 3109 insn = BB_END (block); | |
| 3110 if (JUMP_P (insn)) | |
| 3111 insn = PREV_INSN (insn); | |
| 3112 | |
| 3113 /* If the function is declared to return a value, but it returns one | |
| 3114 in only some cases, some registers might come live here. Emit | |
| 3115 necessary moves for them. */ | |
| 3116 | |
| 3117 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) | |
| 3118 { | |
| 3119 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) | |
| 3120 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) | |
| 3121 { | |
| 3122 rtx set; | |
| 3123 | |
| 3124 if (dump_file) | |
| 3125 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg); | |
| 3126 | |
| 111 | 3127 set = gen_rtx_SET (FP_MODE_REG (reg, SFmode), not_a_num); |
| 0 | 3128 insn = emit_insn_after (set, insn); |
| 3129 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); | |
| 3130 } | |
| 3131 } | |
|
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|
3132 |
| 0 | 3133 /* Amongst the insns possibly deleted during the substitution process above, |
| 3134 might have been the only trapping insn in the block. We purge the now | |
| 3135 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, | |
| 3136 called at the end of convert_regs. The order in which we process the | |
| 3137 blocks ensures that we never delete an already processed edge. | |
| 3138 | |
| 3139 Note that, at this point, the CFG may have been damaged by the emission | |
| 3140 of instructions after an abnormal call, which moves the basic block end | |
| 3141 (and is the reason why we call fixup_abnormal_edges later). So we must | |
| 3142 be sure that the trapping insn has been deleted before trying to purge | |
| 3143 dead edges, otherwise we risk purging valid edges. | |
| 3144 | |
| 3145 ??? We are normally supposed not to delete trapping insns, so we pretend | |
| 3146 that the insns deleted above don't actually trap. It would have been | |
| 3147 better to detect this earlier and avoid creating the EH edge in the first | |
| 3148 place, still, but we don't have enough information at that time. */ | |
| 3149 | |
| 3150 if (control_flow_insn_deleted) | |
|
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|
3151 cfg_altered |= purge_dead_edges (block); |
| 0 | 3152 |
| 3153 /* Something failed if the stack lives don't match. If we had malformed | |
| 3154 asms, we zapped the instruction itself, but that didn't produce the | |
| 3155 same pattern of register kills as before. */ | |
|
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|
3156 |
| 0 | 3157 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set) |
| 3158 || any_malformed_asm); | |
| 3159 bi->stack_out = regstack; | |
| 3160 bi->done = true; | |
|
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|
3161 |
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|
3162 return cfg_altered; |
| 0 | 3163 } |
| 3164 | |
|
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|
3165 /* Convert registers in all blocks reachable from BLOCK. Return true if the |
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|
3166 CFG has been modified in the process. */ |
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3167 |
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|
3168 static bool |
| 0 | 3169 convert_regs_2 (basic_block block) |
| 3170 { | |
| 3171 basic_block *stack, *sp; | |
|
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|
3172 bool cfg_altered = false; |
| 0 | 3173 |
| 3174 /* We process the blocks in a top-down manner, in a way such that one block | |
| 3175 is only processed after all its predecessors. The number of predecessors | |
|
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|
3176 of every block has already been computed. */ |
| 0 | 3177 |
| 111 | 3178 stack = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun)); |
| 0 | 3179 sp = stack; |
| 3180 | |
| 3181 *sp++ = block; | |
| 3182 | |
| 3183 do | |
| 3184 { | |
| 3185 edge e; | |
| 3186 edge_iterator ei; | |
| 3187 | |
| 3188 block = *--sp; | |
| 3189 | |
| 3190 /* Processing BLOCK is achieved by convert_regs_1, which may purge | |
| 3191 some dead EH outgoing edge after the deletion of the trapping | |
| 3192 insn inside the block. Since the number of predecessors of | |
| 3193 BLOCK's successors was computed based on the initial edge set, | |
| 3194 we check the necessity to process some of these successors | |
| 3195 before such an edge deletion may happen. However, there is | |
| 3196 a pitfall: if BLOCK is the only predecessor of a successor and | |
| 3197 the edge between them happens to be deleted, the successor | |
| 3198 becomes unreachable and should not be processed. The problem | |
| 3199 is that there is no way to preventively detect this case so we | |
| 3200 stack the successor in all cases and hand over the task of | |
| 3201 fixing up the discrepancy to convert_regs_1. */ | |
| 3202 | |
| 3203 FOR_EACH_EDGE (e, ei, block->succs) | |
| 3204 if (! (e->flags & EDGE_DFS_BACK)) | |
| 3205 { | |
| 3206 BLOCK_INFO (e->dest)->predecessors--; | |
| 3207 if (!BLOCK_INFO (e->dest)->predecessors) | |
| 3208 *sp++ = e->dest; | |
| 3209 } | |
| 3210 | |
|
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|
3211 cfg_altered |= convert_regs_1 (block); |
| 0 | 3212 } |
| 3213 while (sp != stack); | |
| 3214 | |
| 3215 free (stack); | |
|
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|
3216 |
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|
3217 return cfg_altered; |
| 0 | 3218 } |
| 3219 | |
| 3220 /* Traverse all basic blocks in a function, converting the register | |
| 3221 references in each insn from the "flat" register file that gcc uses, | |
| 3222 to the stack-like registers the 387 uses. */ | |
| 3223 | |
| 3224 static void | |
| 3225 convert_regs (void) | |
| 3226 { | |
|
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|
3227 bool cfg_altered = false; |
| 0 | 3228 int inserted; |
| 3229 basic_block b; | |
| 3230 edge e; | |
| 3231 edge_iterator ei; | |
| 3232 | |
| 3233 /* Initialize uninitialized registers on function entry. */ | |
| 3234 inserted = convert_regs_entry (); | |
| 3235 | |
| 3236 /* Construct the desired stack for function exit. */ | |
| 3237 convert_regs_exit (); | |
| 111 | 3238 BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->done = 1; |
| 0 | 3239 |
| 3240 /* ??? Future: process inner loops first, and give them arbitrary | |
| 3241 initial stacks which emit_swap_insn can modify. This ought to | |
| 3242 prevent double fxch that often appears at the head of a loop. */ | |
| 3243 | |
| 3244 /* Process all blocks reachable from all entry points. */ | |
| 111 | 3245 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) |
|
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|
3246 cfg_altered |= convert_regs_2 (e->dest); |
| 0 | 3247 |
| 3248 /* ??? Process all unreachable blocks. Though there's no excuse | |
| 3249 for keeping these even when not optimizing. */ | |
| 111 | 3250 FOR_EACH_BB_FN (b, cfun) |
| 0 | 3251 { |
| 3252 block_info bi = BLOCK_INFO (b); | |
| 3253 | |
| 3254 if (! bi->done) | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
3255 cfg_altered |= convert_regs_2 (b); |
| 0 | 3256 } |
| 3257 | |
| 111 | 3258 /* We must fix up abnormal edges before inserting compensation code |
| 3259 because both mechanisms insert insns on edges. */ | |
| 3260 inserted |= fixup_abnormal_edges (); | |
| 3261 | |
| 0 | 3262 inserted |= compensate_edges (); |
| 3263 | |
| 3264 clear_aux_for_blocks (); | |
| 3265 | |
| 3266 if (inserted) | |
| 3267 commit_edge_insertions (); | |
| 3268 | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
3269 if (cfg_altered) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
3270 cleanup_cfg (0); |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
3271 |
| 0 | 3272 if (dump_file) |
| 3273 fputc ('\n', dump_file); | |
| 3274 } | |
| 3275 | |
| 3276 /* Convert register usage from "flat" register file usage to a "stack | |
| 3277 register file. FILE is the dump file, if used. | |
| 3278 | |
| 3279 Construct a CFG and run life analysis. Then convert each insn one | |
| 3280 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate | |
| 3281 code duplication created when the converter inserts pop insns on | |
| 3282 the edges. */ | |
| 3283 | |
| 3284 static bool | |
| 3285 reg_to_stack (void) | |
| 3286 { | |
| 3287 basic_block bb; | |
| 3288 int i; | |
| 3289 int max_uid; | |
| 3290 | |
| 3291 /* Clean up previous run. */ | |
| 111 | 3292 stack_regs_mentioned_data.release (); |
| 0 | 3293 |
| 3294 /* See if there is something to do. Flow analysis is quite | |
| 3295 expensive so we might save some compilation time. */ | |
| 3296 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
| 3297 if (df_regs_ever_live_p (i)) | |
| 3298 break; | |
| 3299 if (i > LAST_STACK_REG) | |
| 3300 return false; | |
| 3301 | |
| 3302 df_note_add_problem (); | |
| 3303 df_analyze (); | |
| 3304 | |
| 3305 mark_dfs_back_edges (); | |
| 3306 | |
| 3307 /* Set up block info for each basic block. */ | |
| 3308 alloc_aux_for_blocks (sizeof (struct block_info_def)); | |
| 111 | 3309 FOR_EACH_BB_FN (bb, cfun) |
| 0 | 3310 { |
| 3311 block_info bi = BLOCK_INFO (bb); | |
| 3312 edge_iterator ei; | |
| 3313 edge e; | |
| 3314 int reg; | |
| 3315 | |
| 3316 FOR_EACH_EDGE (e, ei, bb->preds) | |
| 3317 if (!(e->flags & EDGE_DFS_BACK) | |
| 111 | 3318 && e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun)) |
| 0 | 3319 bi->predecessors++; |
| 3320 | |
| 3321 /* Set current register status at last instruction `uninitialized'. */ | |
| 3322 bi->stack_in.top = -2; | |
| 3323 | |
| 3324 /* Copy live_at_end and live_at_start into temporaries. */ | |
| 3325 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) | |
| 3326 { | |
| 3327 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg)) | |
| 3328 SET_HARD_REG_BIT (bi->out_reg_set, reg); | |
| 3329 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg)) | |
| 3330 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); | |
| 3331 } | |
| 3332 } | |
| 3333 | |
| 3334 /* Create the replacement registers up front. */ | |
| 3335 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
| 3336 { | |
| 111 | 3337 machine_mode mode; |
| 3338 FOR_EACH_MODE_IN_CLASS (mode, MODE_FLOAT) | |
| 0 | 3339 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); |
| 111 | 3340 FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_FLOAT) |
| 0 | 3341 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); |
| 3342 } | |
| 3343 | |
| 3344 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); | |
| 3345 | |
| 3346 /* A QNaN for initializing uninitialized variables. | |
| 3347 | |
| 3348 ??? We can't load from constant memory in PIC mode, because | |
| 3349 we're inserting these instructions before the prologue and | |
| 3350 the PIC register hasn't been set up. In that case, fall back | |
| 3351 on zero, which we can get from `fldz'. */ | |
| 3352 | |
| 3353 if ((flag_pic && !TARGET_64BIT) | |
| 3354 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC) | |
| 3355 not_a_num = CONST0_RTX (SFmode); | |
| 3356 else | |
| 3357 { | |
| 3358 REAL_VALUE_TYPE r; | |
| 3359 | |
| 3360 real_nan (&r, "", 1, SFmode); | |
| 111 | 3361 not_a_num = const_double_from_real_value (r, SFmode); |
| 0 | 3362 not_a_num = force_const_mem (SFmode, not_a_num); |
| 3363 } | |
| 3364 | |
| 3365 /* Allocate a cache for stack_regs_mentioned. */ | |
| 3366 max_uid = get_max_uid (); | |
| 111 | 3367 stack_regs_mentioned_data.create (max_uid + 1); |
| 3368 memset (stack_regs_mentioned_data.address (), | |
| 0 | 3369 0, sizeof (char) * (max_uid + 1)); |
| 3370 | |
| 3371 convert_regs (); | |
| 3372 | |
| 3373 free_aux_for_blocks (); | |
| 3374 return true; | |
| 3375 } | |
| 3376 #endif /* STACK_REGS */ | |
| 3377 | |
| 111 | 3378 namespace { |
| 3379 | |
| 3380 const pass_data pass_data_stack_regs = | |
| 0 | 3381 { |
| 111 | 3382 RTL_PASS, /* type */ |
| 3383 "*stack_regs", /* name */ | |
| 3384 OPTGROUP_NONE, /* optinfo_flags */ | |
| 3385 TV_REG_STACK, /* tv_id */ | |
| 3386 0, /* properties_required */ | |
| 3387 0, /* properties_provided */ | |
| 3388 0, /* properties_destroyed */ | |
| 3389 0, /* todo_flags_start */ | |
| 3390 0, /* todo_flags_finish */ | |
| 3391 }; | |
| 3392 | |
| 3393 class pass_stack_regs : public rtl_opt_pass | |
| 0 | 3394 { |
| 111 | 3395 public: |
| 3396 pass_stack_regs (gcc::context *ctxt) | |
| 3397 : rtl_opt_pass (pass_data_stack_regs, ctxt) | |
| 3398 {} | |
| 3399 | |
| 3400 /* opt_pass methods: */ | |
| 3401 virtual bool gate (function *) | |
| 3402 { | |
| 3403 #ifdef STACK_REGS | |
| 3404 return true; | |
| 3405 #else | |
| 3406 return false; | |
| 3407 #endif | |
| 3408 } | |
| 3409 | |
| 3410 }; // class pass_stack_regs | |
| 3411 | |
| 3412 } // anon namespace | |
| 3413 | |
| 3414 rtl_opt_pass * | |
| 3415 make_pass_stack_regs (gcc::context *ctxt) | |
| 3416 { | |
| 3417 return new pass_stack_regs (ctxt); | |
| 3418 } | |
| 0 | 3419 |
| 3420 /* Convert register usage from flat register file usage to a stack | |
| 3421 register file. */ | |
| 3422 static unsigned int | |
| 3423 rest_of_handle_stack_regs (void) | |
| 3424 { | |
| 3425 #ifdef STACK_REGS | |
| 3426 reg_to_stack (); | |
| 3427 regstack_completed = 1; | |
| 3428 #endif | |
| 3429 return 0; | |
| 3430 } | |
| 3431 | |
| 111 | 3432 namespace { |
| 3433 | |
| 3434 const pass_data pass_data_stack_regs_run = | |
| 3435 { | |
| 3436 RTL_PASS, /* type */ | |
| 3437 "stack", /* name */ | |
| 3438 OPTGROUP_NONE, /* optinfo_flags */ | |
| 3439 TV_REG_STACK, /* tv_id */ | |
| 3440 0, /* properties_required */ | |
| 3441 0, /* properties_provided */ | |
| 3442 0, /* properties_destroyed */ | |
| 3443 0, /* todo_flags_start */ | |
| 3444 TODO_df_finish, /* todo_flags_finish */ | |
| 3445 }; | |
| 3446 | |
| 3447 class pass_stack_regs_run : public rtl_opt_pass | |
| 0 | 3448 { |
| 111 | 3449 public: |
| 3450 pass_stack_regs_run (gcc::context *ctxt) | |
| 3451 : rtl_opt_pass (pass_data_stack_regs_run, ctxt) | |
| 3452 {} | |
| 3453 | |
| 3454 /* opt_pass methods: */ | |
| 3455 virtual unsigned int execute (function *) | |
| 3456 { | |
| 3457 return rest_of_handle_stack_regs (); | |
| 3458 } | |
| 3459 | |
| 3460 }; // class pass_stack_regs_run | |
| 3461 | |
| 3462 } // anon namespace | |
| 3463 | |
| 3464 rtl_opt_pass * | |
| 3465 make_pass_stack_regs_run (gcc::context *ctxt) | |
| 3466 { | |
| 3467 return new pass_stack_regs_run (ctxt); | |
| 3468 } |