Mercurial > hg > CbC > CbC_gcc
annotate gcc/regs.h @ 131:84e7813d76e9
gcc-8.2
| author | mir3636 |
|---|---|
| date | Thu, 25 Oct 2018 07:37:49 +0900 |
| parents | 04ced10e8804 |
| children | 1830386684a0 |
| rev | line source |
|---|---|
| 0 | 1 /* Define per-register tables for data flow info and register allocation. |
| 131 | 2 Copyright (C) 1987-2018 Free Software Foundation, Inc. |
| 0 | 3 |
| 4 This file is part of GCC. | |
| 5 | |
| 6 GCC is free software; you can redistribute it and/or modify it under | |
| 7 the terms of the GNU General Public License as published by the Free | |
| 8 Software Foundation; either version 3, or (at your option) any later | |
| 9 version. | |
| 10 | |
| 11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
| 12 WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 14 for more details. | |
| 15 | |
| 16 You should have received a copy of the GNU General Public License | |
| 17 along with GCC; see the file COPYING3. If not see | |
| 18 <http://www.gnu.org/licenses/>. */ | |
| 19 | |
| 20 #ifndef GCC_REGS_H | |
| 21 #define GCC_REGS_H | |
| 22 | |
| 23 #define REG_BYTES(R) mode_size[(int) GET_MODE (R)] | |
| 24 | |
| 25 /* When you only have the mode of a pseudo register before it has a hard | |
| 26 register chosen for it, this reports the size of each hard register | |
| 27 a pseudo in such a mode would get allocated to. A target may | |
| 28 override this. */ | |
| 29 | |
| 30 #ifndef REGMODE_NATURAL_SIZE | |
| 31 #define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD | |
| 32 #endif | |
| 33 | |
| 34 /* Maximum register number used in this function, plus one. */ | |
| 35 | |
| 36 extern int max_regno; | |
| 37 | |
| 38 /* REG_N_REFS and REG_N_SETS are initialized by a call to | |
| 39 regstat_init_n_sets_and_refs from the current values of | |
| 40 DF_REG_DEF_COUNT and DF_REG_USE_COUNT. REG_N_REFS and REG_N_SETS | |
| 41 should only be used if a pass need to change these values in some | |
| 111 | 42 magical way or the pass needs to have accurate values for these |
| 0 | 43 and is not using incremental df scanning. |
| 44 | |
| 45 At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call | |
|
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46 should be made to regstat_free_n_sets_and_refs. |
| 0 | 47 |
| 48 Local alloc seems to play pretty loose with these values. | |
| 49 REG_N_REFS is set to 0 if the register is used in an asm. | |
| 50 Furthermore, local_alloc calls regclass to hack both REG_N_REFS and | |
| 51 REG_N_SETS for three address insns. Other passes seem to have | |
| 52 other special values. */ | |
| 53 | |
| 54 | |
| 55 | |
| 56 /* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */ | |
| 57 | |
| 58 struct regstat_n_sets_and_refs_t | |
| 59 { | |
| 60 int sets; /* # of times (REG n) is set */ | |
| 61 int refs; /* # of times (REG n) is used or set */ | |
| 62 }; | |
| 63 | |
| 64 extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs; | |
| 65 | |
| 66 /* Indexed by n, gives number of times (REG n) is used or set. */ | |
| 67 static inline int | |
| 111 | 68 REG_N_REFS (int regno) |
| 0 | 69 { |
| 70 return regstat_n_sets_and_refs[regno].refs; | |
| 71 } | |
| 72 | |
| 73 /* Indexed by n, gives number of times (REG n) is used or set. */ | |
| 74 #define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V) | |
| 75 #define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V) | |
| 76 | |
| 77 /* Indexed by n, gives number of times (REG n) is set. */ | |
| 78 static inline int | |
| 79 REG_N_SETS (int regno) | |
| 80 { | |
| 81 return regstat_n_sets_and_refs[regno].sets; | |
| 82 } | |
| 83 | |
| 84 /* Indexed by n, gives number of times (REG n) is set. */ | |
| 85 #define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V) | |
| 86 #define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V) | |
| 87 | |
| 111 | 88 /* Given a REG, return TRUE if the reg is a PARM_DECL, FALSE otherwise. */ |
| 89 extern bool reg_is_parm_p (rtx); | |
| 0 | 90 |
| 111 | 91 /* Functions defined in regstat.c. */ |
| 0 | 92 extern void regstat_init_n_sets_and_refs (void); |
| 93 extern void regstat_free_n_sets_and_refs (void); | |
| 94 extern void regstat_compute_ri (void); | |
| 95 extern void regstat_free_ri (void); | |
| 96 extern bitmap regstat_get_setjmp_crosses (void); | |
| 97 extern void regstat_compute_calls_crossed (void); | |
| 98 extern void regstat_free_calls_crossed (void); | |
| 111 | 99 extern void dump_reg_info (FILE *); |
| 0 | 100 |
| 101 /* Register information indexed by register number. This structure is | |
| 102 initialized by calling regstat_compute_ri and is destroyed by | |
| 103 calling regstat_free_ri. */ | |
| 104 struct reg_info_t | |
| 105 { | |
| 106 int freq; /* # estimated frequency (REG n) is used or set */ | |
| 107 int deaths; /* # of times (REG n) dies */ | |
| 108 int calls_crossed; /* # of calls (REG n) is live across */ | |
| 109 int basic_block; /* # of basic blocks (REG n) is used in */ | |
| 110 }; | |
| 111 | |
| 112 extern struct reg_info_t *reg_info_p; | |
| 113 | |
| 114 /* The number allocated elements of reg_info_p. */ | |
| 115 extern size_t reg_info_p_size; | |
| 116 | |
| 117 /* Estimate frequency of references to register N. */ | |
| 118 | |
| 119 #define REG_FREQ(N) (reg_info_p[N].freq) | |
| 120 | |
| 121 /* The weights for each insn varies from 0 to REG_FREQ_BASE. | |
| 122 This constant does not need to be high, as in infrequently executed | |
| 123 regions we want to count instructions equivalently to optimize for | |
| 124 size instead of speed. */ | |
| 125 #define REG_FREQ_MAX 1000 | |
| 126 | |
| 127 /* Compute register frequency from the BB frequency. When optimizing for size, | |
| 128 or profile driven feedback is available and the function is never executed, | |
| 129 frequency is always equivalent. Otherwise rescale the basic block | |
| 130 frequency. */ | |
| 111 | 131 #define REG_FREQ_FROM_BB(bb) (optimize_function_for_size_p (cfun) \ |
| 0 | 132 ? REG_FREQ_MAX \ |
| 131 | 133 : ((bb)->count.to_frequency (cfun) \ |
| 134 * REG_FREQ_MAX / BB_FREQ_MAX) \ | |
| 135 ? ((bb)->count.to_frequency (cfun) \ | |
| 136 * REG_FREQ_MAX / BB_FREQ_MAX) \ | |
| 0 | 137 : 1) |
| 138 | |
| 139 /* Indexed by N, gives number of insns in which register N dies. | |
| 140 Note that if register N is live around loops, it can die | |
| 141 in transitions between basic blocks, and that is not counted here. | |
| 142 So this is only a reliable indicator of how many regions of life there are | |
| 143 for registers that are contained in one basic block. */ | |
| 144 | |
| 145 #define REG_N_DEATHS(N) (reg_info_p[N].deaths) | |
| 146 | |
| 147 /* Get the number of consecutive words required to hold pseudo-reg N. */ | |
| 148 | |
| 149 #define PSEUDO_REGNO_SIZE(N) \ | |
| 150 ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \ | |
| 151 / UNITS_PER_WORD) | |
| 152 | |
| 153 /* Get the number of bytes required to hold pseudo-reg N. */ | |
| 154 | |
| 155 #define PSEUDO_REGNO_BYTES(N) \ | |
| 156 GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) | |
| 157 | |
| 158 /* Get the machine mode of pseudo-reg N. */ | |
| 159 | |
| 160 #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N]) | |
| 161 | |
| 162 /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */ | |
| 163 | |
| 164 #define REG_N_CALLS_CROSSED(N) (reg_info_p[N].calls_crossed) | |
| 165 | |
| 166 /* Indexed by n, gives number of basic block that (REG n) is used in. | |
| 167 If the value is REG_BLOCK_GLOBAL (-1), | |
| 168 it means (REG n) is used in more than one basic block. | |
| 169 REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know. | |
| 170 This information remains valid for the rest of the compilation | |
| 171 of the current function; it is used to control register allocation. */ | |
| 172 | |
| 173 #define REG_BLOCK_UNKNOWN 0 | |
| 174 #define REG_BLOCK_GLOBAL -1 | |
| 175 | |
| 176 #define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block) | |
| 177 | |
| 178 /* Vector of substitutions of register numbers, | |
| 179 used to map pseudo regs into hardware regs. | |
| 180 | |
| 181 This can't be folded into reg_n_info without changing all of the | |
| 182 machine dependent directories, since the reload functions | |
| 183 in the machine dependent files access it. */ | |
| 184 | |
| 185 extern short *reg_renumber; | |
| 186 | |
| 187 /* Flag set by local-alloc or global-alloc if they decide to allocate | |
| 188 something in a call-clobbered register. */ | |
| 189 | |
| 190 extern int caller_save_needed; | |
| 191 | |
| 192 /* Select a register mode required for caller save of hard regno REGNO. */ | |
| 193 #ifndef HARD_REGNO_CALLER_SAVE_MODE | |
| 194 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ | |
| 195 choose_hard_reg_mode (REGNO, NREGS, false) | |
| 196 #endif | |
| 197 | |
|
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198 /* Target-dependent globals. */ |
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199 struct target_regs { |
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200 /* For each starting hard register, the number of consecutive hard |
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201 registers that a given machine mode occupies. */ |
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202 unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; |
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203 |
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204 /* For each hard register, the widest mode object that it can contain. |
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205 This will be a MODE_INT mode if the register can hold integers. Otherwise |
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206 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the |
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207 register. */ |
| 111 | 208 machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER]; |
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209 |
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210 /* Vector indexed by machine mode saying whether there are regs of |
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211 that mode. */ |
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212 bool x_have_regs_of_mode[MAX_MACHINE_MODE]; |
| 0 | 213 |
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214 /* 1 if the corresponding class contains a register of the given mode. */ |
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215 char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE]; |
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216 |
| 111 | 217 /* 1 if the corresponding class contains a register of the given mode |
| 218 which is not global and can therefore be allocated. */ | |
| 219 char x_contains_allocatable_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE]; | |
| 0 | 220 |
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221 /* Record for each mode whether we can move a register directly to or |
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222 from an object of that mode in memory. If we can't, we won't try |
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223 to use that mode directly when accessing a field of that mode. */ |
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224 char x_direct_load[NUM_MACHINE_MODES]; |
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225 char x_direct_store[NUM_MACHINE_MODES]; |
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226 |
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227 /* Record for each mode whether we can float-extend from memory. */ |
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228 bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES]; |
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229 }; |
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230 |
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231 extern struct target_regs default_target_regs; |
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232 #if SWITCHABLE_TARGET |
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233 extern struct target_regs *this_target_regs; |
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234 #else |
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235 #define this_target_regs (&default_target_regs) |
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236 #endif |
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237 #define reg_raw_mode \ |
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238 (this_target_regs->x_reg_raw_mode) |
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239 #define have_regs_of_mode \ |
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240 (this_target_regs->x_have_regs_of_mode) |
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241 #define contains_reg_of_mode \ |
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242 (this_target_regs->x_contains_reg_of_mode) |
| 111 | 243 #define contains_allocatable_reg_of_mode \ |
| 244 (this_target_regs->x_contains_allocatable_reg_of_mode) | |
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245 #define direct_load \ |
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246 (this_target_regs->x_direct_load) |
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247 #define direct_store \ |
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248 (this_target_regs->x_direct_store) |
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249 #define float_extend_from_mem \ |
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250 (this_target_regs->x_float_extend_from_mem) |
| 0 | 251 |
| 111 | 252 /* Return the number of hard registers in (reg:MODE REGNO). */ |
| 253 | |
| 254 ALWAYS_INLINE unsigned char | |
| 255 hard_regno_nregs (unsigned int regno, machine_mode mode) | |
| 256 { | |
| 257 return this_target_regs->x_hard_regno_nregs[regno][mode]; | |
| 258 } | |
| 259 | |
| 0 | 260 /* Return an exclusive upper bound on the registers occupied by hard |
| 261 register (reg:MODE REGNO). */ | |
| 262 | |
| 263 static inline unsigned int | |
| 111 | 264 end_hard_regno (machine_mode mode, unsigned int regno) |
| 0 | 265 { |
| 111 | 266 return regno + hard_regno_nregs (regno, mode); |
| 0 | 267 } |
| 268 | |
| 269 /* Add to REGS all the registers required to store a value of mode MODE | |
| 270 in register REGNO. */ | |
| 271 | |
| 272 static inline void | |
| 111 | 273 add_to_hard_reg_set (HARD_REG_SET *regs, machine_mode mode, |
| 0 | 274 unsigned int regno) |
| 275 { | |
| 276 unsigned int end_regno; | |
| 277 | |
| 278 end_regno = end_hard_regno (mode, regno); | |
| 279 do | |
| 280 SET_HARD_REG_BIT (*regs, regno); | |
| 281 while (++regno < end_regno); | |
| 282 } | |
| 283 | |
| 284 /* Likewise, but remove the registers. */ | |
| 285 | |
| 286 static inline void | |
| 111 | 287 remove_from_hard_reg_set (HARD_REG_SET *regs, machine_mode mode, |
| 0 | 288 unsigned int regno) |
| 289 { | |
| 290 unsigned int end_regno; | |
| 291 | |
| 292 end_regno = end_hard_regno (mode, regno); | |
| 293 do | |
| 294 CLEAR_HARD_REG_BIT (*regs, regno); | |
| 295 while (++regno < end_regno); | |
| 296 } | |
| 297 | |
| 298 /* Return true if REGS contains the whole of (reg:MODE REGNO). */ | |
| 299 | |
| 300 static inline bool | |
| 111 | 301 in_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode, |
| 0 | 302 unsigned int regno) |
| 303 { | |
| 304 unsigned int end_regno; | |
| 305 | |
| 111 | 306 gcc_assert (HARD_REGISTER_NUM_P (regno)); |
| 307 | |
| 0 | 308 if (!TEST_HARD_REG_BIT (regs, regno)) |
| 309 return false; | |
| 310 | |
| 311 end_regno = end_hard_regno (mode, regno); | |
| 111 | 312 |
| 313 if (!HARD_REGISTER_NUM_P (end_regno - 1)) | |
| 314 return false; | |
| 315 | |
| 0 | 316 while (++regno < end_regno) |
| 317 if (!TEST_HARD_REG_BIT (regs, regno)) | |
| 318 return false; | |
| 319 | |
| 320 return true; | |
| 321 } | |
| 322 | |
| 323 /* Return true if (reg:MODE REGNO) includes an element of REGS. */ | |
| 324 | |
| 325 static inline bool | |
| 111 | 326 overlaps_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode, |
| 0 | 327 unsigned int regno) |
| 328 { | |
| 329 unsigned int end_regno; | |
| 330 | |
| 331 if (TEST_HARD_REG_BIT (regs, regno)) | |
| 332 return true; | |
| 333 | |
| 334 end_regno = end_hard_regno (mode, regno); | |
| 335 while (++regno < end_regno) | |
| 336 if (TEST_HARD_REG_BIT (regs, regno)) | |
| 337 return true; | |
| 338 | |
| 339 return false; | |
| 340 } | |
| 341 | |
| 111 | 342 /* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of |
| 343 REGNO and MODE. */ | |
| 344 | |
| 345 static inline void | |
| 346 add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno, | |
| 347 int nregs) | |
| 348 { | |
| 349 while (nregs-- > 0) | |
| 350 SET_HARD_REG_BIT (*regs, regno + nregs); | |
| 351 } | |
| 352 | |
| 353 /* Likewise, but remove the registers. */ | |
| 354 | |
| 355 static inline void | |
| 356 remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno, | |
| 357 int nregs) | |
| 358 { | |
| 359 while (nregs-- > 0) | |
| 360 CLEAR_HARD_REG_BIT (*regs, regno + nregs); | |
| 361 } | |
| 362 | |
| 363 /* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of | |
| 364 REGNO and MODE. */ | |
| 365 static inline bool | |
| 366 range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, | |
| 367 int nregs) | |
| 368 { | |
| 369 while (nregs-- > 0) | |
| 370 if (TEST_HARD_REG_BIT (set, regno + nregs)) | |
| 371 return true; | |
| 372 return false; | |
| 373 } | |
| 374 | |
| 375 /* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of | |
| 376 REGNO and MODE. */ | |
| 377 static inline bool | |
| 378 range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs) | |
| 379 { | |
| 380 while (nregs-- > 0) | |
| 381 if (!TEST_HARD_REG_BIT (set, regno + nregs)) | |
| 382 return false; | |
| 383 return true; | |
| 384 } | |
| 385 | |
| 386 /* Get registers used by given function call instruction. */ | |
| 387 extern bool get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set, | |
| 388 HARD_REG_SET default_set); | |
| 389 | |
| 0 | 390 #endif /* GCC_REGS_H */ |