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1 ;; Constraint definitions for IA-32 and x86-64.
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2 ;; Copyright (C) 2006, 2007 Free Software Foundation, Inc.
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3 ;;
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4 ;; This file is part of GCC.
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5 ;;
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6 ;; GCC is free software; you can redistribute it and/or modify
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7 ;; it under the terms of the GNU General Public License as published by
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8 ;; the Free Software Foundation; either version 3, or (at your option)
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9 ;; any later version.
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10 ;;
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11 ;; GCC is distributed in the hope that it will be useful,
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12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 ;; GNU General Public License for more details.
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15 ;;
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16 ;; You should have received a copy of the GNU General Public License
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17 ;; along with GCC; see the file COPYING3. If not see
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18 ;; <http://www.gnu.org/licenses/>.
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19
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20 ;;; Unused letters:
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21 ;;; B H TU W
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22 ;;; h jk vw z
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23
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24 ;; Integer register constraints.
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25 ;; It is not necessary to define 'r' here.
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26 (define_register_constraint "R" "LEGACY_REGS"
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27 "Legacy register---the eight integer registers available on all
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28 i386 processors (@code{a}, @code{b}, @code{c}, @code{d},
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29 @code{si}, @code{di}, @code{bp}, @code{sp}).")
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30
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31 (define_register_constraint "q" "TARGET_64BIT ? GENERAL_REGS : Q_REGS"
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32 "Any register accessible as @code{@var{r}l}. In 32-bit mode, @code{a},
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33 @code{b}, @code{c}, and @code{d}; in 64-bit mode, any integer register.")
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34
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35 (define_register_constraint "Q" "Q_REGS"
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36 "Any register accessible as @code{@var{r}h}: @code{a}, @code{b},
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37 @code{c}, and @code{d}.")
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38
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39 (define_register_constraint "l" "INDEX_REGS"
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40 "@internal Any register that can be used as the index in a base+index
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41 memory access: that is, any general register except the stack pointer.")
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42
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43 (define_register_constraint "a" "AREG"
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44 "The @code{a} register.")
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45
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46 (define_register_constraint "b" "BREG"
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47 "The @code{b} register.")
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48
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49 (define_register_constraint "c" "CREG"
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50 "The @code{c} register.")
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51
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52 (define_register_constraint "d" "DREG"
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53 "The @code{d} register.")
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54
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55 (define_register_constraint "S" "SIREG"
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56 "The @code{si} register.")
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57
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58 (define_register_constraint "D" "DIREG"
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59 "The @code{di} register.")
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60
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61 (define_register_constraint "A" "AD_REGS"
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62 "The @code{a} and @code{d} registers, as a pair (for instructions
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63 that return half the result in one and half in the other).")
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64
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65 ;; Floating-point register constraints.
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66 (define_register_constraint "f"
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67 "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FLOAT_REGS : NO_REGS"
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68 "Any 80387 floating-point (stack) register.")
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69
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70 (define_register_constraint "t"
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71 "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_TOP_REG : NO_REGS"
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72 "Top of 80387 floating-point stack (@code{%st(0)}).")
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73
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74 (define_register_constraint "u"
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75 "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_SECOND_REG : NO_REGS"
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76 "Second from top of 80387 floating-point stack (@code{%st(1)}).")
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77
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78 ;; Vector registers (also used for plain floating point nowadays).
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79 (define_register_constraint "y" "TARGET_MMX ? MMX_REGS : NO_REGS"
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80 "Any MMX register.")
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81
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82 (define_register_constraint "x" "TARGET_SSE ? SSE_REGS : NO_REGS"
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83 "Any SSE register.")
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84
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85 ;; We use the Y prefix to denote any number of conditional register sets:
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86 ;; z First SSE register.
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87 ;; 2 SSE2 enabled
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88 ;; i SSE2 inter-unit moves enabled
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89 ;; m MMX inter-unit moves enabled
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90
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91 (define_register_constraint "Yz" "TARGET_SSE ? SSE_FIRST_REG : NO_REGS"
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92 "First SSE register (@code{%xmm0}).")
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93
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94 (define_register_constraint "Y2" "TARGET_SSE2 ? SSE_REGS : NO_REGS"
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95 "@internal Any SSE register, when SSE2 is enabled.")
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96
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97 (define_register_constraint "Yi"
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98 "TARGET_SSE2 && TARGET_INTER_UNIT_MOVES ? SSE_REGS : NO_REGS"
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99 "@internal Any SSE register, when SSE2 and inter-unit moves are enabled.")
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100
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101 (define_register_constraint "Ym"
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102 "TARGET_MMX && TARGET_INTER_UNIT_MOVES ? MMX_REGS : NO_REGS"
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103 "@internal Any MMX register, when inter-unit moves are enabled.")
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104
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105 ;; Integer constant constraints.
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106 (define_constraint "I"
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107 "Integer constant in the range 0 @dots{} 31, for 32-bit shifts."
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108 (and (match_code "const_int")
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109 (match_test "IN_RANGE (ival, 0, 31)")))
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110
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111 (define_constraint "J"
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112 "Integer constant in the range 0 @dots{} 63, for 64-bit shifts."
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113 (and (match_code "const_int")
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114 (match_test "IN_RANGE (ival, 0, 63)")))
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115
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116 (define_constraint "K"
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117 "Signed 8-bit integer constant."
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118 (and (match_code "const_int")
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119 (match_test "IN_RANGE (ival, -128, 127)")))
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120
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121 (define_constraint "L"
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122 "@code{0xFF} or @code{0xFFFF}, for andsi as a zero-extending move."
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123 (and (match_code "const_int")
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124 (match_test "ival == 0xFF || ival == 0xFFFF")))
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125
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126 (define_constraint "M"
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127 "0, 1, 2, or 3 (shifts for the @code{lea} instruction)."
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128 (and (match_code "const_int")
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129 (match_test "IN_RANGE (ival, 0, 3)")))
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130
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131 (define_constraint "N"
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132 "Unsigned 8-bit integer constant (for @code{in} and @code{out}
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133 instructions)."
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134 (and (match_code "const_int")
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135 (match_test "IN_RANGE (ival, 0, 255)")))
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136
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137 (define_constraint "O"
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138 "@internal Integer constant in the range 0 @dots{} 127, for 128-bit shifts."
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139 (and (match_code "const_int")
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140 (match_test "IN_RANGE (ival, 0, 127)")))
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141
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142 ;; Floating-point constant constraints.
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143 ;; We allow constants even if TARGET_80387 isn't set, because the
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144 ;; stack register converter may need to load 0.0 into the function
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145 ;; value register (top of stack).
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146 (define_constraint "G"
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147 "Standard 80387 floating point constant."
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148 (and (match_code "const_double")
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149 (match_test "standard_80387_constant_p (op)")))
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150
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151 ;; This can theoretically be any mode's CONST0_RTX.
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152 (define_constraint "C"
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153 "Standard SSE floating point constant."
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154 (match_test "standard_sse_constant_p (op)"))
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155
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156 ;; Constant-or-symbol-reference constraints.
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157
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158 (define_constraint "e"
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159 "32-bit signed integer constant, or a symbolic reference known
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160 to fit that range (for immediate operands in sign-extending x86-64
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161 instructions)."
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162 (match_operand 0 "x86_64_immediate_operand"))
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163
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164 (define_constraint "Z"
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165 "32-bit unsigned integer constant, or a symbolic reference known
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166 to fit that range (for immediate operands in zero-extending x86-64
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167 instructions)."
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168 (match_operand 0 "x86_64_zext_immediate_operand"))
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