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1 ;; Machine Descriptions for R8C/M16C/M32C
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2 ;; Copyright (C) 2005, 2007, 2008
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3 ;; Free Software Foundation, Inc.
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4 ;; Contributed by Red Hat.
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5 ;;
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6 ;; This file is part of GCC.
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7 ;;
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8 ;; GCC is free software; you can redistribute it and/or modify it
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9 ;; under the terms of the GNU General Public License as published
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10 ;; by the Free Software Foundation; either version 3, or (at your
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11 ;; option) any later version.
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12 ;;
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13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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14 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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15 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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16 ;; License for more details.
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17 ;;
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18 ;; You should have received a copy of the GNU General Public License
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19 ;; along with GCC; see the file COPYING3. If not see
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20 ;; <http://www.gnu.org/licenses/>.
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21
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22 ;; jump, conditionals, calls, etc
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23
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24 (define_insn "indirect_jump_16"
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25 [(set (pc)
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26 (match_operand:HI 0 "register_operand" "Rhi"))]
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27 "TARGET_A16"
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28 ; "jmpi.a\t%0"
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29 ; no 16-bit jmpi in r8c
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30 "push.b #0 | push.w\t%0 | rts"
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31 [(set_attr "flags" "x")]
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32 )
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33
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34 (define_insn "indirect_jump_24"
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35 [(set (pc)
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36 (match_operand:PSI 0 "register_operand" "Rpi"))]
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37 "TARGET_A24"
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38 "jmpi.a\t%0"
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39 [(set_attr "flags" "n")]
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40 )
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41
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42 (define_expand "indirect_jump"
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43 [(match_operand 0 "register_operand" "")]
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44 ""
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45 "if (TARGET_A16)
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46 emit_jump_insn (gen_indirect_jump_16(operands[0]));
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47 else
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48 emit_jump_insn (gen_indirect_jump_24(operands[0]));
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49 DONE;"
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50 )
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51
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52 ; We can replace this with jmp.s when gas supports relaxing. m32c
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53 ; opcodes are too complicated to try to compute their sizes here, it's
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54 ; far easier (and more reliable) to let gas worry about it.
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55 (define_insn "jump"
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56 [(set (pc)
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57 (label_ref (match_operand 0 "" "")))]
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58 ""
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59 "jmp.a\t%l0"
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60 [(set_attr "flags" "n")]
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61 )
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62
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63 ; No 16-bit indirect calls on r8c/m16c. */
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64 (define_insn "call"
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65 [(call (match_operand:QI 0 "memory_operand" "Si,SaSb,?Rmm")
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66 (match_operand 1 "" ""))
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67 (use (match_operand 2 "immediate_operand" ""))]
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68 ""
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69 "*
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70 switch (which_alternative) {
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71 case 0:
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72 {
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73 HOST_WIDE_INT func_vect_num =
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74 current_function_special_page_vector(XEXP (operands[0], 0));
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75 if (func_vect_num)
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76 {
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77 operands[3] = gen_rtx_CONST_INT (VOIDmode, func_vect_num);
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78 return \"jsrs\t%3\";
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79 }
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80 else
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81 return \"jsr.a\t%0\";
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82 }
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83 case 1: return TARGET_A16 ? \"push.w %a0 | jsr.a\tm32c_jsri16\" : \"jsri.a\t%a0\";
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84 case 2: return \"jsri.a\t%a0\";
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85 }"
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86 [(set_attr "flags" "x")]
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87 )
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88
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89 (define_insn "call_value"
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90 [(set (match_operand 0 "m32c_return_operand" "=RdiRmmRpa,RdiRmmRpa,RdiRmmRpa")
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91 (call (match_operand:QI 1 "memory_operand" "Si,SaSb,?Rmm")
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92 (match_operand 2 "" "")))
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93 (use (match_operand 3 "immediate_operand" ""))]
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94 ""
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95 "*
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96 switch (which_alternative) {
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97 case 0:
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98 {
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99 HOST_WIDE_INT func_vect_num =
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100 current_function_special_page_vector(XEXP (operands[1], 0));
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101 if (func_vect_num)
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102 {
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103 operands[4] = gen_rtx_CONST_INT (VOIDmode, func_vect_num);
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104 return \"jsrs\t%4\";
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105 }
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106 else
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107 return \"jsr.a\t%1\";
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108 }
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109 case 1: return TARGET_A16 ? \"push.w %a1 | jsr.a\tm32c_jsri16\" : \"jsri.a\t%a1\";
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110 case 2: return \"jsri.a\t%a1\";
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111 }"
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112 [(set_attr "flags" "x,x,x")]
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113 )
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114
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115 (define_expand "untyped_call"
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116 [(parallel [(call (match_operand 0 "" "")
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117 (const_int 0))
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118 (match_operand 1 "" "")
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119 (match_operand 2 "" "")])]
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120 ""
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121 "
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122 {
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123 int i;
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124
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125 emit_call_insn (gen_call (operands[0], const0_rtx, const0_rtx));
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126
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127 for (i = 0; i < XVECLEN (operands[2], 0); i++)
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128 {
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129 rtx set = XVECEXP (operands[2], 0, i);
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130 emit_move_insn (SET_DEST (set), SET_SRC (set));
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131 }
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132 DONE;
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133 }")
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