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1 ;; Machine Descriptions for R8C/M16C/M32C
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2 ;; Copyright (C) 2005, 2007, 2008
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3 ;; Free Software Foundation, Inc.
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4 ;; Contributed by Red Hat.
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5 ;;
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6 ;; This file is part of GCC.
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7 ;;
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8 ;; GCC is free software; you can redistribute it and/or modify it
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9 ;; under the terms of the GNU General Public License as published
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10 ;; by the Free Software Foundation; either version 3, or (at your
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11 ;; option) any later version.
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12 ;;
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13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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14 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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15 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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16 ;; License for more details.
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17 ;;
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18 ;; You should have received a copy of the GNU General Public License
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19 ;; along with GCC; see the file COPYING3. If not see
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20 ;; <http://www.gnu.org/licenses/>.
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21
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22 ;; Predicates
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23
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24 ; TRUE for any valid operand. We do this because general_operand
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25 ; refuses to match volatile memory refs.
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26
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27 (define_predicate "m32c_any_operand"
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28 (ior (match_operand 0 "general_operand")
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29 (match_operand 1 "memory_operand"))
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30 {
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31 return ! m32c_illegal_subreg_p (op);
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32 }
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33 )
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34
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35 ; Likewise for nonimmediate_operand.
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36
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37 (define_predicate "m32c_nonimmediate_operand"
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38 (ior (match_operand 0 "nonimmediate_operand")
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39 (match_operand 1 "memory_operand")))
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40
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41 ; TRUE if the operand is a pseudo-register.
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42 (define_predicate "m32c_pseudo"
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43 (ior (and (match_code "reg")
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44 (match_test "REGNO(op) >= FIRST_PSEUDO_REGISTER"))
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45 (and (match_code "subreg")
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46 (and (match_test "GET_CODE (XEXP (op, 0)) == REG")
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47 (match_test "REGNO(XEXP (op,0)) >= FIRST_PSEUDO_REGISTER")))))
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48
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49
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50 ; Returning true causes many predicates to NOT match. We allow
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51 ; subregs for type changing, but not for size changing.
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52 (define_predicate "m32c_wide_subreg"
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53 (and (match_code "subreg")
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54 (not (match_operand 0 "m32c_pseudo")))
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55 {
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56 unsigned int sizeo = GET_MODE_SIZE (GET_MODE (op));
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57 unsigned int sizei = GET_MODE_SIZE (GET_MODE (XEXP (op, 0)));
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58 sizeo = (sizeo + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
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59 sizei = (sizei + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
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60 return sizeo != sizei;
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61 })
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62
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63 ; TRUE for r0 through r3, or a pseudo that reload could put in r0
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64 ; through r3 (likewise for the next couple too)
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65 (define_predicate "r0123_operand"
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66 (ior (match_operand 0 "m32c_pseudo" "")
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67 (and (match_code "reg")
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68 (match_test "REGNO(op) <= R3_REGNO"))))
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69
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70 ; TRUE for r0
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71 (define_predicate "m32c_r0_operand"
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72 (ior (match_operand 0 "m32c_pseudo" "")
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73 (and (match_code "reg")
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74 (match_test "REGNO(op) == R0_REGNO"))))
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75
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76 ; TRUE for r1
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77 (define_predicate "m32c_r1_operand"
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78 (ior (match_operand 0 "m32c_pseudo" "")
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79 (and (match_code "reg")
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80 (match_test "REGNO(op) == R1_REGNO"))))
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81
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82 ; TRUE for HL_CLASS (r0 or r1)
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83 (define_predicate "m32c_hl_operand"
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84 (ior (match_operand 0 "m32c_pseudo" "")
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85 (and (match_code "reg")
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86 (match_test "REGNO(op) == R0_REGNO || REGNO(op) == R1_REGNO"))))
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87
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88
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89 ; TRUE for r2
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90 (define_predicate "m32c_r2_operand"
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91 (ior (match_operand 0 "m32c_pseudo" "")
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92 (and (match_code "reg")
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93 (match_test "REGNO(op) == R2_REGNO"))))
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94
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95 ; TRUE for r3
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96 (define_predicate "m32c_r3_operand"
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97 (ior (match_operand 0 "m32c_pseudo" "")
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98 (and (match_code "reg")
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99 (match_test "REGNO(op) == R3_REGNO"))))
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100
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101 ; TRUE for any general operand except r2.
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102 (define_predicate "m32c_notr2_operand"
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103 (and (match_operand 0 "general_operand")
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104 (ior (not (match_code "reg"))
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105 (match_test "REGNO(op) != R2_REGNO"))))
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106
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107 ; TRUE for the stack pointer.
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108 (define_predicate "m32c_sp_operand"
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109 (ior (match_operand 0 "m32c_pseudo" "")
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110 (and (match_code "reg")
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111 (match_test "REGNO(op) == SP_REGNO"))))
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112
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113 ; TRUE for control registers.
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114 (define_predicate "cr_operand"
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115 (match_code "reg")
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116 "return (REGNO (op) >= SB_REGNO
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117 && REGNO (op) <= FLG_REGNO);")
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118
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119 ; TRUE for $a0 or $a1.
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120 (define_predicate "a_operand"
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121 (and (match_code "reg")
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122 (match_test "REGNO (op) == A0_REGNO || REGNO (op) == A1_REGNO")))
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123
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124 ; TRUE for $a0 or $a1 or a pseudo
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125 (define_predicate "ap_operand"
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126 (ior (match_operand 0 "m32c_pseudo" "")
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127 (and (match_code "reg")
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128 (match_test "REGNO (op) == A0_REGNO || REGNO (op) == A1_REGNO"))))
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129
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130 ; TRUE for r0 through r3, or a0 or a1.
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131 (define_predicate "ra_operand"
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132 (and (and (match_operand 0 "register_operand" "")
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133 (not (match_operand 1 "cr_operand" "")))
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134 (not (match_operand 2 "m32c_wide_subreg" ""))))
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135
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136 ; Likewise, plus TRUE for memory references.
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137 (define_predicate "mra_operand"
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138 (and (and (match_operand 0 "nonimmediate_operand" "")
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139 (not (match_operand 1 "cr_operand" "")))
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140 (not (match_operand 2 "m32c_wide_subreg" ""))))
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141
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142 ; Likewise, plus TRUE for subregs.
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143 (define_predicate "mras_operand"
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144 (and (match_operand 0 "nonimmediate_operand" "")
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145 (not (match_operand 1 "cr_operand" ""))))
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146
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147 ; As above, but no push/pop operations
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148 (define_predicate "mra_nopp_operand"
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149 (match_operand 0 "mra_operand" "")
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150 {
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151 if (GET_CODE (op) == MEM
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152 && (GET_CODE (XEXP (op, 0)) == PRE_DEC
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153 || (GET_CODE (XEXP (op, 0)) == POST_INC)))
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154 return 0;
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155 return 1;
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156 })
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157
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158 ; TRUE for memory, r0..r3, a0..a1, or immediates.
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159 (define_predicate "mrai_operand"
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160 (and (and (match_operand 0 "m32c_any_operand" "")
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161 (not (match_operand 1 "cr_operand" "")))
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162 (not (match_operand 2 "m32c_wide_subreg" ""))))
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163
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164 ; Likewise, plus true for subregs.
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165 (define_predicate "mrasi_operand"
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166 (and (match_operand 0 "general_operand" "")
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167 (not (match_operand 1 "cr_operand" ""))))
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168
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169 ; TRUE for r0..r3 or memory.
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170 (define_predicate "mr_operand"
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171 (and (match_operand 0 "mra_operand" "")
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172 (not (match_operand 1 "a_operand" ""))))
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173
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174 ; TRUE for a0..a1 or memory.
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175 (define_predicate "ma_operand"
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176 (ior (match_operand 0 "a_operand" "")
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177 (match_operand 1 "memory_operand" "")))
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178
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179 ; TRUE for memory operands that are not indexed
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180 (define_predicate "memsym_operand"
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181 (and (match_operand 0 "memory_operand" "")
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182 (match_test "m32c_extra_constraint_p (op, 'S', \"Si\")")))
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183
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184 ; TRUE for memory operands with small integer addresses
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185 (define_predicate "memimmed_operand"
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186 (and (match_operand 0 "memory_operand" "")
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187 (match_test "m32c_extra_constraint_p (op, 'S', \"Sp\")")))
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188
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189 ; TRUE for r1h. This is complicated since r1h isn't a register GCC
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190 ; normally knows about.
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191 (define_predicate "r1h_operand"
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192 (match_code "zero_extract")
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193 {
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194 rtx reg = XEXP (op, 0);
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195 rtx size = XEXP (op, 1);
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196 rtx pos = XEXP (op, 2);
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197 return (GET_CODE (reg) == REG
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198 && REGNO (reg) == R1_REGNO
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199 && GET_CODE (size) == CONST_INT
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200 && INTVAL (size) == 8
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201 && GET_CODE (pos) == CONST_INT
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202 && INTVAL (pos) == 8);
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203 })
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204
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205 ; TRUE if we can shift by this amount. Constant shift counts have a
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206 ; limited range.
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207 (define_predicate "shiftcount_operand"
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208 (ior (match_operand 0 "mra_operand" "")
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209 (and (match_operand 2 "const_int_operand" "")
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210 (match_test "-8 <= INTVAL (op) && INTVAL (op) && INTVAL (op) <= 8"))))
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211 (define_predicate "longshiftcount_operand"
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212 (ior (match_operand 0 "mra_operand" "")
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213 (and (match_operand 2 "const_int_operand" "")
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214 (match_test "-32 <= INTVAL (op) && INTVAL (op) && INTVAL (op) <= 32"))))
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215
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216 ; TRUE for r0..r3, a0..a1, or sp.
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217 (define_predicate "mra_or_sp_operand"
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218 (and (ior (match_operand 0 "mra_operand")
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219 (match_operand 1 "m32c_sp_operand"))
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220 (not (match_operand 2 "m32c_wide_subreg" ""))))
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221
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222
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223 ; TRUE for r2 or r3.
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224 (define_predicate "m32c_r2r3_operand"
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225 (ior (and (match_code "reg")
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226 (ior (match_test "REGNO(op) == R2_REGNO")
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227 (match_test "REGNO(op) == R3_REGNO")))
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228 (and (match_code "subreg")
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229 (match_test "GET_CODE (XEXP (op, 0)) == REG && (REGNO (XEXP (op, 0)) == R2_REGNO || REGNO (XEXP (op, 0)) == R3_REGNO)"))))
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230
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231 ; Likewise, plus TRUE for a0..a1.
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232 (define_predicate "m32c_r2r3a_operand"
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233 (ior (match_operand 0 "m32c_r2r3_operand" "")
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234 (match_operand 0 "a_operand" "")))
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235
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236 ; These two are only for movqi - no subreg limit
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237 (define_predicate "mra_qi_operand"
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238 (and (and (match_operand 0 "m32c_nonimmediate_operand" "")
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239 (not (match_operand 1 "cr_operand" "")))
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240 (not (match_operand 1 "m32c_r2r3a_operand" ""))))
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241
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242 (define_predicate "mrai_qi_operand"
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243 (and (and (match_operand 0 "m32c_any_operand" "")
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244 (not (match_operand 1 "cr_operand" "")))
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245 (not (match_operand 1 "m32c_r2r3a_operand" ""))))
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246
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247 (define_predicate "a_qi_operand"
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248 (ior (match_operand 0 "m32c_pseudo" "")
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249 (match_operand 1 "a_operand" "")))
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250
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251 ; TRUE for comparisons we support.
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252 (define_predicate "m32c_cmp_operator"
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253 (match_code "eq,ne,gt,gtu,lt,ltu,ge,geu,le,leu"))
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254
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255 (define_predicate "m32c_eqne_operator"
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256 (match_code "eq,ne"))
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257
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258 ; TRUE for mem0
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259 (define_predicate "m32c_mem0_operand"
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260 (ior (match_operand 0 "m32c_pseudo" "")
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261 (and (match_code "reg")
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262 (match_test "REGNO(op) == MEM0_REGNO"))))
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263
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264 ; TRUE for things the call patterns can return.
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265 (define_predicate "m32c_return_operand"
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266 (ior (match_operand 0 "m32c_r0_operand")
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267 (ior (match_operand 0 "m32c_mem0_operand")
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268 (match_code "parallel"))))
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269
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270 ; TRUE for constants we can multiply pointers by
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271 (define_predicate "m32c_psi_scale"
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272 (and (match_operand 0 "const_int_operand")
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273 (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"Ilb\")")))
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274
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275 ; TRUE for one bit set (bit) or clear (mask) out of N bits.
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276
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277 (define_predicate "m32c_1bit8_operand"
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278 (and (match_operand 0 "const_int_operand")
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279 (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"Ilb\")")))
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280
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281 (define_predicate "m32c_1bit16_operand"
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282 (and (match_operand 0 "const_int_operand")
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283 (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"Ilw\")")))
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284
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285 (define_predicate "m32c_1mask8_operand"
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286 (and (match_operand 0 "const_int_operand")
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287 (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"ImB\")")))
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288
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289 (define_predicate "m32c_1mask16_operand"
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290 (and (match_operand 0 "const_int_operand")
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291 (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"Imw\")")))
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