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1 /* Definitions of target machine for GNU compiler,
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2 for Motorola M*CORE Processor.
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3 Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007,
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4 2008 Free Software Foundation, Inc.
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5
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6 This file is part of GCC.
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7
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8 GCC is free software; you can redistribute it and/or modify it
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9 under the terms of the GNU General Public License as published
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10 by the Free Software Foundation; either version 3, or (at your
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11 option) any later version.
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12
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13 GCC is distributed in the hope that it will be useful, but WITHOUT
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14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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16 License for more details.
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17
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18 You should have received a copy of the GNU General Public License
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19 along with GCC; see the file COPYING3. If not see
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20 <http://www.gnu.org/licenses/>. */
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21
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22 #ifndef GCC_MCORE_H
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23 #define GCC_MCORE_H
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24
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25 /* RBE: need to move these elsewhere. */
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26 #undef LIKE_PPC_ABI
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27 #define MCORE_STRUCT_ARGS
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28 /* RBE: end of "move elsewhere". */
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29
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30 /* Run-time Target Specification. */
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31 #define TARGET_MCORE
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32
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33 /* Get tree.c to declare a target-specific specialization of
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34 merge_decl_attributes. */
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35 #define TARGET_DLLIMPORT_DECL_ATTRIBUTES 1
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36
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37 #define TARGET_CPU_CPP_BUILTINS() \
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38 do \
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39 { \
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40 builtin_define ("__mcore__"); \
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41 builtin_define ("__MCORE__"); \
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42 if (TARGET_LITTLE_END) \
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43 builtin_define ("__MCORELE__"); \
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44 else \
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45 builtin_define ("__MCOREBE__"); \
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46 if (TARGET_M340) \
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47 builtin_define ("__M340__"); \
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48 else \
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49 builtin_define ("__M210__"); \
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50 } \
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51 while (0)
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52
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53 #undef CPP_SPEC
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54 #define CPP_SPEC "%{m210:%{mlittle-endian:%ethe m210 does not have little endian support}}"
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55
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56 /* We don't have a -lg library, so don't put it in the list. */
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57 #undef LIB_SPEC
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58 #define LIB_SPEC "%{!shared: %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}}"
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59
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60 #undef ASM_SPEC
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61 #define ASM_SPEC "%{mbig-endian:-EB} %{m210:-cpu=210 -EB}"
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62
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63 #undef LINK_SPEC
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64 #define LINK_SPEC "%{mbig-endian:-EB} %{m210:-EB} -X"
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65
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66 #define TARGET_DEFAULT \
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67 (MASK_HARDLIT \
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68 | MASK_DIV \
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69 | MASK_RELAX_IMM \
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70 | MASK_M340 \
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71 | MASK_LITTLE_END)
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72
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73 #ifndef MULTILIB_DEFAULTS
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74 #define MULTILIB_DEFAULTS { "mlittle-endian", "m340" }
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75 #endif
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76
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77 /* The ability to have 4 byte alignment is being suppressed for now.
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78 If this ability is reenabled, you must disable the definition below
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79 *and* edit t-mcore to enable multilibs for 4 byte alignment code. */
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80 #undef TARGET_8ALIGN
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81 #define TARGET_8ALIGN 1
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82
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83 extern char * mcore_current_function_name;
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84
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85 /* The MCore ABI says that bitfields are unsigned by default. */
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86 #define CC1_SPEC "-funsigned-bitfields"
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87
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88 /* What options are we going to default to specific settings when
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89 -O* happens; the user can subsequently override these settings.
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90
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91 Omitting the frame pointer is a very good idea on the MCore.
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92 Scheduling isn't worth anything on the current MCore implementation. */
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93 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
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94 { \
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95 if (LEVEL) \
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96 { \
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97 flag_no_function_cse = 1; \
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98 flag_omit_frame_pointer = 1; \
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99 \
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100 if (LEVEL >= 2) \
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101 { \
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102 flag_caller_saves = 0; \
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103 flag_schedule_insns = 0; \
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104 flag_schedule_insns_after_reload = 0; \
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105 } \
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106 } \
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107 if (SIZE) \
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108 { \
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109 target_flags &= ~MASK_HARDLIT; \
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110 } \
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111 }
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112
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113 /* What options are we going to force to specific settings,
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114 regardless of what the user thought he wanted.
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115 We also use this for some post-processing of options. */
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116 #define OVERRIDE_OPTIONS mcore_override_options ()
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117
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118 /* Target machine storage Layout. */
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119
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120 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
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121 if (GET_MODE_CLASS (MODE) == MODE_INT \
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122 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
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123 { \
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124 (MODE) = SImode; \
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125 (UNSIGNEDP) = 1; \
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126 }
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127
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128 /* Define this if most significant bit is lowest numbered
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129 in instructions that operate on numbered bit-fields. */
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130 #define BITS_BIG_ENDIAN 0
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131
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132 /* Define this if most significant byte of a word is the lowest numbered. */
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133 #define BYTES_BIG_ENDIAN (! TARGET_LITTLE_END)
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134
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135 /* Define this if most significant word of a multiword number is the lowest
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136 numbered. */
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137 #define WORDS_BIG_ENDIAN (! TARGET_LITTLE_END)
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138
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139 #define LIBGCC2_WORDS_BIG_ENDIAN 1
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140 #ifdef __MCORELE__
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141 #undef LIBGCC2_WORDS_BIG_ENDIAN
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142 #define LIBGCC2_WORDS_BIG_ENDIAN 0
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143 #endif
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144
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145 #define MAX_BITS_PER_WORD 32
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146
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147 /* Width of a word, in units (bytes). */
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148 #define UNITS_PER_WORD 4
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149
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150 /* A C expression for the size in bits of the type `long long' on the
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151 target machine. If you don't define this, the default is two
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152 words. */
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153 #define LONG_LONG_TYPE_SIZE 64
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154
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155 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
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156 #define PARM_BOUNDARY 32
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157
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158 /* Doubles must be aligned to an 8 byte boundary. */
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159 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
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160 ((MODE != BLKmode && (GET_MODE_SIZE (MODE) == 8)) \
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161 ? BIGGEST_ALIGNMENT : PARM_BOUNDARY)
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162
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163 /* Boundary (in *bits*) on which stack pointer should be aligned. */
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164 #define STACK_BOUNDARY (TARGET_8ALIGN ? 64 : 32)
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165
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166 /* Largest increment in UNITS we allow the stack to grow in a single operation. */
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167 extern int mcore_stack_increment;
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168 #define STACK_UNITS_MAXSTEP 4096
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169
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170 /* Allocation boundary (in *bits*) for the code of a function. */
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171 #define FUNCTION_BOUNDARY ((TARGET_OVERALIGN_FUNC) ? 32 : 16)
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172
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173 /* Alignment of field after `int : 0' in a structure. */
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174 #define EMPTY_FIELD_BOUNDARY 32
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175
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176 /* No data type wants to be aligned rounder than this. */
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177 #define BIGGEST_ALIGNMENT (TARGET_8ALIGN ? 64 : 32)
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178
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179 /* The best alignment to use in cases where we have a choice. */
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180 #define FASTEST_ALIGNMENT 32
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181
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182 /* Every structures size must be a multiple of 8 bits. */
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183 #define STRUCTURE_SIZE_BOUNDARY 8
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184
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185 /* Look at the fundamental type that is used for a bit-field and use
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186 that to impose alignment on the enclosing structure.
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187 struct s {int a:8}; should have same alignment as "int", not "char". */
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188 #define PCC_BITFIELD_TYPE_MATTERS 1
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189
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190 /* Largest integer machine mode for structures. If undefined, the default
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191 is GET_MODE_SIZE(DImode). */
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192 #define MAX_FIXED_MODE_SIZE 32
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193
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194 /* Make strings word-aligned so strcpy from constants will be faster. */
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195 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
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196 ((TREE_CODE (EXP) == STRING_CST \
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197 && (ALIGN) < FASTEST_ALIGNMENT) \
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198 ? FASTEST_ALIGNMENT : (ALIGN))
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199
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200 /* Make arrays of chars word-aligned for the same reasons. */
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201 #define DATA_ALIGNMENT(TYPE, ALIGN) \
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202 (TREE_CODE (TYPE) == ARRAY_TYPE \
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203 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
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204 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
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205
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206 /* Set this nonzero if move instructions will actually fail to work
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207 when given unaligned data. */
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208 #define STRICT_ALIGNMENT 1
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209
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210 /* Standard register usage. */
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211
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212 /* Register allocation for our first guess
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213
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214 r0 stack pointer
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215 r1 scratch, target reg for xtrb?
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216 r2-r7 arguments.
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217 r8-r14 call saved
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218 r15 link register
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219 ap arg pointer (doesn't really exist, always eliminated)
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220 c c bit
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221 fp frame pointer (doesn't really exist, always eliminated)
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222 x19 two control registers. */
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223
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224 /* Number of actual hardware registers.
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225 The hardware registers are assigned numbers for the compiler
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226 from 0 to just below FIRST_PSEUDO_REGISTER.
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227 All registers that the compiler knows about must be given numbers,
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228 even those that are not normally considered general registers.
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229
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230 MCore has 16 integer registers and 2 control registers + the arg
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231 pointer. */
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232
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233 #define FIRST_PSEUDO_REGISTER 20
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234
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235 #define R1_REG 1 /* Where literals are forced. */
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236 #define LK_REG 15 /* Overloaded on general register. */
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237 #define AP_REG 16 /* Fake arg pointer register. */
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238 /* RBE: mcore.md depends on CC_REG being set to 17. */
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239 #define CC_REG 17 /* Can't name it C_REG. */
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240 #define FP_REG 18 /* Fake frame pointer register. */
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241
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242 /* Specify the registers used for certain standard purposes.
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243 The values of these macros are register numbers. */
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244
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245
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246 #undef PC_REGNUM /* Define this if the program counter is overloaded on a register. */
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247 #define STACK_POINTER_REGNUM 0 /* Register to use for pushing function arguments. */
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248 #define FRAME_POINTER_REGNUM 8 /* When we need FP, use r8. */
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249
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250 /* The assembler's names for the registers. RFP need not always be used as
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251 the Real framepointer; it can also be used as a normal general register.
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252 Note that the name `fp' is horribly misleading since `fp' is in fact only
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253 the argument-and-return-context pointer. */
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254 #define REGISTER_NAMES \
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255 { \
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256 "sp", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
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257 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
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258 "apvirtual", "c", "fpvirtual", "x19" \
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259 }
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260
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261 /* 1 for registers that have pervasive standard uses
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262 and are not available for the register allocator. */
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263 #define FIXED_REGISTERS \
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264 /* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 ap c fp x19 */ \
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265 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1}
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266
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267 /* 1 for registers not available across function calls.
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268 These must include the FIXED_REGISTERS and also any
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269 registers that can be used without being saved.
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270 The latter must include the registers where values are returned
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271 and the register where structure-value addresses are passed.
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272 Aside from that, you can include as many other registers as you like. */
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273
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274 /* RBE: r15 {link register} not available across calls,
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275 But we don't mark it that way here.... */
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276 #define CALL_USED_REGISTERS \
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277 /* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 ap c fp x19 */ \
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278 { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1}
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279
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280 /* The order in which register should be allocated. */
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281 #define REG_ALLOC_ORDER \
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282 /* r7 r6 r5 r4 r3 r2 r15 r14 r13 r12 r11 r10 r9 r8 r1 r0 ap c fp x19*/ \
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283 { 7, 6, 5, 4, 3, 2, 15, 14, 13, 12, 11, 10, 9, 8, 1, 0, 16, 17, 18, 19}
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284
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285 /* Return number of consecutive hard regs needed starting at reg REGNO
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286 to hold something of mode MODE.
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287 This is ordinarily the length in words of a value of mode MODE
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288 but can be less for certain modes in special long registers.
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289
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290 On the MCore regs are UNITS_PER_WORD bits wide; */
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291 #define HARD_REGNO_NREGS(REGNO, MODE) \
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292 (((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
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293
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294 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
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295 We may keep double values in even registers. */
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296 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
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297 ((TARGET_8ALIGN && GET_MODE_SIZE (MODE) > UNITS_PER_WORD) ? (((REGNO) & 1) == 0) : (REGNO < 18))
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298
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299 /* Value is 1 if it is a good idea to tie two pseudo registers
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300 when one has mode MODE1 and one has mode MODE2.
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301 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
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302 for any hard reg, then this must be 0 for correct output. */
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303 #define MODES_TIEABLE_P(MODE1, MODE2) \
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304 ((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
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305
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306 /* Value should be nonzero if functions must have frame pointers.
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307 Zero means the frame pointer need not be set up (and parms may be accessed
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308 via the stack pointer) in functions that seem suitable. */
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309 #define FRAME_POINTER_REQUIRED 0
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310
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311 /* Definitions for register eliminations.
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312
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313 We have two registers that can be eliminated on the MCore. First, the
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314 frame pointer register can often be eliminated in favor of the stack
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315 pointer register. Secondly, the argument pointer register can always be
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316 eliminated; it is replaced with either the stack or frame pointer. */
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317
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318 /* Base register for access to arguments of the function. */
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319 #define ARG_POINTER_REGNUM 16
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320
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321 /* Register in which the static-chain is passed to a function. */
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322 #define STATIC_CHAIN_REGNUM 1
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323
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324 /* This is an array of structures. Each structure initializes one pair
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325 of eliminable registers. The "from" register number is given first,
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326 followed by "to". Eliminations of the same "from" register are listed
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327 in order of preference. */
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328 #define ELIMINABLE_REGS \
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329 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
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330 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
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331 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},}
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332
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333 /* Given FROM and TO register numbers, say whether this elimination
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334 is allowed. */
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335 #define CAN_ELIMINATE(FROM, TO) \
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336 (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED))
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337
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338 /* Define the offset between two registers, one to be eliminated, and the other
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339 its replacement, at the start of a routine. */
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340 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
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341 OFFSET = mcore_initial_elimination_offset (FROM, TO)
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342
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343 /* Define the classes of registers for register constraints in the
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344 machine description. Also define ranges of constants.
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345
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346 One of the classes must always be named ALL_REGS and include all hard regs.
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347 If there is more than one class, another class must be named NO_REGS
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348 and contain no registers.
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349
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350 The name GENERAL_REGS must be the name of a class (or an alias for
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351 another name such as ALL_REGS). This is the class of registers
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352 that is allowed by "g" or "r" in a register constraint.
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353 Also, registers outside this class are allocated only when
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354 instructions express preferences for them.
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355
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356 The classes must be numbered in nondecreasing order; that is,
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357 a larger-numbered class must never be contained completely
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358 in a smaller-numbered class.
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359
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360 For any two classes, it is very desirable that there be another
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361 class that represents their union. */
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362
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363 /* The MCore has only general registers. There are
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364 also some special purpose registers: the T bit register, the
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365 procedure Link and the Count Registers. */
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366 enum reg_class
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367 {
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368 NO_REGS,
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369 ONLYR1_REGS,
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370 LRW_REGS,
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|
371 GENERAL_REGS,
|
|
|
372 C_REGS,
|
|
|
373 ALL_REGS,
|
|
|
374 LIM_REG_CLASSES
|
|
|
375 };
|
|
|
376
|
|
|
377 #define N_REG_CLASSES (int) LIM_REG_CLASSES
|
|
|
378
|
|
|
379 #define IRA_COVER_CLASSES \
|
|
|
380 { \
|
|
|
381 GENERAL_REGS, C_REGS, LIM_REG_CLASSES \
|
|
|
382 }
|
|
|
383
|
|
|
384
|
|
|
385 /* Give names of register classes as strings for dump file. */
|
|
|
386 #define REG_CLASS_NAMES \
|
|
|
387 { \
|
|
|
388 "NO_REGS", \
|
|
|
389 "ONLYR1_REGS", \
|
|
|
390 "LRW_REGS", \
|
|
|
391 "GENERAL_REGS", \
|
|
|
392 "C_REGS", \
|
|
|
393 "ALL_REGS", \
|
|
|
394 }
|
|
|
395
|
|
|
396 /* Define which registers fit in which classes.
|
|
|
397 This is an initializer for a vector of HARD_REG_SET
|
|
|
398 of length N_REG_CLASSES. */
|
|
|
399
|
|
|
400 /* ??? STACK_POINTER_REGNUM should be excluded from LRW_REGS. */
|
|
|
401 #define REG_CLASS_CONTENTS \
|
|
|
402 { \
|
|
|
403 {0x000000}, /* NO_REGS */ \
|
|
|
404 {0x000002}, /* ONLYR1_REGS */ \
|
|
|
405 {0x007FFE}, /* LRW_REGS */ \
|
|
|
406 {0x01FFFF}, /* GENERAL_REGS */ \
|
|
|
407 {0x020000}, /* C_REGS */ \
|
|
|
408 {0x0FFFFF} /* ALL_REGS */ \
|
|
|
409 }
|
|
|
410
|
|
|
411 /* The same information, inverted:
|
|
|
412 Return the class number of the smallest class containing
|
|
|
413 reg number REGNO. This could be a conditional expression
|
|
|
414 or could index an array. */
|
|
|
415
|
|
|
416 extern const int regno_reg_class[FIRST_PSEUDO_REGISTER];
|
|
|
417 #define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO]
|
|
|
418
|
|
|
419 /* When defined, the compiler allows registers explicitly used in the
|
|
|
420 rtl to be used as spill registers but prevents the compiler from
|
|
|
421 extending the lifetime of these registers. */
|
|
|
422 #define SMALL_REGISTER_CLASSES 1
|
|
|
423
|
|
|
424 /* The class value for index registers, and the one for base regs. */
|
|
|
425 #define INDEX_REG_CLASS NO_REGS
|
|
|
426 #define BASE_REG_CLASS GENERAL_REGS
|
|
|
427
|
|
|
428 /* Get reg_class from a letter such as appears in the machine
|
|
|
429 description. */
|
|
|
430 extern const enum reg_class reg_class_from_letter[];
|
|
|
431
|
|
|
432 #define REG_CLASS_FROM_LETTER(C) \
|
|
|
433 (ISLOWER (C) ? reg_class_from_letter[(C) - 'a'] : NO_REGS)
|
|
|
434
|
|
|
435 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
|
|
|
436 can be used to stand for particular ranges of immediate operands.
|
|
|
437 This macro defines what the ranges are.
|
|
|
438 C is the letter, and VALUE is a constant value.
|
|
|
439 Return 1 if VALUE is in the range specified by C.
|
|
|
440 I: loadable by movi (0..127)
|
|
|
441 J: arithmetic operand 1..32
|
|
|
442 K: shift operand 0..31
|
|
|
443 L: negative arithmetic operand -1..-32
|
|
|
444 M: powers of two, constants loadable by bgeni
|
|
|
445 N: powers of two minus 1, constants loadable by bmaski, including -1
|
|
|
446 O: allowed by cmov with two constants +/- 1 of each other
|
|
|
447 P: values we will generate 'inline' -- without an 'lrw'
|
|
|
448
|
|
|
449 Others defined for use after reload
|
|
|
450 Q: constant 1
|
|
|
451 R: a label
|
|
|
452 S: 0/1/2 cleared bits out of 32 [for bclri's]
|
|
|
453 T: 2 set bits out of 32 [for bseti's]
|
|
|
454 U: constant 0
|
|
|
455 xxxS: 1 cleared bit out of 32 (complement of power of 2). for bclri
|
|
|
456 xxxT: 2 cleared bits out of 32. for pairs of bclris. */
|
|
|
457 #define CONST_OK_FOR_I(VALUE) (((HOST_WIDE_INT)(VALUE)) >= 0 && ((HOST_WIDE_INT)(VALUE)) <= 0x7f)
|
|
|
458 #define CONST_OK_FOR_J(VALUE) (((HOST_WIDE_INT)(VALUE)) > 0 && ((HOST_WIDE_INT)(VALUE)) <= 32)
|
|
|
459 #define CONST_OK_FOR_L(VALUE) (((HOST_WIDE_INT)(VALUE)) < 0 && ((HOST_WIDE_INT)(VALUE)) >= -32)
|
|
|
460 #define CONST_OK_FOR_K(VALUE) (((HOST_WIDE_INT)(VALUE)) >= 0 && ((HOST_WIDE_INT)(VALUE)) <= 31)
|
|
|
461 #define CONST_OK_FOR_M(VALUE) (exact_log2 (VALUE) >= 0 && exact_log2 (VALUE) <= 30)
|
|
|
462 #define CONST_OK_FOR_N(VALUE) (((HOST_WIDE_INT)(VALUE)) == -1 || (exact_log2 ((VALUE) + 1) >= 0 && exact_log2 ((VALUE) + 1) <= 30))
|
|
|
463 #define CONST_OK_FOR_O(VALUE) (CONST_OK_FOR_I(VALUE) || \
|
|
|
464 CONST_OK_FOR_M(VALUE) || \
|
|
|
465 CONST_OK_FOR_N(VALUE) || \
|
|
|
466 CONST_OK_FOR_M((HOST_WIDE_INT)(VALUE) - 1) || \
|
|
|
467 CONST_OK_FOR_N((HOST_WIDE_INT)(VALUE) + 1))
|
|
|
468
|
|
|
469 #define CONST_OK_FOR_P(VALUE) (mcore_const_ok_for_inline (VALUE))
|
|
|
470
|
|
|
471 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
|
|
|
472 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) \
|
|
|
473 : (C) == 'J' ? CONST_OK_FOR_J (VALUE) \
|
|
|
474 : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \
|
|
|
475 : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \
|
|
|
476 : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \
|
|
|
477 : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \
|
|
|
478 : (C) == 'P' ? CONST_OK_FOR_P (VALUE) \
|
|
|
479 : (C) == 'O' ? CONST_OK_FOR_O (VALUE) \
|
|
|
480 : 0)
|
|
|
481
|
|
|
482 /* Similar, but for floating constants, and defining letters G and H.
|
|
|
483 Here VALUE is the CONST_DOUBLE rtx itself. */
|
|
|
484 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
|
|
|
485 ((C) == 'G' ? CONST_OK_FOR_I (CONST_DOUBLE_HIGH (VALUE)) \
|
|
|
486 && CONST_OK_FOR_I (CONST_DOUBLE_LOW (VALUE)) \
|
|
|
487 : 0)
|
|
|
488
|
|
|
489 /* Letters in the range `Q' through `U' in a register constraint string
|
|
|
490 may be defined in a machine-dependent fashion to stand for arbitrary
|
|
|
491 operand types. */
|
|
|
492 #define EXTRA_CONSTRAINT(OP, C) \
|
|
|
493 ((C) == 'R' ? (GET_CODE (OP) == MEM \
|
|
|
494 && GET_CODE (XEXP (OP, 0)) == LABEL_REF) \
|
|
|
495 : (C) == 'S' ? (GET_CODE (OP) == CONST_INT \
|
|
|
496 && mcore_num_zeros (INTVAL (OP)) <= 2) \
|
|
|
497 : (C) == 'T' ? (GET_CODE (OP) == CONST_INT \
|
|
|
498 && mcore_num_ones (INTVAL (OP)) == 2) \
|
|
|
499 : (C) == 'Q' ? (GET_CODE (OP) == CONST_INT \
|
|
|
500 && INTVAL(OP) == 1) \
|
|
|
501 : (C) == 'U' ? (GET_CODE (OP) == CONST_INT \
|
|
|
502 && INTVAL(OP) == 0) \
|
|
|
503 : 0)
|
|
|
504
|
|
|
505 /* Given an rtx X being reloaded into a reg required to be
|
|
|
506 in class CLASS, return the class of reg to actually use.
|
|
|
507 In general this is just CLASS; but on some machines
|
|
|
508 in some cases it is preferable to use a more restrictive class. */
|
|
|
509 #define PREFERRED_RELOAD_CLASS(X, CLASS) mcore_reload_class (X, CLASS)
|
|
|
510
|
|
|
511 /* Return the register class of a scratch register needed to copy IN into
|
|
|
512 or out of a register in CLASS in MODE. If it can be done directly,
|
|
|
513 NO_REGS is returned. */
|
|
|
514 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
|
|
|
515 mcore_secondary_reload_class (CLASS, MODE, X)
|
|
|
516
|
|
|
517 /* Return the maximum number of consecutive registers
|
|
|
518 needed to represent mode MODE in a register of class CLASS.
|
|
|
519
|
|
|
520 On MCore this is the size of MODE in words. */
|
|
|
521 #define CLASS_MAX_NREGS(CLASS, MODE) \
|
|
|
522 (ROUND_ADVANCE (GET_MODE_SIZE (MODE)))
|
|
|
523
|
|
|
524 /* Stack layout; function entry, exit and calling. */
|
|
|
525
|
|
|
526 /* Define the number of register that can hold parameters.
|
|
|
527 These two macros are used only in other macro definitions below. */
|
|
|
528 #define NPARM_REGS 6
|
|
|
529 #define FIRST_PARM_REG 2
|
|
|
530 #define FIRST_RET_REG 2
|
|
|
531
|
|
|
532 /* Define this if pushing a word on the stack
|
|
|
533 makes the stack pointer a smaller address. */
|
|
|
534 #define STACK_GROWS_DOWNWARD
|
|
|
535
|
|
|
536 /* Offset within stack frame to start allocating local variables at.
|
|
|
537 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
|
|
|
538 first local allocated. Otherwise, it is the offset to the BEGINNING
|
|
|
539 of the first local allocated. */
|
|
|
540 #define STARTING_FRAME_OFFSET 0
|
|
|
541
|
|
|
542 /* If defined, the maximum amount of space required for outgoing arguments
|
|
|
543 will be computed and placed into the variable
|
|
|
544 `crtl->outgoing_args_size'. No space will be pushed
|
|
|
545 onto the stack for each call; instead, the function prologue should
|
|
|
546 increase the stack frame size by this amount. */
|
|
|
547 #define ACCUMULATE_OUTGOING_ARGS 1
|
|
|
548
|
|
|
549 /* Offset of first parameter from the argument pointer register value. */
|
|
|
550 #define FIRST_PARM_OFFSET(FNDECL) 0
|
|
|
551
|
|
|
552 /* Value is the number of byte of arguments automatically
|
|
|
553 popped when returning from a subroutine call.
|
|
|
554 FUNTYPE is the data type of the function (as a tree),
|
|
|
555 or for a library call it is an identifier node for the subroutine name.
|
|
|
556 SIZE is the number of bytes of arguments passed on the stack.
|
|
|
557
|
|
|
558 On the MCore, the callee does not pop any of its arguments that were passed
|
|
|
559 on the stack. */
|
|
|
560 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
|
|
|
561
|
|
|
562 /* Define how to find the value returned by a function.
|
|
|
563 VALTYPE is the data type of the value (as a tree).
|
|
|
564 If the precise function being called is known, FUNC is its FUNCTION_DECL;
|
|
|
565 otherwise, FUNC is 0. */
|
|
|
566 #define FUNCTION_VALUE(VALTYPE, FUNC) mcore_function_value (VALTYPE, FUNC)
|
|
|
567
|
|
|
568 /* Don't default to pcc-struct-return, because gcc is the only compiler, and
|
|
|
569 we want to retain compatibility with older gcc versions. */
|
|
|
570 #define DEFAULT_PCC_STRUCT_RETURN 0
|
|
|
571
|
|
|
572 /* Define how to find the value returned by a library function
|
|
|
573 assuming the value has mode MODE. */
|
|
|
574 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RET_REG)
|
|
|
575
|
|
|
576 /* 1 if N is a possible register number for a function value.
|
|
|
577 On the MCore, only r4 can return results. */
|
|
|
578 #define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == FIRST_RET_REG)
|
|
|
579
|
|
|
580 /* 1 if N is a possible register number for function argument passing. */
|
|
|
581 #define FUNCTION_ARG_REGNO_P(REGNO) \
|
|
|
582 ((REGNO) >= FIRST_PARM_REG && (REGNO) < (NPARM_REGS + FIRST_PARM_REG))
|
|
|
583
|
|
|
584 /* Define a data type for recording info about an argument list
|
|
|
585 during the scan of that argument list. This data type should
|
|
|
586 hold all necessary information about the function itself
|
|
|
587 and about the args processed so far, enough to enable macros
|
|
|
588 such as FUNCTION_ARG to determine where the next arg should go.
|
|
|
589
|
|
|
590 On MCore, this is a single integer, which is a number of words
|
|
|
591 of arguments scanned so far (including the invisible argument,
|
|
|
592 if any, which holds the structure-value-address).
|
|
|
593 Thus NARGREGS or more means all following args should go on the stack. */
|
|
|
594 #define CUMULATIVE_ARGS int
|
|
|
595
|
|
|
596 #define ROUND_ADVANCE(SIZE) \
|
|
|
597 ((SIZE + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
|
|
|
598
|
|
|
599 /* Round a register number up to a proper boundary for an arg of mode
|
|
|
600 MODE.
|
|
|
601
|
|
|
602 We round to an even reg for things larger than a word. */
|
|
|
603 #define ROUND_REG(X, MODE) \
|
|
|
604 ((TARGET_8ALIGN \
|
|
|
605 && GET_MODE_UNIT_SIZE ((MODE)) > UNITS_PER_WORD) \
|
|
|
606 ? ((X) + ((X) & 1)) : (X))
|
|
|
607
|
|
|
608
|
|
|
609 /* Initialize a variable CUM of type CUMULATIVE_ARGS
|
|
|
610 for a call to a function whose data type is FNTYPE.
|
|
|
611 For a library call, FNTYPE is 0.
|
|
|
612
|
|
|
613 On MCore, the offset always starts at 0: the first parm reg is always
|
|
|
614 the same reg. */
|
|
|
615 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
|
|
|
616 ((CUM) = 0)
|
|
|
617
|
|
|
618 /* Update the data in CUM to advance over an argument
|
|
|
619 of mode MODE and data type TYPE.
|
|
|
620 (TYPE is null for libcalls where that information may not be
|
|
|
621 available.) */
|
|
|
622 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
|
|
|
623 ((CUM) = (ROUND_REG ((CUM), (MODE)) \
|
|
|
624 + ((NAMED) * mcore_num_arg_regs (MODE, TYPE)))) \
|
|
|
625
|
|
|
626 /* Define where to put the arguments to a function. */
|
|
|
627 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
|
|
|
628 mcore_function_arg (CUM, MODE, TYPE, NAMED)
|
|
|
629
|
|
|
630 /* Call the function profiler with a given profile label. */
|
|
|
631 #define FUNCTION_PROFILER(STREAM,LABELNO) \
|
|
|
632 { \
|
|
|
633 fprintf (STREAM, " trap 1\n"); \
|
|
|
634 fprintf (STREAM, " .align 2\n"); \
|
|
|
635 fprintf (STREAM, " .long LP%d\n", (LABELNO)); \
|
|
|
636 }
|
|
|
637
|
|
|
638 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
|
|
|
639 the stack pointer does not matter. The value is tested only in
|
|
|
640 functions that have frame pointers.
|
|
|
641 No definition is equivalent to always zero. */
|
|
|
642 #define EXIT_IGNORE_STACK 0
|
|
|
643
|
|
|
644 /* Output assembler code for a block containing the constant parts
|
|
|
645 of a trampoline, leaving space for the variable parts.
|
|
|
646
|
|
|
647 On the MCore, the trampoline looks like:
|
|
|
648 lrw r1, function
|
|
|
649 lrw r13, area
|
|
|
650 jmp r13
|
|
|
651 or r0, r0
|
|
|
652 .literals */
|
|
|
653 #define TRAMPOLINE_TEMPLATE(FILE) \
|
|
|
654 { \
|
|
|
655 fprintf ((FILE), " .short 0x7102\n"); \
|
|
|
656 fprintf ((FILE), " .short 0x7d02\n"); \
|
|
|
657 fprintf ((FILE), " .short 0x00cd\n"); \
|
|
|
658 fprintf ((FILE), " .short 0x1e00\n"); \
|
|
|
659 fprintf ((FILE), " .long 0\n"); \
|
|
|
660 fprintf ((FILE), " .long 0\n"); \
|
|
|
661 }
|
|
|
662
|
|
|
663 /* Length in units of the trampoline for entering a nested function. */
|
|
|
664 #define TRAMPOLINE_SIZE 12
|
|
|
665
|
|
|
666 /* Alignment required for a trampoline in bits. */
|
|
|
667 #define TRAMPOLINE_ALIGNMENT 32
|
|
|
668
|
|
|
669 /* Emit RTL insns to initialize the variable parts of a trampoline.
|
|
|
670 FNADDR is an RTX for the address of the function's pure code.
|
|
|
671 CXT is an RTX for the static chain value for the function. */
|
|
|
672 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
|
|
|
673 { \
|
|
|
674 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
|
|
|
675 (CXT)); \
|
|
|
676 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
|
|
|
677 (FNADDR)); \
|
|
|
678 }
|
|
|
679
|
|
|
680 /* Macros to check register numbers against specific register classes. */
|
|
|
681
|
|
|
682 /* These assume that REGNO is a hard or pseudo reg number.
|
|
|
683 They give nonzero only if REGNO is a hard reg of the suitable class
|
|
|
684 or a pseudo reg currently allocated to a suitable hard reg.
|
|
|
685 Since they use reg_renumber, they are safe only once reg_renumber
|
|
|
686 has been allocated, which happens in local-alloc.c. */
|
|
|
687 #define REGNO_OK_FOR_BASE_P(REGNO) \
|
|
|
688 ((REGNO) < AP_REG || (unsigned) reg_renumber[(REGNO)] < AP_REG)
|
|
|
689
|
|
|
690 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
|
|
|
691
|
|
|
692 /* Maximum number of registers that can appear in a valid memory
|
|
|
693 address. */
|
|
|
694 #define MAX_REGS_PER_ADDRESS 1
|
|
|
695
|
|
|
696 /* Recognize any constant value that is a valid address. */
|
|
|
697 #define CONSTANT_ADDRESS_P(X) (GET_CODE (X) == LABEL_REF)
|
|
|
698
|
|
|
699 /* Nonzero if the constant value X is a legitimate general operand.
|
|
|
700 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
|
|
|
701
|
|
|
702 On the MCore, allow anything but a double. */
|
|
|
703 #define LEGITIMATE_CONSTANT_P(X) (GET_CODE(X) != CONST_DOUBLE \
|
|
|
704 && CONSTANT_P (X))
|
|
|
705
|
|
|
706 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
|
|
|
707 and check its validity for a certain class.
|
|
|
708 We have two alternate definitions for each of them.
|
|
|
709 The usual definition accepts all pseudo regs; the other rejects
|
|
|
710 them unless they have been allocated suitable hard regs.
|
|
|
711 The symbol REG_OK_STRICT causes the latter definition to be used. */
|
|
|
712 #ifndef REG_OK_STRICT
|
|
|
713
|
|
|
714 /* Nonzero if X is a hard reg that can be used as a base reg
|
|
|
715 or if it is a pseudo reg. */
|
|
|
716 #define REG_OK_FOR_BASE_P(X) \
|
|
|
717 (REGNO (X) <= 16 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
|
|
|
718
|
|
|
719 /* Nonzero if X is a hard reg that can be used as an index
|
|
|
720 or if it is a pseudo reg. */
|
|
|
721 #define REG_OK_FOR_INDEX_P(X) 0
|
|
|
722
|
|
|
723 #else
|
|
|
724
|
|
|
725 /* Nonzero if X is a hard reg that can be used as a base reg. */
|
|
|
726 #define REG_OK_FOR_BASE_P(X) \
|
|
|
727 REGNO_OK_FOR_BASE_P (REGNO (X))
|
|
|
728
|
|
|
729 /* Nonzero if X is a hard reg that can be used as an index. */
|
|
|
730 #define REG_OK_FOR_INDEX_P(X) 0
|
|
|
731
|
|
|
732 #endif
|
|
|
733 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
|
|
|
734 that is a valid memory address for an instruction.
|
|
|
735 The MODE argument is the machine mode for the MEM expression
|
|
|
736 that wants to use this address.
|
|
|
737
|
|
|
738 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
|
|
|
739 #define BASE_REGISTER_RTX_P(X) \
|
|
|
740 (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))
|
|
|
741
|
|
|
742 #define INDEX_REGISTER_RTX_P(X) \
|
|
|
743 (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
|
|
|
744
|
|
|
745
|
|
|
746 /* Jump to LABEL if X is a valid address RTX. This must also take
|
|
|
747 REG_OK_STRICT into account when deciding about valid registers, but it uses
|
|
|
748 the above macros so we are in luck.
|
|
|
749
|
|
|
750 Allow REG
|
|
|
751 REG+disp
|
|
|
752
|
|
|
753 A legitimate index for a QI is 0..15, for HI is 0..30, for SI is 0..60,
|
|
|
754 and for DI is 0..56 because we use two SI loads, etc. */
|
|
|
755 #define GO_IF_LEGITIMATE_INDEX(MODE, REGNO, OP, LABEL) \
|
|
|
756 do \
|
|
|
757 { \
|
|
|
758 if (GET_CODE (OP) == CONST_INT) \
|
|
|
759 { \
|
|
|
760 if (GET_MODE_SIZE (MODE) >= 4 \
|
|
|
761 && (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 4) == 0 \
|
|
|
762 && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 64 - GET_MODE_SIZE (MODE)) \
|
|
|
763 goto LABEL; \
|
|
|
764 if (GET_MODE_SIZE (MODE) == 2 \
|
|
|
765 && (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 2) == 0 \
|
|
|
766 && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 30) \
|
|
|
767 goto LABEL; \
|
|
|
768 if (GET_MODE_SIZE (MODE) == 1 \
|
|
|
769 && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 15) \
|
|
|
770 goto LABEL; \
|
|
|
771 } \
|
|
|
772 } \
|
|
|
773 while (0)
|
|
|
774
|
|
|
775 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
|
|
|
776 { \
|
|
|
777 if (BASE_REGISTER_RTX_P (X)) \
|
|
|
778 goto LABEL; \
|
|
|
779 else if (GET_CODE (X) == PLUS || GET_CODE (X) == LO_SUM) \
|
|
|
780 { \
|
|
|
781 rtx xop0 = XEXP (X,0); \
|
|
|
782 rtx xop1 = XEXP (X,1); \
|
|
|
783 if (BASE_REGISTER_RTX_P (xop0)) \
|
|
|
784 GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop0), xop1, LABEL); \
|
|
|
785 if (BASE_REGISTER_RTX_P (xop1)) \
|
|
|
786 GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop1), xop0, LABEL); \
|
|
|
787 } \
|
|
|
788 }
|
|
|
789
|
|
|
790 /* Go to LABEL if ADDR (a legitimate address expression)
|
|
|
791 has an effect that depends on the machine mode it is used for. */
|
|
|
792 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
|
|
|
793
|
|
|
794 /* Specify the machine mode that this machine uses
|
|
|
795 for the index in the tablejump instruction. */
|
|
|
796 #define CASE_VECTOR_MODE SImode
|
|
|
797
|
|
|
798 /* 'char' is signed by default. */
|
|
|
799 #define DEFAULT_SIGNED_CHAR 0
|
|
|
800
|
|
|
801 /* The type of size_t unsigned int. */
|
|
|
802 #define SIZE_TYPE "unsigned int"
|
|
|
803
|
|
|
804 /* Max number of bytes we can move from memory to memory
|
|
|
805 in one reasonably fast instruction. */
|
|
|
806 #define MOVE_MAX 4
|
|
|
807
|
|
|
808 /* Define if operations between registers always perform the operation
|
|
|
809 on the full register even if a narrower mode is specified. */
|
|
|
810 #define WORD_REGISTER_OPERATIONS
|
|
|
811
|
|
|
812 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
|
|
|
813 will either zero-extend or sign-extend. The value of this macro should
|
|
|
814 be the code that says which one of the two operations is implicitly
|
|
|
815 done, UNKNOWN if none. */
|
|
|
816 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
|
|
|
817
|
|
|
818 /* Nonzero if access to memory by bytes is slow and undesirable. */
|
|
|
819 #define SLOW_BYTE_ACCESS TARGET_SLOW_BYTES
|
|
|
820
|
|
|
821 /* Shift counts are truncated to 6-bits (0 to 63) instead of the expected
|
|
|
822 5-bits, so we can not define SHIFT_COUNT_TRUNCATED to true for this
|
|
|
823 target. */
|
|
|
824 #define SHIFT_COUNT_TRUNCATED 0
|
|
|
825
|
|
|
826 /* All integers have the same format so truncation is easy. */
|
|
|
827 #define TRULY_NOOP_TRUNCATION(OUTPREC,INPREC) 1
|
|
|
828
|
|
|
829 /* Define this if addresses of constant functions
|
|
|
830 shouldn't be put through pseudo regs where they can be cse'd.
|
|
|
831 Desirable on machines where ordinary constants are expensive
|
|
|
832 but a CALL with constant address is cheap. */
|
|
|
833 /* Why is this defined??? -- dac */
|
|
|
834 #define NO_FUNCTION_CSE 1
|
|
|
835
|
|
|
836 /* The machine modes of pointers and functions. */
|
|
|
837 #define Pmode SImode
|
|
|
838 #define FUNCTION_MODE Pmode
|
|
|
839
|
|
|
840 /* Compute extra cost of moving data between one register class
|
|
|
841 and another. All register moves are cheap. */
|
|
|
842 #define REGISTER_MOVE_COST(MODE, SRCCLASS, DSTCLASS) 2
|
|
|
843
|
|
|
844 #define WORD_REGISTER_OPERATIONS
|
|
|
845
|
|
|
846 /* Assembler output control. */
|
|
|
847 #define ASM_COMMENT_START "\t//"
|
|
|
848
|
|
|
849 #define ASM_APP_ON "// inline asm begin\n"
|
|
|
850 #define ASM_APP_OFF "// inline asm end\n"
|
|
|
851
|
|
|
852 #define FILE_ASM_OP "\t.file\n"
|
|
|
853
|
|
|
854 /* Switch to the text or data segment. */
|
|
|
855 #define TEXT_SECTION_ASM_OP "\t.text"
|
|
|
856 #define DATA_SECTION_ASM_OP "\t.data"
|
|
|
857
|
|
|
858 /* Switch into a generic section. */
|
|
|
859 #undef TARGET_ASM_NAMED_SECTION
|
|
|
860 #define TARGET_ASM_NAMED_SECTION mcore_asm_named_section
|
|
|
861
|
|
|
862 /* This is how to output an insn to push a register on the stack.
|
|
|
863 It need not be very fast code. */
|
|
|
864 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
|
|
|
865 fprintf (FILE, "\tsubi\t %s,%d\n\tstw\t %s,(%s)\n", \
|
|
|
866 reg_names[STACK_POINTER_REGNUM], \
|
|
|
867 (STACK_BOUNDARY / BITS_PER_UNIT), \
|
|
|
868 reg_names[REGNO], \
|
|
|
869 reg_names[STACK_POINTER_REGNUM])
|
|
|
870
|
|
|
871 /* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH. */
|
|
|
872 #define REG_PUSH_LENGTH 2
|
|
|
873
|
|
|
874 /* This is how to output an insn to pop a register from the stack. */
|
|
|
875 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
|
|
|
876 fprintf (FILE, "\tldw\t %s,(%s)\n\taddi\t %s,%d\n", \
|
|
|
877 reg_names[REGNO], \
|
|
|
878 reg_names[STACK_POINTER_REGNUM], \
|
|
|
879 reg_names[STACK_POINTER_REGNUM], \
|
|
|
880 (STACK_BOUNDARY / BITS_PER_UNIT))
|
|
|
881
|
|
|
882
|
|
|
883 /* Output a reference to a label. */
|
|
|
884 #undef ASM_OUTPUT_LABELREF
|
|
|
885 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
|
|
|
886 fprintf (STREAM, "%s%s", USER_LABEL_PREFIX, \
|
|
|
887 (* targetm.strip_name_encoding) (NAME))
|
|
|
888
|
|
|
889 /* This is how to output an assembler line
|
|
|
890 that says to advance the location counter
|
|
|
891 to a multiple of 2**LOG bytes. */
|
|
|
892 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
|
|
|
893 if ((LOG) != 0) \
|
|
|
894 fprintf (FILE, "\t.align\t%d\n", LOG)
|
|
|
895
|
|
|
896 #ifndef ASM_DECLARE_RESULT
|
|
|
897 #define ASM_DECLARE_RESULT(FILE, RESULT)
|
|
|
898 #endif
|
|
|
899
|
|
|
900 #define MULTIPLE_SYMBOL_SPACES 1
|
|
|
901
|
|
|
902 #define SUPPORTS_ONE_ONLY 1
|
|
|
903
|
|
|
904 /* A pair of macros to output things for the callgraph data.
|
|
|
905 VALUE means (to the tools that reads this info later):
|
|
|
906 0 a call from src to dst
|
|
|
907 1 the call is special (e.g. dst is "unknown" or "alloca")
|
|
|
908 2 the call is special (e.g., the src is a table instead of routine)
|
|
|
909
|
|
|
910 Frame sizes are augmented with timestamps to help later tools
|
|
|
911 differentiate between static entities with same names in different
|
|
|
912 files. */
|
|
|
913 extern long mcore_current_compilation_timestamp;
|
|
|
914 #define ASM_OUTPUT_CG_NODE(FILE,SRCNAME,VALUE) \
|
|
|
915 do \
|
|
|
916 { \
|
|
|
917 if (mcore_current_compilation_timestamp == 0) \
|
|
|
918 mcore_current_compilation_timestamp = time (0); \
|
|
|
919 fprintf ((FILE),"\t.equ\t__$frame$size$_%s_$_%08lx,%d\n", \
|
|
|
920 (SRCNAME), mcore_current_compilation_timestamp, (VALUE)); \
|
|
|
921 } \
|
|
|
922 while (0)
|
|
|
923
|
|
|
924 #define ASM_OUTPUT_CG_EDGE(FILE,SRCNAME,DSTNAME,VALUE) \
|
|
|
925 do \
|
|
|
926 { \
|
|
|
927 fprintf ((FILE),"\t.equ\t__$function$call$_%s_$_%s,%d\n", \
|
|
|
928 (SRCNAME), (DSTNAME), (VALUE)); \
|
|
|
929 } \
|
|
|
930 while (0)
|
|
|
931
|
|
|
932 /* Globalizing directive for a label. */
|
|
|
933 #define GLOBAL_ASM_OP "\t.export\t"
|
|
|
934
|
|
|
935 /* The prefix to add to user-visible assembler symbols. */
|
|
|
936 #undef USER_LABEL_PREFIX
|
|
|
937 #define USER_LABEL_PREFIX ""
|
|
|
938
|
|
|
939 /* Make an internal label into a string. */
|
|
|
940 #undef ASM_GENERATE_INTERNAL_LABEL
|
|
|
941 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
|
|
|
942 sprintf (STRING, "*.%s%ld", PREFIX, (long) NUM)
|
|
|
943
|
|
|
944 /* Jump tables must be 32 bit aligned. */
|
|
|
945 #undef ASM_OUTPUT_CASE_LABEL
|
|
|
946 #define ASM_OUTPUT_CASE_LABEL(STREAM,PREFIX,NUM,TABLE) \
|
|
|
947 fprintf (STREAM, "\t.align 2\n.%s%d:\n", PREFIX, NUM);
|
|
|
948
|
|
|
949 /* Output a relative address. Not needed since jump tables are absolute
|
|
|
950 but we must define it anyway. */
|
|
|
951 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,BODY,VALUE,REL) \
|
|
|
952 fputs ("- - - ASM_OUTPUT_ADDR_DIFF_ELT called!\n", STREAM)
|
|
|
953
|
|
|
954 /* Output an element of a dispatch table. */
|
|
|
955 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \
|
|
|
956 fprintf (STREAM, "\t.long\t.L%d\n", VALUE)
|
|
|
957
|
|
|
958 /* Output various types of constants. */
|
|
|
959
|
|
|
960 /* This is how to output an assembler line
|
|
|
961 that says to advance the location counter by SIZE bytes. */
|
|
|
962 #undef ASM_OUTPUT_SKIP
|
|
|
963 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
|
|
|
964 fprintf (FILE, "\t.fill %d, 1\n", (int)(SIZE))
|
|
|
965
|
|
|
966 /* This says how to output an assembler line
|
|
|
967 to define a global common symbol, with alignment information. */
|
|
|
968 /* XXX - for now we ignore the alignment. */
|
|
|
969 #undef ASM_OUTPUT_ALIGNED_COMMON
|
|
|
970 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
|
|
|
971 do \
|
|
|
972 { \
|
|
|
973 if (mcore_dllexport_name_p (NAME)) \
|
|
|
974 MCORE_EXPORT_NAME (FILE, NAME) \
|
|
|
975 if (! mcore_dllimport_name_p (NAME)) \
|
|
|
976 { \
|
|
|
977 fputs ("\t.comm\t", FILE); \
|
|
|
978 assemble_name (FILE, NAME); \
|
|
|
979 fprintf (FILE, ",%lu\n", (unsigned long)(SIZE)); \
|
|
|
980 } \
|
|
|
981 } \
|
|
|
982 while (0)
|
|
|
983
|
|
|
984 /* This says how to output an assembler line
|
|
|
985 to define a local common symbol.... */
|
|
|
986 #undef ASM_OUTPUT_LOCAL
|
|
|
987 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
|
|
|
988 (fputs ("\t.lcomm\t", FILE), \
|
|
|
989 assemble_name (FILE, NAME), \
|
|
|
990 fprintf (FILE, ",%d\n", (int)SIZE))
|
|
|
991
|
|
|
992 /* ... and how to define a local common symbol whose alignment
|
|
|
993 we wish to specify. ALIGN comes in as bits, we have to turn
|
|
|
994 it into bytes. */
|
|
|
995 #undef ASM_OUTPUT_ALIGNED_LOCAL
|
|
|
996 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
|
|
|
997 do \
|
|
|
998 { \
|
|
|
999 fputs ("\t.bss\t", (FILE)); \
|
|
|
1000 assemble_name ((FILE), (NAME)); \
|
|
|
1001 fprintf ((FILE), ",%d,%d\n", (int)(SIZE), (ALIGN) / BITS_PER_UNIT);\
|
|
|
1002 } \
|
|
|
1003 while (0)
|
|
|
1004
|
|
|
1005 /* Print operand X (an rtx) in assembler syntax to file FILE.
|
|
|
1006 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
|
|
|
1007 For `%' followed by punctuation, CODE is the punctuation and X is null. */
|
|
|
1008 #define PRINT_OPERAND(STREAM, X, CODE) mcore_print_operand (STREAM, X, CODE)
|
|
|
1009
|
|
|
1010 /* Print a memory address as an operand to reference that memory location. */
|
|
|
1011 #define PRINT_OPERAND_ADDRESS(STREAM,X) mcore_print_operand_address (STREAM, X)
|
|
|
1012
|
|
|
1013 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
|
|
|
1014 ((CHAR)=='.' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^' || (CHAR) == '!')
|
|
|
1015
|
|
|
1016 #endif /* ! GCC_MCORE_H */
|
