Mercurial > hg > CbC > CbC_gcc

annotate gcc/config/mips/5400.md @ 0:a06113de4d67

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first commit
author kent <kent@cr.ie.u-ryukyu.ac.jp>
date Fri, 17 Jul 2009 14:47:48 +0900
parents
children 77e2b8dfacca
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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diff changeset
1 ;; DFA-based pipeline description for 5400
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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2 (define_automaton "vr54")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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3 (define_cpu_unit "vr54_dp0" "vr54")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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4 (define_cpu_unit "vr54_dp1" "vr54")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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5 (define_cpu_unit "vr54_mem" "vr54")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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6 (define_cpu_unit "vr54_mac" "vr54")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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7
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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8 ;;
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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9 ;; The ordering of the instruction-execution-path/resource-usage
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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10 ;; descriptions (also known as reservation RTL) is roughly ordered
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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11 ;; based on the define attribute RTL for the "type" classification.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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12 ;; When modifying, remember that the first test that matches is the
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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13 ;; reservation used!
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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14 ;;
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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15
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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16 (define_insn_reservation "ir_vr54_unknown" 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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17 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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18 (eq_attr "type" "unknown"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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19 "vr54_dp0+vr54_dp1+vr54_mem+vr54_mac")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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20
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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21 ;; Assume prediction fails.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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22 (define_insn_reservation "ir_vr54_branch" 3
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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23 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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24 (eq_attr "type" "branch,jump,call"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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25 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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26
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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27 (define_insn_reservation "ir_vr54_load" 2
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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28 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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29 (eq_attr "type" "load,fpload,fpidxload"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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30 "vr54_mem")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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31
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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32 (define_insn_reservation "ir_vr54_store" 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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33 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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34 (eq_attr "type" "store"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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35 "vr54_mem")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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36
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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37 (define_insn_reservation "ir_vr54_fstore" 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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38 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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39 (eq_attr "type" "fpstore,fpidxstore"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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40 "vr54_mem")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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41
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42
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43 ;; This reservation is for conditional move based on integer
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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44 ;; or floating point CC.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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45 (define_insn_reservation "ir_vr54_condmove" 4
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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46 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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47 (eq_attr "type" "condmove"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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48 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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49
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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50 ;; Move to/from FPU registers
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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51 (define_insn_reservation "ir_vr54_xfer" 2
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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52 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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53 (eq_attr "type" "mfc,mtc"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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54 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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55
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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56 (define_insn_reservation "ir_vr54_hilo" 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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57 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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58 (eq_attr "type" "mthilo,mfhilo"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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59 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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60
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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61 (define_insn_reservation "ir_vr54_arith" 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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62 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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63 (eq_attr "type" "arith,shift,signext,slt,clz,const,logical,move,nop,trap"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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64 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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65
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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66 (define_insn_reservation "ir_vr54_imul_si" 3
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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67 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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68 (and (eq_attr "type" "imul,imul3")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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69 (eq_attr "mode" "SI")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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70 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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71
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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72 (define_insn_reservation "ir_vr54_imul_di" 4
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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73 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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74 (and (eq_attr "type" "imul,imul3")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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75 (eq_attr "mode" "DI")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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76 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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77
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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78 (define_insn_reservation "ir_vr54_imadd_si" 3
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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79 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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80 (eq_attr "type" "imul,imul3"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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81 "vr54_mac")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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82
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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83 (define_insn_reservation "ir_vr54_idiv_si" 42
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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84 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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85 (and (eq_attr "type" "idiv")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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86 (eq_attr "mode" "SI")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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87 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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88
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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89 (define_insn_reservation "ir_vr54_idiv_di" 74
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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90 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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91 (and (eq_attr "type" "idiv")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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92 (eq_attr "mode" "DI")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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93 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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94
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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95 (define_insn_reservation "ir_vr54_fadd" 4
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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96 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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97 (eq_attr "type" "fadd"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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98 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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99
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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100 (define_insn_reservation "ir_vr54_fmul_sf" 5
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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101 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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102 (and (eq_attr "type" "fmul")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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103 (eq_attr "mode" "SF")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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104 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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105
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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106 (define_insn_reservation "ir_vr54_fmul_df" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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107 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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108 (and (eq_attr "type" "fmul")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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109 (eq_attr "mode" "DF")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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110 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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111
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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112 (define_insn_reservation "ir_vr54_fmadd_sf" 9
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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113 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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114 (and (eq_attr "type" "fmadd")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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115 (eq_attr "mode" "SF")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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116 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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117
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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118 (define_insn_reservation "ir_vr54_fmadd_df" 10
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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119 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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120 (and (eq_attr "type" "fmadd")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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121 (eq_attr "mode" "DF")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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122 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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123
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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124 (define_insn_reservation "ir_vr54_fdiv_sf" 42
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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125 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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126 (and (eq_attr "type" "fdiv,frdiv,fsqrt")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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127 (eq_attr "mode" "SF")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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128 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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129
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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130 (define_insn_reservation "ir_vr54_fdiv_df" 72
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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131 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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132 (and (eq_attr "type" "fdiv,frdiv,fsqrt")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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133 (eq_attr "mode" "DF")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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134 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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135
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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136 (define_insn_reservation "ir_vr54_fabs" 2
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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137 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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138 (eq_attr "type" "fabs,fneg,fmove"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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139 "vr54_dp0|vr54_dp1")
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140
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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141 (define_insn_reservation "ir_vr54_fcmp" 2
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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142 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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143 (eq_attr "type" "fcmp"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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144 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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145
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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146 (define_insn_reservation "ir_vr54_fcvt" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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147 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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148 (eq_attr "type" "fcvt"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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149 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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150
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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151 (define_insn_reservation "ir_vr54_frsqrt_sf" 61
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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152 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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153 (and (eq_attr "type" "frsqrt")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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154 (eq_attr "mode" "SF")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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155 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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156
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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157 (define_insn_reservation "ir_vr54_frsqrt_df" 121
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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158 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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159 (and (eq_attr "type" "frsqrt")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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160 (eq_attr "mode" "DF")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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161 "vr54_dp0|vr54_dp1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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162
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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163 (define_insn_reservation "ir_vr54_multi" 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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164 (and (eq_attr "cpu" "r5400")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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165 (eq_attr "type" "multi"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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166 "vr54_dp0+vr54_dp1+vr54_mem+vr54_mac")