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1 /* Definitions of target machine for GNU compiler.
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2 MIPS SDE version, for use with the SDE C library rather than newlib.
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3 Copyright (C) 2007, 2008
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4 Free Software Foundation, Inc.
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5
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6 This file is part of GCC.
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7
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8 GCC is free software; you can redistribute it and/or modify
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9 it under the terms of the GNU General Public License as published by
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10 the Free Software Foundation; either version 3, or (at your option)
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11 any later version.
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12
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13 GCC is distributed in the hope that it will be useful,
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14 but WITHOUT ANY WARRANTY; without even the implied warranty of
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15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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16 GNU General Public License for more details.
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17
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18 You should have received a copy of the GNU General Public License
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19 along with GCC; see the file COPYING3. If not see
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20 <http://www.gnu.org/licenses/>. */
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21
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22 #define TARGET_OS_CPP_BUILTINS() \
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23 do \
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24 { \
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25 builtin_assert ("system=sde"); \
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26 builtin_assert ("system=posix"); \
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27 builtin_define ("__SDE_MIPS__"); \
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28 \
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29 /* Deprecated: use __mips_isa_rev >= 2. */ \
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30 if (ISA_MIPS32R2) \
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31 builtin_define ("__mipsr2"); \
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32 \
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33 /* Deprecated: use __mips_fpr == 64. */ \
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34 if (TARGET_FLOAT64) \
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35 builtin_define ("__mipsfp64"); \
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36 \
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37 if (TARGET_NO_FLOAT) \
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38 { \
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39 builtin_define ("__NO_FLOAT"); \
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40 builtin_define ("__mips_no_float"); \
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41 } \
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42 else if (TARGET_SOFT_FLOAT_ABI) \
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43 builtin_define ("__SOFT_FLOAT"); \
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44 else if (TARGET_SINGLE_FLOAT) \
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45 builtin_define ("__SINGLE_FLOAT"); \
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46 \
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47 if (TARGET_BIG_ENDIAN) \
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48 { \
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49 builtin_assert ("endian=big"); \
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50 builtin_assert ("cpu=mipseb"); \
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51 } \
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52 else \
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53 { \
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54 builtin_assert ("endian=little"); \
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55 builtin_assert ("cpu=mipsel"); \
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56 } \
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57 } \
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58 while (0)
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59
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60 #undef SUBTARGET_OVERRIDE_OPTIONS
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61 #define SUBTARGET_OVERRIDE_OPTIONS \
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62 do \
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63 { \
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64 if (TARGET_NO_FLOAT) \
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65 { \
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66 target_flags |= MASK_SOFT_FLOAT_ABI; \
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67 target_flags_explicit |= MASK_SOFT_FLOAT_ABI; \
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68 } \
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69 } \
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70 while (0)
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71
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72 /* For __clear_cache in libgcc2.c. */
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73 #ifdef IN_LIBGCC2
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74 extern void mips_sync_icache (void *beg, unsigned long len);
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75 #undef CLEAR_INSN_CACHE
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76 #define CLEAR_INSN_CACHE(beg, end) \
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77 mips_sync_icache (beg, end - beg)
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78 #endif
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79
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80 /* For mips_cache_flush_func in mips.opt. */
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81 #undef CACHE_FLUSH_FUNC
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82 #define CACHE_FLUSH_FUNC "mips_sync_icache"
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83
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84 /* For inline code which needs to sync the icache and dcache,
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85 noting that the SDE library takes arguments (address, size). */
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86 #undef MIPS_ICACHE_SYNC
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87 #define MIPS_ICACHE_SYNC(ADDR, SIZE) \
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88 emit_library_call (gen_rtx_SYMBOL_REF (Pmode, mips_cache_flush_func), \
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89 0, VOIDmode, 2, ADDR, Pmode, \
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90 SIZE, TYPE_MODE (sizetype))
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91
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92 /* This version of _mcount does not pop 2 words from the stack. */
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93 #undef FUNCTION_PROFILER
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94 #define FUNCTION_PROFILER(FILE, LABELNO) \
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95 { \
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96 fprintf (FILE, "\t.set\tnoat\n"); \
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97 /* _mcount treats $2 as the static chain register. */ \
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98 if (cfun->static_chain_decl != NULL) \
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99 fprintf (FILE, "\tmove\t%s,%s\n", reg_names[2], \
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100 reg_names[STATIC_CHAIN_REGNUM]); \
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101 /* MIPS16 code passes saved $ra in $v1 instead of $at. */ \
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102 fprintf (FILE, "\tmove\t%s,%s\n", \
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103 reg_names[GP_REG_FIRST + (TARGET_MIPS16 ? 3 : 1)], \
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104 reg_names[GP_REG_FIRST + 31]); \
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105 fprintf (FILE, "\tjal\t_mcount\n"); \
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106 fprintf (FILE, "\t.set\tat\n"); \
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107 /* _mcount treats $2 as the static chain register. */ \
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108 if (cfun->static_chain_decl != NULL) \
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109 fprintf (FILE, "\tmove\t%s,%s\n", reg_names[STATIC_CHAIN_REGNUM], \
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110 reg_names[2]); \
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111 }
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112
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113 /* ...nor does the call sequence preserve $31. */
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114 #undef MIPS_SAVE_REG_FOR_PROFILING_P
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115 #define MIPS_SAVE_REG_FOR_PROFILING_P(REGNO) ((REGNO) == GP_REG_FIRST + 31)
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