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1 /* Copyright (C) 2005, 2007 Free Software Foundation, Inc.
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2 Contributed by Sunnorth
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3
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4 This file is part of GCC.
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5
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6 GCC is free software; you can redistribute it and/or modify it
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7 under the terms of the GNU General Public License as published
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8 by the Free Software Foundation; either version 3, or (at your
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9 option) any later version.
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10
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11 GCC is distributed in the hope that it will be useful, but WITHOUT
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12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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14 License for more details.
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15
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16 You should have received a copy of the GNU General Public License
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17 along with GCC; see the file COPYING3. If not see
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18 <http://www.gnu.org/licenses/>. */
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19
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20 #define ra r3
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21 #define a0 r4
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22 #define a1 r5
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23 #define a2 r6
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24 #define a3 r7
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25 #define v0 r23
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26
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27 #define t0 r8
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28 #define t1 r9
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29 #define t2 r10
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30 #define t3 r11
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31 #define t4 r22
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32
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33 #ifndef __pic__
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34 #if !defined(L_mulsi3) && !defined(L_divsi3)
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35 .text
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36 .global _flush_cache
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37 #ifdef __score3__
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38 _flush_cache:
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39 br r3
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40 #else
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41 _flush_cache:
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42 srli r9, r5, 4
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43 mv r8, r4
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44 mtsr r9, sr0
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45 1:
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46 cache 0xe, [r8, 0] # write back invalid dcache
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47 addi r8, 16
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48 bcnz 1b
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49 mfcr r8, cr4
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50 bittst! r8, 0x3 # if LDM is enable, write back LDM
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51 beq! 6f
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52 ldi r10, 0
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53 cache 0xc, [r10, 0]
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54 6:
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55 bittst! r8, 0x2 # if LIM is enable, refill it
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56 beq! 7f
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57 cache 0x4, [r10, 0]
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58 7:
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59 #nop!
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60 #nop!
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61 #nop!
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62 #nop!
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63 #nop!
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64 mv r8, r4
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65 mtsr r9, sr0
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66 2:
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67 cache 0x2, [r8, 0] # invalid unlock icache
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68 #nop!
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69 #nop!
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70 #nop!
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71 #nop!
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72 #nop!
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73 addi r8, 16
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74 bcnz 2b
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75 br r3
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76 #endif
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77 #endif
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78
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79 /* FUNCTION
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80 (U) INT32 v0 = __mulsi3 ((U) INT32 a0, (U) INT32 a1);
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81 REGISTERS:
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82 use t0
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83 modify a0
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84 a1 -> become 0
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85 NOTE:
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86 this seems to give better performance to just rotate and add. */
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87
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88 #ifdef L_mulsi3
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89 .text
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90 .global __umulsi3
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91 .global __mulsi3
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92 /* signed multiplication (32x32) */
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93 .ent __mulsi3
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94 __umulsi3:
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95 __mulsi3:
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96 li t1, 0
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97 __mulsi3_loop:
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98 andri.c t0, a1, 1 # t0 = multiplier[0]
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99 srli a1, a1, 1 # a1 /= 2
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100 beq __mulsi3_loop2 # skip if (t0 == 0)
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101 add t1, t1, a0 # add multiplicand
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102 __mulsi3_loop2:
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103 slli a0, a0, 1 # multiplicand mul 2
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104 cmpi.c a1, 0
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105 bne __mulsi3_loop
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106 mv r4, t1
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107 br ra
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108 .end __mulsi3
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109 #endif /* L_mulsi3 */
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110
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111 /* FUNCTION
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112 UINT32 (v0) = __udivsi3 (UINT32 (a0), UINT32 (a1));
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113 INT32 (v0) = __divsi3 (INT32 (a0), INT32 (a1));
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114 UINT32 (v0) = __umodsi3 (UINT32 (a0), UINT32 (a1));
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115 INT32 (v0) = __modsi3 (INT32 (a0), INT32 (a1));
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116 DESCRIPTION
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117 performs 32-bit division/modulo.
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118 REGISTERS
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119 used t0 bit-index
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120 t1
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121 modify a0 becomes remainer */
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122 #ifdef L_divsi3
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123 .text
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124 .global __udivsi3
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125 .global __umodsi3
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126 .global __divsi3
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127 .global __modsi3
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128
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129 /* unsigned division */
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130 .ent __udivsi3
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131 __udivsi3:
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132 li t4, 0
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133 cmpi.c a1, 0
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134 beq __uds_exit
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135 li t0, 1
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136 blt __uds_ok
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137 __uds_normalize:
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138 cmp.c a0, a1
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139 bcc __uds_ok
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140 slli a1, a1, 1
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141 slli t0, t0, 1
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142 cmpi.c a1, 0
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143 bge __uds_normalize
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144 __uds_ok:
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145 __uds_loop2:
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146 cmp.c a0, a1
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147 bcc __uds_loop3
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148 sub a0, a0, a1
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149 or t4, t4, t0
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150 __uds_loop3:
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151 srli t0, t0, 1
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152 srli a1, a1, 1
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153 cmpi.c t0, 0
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154 bne __uds_loop2
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155 __uds_exit:
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156 mv a1, a0
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157 mv r4, t4
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158 br ra
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159 .end __udivsi3
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160
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161 /* unsigned modulus */
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162 .ent __umodsi3
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163 __umodsi3:
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164 mv t3, ra
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165 jl __udivsi3
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166 mv r4, a1
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167 br t3
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168 .end __umodsi3
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169
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170 /* abs and div */
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171 .ent __orgsi3
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172 __orgsi3:
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173 cmpi.c a0, 0
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174 bge __orgsi3_a0p
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175 neg a0, a0
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176 __orgsi3_a0p:
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177 cmpi.c a1, 0
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178 bge __udivsi3
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179 neg a1, a1
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180 b __udivsi3 # goto udivsi3
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181 .end __orgsi3
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182
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183 /* signed division */
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184 .ent __divsi3
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185 __divsi3:
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186 mv t3, ra
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187 xor t2, a0, a1
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188 jl __orgsi3
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189 __divsi3_adjust:
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190 cmpi.c t2, 0
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191 bge __divsi3_exit
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192 neg r4, r4
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193 __divsi3_exit:
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194 br t3
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195 .end __divsi3
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196
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197 /* signed modulus */
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198 .ent __modsi3
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199 __modsi3:
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200 mv t3, ra
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201 mv t2, a0
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202 jl __orgsi3
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203 mv r4, a1
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204 b __divsi3_adjust
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205 .end __modsi3
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206
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207 #endif /* L_divsi3 */
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208 #else /* -fPIC */
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209 #if !defined(L_mulsi3) && !defined(L_divsi3)
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210 .set pic
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211 .text
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212 .global _flush_cache
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213 #ifdef __score3__
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214 _flush_cache:
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215 br r3
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216 #else
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217 _flush_cache:
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218 addi r0, -8 # pic used
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219 .cpload r29 # pic used
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220 srli r9, r5, 4
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221 mv r8, r4
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222 mtsr r9, sr0
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223 1:
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224 cache 0xe, [r8, 0] # write back invalid dcache
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225 addi r8, 16
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226 bcnz 1b
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227 mfcr r8, cr4
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228 bittst! r8, 0x3 # if LDM is enable, write back LDM
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229 beq! 6f
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230 ldi r10, 0
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231 cache 0xc, [r10, 0]
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232 6:
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233 bittst! r8, 0x2 # if LIM is enable, refill it
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234 beq! 7f
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235 cache 0x4, [r10, 0]
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236 7:
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237 #nop!
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238 #nop!
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239 #nop!
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240 #nop!
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241 #nop!
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242 mv r8, r4
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243 mtsr r9, sr0
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244 2:
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245 cache 0x2, [r8, 0] # invalid unlock icache
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246 #nop!
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247 #nop!
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248 #nop!
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249 #nop!
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250 #nop!
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251 addi r8, 16
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252 bcnz 2b
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253 .cprestore r0, 12 # pic used
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254 addi r0, 8 # pic used
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255 br r3
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256 #endif
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257 #endif
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258
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259 /* FUNCTION
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260 (U) INT32 v0 = __mulsi3 ((U) INT32 a0, (U) INT32 a1);
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261 REGISTERS:
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262 use t0
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263 modify a0
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264 a1 -> become 0
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265 NOTE:
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266 this seems to give better performance to just rotate and add. */
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267
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268 #ifdef L_mulsi3
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269 .set pic
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270 .text
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271 .global __umulsi3
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272 .global __mulsi3
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273 /* signed multiplication (32x32) */
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274 .ent __mulsi3
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275 __umulsi3:
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276 __mulsi3:
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277 addi r0, -8 # pic used
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278 .cpload r29 # pic used
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279 li t1, 0
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280 __mulsi3_loop:
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281 andri.c t0, a1, 1 # t0 = multiplier[0]
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282 srli a1, a1, 1 # a1 /= 2
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283 beq __mulsi3_loop2 # skip if (t0 == 0)
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284 add t1, t1, a0 # add multiplicand
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285 __mulsi3_loop2:
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286 slli a0, a0, 1 # multiplicand mul 2
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287 cmpi.c a1, 0
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288 bne __mulsi3_loop
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289 mv r4, t1
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290 .cprestore r0, 12 # pic used
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291 addi r0, 8 # pic used
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292 br ra
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293 .end __mulsi3
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294 #endif /* L_mulsi3 */
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295
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296 /* FUNCTION
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297 UINT32 (v0) = __udivsi3 (UINT32 (a0), UINT32 (a1));
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298 INT32 (v0) = __divsi3 (INT32 (a0), INT32 (a1));
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299 UINT32 (v0) = __umodsi3 (UINT32 (a0), UINT32 (a1));
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300 INT32 (v0) = __modsi3 (INT32 (a0), INT32 (a1));
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301 DESCRIPTION
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302 performs 32-bit division/modulo.
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303 REGISTERS
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304 used t0 bit-index
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305 t1
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306 modify a0 becomes remainer */
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307 #ifdef L_divsi3
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308 .set pic
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309 .text
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310 .global __udivsi3
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311 .global __umodsi3
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312 .global __divsi3
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313 .global __modsi3
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314
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315 /* unsigned division */
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316 .ent __udivsi3
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317 __udivsi3:
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318 addi r0, -8 # pic used
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319 .cpload r29 # pic used
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320 li t4, 0
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321 cmpi.c a1, 0
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322 beq __uds_exit
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323 li t0, 1
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324 blt __uds_ok
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325 __uds_normalize:
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326 cmp.c a0, a1
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327 bcc __uds_ok
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328 slli a1, a1, 1
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329 slli t0, t0, 1
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330 cmpi.c a1, 0
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331 bge __uds_normalize
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332 __uds_ok:
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333 __uds_loop2:
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334 cmp.c a0, a1
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335 bcc __uds_loop3
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336 sub a0, a0, a1
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337 or t4, t4, t0
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338 __uds_loop3:
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339 srli t0, t0, 1
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340 srli a1, a1, 1
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341 cmpi.c t0, 0
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342 bne __uds_loop2
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343 __uds_exit:
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344 mv a1, a0
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345 mv r4, t4
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346 .cprestore r0, 12 # pic used
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347 addi r0, 8 # pic used
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348 br ra
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349 .end __udivsi3
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350
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351 /* unsigned modulus */
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352 .ent __umodsi3
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353 __umodsi3:
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354 addi r0, -8 # pic used
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355 .cpload r29 # pic used
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356 li t1, 0
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357 mv t3, ra
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358 la r29, __udivsi3
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359 brl r29
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360 mv r4, a1
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361 .cprestore r0, 12 # pic used
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362 addi r0, 8 # pic used
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363 br t3
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364 .end __umodsi3
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365
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366 /* abs and div */
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367 .ent __orgsi3
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368 __orgsi3:
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369 cmpi.c a0, 0
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370 bge __orgsi3_a0p
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371 neg a0, a0
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372 __orgsi3_a0p:
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373 cmpi.c a1, 0
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374 bge __udivsi3
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375 neg a1, a1
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376 b __udivsi3 # goto udivsi3
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377 .end __orgsi3
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378
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379 /* signed division */
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380 .ent __divsi3
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381 __divsi3:
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382 addi r0, -8 # pic used
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383 .cpload r29 # pic used
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384 mv t3, ra
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385 xor t2, a0, a1
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386 la r29, __orgsi3
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387 brl r29
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388 __divsi3_adjust:
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389 cmpi.c t2, 0
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390 bge __divsi3_exit
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391 neg r4, r4
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392 __divsi3_exit:
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393 .cprestore r0, 12 # pic used
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394 addi r0, 8 # pic used
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395 br t3
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396 .end __divsi3
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397
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398 /* signed modulus */
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399 .ent __modsi3
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400 __modsi3:
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401 addi r0, -8 # pic used
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402 .cpload r29 # pic used
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403 mv t3, ra
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404 mv t2, a0
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405 la r29, __orgsi3
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406 brl r29
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407 mv r4, a1
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408 b __divsi3_adjust
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409 .end __modsi3
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410
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411 #endif /*L_divsi3 */
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412 #endif
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