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1 /* DWARF2 EH unwinding support for SH Linux.
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2 Copyright (C) 2004, 2005, 2006, 2007, 2009 Free Software Foundation, Inc.
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3
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4 This file is part of GCC.
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5
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6 GCC is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 3, or (at your option)
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9 any later version.
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10
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11 GCC is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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15
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16 Under Section 7 of GPL version 3, you are granted additional
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17 permissions described in the GCC Runtime Library Exception, version
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18 3.1, as published by the Free Software Foundation.
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19
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20 You should have received a copy of the GNU General Public License and
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21 a copy of the GCC Runtime Library Exception along with this program;
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22 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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23 <http://www.gnu.org/licenses/>. */
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24
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25
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26 /* Do code reading to identify a signal frame, and set the frame
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27 state data appropriately. See unwind-dw2.c for the structs. */
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28
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29 #include <signal.h>
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30 #include <sys/ucontext.h>
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31 #include "insn-constants.h"
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32
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33 # if defined (__SH5__)
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34 #define SH_DWARF_FRAME_GP0 0
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35 #define SH_DWARF_FRAME_FP0 77
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36 #define SH_DWARF_FRAME_BT0 68
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37 #define SH_DWARF_FRAME_PR_MEDIA 18
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38 #define SH_DWARF_FRAME_SR 65
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39 #define SH_DWARF_FRAME_FPSCR 76
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40 #else
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41 #define SH_DWARF_FRAME_GP0 0
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42 #define SH_DWARF_FRAME_FP0 25
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43 #define SH_DWARF_FRAME_XD0 87
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44 #define SH_DWARF_FRAME_PR 17
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45 #define SH_DWARF_FRAME_GBR 18
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46 #define SH_DWARF_FRAME_MACH 20
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47 #define SH_DWARF_FRAME_MACL 21
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48 #define SH_DWARF_FRAME_PC 16
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49 #define SH_DWARF_FRAME_SR 22
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50 #define SH_DWARF_FRAME_FPUL 23
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51 #define SH_DWARF_FRAME_FPSCR 24
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52 #endif /* defined (__SH5__) */
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53
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54 #if defined (__SH5__)
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55
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56 #define MD_FALLBACK_FRAME_STATE_FOR shmedia_fallback_frame_state
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57
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58 static _Unwind_Reason_Code
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59 shmedia_fallback_frame_state (struct _Unwind_Context *context,
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60 _Unwind_FrameState *fs)
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61 {
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62 unsigned char *pc = context->ra;
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63 struct sigcontext *sc;
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64 long new_cfa;
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65 int i, r;
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66
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67 /* movi 0x10,r9; shori 0x77,r9; trapa r9; nop (sigreturn) */
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68 /* movi 0x10,r9; shori 0xad,r9; trapa r9; nop (rt_sigreturn) */
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69 if ((*(unsigned long *) (pc-1) == 0xcc004090)
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70 && (*(unsigned long *) (pc+3) == 0xc801dc90)
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71 && (*(unsigned long *) (pc+7) == 0x6c91fff0)
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72 && (*(unsigned long *) (pc+11) == 0x6ff0fff0))
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73 sc = context->cfa;
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74 else if ((*(unsigned long *) (pc-1) == 0xcc004090)
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75 && (*(unsigned long *) (pc+3) == 0xc802b490)
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76 && (*(unsigned long *) (pc+7) == 0x6c91fff0)
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77 && (*(unsigned long *) (pc+11) == 0x6ff0fff0))
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78 {
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79 struct rt_sigframe {
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80 struct siginfo *pinfo;
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81 void *puc;
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82 struct siginfo info;
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83 struct ucontext uc;
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84 } *rt_ = context->cfa;
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85 /* The void * cast is necessary to avoid an aliasing warning.
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86 The aliasing warning is correct, but should not be a problem
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87 because it does not alias anything. */
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88 sc = (struct sigcontext *) (void *) &rt_->uc.uc_mcontext;
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89 }
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90 else
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91 return _URC_END_OF_STACK;
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92
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93 new_cfa = sc->sc_regs[15];
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94 fs->regs.cfa_how = CFA_REG_OFFSET;
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95 fs->regs.cfa_reg = 15;
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96 fs->regs.cfa_offset = new_cfa - (long) context->cfa;
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97
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98 for (i = 0; i < 63; i++)
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99 {
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100 if (i == 15)
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101 continue;
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102
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103 fs->regs.reg[i].how = REG_SAVED_OFFSET;
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104 fs->regs.reg[i].loc.offset
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105 = (long)&(sc->sc_regs[i]) - new_cfa;
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106 }
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107
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108 fs->regs.reg[SH_DWARF_FRAME_SR].how = REG_SAVED_OFFSET;
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109 fs->regs.reg[SH_DWARF_FRAME_SR].loc.offset
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110 = (long)&(sc->sc_sr) - new_cfa;
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111
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112 r = SH_DWARF_FRAME_BT0;
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113 for (i = 0; i < 8; i++)
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114 {
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115 fs->regs.reg[r+i].how = REG_SAVED_OFFSET;
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116 fs->regs.reg[r+i].loc.offset
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117 = (long)&(sc->sc_tregs[i]) - new_cfa;
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118 }
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119
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120 r = SH_DWARF_FRAME_FP0;
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121 for (i = 0; i < 32; i++)
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122 {
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123 fs->regs.reg[r+i].how = REG_SAVED_OFFSET;
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124 fs->regs.reg[r+i].loc.offset
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125 = (long)&(sc->sc_fpregs[i]) - new_cfa;
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126 }
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127
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128 fs->regs.reg[SH_DWARF_FRAME_FPSCR].how = REG_SAVED_OFFSET;
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129 fs->regs.reg[SH_DWARF_FRAME_FPSCR].loc.offset
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130 = (long)&(sc->sc_fpscr) - new_cfa;
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131
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132 /* We use the slot for the zero register to save return address. */
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133 fs->regs.reg[63].how = REG_SAVED_OFFSET;
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134 fs->regs.reg[63].loc.offset
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135 = (long)&(sc->sc_pc) - new_cfa;
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136 fs->retaddr_column = 63;
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137 fs->signal_frame = 1;
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138 return _URC_NO_REASON;
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139 }
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140
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141 #else /* defined (__SH5__) */
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142
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143 #define MD_FALLBACK_FRAME_STATE_FOR sh_fallback_frame_state
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144
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145 static _Unwind_Reason_Code
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146 sh_fallback_frame_state (struct _Unwind_Context *context,
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147 _Unwind_FrameState *fs)
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148 {
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149 unsigned char *pc = context->ra;
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150 struct sigcontext *sc;
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151 long new_cfa;
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152 int i;
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153 #if defined (__SH3E__) || defined (__SH4__)
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154 int r;
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155 #endif
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156
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157 /* mov.w 1f,r3; trapa #0x10; 1: .short 0x77 (sigreturn) */
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158 /* mov.w 1f,r3; trapa #0x10; 1: .short 0xad (rt_sigreturn) */
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159 /* Newer kernel uses pad instructions to avoid an SH-4 core bug. */
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160 /* mov.w 1f,r3; trapa #0x10; or r0,r0; or r0,r0; or r0,r0; or r0,r0;
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161 or r0,r0; 1: .short 0x77 (sigreturn) */
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162 /* mov.w 1f,r3; trapa #0x10; or r0,r0; or r0,r0; or r0,r0; or r0,r0;
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163 or r0,r0; 1: .short 0xad (rt_sigreturn) */
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164 if (((*(unsigned short *) (pc+0) == 0x9300)
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165 && (*(unsigned short *) (pc+2) == 0xc310)
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166 && (*(unsigned short *) (pc+4) == 0x0077))
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167 || (((*(unsigned short *) (pc+0) == 0x9305)
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168 && (*(unsigned short *) (pc+2) == 0xc310)
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169 && (*(unsigned short *) (pc+14) == 0x0077))))
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170 sc = context->cfa;
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171 else if (((*(unsigned short *) (pc+0) == 0x9300)
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172 && (*(unsigned short *) (pc+2) == 0xc310)
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173 && (*(unsigned short *) (pc+4) == 0x00ad))
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174 || (((*(unsigned short *) (pc+0) == 0x9305)
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175 && (*(unsigned short *) (pc+2) == 0xc310)
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176 && (*(unsigned short *) (pc+14) == 0x00ad))))
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177 {
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178 struct rt_sigframe {
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179 struct siginfo info;
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180 struct ucontext uc;
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181 } *rt_ = context->cfa;
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182 /* The void * cast is necessary to avoid an aliasing warning.
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183 The aliasing warning is correct, but should not be a problem
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184 because it does not alias anything. */
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185 sc = (struct sigcontext *) (void *) &rt_->uc.uc_mcontext;
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186 }
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187 else
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188 return _URC_END_OF_STACK;
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189
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190 new_cfa = sc->sc_regs[15];
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191 fs->regs.cfa_how = CFA_REG_OFFSET;
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192 fs->regs.cfa_reg = 15;
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193 fs->regs.cfa_offset = new_cfa - (long) context->cfa;
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194
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195 for (i = 0; i < 15; i++)
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196 {
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197 fs->regs.reg[i].how = REG_SAVED_OFFSET;
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198 fs->regs.reg[i].loc.offset
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199 = (long)&(sc->sc_regs[i]) - new_cfa;
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200 }
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201
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202 fs->regs.reg[SH_DWARF_FRAME_PR].how = REG_SAVED_OFFSET;
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203 fs->regs.reg[SH_DWARF_FRAME_PR].loc.offset
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204 = (long)&(sc->sc_pr) - new_cfa;
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205 fs->regs.reg[SH_DWARF_FRAME_SR].how = REG_SAVED_OFFSET;
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206 fs->regs.reg[SH_DWARF_FRAME_SR].loc.offset
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207 = (long)&(sc->sc_sr) - new_cfa;
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208 fs->regs.reg[SH_DWARF_FRAME_GBR].how = REG_SAVED_OFFSET;
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209 fs->regs.reg[SH_DWARF_FRAME_GBR].loc.offset
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210 = (long)&(sc->sc_gbr) - new_cfa;
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211 fs->regs.reg[SH_DWARF_FRAME_MACH].how = REG_SAVED_OFFSET;
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212 fs->regs.reg[SH_DWARF_FRAME_MACH].loc.offset
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213 = (long)&(sc->sc_mach) - new_cfa;
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214 fs->regs.reg[SH_DWARF_FRAME_MACL].how = REG_SAVED_OFFSET;
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215 fs->regs.reg[SH_DWARF_FRAME_MACL].loc.offset
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216 = (long)&(sc->sc_macl) - new_cfa;
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217
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218 #if defined (__SH3E__) || defined (__SH4__)
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219 r = SH_DWARF_FRAME_FP0;
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220 for (i = 0; i < 16; i++)
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221 {
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222 fs->regs.reg[r+i].how = REG_SAVED_OFFSET;
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223 fs->regs.reg[r+i].loc.offset
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224 = (long)&(sc->sc_fpregs[i]) - new_cfa;
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225 }
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226
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227 r = SH_DWARF_FRAME_XD0;
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228 for (i = 0; i < 8; i++)
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229 {
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230 fs->regs.reg[r+i].how = REG_SAVED_OFFSET;
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231 fs->regs.reg[r+i].loc.offset
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232 = (long)&(sc->sc_xfpregs[2*i]) - new_cfa;
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233 }
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234
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235 fs->regs.reg[SH_DWARF_FRAME_FPUL].how = REG_SAVED_OFFSET;
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236 fs->regs.reg[SH_DWARF_FRAME_FPUL].loc.offset
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237 = (long)&(sc->sc_fpul) - new_cfa;
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238 fs->regs.reg[SH_DWARF_FRAME_FPSCR].how = REG_SAVED_OFFSET;
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239 fs->regs.reg[SH_DWARF_FRAME_FPSCR].loc.offset
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240 = (long)&(sc->sc_fpscr) - new_cfa;
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241 #endif
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242
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243 fs->regs.reg[SH_DWARF_FRAME_PC].how = REG_SAVED_OFFSET;
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244 fs->regs.reg[SH_DWARF_FRAME_PC].loc.offset
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245 = (long)&(sc->sc_pc) - new_cfa;
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246 fs->retaddr_column = SH_DWARF_FRAME_PC;
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247 fs->signal_frame = 1;
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248 return _URC_NO_REASON;
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249 }
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250 #endif /* defined (__SH5__) */
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