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1 ;; Constraint definitions for SPARC.
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2 ;; Copyright (C) 2008 Free Software Foundation, Inc.
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3 ;;
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4 ;; This file is part of GCC.
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5 ;;
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6 ;; GCC is free software; you can redistribute it and/or modify
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7 ;; it under the terms of the GNU General Public License as published by
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8 ;; the Free Software Foundation; either version 3, or (at your option)
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9 ;; any later version.
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10 ;;
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11 ;; GCC is distributed in the hope that it will be useful,
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12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 ;; GNU General Public License for more details.
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15 ;;
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16 ;; You should have received a copy of the GNU General Public License
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17 ;; along with GCC; see the file COPYING3. If not see
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18 ;; <http://www.gnu.org/licenses/>.
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19
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20 ;;; Unused letters:
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21 ;;; ABCD P Z
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22 ;;; a jkl q tuvwxyz
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23
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24
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25 ;; Register constraints
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26
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27 (define_register_constraint "b" "(TARGET_V9 && TARGET_VIS ? EXTRA_FP_REGS : NO_REGS)"
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28 "Any floating-point register in VIS mode")
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29
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30 (define_register_constraint "c" "FPCC_REGS"
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31 "Floating-point condition code register")
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32
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33 (define_register_constraint "d" "(TARGET_V9 && TARGET_VIS ? FP_REGS : NO_REGS)"
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34 "Lower floating-point register in VIS mode")
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35
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36 ;; In the non-V9 case, coerce V9 'e' class to 'f', so we can use 'e' in the
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37 ;; MD file for V8 and V9.
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38 (define_register_constraint "e" "TARGET_V9 ? EXTRA_FP_REGS : FP_REGS"
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39 "Any floating-point register")
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40
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41 (define_register_constraint "f" "FP_REGS"
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42 "Lower floating-point register")
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43
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44 (define_register_constraint "h" "(TARGET_V9 && TARGET_V8PLUS ? I64_REGS : NO_REGS)"
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45 "64-bit global or out register in V8+ mode")
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46
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47
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48 ;; Floating-point constant constraints
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49
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50 (define_constraint "G"
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51 "The floating-point zero constant"
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52 (and (match_code "const_double")
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53 (match_test "const_zero_operand (op, mode)")))
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54
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55
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56 ;; Integer constant constraints
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57
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58 (define_constraint "H"
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59 "Valid operand of double arithmetic operation"
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60 (and (match_code "const_double")
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61 (match_test "arith_double_operand (op, DImode)")))
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62
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63 (define_constraint "I"
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64 "Signed 13-bit integer constant"
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65 (and (match_code "const_int")
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66 (match_test "SPARC_SIMM13_P (ival)")))
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67
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68 (define_constraint "J"
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69 "The integer zero constant"
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70 (and (match_code "const_int")
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71 (match_test "ival == 0")))
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72
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73 (define_constraint "K"
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74 "Signed 32-bit constant that can be loaded with a sethi instruction"
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75 (and (match_code "const_int")
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76 (match_test "SPARC_SETHI32_P (ival)")))
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77
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78 (define_constraint "L"
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79 "Signed 11-bit integer constant"
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80 (and (match_code "const_int")
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81 (match_test "SPARC_SIMM11_P (ival)")))
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82
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83 (define_constraint "M"
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84 "Signed 10-bit integer constant"
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85 (and (match_code "const_int")
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86 (match_test "SPARC_SIMM10_P (ival)")))
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87
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88 (define_constraint "N"
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89 "Signed constant that can be loaded with a sethi instruction"
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90 (and (match_code "const_int")
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91 (match_test "SPARC_SETHI_P (ival)")))
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92
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93 (define_constraint "O"
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94 "The 4096 constant"
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95 (and (match_code "const_int")
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96 (match_test "ival == 4096")))
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97
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98
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99 ;; Extra constraints
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100 ;; Our memory extra constraints have to emulate the behavior of 'm' and 'o',
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101 ;; i.e. accept pseudo-registers during reload.
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102
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103 (define_constraint "D"
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104 "const_vector"
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105 (and (match_code "const_vector")
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106 (match_test "GET_MODE_CLASS (GET_MODE (op)) == MODE_VECTOR_INT")))
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107
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108 (define_constraint "Q"
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109 "Floating-point constant that can be loaded with a sethi instruction"
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110 (and (match_code "const_double")
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111 (match_test "fp_sethi_p (op)")))
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112
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113 (define_constraint "R"
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114 "Floating-point constant that can be loaded with a move instruction"
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115 (and (match_code "const_double")
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116 (match_test "fp_mov_p (op)")))
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117
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118 (define_constraint "S"
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119 "Floating-point constant that can be loaded with a high/lo_sum sequence"
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120 (and (match_code "const_double")
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121 (match_test "fp_high_losum_p (op)")))
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122
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123 ;; Not needed in 64-bit mode
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124 (define_constraint "T"
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125 "Memory reference whose address is aligned to 8-byte boundary"
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126 (and (match_test "TARGET_ARCH32")
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127 (match_code "mem,reg")
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128 (match_test "memory_ok_for_ldd (op)")))
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129
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130 ;; Not needed in 64-bit mode
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131 (define_constraint "U"
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132 "Pseudo-register or hard even-numbered integer register"
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133 (and (match_test "TARGET_ARCH32")
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134 (match_code "reg")
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135 (ior (match_test "REGNO (op) < FIRST_PSEUDO_REGISTER")
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136 (not (match_test "reload_in_progress && reg_renumber [REGNO (op)] < 0")))
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137 (match_test "register_ok_for_ldd (op)")))
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138
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139 ;; Equivalent to 'T' but available in 64-bit mode
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140 (define_constraint "W"
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141 "Memory reference for 'e' constraint floating-point register"
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142 (and (match_code "mem,reg")
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143 (match_test "memory_ok_for_ldd (op)")))
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144
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145 (define_constraint "Y"
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146 "The vector zero constant"
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147 (and (match_code "const_vector")
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148 (match_test "const_zero_operand (op, mode)")))
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