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1 /* Copyright (C) 2006, 2007, 2008 Free Software Foundation, Inc.
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2
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3 This file is free software; you can redistribute it and/or modify it under
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4 the terms of the GNU General Public License as published by the Free
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5 Software Foundation; either version 3 of the License, or (at your option)
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6 any later version.
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7
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8 This file is distributed in the hope that it will be useful, but WITHOUT
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9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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11 for more details.
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12
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13 You should have received a copy of the GNU General Public License
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14 along with GCC; see the file COPYING3. If not see
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15 <http://www.gnu.org/licenses/>. */
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16
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17
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18 /* Run-time Target */
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19 #define TARGET_CPU_CPP_BUILTINS() spu_cpu_cpp_builtins(pfile)
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20
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21 #define TARGET_VERSION fprintf (stderr, " (spu %s)", __DATE__);
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22
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23 #define OVERRIDE_OPTIONS spu_override_options()
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24 #define C_COMMON_OVERRIDE_OPTIONS spu_c_common_override_options()
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25
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26 #define OPTIMIZATION_OPTIONS(level,size) \
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27 spu_optimization_options(level,size)
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28
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29 #define INIT_EXPANDERS spu_init_expanders()
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30
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31 extern int target_flags;
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32 extern const char *spu_fixed_range_string;
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33
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34 /* Which processor to generate code or schedule for. */
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35 enum processor_type
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36 {
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37 PROCESSOR_CELL,
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38 PROCESSOR_CELLEDP
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39 };
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40
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41 extern GTY(()) int spu_arch;
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42 extern GTY(()) int spu_tune;
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43
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44 /* Support for a compile-time default architecture and tuning. The rules are:
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45 --with-arch is ignored if -march is specified.
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46 --with-tune is ignored if -mtune is specified. */
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47 #define OPTION_DEFAULT_SPECS \
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48 {"arch", "%{!march=*:-march=%(VALUE)}" }, \
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49 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
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50
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51 /* Default target_flags if no switches specified. */
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52 #ifndef TARGET_DEFAULT
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53 #define TARGET_DEFAULT (MASK_ERROR_RELOC | MASK_SAFE_DMA | MASK_BRANCH_HINTS \
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54 | MASK_SAFE_HINTS)
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55 #endif
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56
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57
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58 /* Storage Layout */
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59
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60 #define BITS_BIG_ENDIAN 1
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61
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62 #define BYTES_BIG_ENDIAN 1
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63
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64 #define WORDS_BIG_ENDIAN 1
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65
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66 #define BITS_PER_UNIT 8
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67
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68 /* GCC uses word_mode in many places, assuming that it is the fastest
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69 integer mode. That is not the case for SPU though. We can't use
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70 32 here because (of some reason I can't remember.) */
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71 #define BITS_PER_WORD 128
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72
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73 #define UNITS_PER_WORD (BITS_PER_WORD/BITS_PER_UNIT)
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74
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75 /* We never actually change UNITS_PER_WORD, but defining this causes
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76 libgcc to use some different sizes of types when compiling. */
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77 #define MIN_UNITS_PER_WORD 4
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78
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79 #define POINTER_SIZE 32
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80
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81 #define PARM_BOUNDARY 128
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82
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83 #define STACK_BOUNDARY 128
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84
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85 /* We want it 8-byte aligned so we can properly use dual-issue
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86 instructions, which can only happen on an 8-byte aligned address. */
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87 #define FUNCTION_BOUNDARY 64
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88
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89 /* We would like to allow a larger alignment for data objects (for DMA)
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90 but the aligned attribute is limited by BIGGEST_ALIGNMENT. We don't
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91 define BIGGEST_ALIGNMENT as larger because it is used in other places
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92 and would end up wasting space. (Is this still true?) */
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93 #define BIGGEST_ALIGNMENT 128
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94
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95 #define MINIMUM_ATOMIC_ALIGNMENT 128
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96
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97 /* Make all static objects 16-byte aligned. This allows us to assume
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98 they are also padded to 16-bytes, which means we can use a single
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99 load or store instruction to access them. Do the same for objects
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100 on the stack. (Except a bug (?) allows some stack objects to be
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101 unaligned.) */
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102 #define DATA_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
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103 #define CONSTANT_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
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104 #define LOCAL_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
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105
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106 #define EMPTY_FIELD_BOUNDARY 32
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107
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108 #define STRICT_ALIGNMENT 1
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109
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110 /* symbol_ref's of functions are not aligned to 16 byte boundary. */
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111 #define ALIGNED_SYMBOL_REF_P(X) \
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112 (GET_CODE (X) == SYMBOL_REF \
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113 && (SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ALIGN1) == 0 \
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114 && (! SYMBOL_REF_FUNCTION_P (X) \
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115 || align_functions >= 16))
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116
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117 #define PCC_BITFIELD_TYPE_MATTERS 1
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118
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119 #define MAX_FIXED_MODE_SIZE 128
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120
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121 #define STACK_SAVEAREA_MODE(save_level) \
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122 (save_level == SAVE_FUNCTION ? VOIDmode \
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123 : save_level == SAVE_NONLOCAL ? SImode \
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124 : Pmode)
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125
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126 #define STACK_SIZE_MODE SImode
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127
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128
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129 /* Type Layout */
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130
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131 #define INT_TYPE_SIZE 32
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132
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133 #define LONG_TYPE_SIZE 32
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134
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135 #define LONG_LONG_TYPE_SIZE 64
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136
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137 #define FLOAT_TYPE_SIZE 32
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138
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139 #define DOUBLE_TYPE_SIZE 64
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140
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141 #define LONG_DOUBLE_TYPE_SIZE 64
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142
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143 #define DEFAULT_SIGNED_CHAR 0
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144
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145
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146 /* Register Basics */
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147
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148 /* 128-130 are special registers that never appear in assembly code. */
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149 #define FIRST_PSEUDO_REGISTER 131
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150
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151 #define FIXED_REGISTERS { \
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152 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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153 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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154 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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155 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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156 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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157 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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158 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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159 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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160 1, 1, 1 \
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161 }
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162
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163 #define CALL_USED_REGISTERS { \
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164 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
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165 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
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166 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
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167 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
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168 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
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169 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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170 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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171 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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172 1, 1, 1 \
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173 }
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174
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175 #define CONDITIONAL_REGISTER_USAGE \
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176 spu_conditional_register_usage()
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177
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178
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179 /* Values in Registers */
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180
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181 #define HARD_REGNO_NREGS(REGNO, MODE) \
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182 ((GET_MODE_BITSIZE(MODE)+MAX_FIXED_MODE_SIZE-1)/MAX_FIXED_MODE_SIZE)
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183
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184 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
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185
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186 #define MODES_TIEABLE_P(MODE1, MODE2) \
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187 (GET_MODE_BITSIZE (MODE1) <= MAX_FIXED_MODE_SIZE \
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188 && GET_MODE_BITSIZE (MODE2) <= MAX_FIXED_MODE_SIZE)
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189
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190
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191 /* Register Classes */
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192
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193 enum reg_class {
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194 NO_REGS,
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195 GENERAL_REGS,
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196 ALL_REGS,
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197 LIM_REG_CLASSES
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198 };
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199
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200 /* SPU is simple, it really only has one class of registers. */
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201 #define IRA_COVER_CLASSES { GENERAL_REGS, LIM_REG_CLASSES }
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202
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203 #define N_REG_CLASSES (int) LIM_REG_CLASSES
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204
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205 #define REG_CLASS_NAMES \
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206 { "NO_REGS", \
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207 "GENERAL_REGS", \
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208 "ALL_REGS" \
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209 }
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210
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211 #define REG_CLASS_CONTENTS { \
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212 {0, 0, 0, 0, 0}, /* no regs */ \
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213 {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}, /* general regs */ \
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214 {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}} /* all regs */
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215
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216 #define REGNO_REG_CLASS(REGNO) (GENERAL_REGS)
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217
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218 #define BASE_REG_CLASS GENERAL_REGS
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219
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220 #define INDEX_REG_CLASS GENERAL_REGS
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221
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222 #define REGNO_OK_FOR_BASE_P(regno) \
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223 ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0))
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224
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225 #define REGNO_OK_FOR_INDEX_P(regno) \
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226 ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0))
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227
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228 #define INT_REG_OK_FOR_INDEX_P(X,STRICT) \
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229 ((!(STRICT) || REGNO_OK_FOR_INDEX_P (REGNO (X))))
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230 #define INT_REG_OK_FOR_BASE_P(X,STRICT) \
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231 ((!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X))))
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232
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233 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
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234
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235 #define CLASS_MAX_NREGS(CLASS, MODE) \
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236 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
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237
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238 /* GCC assumes that modes are in the lowpart of a register, which is
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239 only true for SPU. */
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240 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
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241 ((GET_MODE_SIZE (FROM) > 4 || GET_MODE_SIZE (TO) > 4) \
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242 && (GET_MODE_SIZE (FROM) < 16 || GET_MODE_SIZE (TO) < 16) \
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243 && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
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244
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245 #define REGISTER_TARGET_PRAGMAS() do { \
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246 targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin; \
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247 }while (0);
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248
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249
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250 /* Frame Layout */
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251
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252 #define STACK_GROWS_DOWNWARD
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253
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254 #define FRAME_GROWS_DOWNWARD 1
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255
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256 #define STARTING_FRAME_OFFSET (0)
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257
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258 #define STACK_POINTER_OFFSET 32
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259
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260 #define FIRST_PARM_OFFSET(FNDECL) (0)
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261
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262 #define DYNAMIC_CHAIN_ADDRESS(FP) plus_constant ((FP), -16)
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263
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264 #define RETURN_ADDR_RTX(COUNT,FP) (spu_return_addr (COUNT, FP))
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265
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266 /* Should this be defined? Would it simplify our implementation. */
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267 /* #define RETURN_ADDR_IN_PREVIOUS_FRAME */
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268
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269 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG(Pmode, LINK_REGISTER_REGNUM)
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270
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271 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_REGISTER_REGNUM)
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272
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273 #define ARG_POINTER_CFA_OFFSET(FNDECL) (-STACK_POINTER_OFFSET)
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274
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275
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276 /* Stack Checking */
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277
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278 /* We store the Available Stack Size in the second slot of the stack
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279 register. We emit stack checking code during the prologue. */
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280 #define STACK_CHECK_BUILTIN 1
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281
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282
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283 /* Frame Registers, and other registers */
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284
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285 #define STACK_POINTER_REGNUM 1
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286
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287 /* Will be eliminated. */
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288 #define FRAME_POINTER_REGNUM 128
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289
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290 /* This is not specified in any ABI, so could be set to anything. */
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291 #define HARD_FRAME_POINTER_REGNUM 127
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292
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293 /* Will be eliminated. */
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294 #define ARG_POINTER_REGNUM 129
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295
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296 #define STATIC_CHAIN_REGNUM 2
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297
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298 #define LINK_REGISTER_REGNUM 0
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299
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300 /* Used to keep track of instructions that have clobbered the hint
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301 * buffer. Users can also specify it in inline asm. */
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302 #define HBR_REGNUM 130
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303
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304 #define MAX_REGISTER_ARGS 72
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305 #define FIRST_ARG_REGNUM 3
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306 #define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + MAX_REGISTER_ARGS - 1)
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307
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308 #define MAX_REGISTER_RETURN 72
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309 #define FIRST_RETURN_REGNUM 3
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310 #define LAST_RETURN_REGNUM (FIRST_RETURN_REGNUM + MAX_REGISTER_RETURN - 1)
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311
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312
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313 /* Elimination */
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314
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315 #define FRAME_POINTER_REQUIRED 0
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316
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317 #define ELIMINABLE_REGS \
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318 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
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319 {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
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320 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
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321 {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
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322
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323 #define CAN_ELIMINATE(FROM,TO) 1
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324
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325 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
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326 ((OFFSET) = spu_initial_elimination_offset((FROM),(TO)))
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327
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328
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329 /* Stack Arguments */
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330
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331 #define ACCUMULATE_OUTGOING_ARGS 1
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332
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333 #define REG_PARM_STACK_SPACE(FNDECL) 0
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334
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335 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
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336
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337 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) (0)
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338
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339
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340 /* Register Arguments */
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341
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342 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
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343 (spu_function_arg((CUM),(MODE),(TYPE),(NAMED)))
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344
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345 #define CUMULATIVE_ARGS int
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346
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347 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \
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348 ((CUM) = 0)
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349
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350 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
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351 ((CUM) += \
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352 (TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST ? 1 \
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353 : (MODE) == BLKmode ? ((int_size_in_bytes(TYPE)+15) / 16) \
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354 : (MODE) == VOIDmode ? 1 \
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355 : HARD_REGNO_NREGS(CUM,MODE))
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356
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357
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358 /* The SPU ABI wants 32/64-bit types at offset 0 in the quad-word on the
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359 stack. 8/16-bit types should be at offsets 3/2 respectively. */
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360 #define FUNCTION_ARG_OFFSET(MODE, TYPE) \
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361 (((TYPE) && INTEGRAL_TYPE_P (TYPE) && GET_MODE_SIZE (MODE) < 4) \
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362 ? (4 - GET_MODE_SIZE (MODE)) \
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363 : 0)
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364
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365 #define FUNCTION_ARG_PADDING(MODE,TYPE) upward
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366
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367 #define PAD_VARARGS_DOWN 0
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368
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369 #define FUNCTION_ARG_REGNO_P(N) ((N) >= (FIRST_ARG_REGNUM) && (N) <= (LAST_ARG_REGNUM))
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370
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371 /* Scalar Return */
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372
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373 #define FUNCTION_VALUE(VALTYPE, FUNC) \
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374 (spu_function_value((VALTYPE),(FUNC)))
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375
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376 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RETURN_REGNUM)
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377
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378 #define FUNCTION_VALUE_REGNO_P(N) ((N) >= (FIRST_RETURN_REGNUM) && (N) <= (LAST_RETURN_REGNUM))
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379
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380
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381 /* Machine-specific symbol_ref flags. */
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382 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
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383
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384 /* Aggregate Return */
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385
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386 #define DEFAULT_PCC_STRUCT_RETURN 0
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387
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388
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389 /* Function Entry */
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390
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391 #define EXIT_IGNORE_STACK 0
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392
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393 #define EPILOGUE_USES(REGNO) ((REGNO)==1 ? 1 : 0)
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394
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395
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396 /* Profiling */
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397
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398 /* Nothing, for now. */
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399 #define FUNCTION_PROFILER(FILE, LABELNO) \
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400 fprintf (FILE, "\t\n")
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401
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402
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403 /* Trampolines */
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404
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405 #define TRAMPOLINE_SIZE (TARGET_LARGE_MEM ? 20 : 16)
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406
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407 #define TRAMPOLINE_ALIGNMENT 128
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408
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409 #define INITIALIZE_TRAMPOLINE(TRAMP,FNADDR,CXT) \
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410 spu_initialize_trampoline(TRAMP,FNADDR,CXT)
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411
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412
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413 /* Addressing Modes */
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414
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415 #define CONSTANT_ADDRESS_P(X) spu_constant_address_p(X)
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416
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417 #define MAX_REGS_PER_ADDRESS 2
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418
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419 #ifdef REG_OK_STRICT
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420 # define REG_OK_STRICT_FLAG 1
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421 #else
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422 # define REG_OK_STRICT_FLAG 0
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423 #endif
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424
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425 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
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426 { if (spu_legitimate_address (MODE, X, REG_OK_STRICT_FLAG)) \
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427 goto ADDR; \
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428 }
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429
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430 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
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431 { rtx result = spu_legitimize_address (X, OLDX, MODE); \
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432 if (result != NULL_RTX) \
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433 { \
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434 (X) = result; \
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435 goto WIN; \
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436 } \
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437 }
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438
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439 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
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440
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441 #define LEGITIMATE_CONSTANT_P(X) spu_legitimate_constant_p(X)
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442
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443
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444 /* Costs */
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445
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446 #define BRANCH_COST(speed_p, predictable_p) spu_branch_cost
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447
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448 #define SLOW_BYTE_ACCESS 0
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449
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450 #define MOVE_RATIO(speed) 32
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451
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452 #define NO_FUNCTION_CSE
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453
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454
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455 /* Sections */
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456
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457 #define TEXT_SECTION_ASM_OP ".text"
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458
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459 #define DATA_SECTION_ASM_OP ".data"
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460
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461 #define JUMP_TABLES_IN_TEXT_SECTION 1
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462
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463
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464 /* PIC */
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465 #define PIC_OFFSET_TABLE_REGNUM 126
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466
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467
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468 /* File Framework */
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469
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470 #define ASM_APP_ON ""
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471
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472 #define ASM_APP_OFF ""
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473
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474 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
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475 do { fprintf (STREAM, "\t.file\t"); \
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476 output_quoted_string (STREAM, NAME); \
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477 fprintf (STREAM, "\n"); \
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478 } while (0)
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479
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480
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481 /* Uninitialized Data */
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482 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
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483 ( fputs (".comm ", (FILE)), \
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484 assemble_name ((FILE), (NAME)), \
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485 fprintf ((FILE), ",%d\n", (ROUNDED)))
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486
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487 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
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488 ( fputs (".lcomm ", (FILE)), \
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489 assemble_name ((FILE), (NAME)), \
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490 fprintf ((FILE), ",%d\n", (ROUNDED)))
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491
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492
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493 /* Label Output */
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494 #define ASM_OUTPUT_LABEL(FILE,NAME) \
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495 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
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496
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497 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
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498 asm_fprintf (FILE, "%U%s", default_strip_name_encoding (NAME))
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499
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500
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501 /* Instruction Output */
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502 #define REGISTER_NAMES \
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503 {"$lr", "$sp", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
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504 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31", \
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505 "$32", "$33", "$34", "$35", "$36", "$37", "$38", "$39", "$40", "$41", "$42", "$43", "$44", "$45", "$46", "$47", \
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506 "$48", "$49", "$50", "$51", "$52", "$53", "$54", "$55", "$56", "$57", "$58", "$59", "$60", "$61", "$62", "$63", \
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507 "$64", "$65", "$66", "$67", "$68", "$69", "$70", "$71", "$72", "$73", "$74", "$75", "$76", "$77", "$78", "$79", \
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508 "$80", "$81", "$82", "$83", "$84", "$85", "$86", "$87", "$88", "$89", "$90", "$91", "$92", "$93", "$94", "$95", \
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509 "$96", "$97", "$98", "$99", "$100", "$101", "$102", "$103", "$104", "$105", "$106", "$107", "$108", "$109", "$110", "$111", \
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510 "$112", "$113", "$114", "$115", "$116", "$117", "$118", "$119", "$120", "$121", "$122", "$123", "$124", "$125", "$126", "$127", \
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511 "$vfp", "$vap", "hbr" \
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512 }
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513
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514 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
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515
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516 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
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517 print_operand_address (FILE, ADDR)
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518
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519 #define LOCAL_LABEL_PREFIX "."
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520
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521 #define USER_LABEL_PREFIX ""
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522
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523
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524 /* Dispatch Tables */
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525
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526 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
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527 fprintf (FILE, "\t.word .L%d-.L%d\n", VALUE, REL)
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528
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529 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
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530 fprintf (FILE, "\t.word .L%d\n", VALUE)
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531
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532
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533 /* Alignment Output */
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534
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535 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
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536 do { if (LOG!=0) fprintf (FILE, "\t.align\t%d\n", (LOG)); } while (0)
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537
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538
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539 /* Model costs for the vectorizer. */
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540
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541 /* Cost of conditional branch. */
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542 #ifndef TARG_COND_BRANCH_COST
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543 #define TARG_COND_BRANCH_COST 6
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544 #endif
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545
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546 /* Cost of any scalar operation, excluding load and store. */
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547 #ifndef TARG_SCALAR_STMT_COST
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548 #define TARG_SCALAR_STMT_COST 1
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549 #endif
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550
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551 /* Cost of scalar load. */
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|
552 #undef TARG_SCALAR_LOAD_COST
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553 #define TARG_SCALAR_LOAD_COST 2 /* load + rotate */
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554
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555 /* Cost of scalar store. */
|
|
556 #undef TARG_SCALAR_STORE_COST
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|
557 #define TARG_SCALAR_STORE_COST 10
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558
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|
559 /* Cost of any vector operation, excluding load, store,
|
|
560 or vector to scalar operation. */
|
|
561 #undef TARG_VEC_STMT_COST
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|
562 #define TARG_VEC_STMT_COST 1
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|
563
|
|
564 /* Cost of vector to scalar operation. */
|
|
565 #undef TARG_VEC_TO_SCALAR_COST
|
|
566 #define TARG_VEC_TO_SCALAR_COST 1
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|
567
|
|
568 /* Cost of scalar to vector operation. */
|
|
569 #undef TARG_SCALAR_TO_VEC_COST
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|
570 #define TARG_SCALAR_TO_VEC_COST 1
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|
571
|
|
572 /* Cost of aligned vector load. */
|
|
573 #undef TARG_VEC_LOAD_COST
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|
574 #define TARG_VEC_LOAD_COST 1
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|
575
|
|
576 /* Cost of misaligned vector load. */
|
|
577 #undef TARG_VEC_UNALIGNED_LOAD_COST
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|
578 #define TARG_VEC_UNALIGNED_LOAD_COST 2
|
|
579
|
|
580 /* Cost of vector store. */
|
|
581 #undef TARG_VEC_STORE_COST
|
|
582 #define TARG_VEC_STORE_COST 1
|
|
583
|
|
584 /* Cost of vector permutation. */
|
|
585 #ifndef TARG_VEC_PERMUTE_COST
|
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586 #define TARG_VEC_PERMUTE_COST 1
|
|
587 #endif
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588
|
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589
|
|
590 /* Misc */
|
|
591
|
|
592 #define CASE_VECTOR_MODE SImode
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593
|
|
594 #define MOVE_MAX 16
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595
|
|
596 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) ((INPREC) <= 32 && (OUTPREC) <= (INPREC))
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|
597
|
|
598 #define STORE_FLAG_VALUE -1
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|
599
|
|
600 #define Pmode SImode
|
|
601
|
|
602 #define FUNCTION_MODE QImode
|
|
603
|
|
604 #define NO_IMPLICIT_EXTERN_C 1
|
|
605
|
|
606 #define HANDLE_PRAGMA_PACK_PUSH_POP 1
|
|
607
|
|
608 /* Canonicalize a comparison from one we don't have to one we do have. */
|
|
609 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
|
|
610 do { \
|
|
611 if (((CODE) == LE || (CODE) == LT || (CODE) == LEU || (CODE) == LTU)) \
|
|
612 { \
|
|
613 rtx tem = (OP0); \
|
|
614 (OP0) = (OP1); \
|
|
615 (OP1) = tem; \
|
|
616 (CODE) = swap_condition (CODE); \
|
|
617 } \
|
|
618 } while (0)
|
|
619
|
|
620 /* These are set by the cmp patterns and used while expanding
|
|
621 conditional branches. */
|
|
622 extern GTY(()) rtx spu_compare_op0;
|
|
623 extern GTY(()) rtx spu_compare_op1;
|
|
624
|