Mercurial > hg > CbC > CbC_gcc
annotate gcc/loop-invariant.c @ 105:b3cfc7733d3f
fix bug. implementation fo rectype. c-family/c-pretty-print.c
| author | Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> |
|---|---|
| date | Fri, 25 May 2012 10:34:23 +0900 |
| parents | f6334be47118 |
| children | 04ced10e8804 |
| rev | line source |
|---|---|
| 0 | 1 /* RTL-level loop invariant motion. |
|
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2 Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009, 2010 |
| 0 | 3 Free Software Foundation, Inc. |
| 4 | |
| 5 This file is part of GCC. | |
| 6 | |
| 7 GCC is free software; you can redistribute it and/or modify it | |
| 8 under the terms of the GNU General Public License as published by the | |
| 9 Free Software Foundation; either version 3, or (at your option) any | |
| 10 later version. | |
| 11 | |
| 12 GCC is distributed in the hope that it will be useful, but WITHOUT | |
| 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 15 for more details. | |
| 16 | |
| 17 You should have received a copy of the GNU General Public License | |
| 18 along with GCC; see the file COPYING3. If not see | |
| 19 <http://www.gnu.org/licenses/>. */ | |
| 20 | |
| 21 /* This implements the loop invariant motion pass. It is very simple | |
| 22 (no calls, no loads/stores, etc.). This should be sufficient to cleanup | |
| 23 things like address arithmetics -- other more complicated invariants should | |
| 24 be eliminated on GIMPLE either in tree-ssa-loop-im.c or in tree-ssa-pre.c. | |
| 25 | |
| 26 We proceed loop by loop -- it is simpler than trying to handle things | |
| 27 globally and should not lose much. First we inspect all sets inside loop | |
| 28 and create a dependency graph on insns (saying "to move this insn, you must | |
| 29 also move the following insns"). | |
| 30 | |
| 31 We then need to determine what to move. We estimate the number of registers | |
| 32 used and move as many invariants as possible while we still have enough free | |
| 33 registers. We prefer the expensive invariants. | |
| 34 | |
| 35 Then we move the selected invariants out of the loop, creating a new | |
| 36 temporaries for them if necessary. */ | |
| 37 | |
| 38 #include "config.h" | |
| 39 #include "system.h" | |
| 40 #include "coretypes.h" | |
| 41 #include "tm.h" | |
|
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42 #include "hard-reg-set.h" |
| 0 | 43 #include "rtl.h" |
| 44 #include "tm_p.h" | |
| 45 #include "obstack.h" | |
| 46 #include "basic-block.h" | |
| 47 #include "cfgloop.h" | |
| 48 #include "expr.h" | |
| 49 #include "recog.h" | |
| 50 #include "output.h" | |
| 51 #include "function.h" | |
| 52 #include "flags.h" | |
| 53 #include "df.h" | |
| 54 #include "hashtab.h" | |
| 55 #include "except.h" | |
| 56 #include "params.h" | |
|
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57 #include "regs.h" |
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58 #include "ira.h" |
| 0 | 59 |
| 60 /* The data stored for the loop. */ | |
| 61 | |
| 62 struct loop_data | |
| 63 { | |
| 64 struct loop *outermost_exit; /* The outermost exit of the loop. */ | |
| 65 bool has_call; /* True if the loop contains a call. */ | |
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66 /* Maximal register pressure inside loop for given register class |
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67 (defined only for the cover classes). */ |
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68 int max_reg_pressure[N_REG_CLASSES]; |
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69 /* Loop regs referenced and live pseudo-registers. */ |
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70 bitmap_head regs_ref; |
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71 bitmap_head regs_live; |
| 0 | 72 }; |
| 73 | |
| 74 #define LOOP_DATA(LOOP) ((struct loop_data *) (LOOP)->aux) | |
| 75 | |
| 76 /* The description of an use. */ | |
| 77 | |
| 78 struct use | |
| 79 { | |
| 80 rtx *pos; /* Position of the use. */ | |
| 81 rtx insn; /* The insn in that the use occurs. */ | |
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82 unsigned addr_use_p; /* Whether the use occurs in an address. */ |
| 0 | 83 struct use *next; /* Next use in the list. */ |
| 84 }; | |
| 85 | |
| 86 /* The description of a def. */ | |
| 87 | |
| 88 struct def | |
| 89 { | |
| 90 struct use *uses; /* The list of uses that are uniquely reached | |
| 91 by it. */ | |
| 92 unsigned n_uses; /* Number of such uses. */ | |
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93 unsigned n_addr_uses; /* Number of uses in addresses. */ |
| 0 | 94 unsigned invno; /* The corresponding invariant. */ |
| 95 }; | |
| 96 | |
| 97 /* The data stored for each invariant. */ | |
| 98 | |
| 99 struct invariant | |
| 100 { | |
| 101 /* The number of the invariant. */ | |
| 102 unsigned invno; | |
| 103 | |
| 104 /* The number of the invariant with the same value. */ | |
| 105 unsigned eqto; | |
| 106 | |
| 107 /* If we moved the invariant out of the loop, the register that contains its | |
| 108 value. */ | |
| 109 rtx reg; | |
| 110 | |
|
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111 /* If we moved the invariant out of the loop, the original regno |
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112 that contained its value. */ |
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113 int orig_regno; |
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114 |
| 0 | 115 /* The definition of the invariant. */ |
| 116 struct def *def; | |
| 117 | |
| 118 /* The insn in that it is defined. */ | |
| 119 rtx insn; | |
| 120 | |
| 121 /* Whether it is always executed. */ | |
| 122 bool always_executed; | |
| 123 | |
| 124 /* Whether to move the invariant. */ | |
| 125 bool move; | |
| 126 | |
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127 /* Whether the invariant is cheap when used as an address. */ |
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128 bool cheap_address; |
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129 |
| 0 | 130 /* Cost of the invariant. */ |
| 131 unsigned cost; | |
| 132 | |
| 133 /* The invariants it depends on. */ | |
| 134 bitmap depends_on; | |
| 135 | |
| 136 /* Used for detecting already visited invariants during determining | |
| 137 costs of movements. */ | |
| 138 unsigned stamp; | |
| 139 }; | |
| 140 | |
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141 /* Currently processed loop. */ |
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142 static struct loop *curr_loop; |
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143 |
| 0 | 144 /* Table of invariants indexed by the df_ref uid field. */ |
| 145 | |
| 146 static unsigned int invariant_table_size = 0; | |
| 147 static struct invariant ** invariant_table; | |
| 148 | |
| 149 /* Entry for hash table of invariant expressions. */ | |
| 150 | |
| 151 struct invariant_expr_entry | |
| 152 { | |
| 153 /* The invariant. */ | |
| 154 struct invariant *inv; | |
| 155 | |
| 156 /* Its value. */ | |
| 157 rtx expr; | |
| 158 | |
| 159 /* Its mode. */ | |
| 160 enum machine_mode mode; | |
| 161 | |
| 162 /* Its hash. */ | |
| 163 hashval_t hash; | |
| 164 }; | |
| 165 | |
| 166 /* The actual stamp for marking already visited invariants during determining | |
| 167 costs of movements. */ | |
| 168 | |
| 169 static unsigned actual_stamp; | |
| 170 | |
| 171 typedef struct invariant *invariant_p; | |
| 172 | |
| 173 DEF_VEC_P(invariant_p); | |
| 174 DEF_VEC_ALLOC_P(invariant_p, heap); | |
| 175 | |
| 176 /* The invariants. */ | |
| 177 | |
| 178 static VEC(invariant_p,heap) *invariants; | |
| 179 | |
| 180 /* Check the size of the invariant table and realloc if necessary. */ | |
| 181 | |
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182 static void |
| 0 | 183 check_invariant_table_size (void) |
| 184 { | |
| 185 if (invariant_table_size < DF_DEFS_TABLE_SIZE()) | |
| 186 { | |
| 187 unsigned int new_size = DF_DEFS_TABLE_SIZE () + (DF_DEFS_TABLE_SIZE () / 4); | |
| 188 invariant_table = XRESIZEVEC (struct invariant *, invariant_table, new_size); | |
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189 memset (&invariant_table[invariant_table_size], 0, |
| 0 | 190 (new_size - invariant_table_size) * sizeof (struct rtx_iv *)); |
| 191 invariant_table_size = new_size; | |
| 192 } | |
| 193 } | |
| 194 | |
| 195 /* Test for possibility of invariantness of X. */ | |
| 196 | |
| 197 static bool | |
| 198 check_maybe_invariant (rtx x) | |
| 199 { | |
| 200 enum rtx_code code = GET_CODE (x); | |
| 201 int i, j; | |
| 202 const char *fmt; | |
| 203 | |
| 204 switch (code) | |
| 205 { | |
| 206 case CONST_INT: | |
| 207 case CONST_DOUBLE: | |
| 208 case CONST_FIXED: | |
| 209 case SYMBOL_REF: | |
| 210 case CONST: | |
| 211 case LABEL_REF: | |
| 212 return true; | |
| 213 | |
| 214 case PC: | |
| 215 case CC0: | |
| 216 case UNSPEC_VOLATILE: | |
| 217 case CALL: | |
| 218 return false; | |
| 219 | |
| 220 case REG: | |
| 221 return true; | |
| 222 | |
| 223 case MEM: | |
| 224 /* Load/store motion is done elsewhere. ??? Perhaps also add it here? | |
| 225 It should not be hard, and might be faster than "elsewhere". */ | |
| 226 | |
| 227 /* Just handle the most trivial case where we load from an unchanging | |
| 228 location (most importantly, pic tables). */ | |
| 229 if (MEM_READONLY_P (x) && !MEM_VOLATILE_P (x)) | |
| 230 break; | |
| 231 | |
| 232 return false; | |
| 233 | |
| 234 case ASM_OPERANDS: | |
| 235 /* Don't mess with insns declared volatile. */ | |
| 236 if (MEM_VOLATILE_P (x)) | |
| 237 return false; | |
| 238 break; | |
| 239 | |
| 240 default: | |
| 241 break; | |
| 242 } | |
| 243 | |
| 244 fmt = GET_RTX_FORMAT (code); | |
| 245 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
| 246 { | |
| 247 if (fmt[i] == 'e') | |
| 248 { | |
| 249 if (!check_maybe_invariant (XEXP (x, i))) | |
| 250 return false; | |
| 251 } | |
| 252 else if (fmt[i] == 'E') | |
| 253 { | |
| 254 for (j = 0; j < XVECLEN (x, i); j++) | |
| 255 if (!check_maybe_invariant (XVECEXP (x, i, j))) | |
| 256 return false; | |
| 257 } | |
| 258 } | |
| 259 | |
| 260 return true; | |
| 261 } | |
| 262 | |
| 263 /* Returns the invariant definition for USE, or NULL if USE is not | |
| 264 invariant. */ | |
| 265 | |
| 266 static struct invariant * | |
| 267 invariant_for_use (df_ref use) | |
| 268 { | |
| 269 struct df_link *defs; | |
| 270 df_ref def; | |
| 271 basic_block bb = DF_REF_BB (use), def_bb; | |
| 272 | |
| 273 if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE) | |
| 274 return NULL; | |
| 275 | |
| 276 defs = DF_REF_CHAIN (use); | |
| 277 if (!defs || defs->next) | |
| 278 return NULL; | |
| 279 def = defs->ref; | |
| 280 check_invariant_table_size (); | |
| 281 if (!invariant_table[DF_REF_ID(def)]) | |
| 282 return NULL; | |
| 283 | |
| 284 def_bb = DF_REF_BB (def); | |
| 285 if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb)) | |
| 286 return NULL; | |
| 287 return invariant_table[DF_REF_ID(def)]; | |
| 288 } | |
| 289 | |
| 290 /* Computes hash value for invariant expression X in INSN. */ | |
| 291 | |
| 292 static hashval_t | |
| 293 hash_invariant_expr_1 (rtx insn, rtx x) | |
| 294 { | |
| 295 enum rtx_code code = GET_CODE (x); | |
| 296 int i, j; | |
| 297 const char *fmt; | |
| 298 hashval_t val = code; | |
| 299 int do_not_record_p; | |
| 300 df_ref use; | |
| 301 struct invariant *inv; | |
| 302 | |
| 303 switch (code) | |
| 304 { | |
| 305 case CONST_INT: | |
| 306 case CONST_DOUBLE: | |
| 307 case CONST_FIXED: | |
| 308 case SYMBOL_REF: | |
| 309 case CONST: | |
| 310 case LABEL_REF: | |
| 311 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
| 312 | |
| 313 case REG: | |
| 314 use = df_find_use (insn, x); | |
| 315 if (!use) | |
| 316 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
| 317 inv = invariant_for_use (use); | |
| 318 if (!inv) | |
| 319 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
| 320 | |
| 321 gcc_assert (inv->eqto != ~0u); | |
| 322 return inv->eqto; | |
| 323 | |
| 324 default: | |
| 325 break; | |
| 326 } | |
| 327 | |
| 328 fmt = GET_RTX_FORMAT (code); | |
| 329 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
| 330 { | |
| 331 if (fmt[i] == 'e') | |
| 332 val ^= hash_invariant_expr_1 (insn, XEXP (x, i)); | |
| 333 else if (fmt[i] == 'E') | |
| 334 { | |
| 335 for (j = 0; j < XVECLEN (x, i); j++) | |
| 336 val ^= hash_invariant_expr_1 (insn, XVECEXP (x, i, j)); | |
| 337 } | |
| 338 else if (fmt[i] == 'i' || fmt[i] == 'n') | |
| 339 val ^= XINT (x, i); | |
| 340 } | |
| 341 | |
| 342 return val; | |
| 343 } | |
| 344 | |
| 345 /* Returns true if the invariant expressions E1 and E2 used in insns INSN1 | |
| 346 and INSN2 have always the same value. */ | |
| 347 | |
| 348 static bool | |
| 349 invariant_expr_equal_p (rtx insn1, rtx e1, rtx insn2, rtx e2) | |
| 350 { | |
| 351 enum rtx_code code = GET_CODE (e1); | |
| 352 int i, j; | |
| 353 const char *fmt; | |
| 354 df_ref use1, use2; | |
| 355 struct invariant *inv1 = NULL, *inv2 = NULL; | |
| 356 rtx sub1, sub2; | |
| 357 | |
| 358 /* If mode of only one of the operands is VOIDmode, it is not equivalent to | |
| 359 the other one. If both are VOIDmode, we rely on the caller of this | |
| 360 function to verify that their modes are the same. */ | |
| 361 if (code != GET_CODE (e2) || GET_MODE (e1) != GET_MODE (e2)) | |
| 362 return false; | |
| 363 | |
| 364 switch (code) | |
| 365 { | |
| 366 case CONST_INT: | |
| 367 case CONST_DOUBLE: | |
| 368 case CONST_FIXED: | |
| 369 case SYMBOL_REF: | |
| 370 case CONST: | |
| 371 case LABEL_REF: | |
| 372 return rtx_equal_p (e1, e2); | |
| 373 | |
| 374 case REG: | |
| 375 use1 = df_find_use (insn1, e1); | |
| 376 use2 = df_find_use (insn2, e2); | |
| 377 if (use1) | |
| 378 inv1 = invariant_for_use (use1); | |
| 379 if (use2) | |
| 380 inv2 = invariant_for_use (use2); | |
| 381 | |
| 382 if (!inv1 && !inv2) | |
| 383 return rtx_equal_p (e1, e2); | |
| 384 | |
| 385 if (!inv1 || !inv2) | |
| 386 return false; | |
| 387 | |
| 388 gcc_assert (inv1->eqto != ~0u); | |
| 389 gcc_assert (inv2->eqto != ~0u); | |
| 390 return inv1->eqto == inv2->eqto; | |
| 391 | |
| 392 default: | |
| 393 break; | |
| 394 } | |
| 395 | |
| 396 fmt = GET_RTX_FORMAT (code); | |
| 397 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
| 398 { | |
| 399 if (fmt[i] == 'e') | |
| 400 { | |
| 401 sub1 = XEXP (e1, i); | |
| 402 sub2 = XEXP (e2, i); | |
| 403 | |
| 404 if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2)) | |
| 405 return false; | |
| 406 } | |
| 407 | |
| 408 else if (fmt[i] == 'E') | |
| 409 { | |
| 410 if (XVECLEN (e1, i) != XVECLEN (e2, i)) | |
| 411 return false; | |
| 412 | |
| 413 for (j = 0; j < XVECLEN (e1, i); j++) | |
| 414 { | |
| 415 sub1 = XVECEXP (e1, i, j); | |
| 416 sub2 = XVECEXP (e2, i, j); | |
| 417 | |
| 418 if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2)) | |
| 419 return false; | |
| 420 } | |
| 421 } | |
| 422 else if (fmt[i] == 'i' || fmt[i] == 'n') | |
| 423 { | |
| 424 if (XINT (e1, i) != XINT (e2, i)) | |
| 425 return false; | |
| 426 } | |
| 427 /* Unhandled type of subexpression, we fail conservatively. */ | |
| 428 else | |
| 429 return false; | |
| 430 } | |
| 431 | |
| 432 return true; | |
| 433 } | |
| 434 | |
| 435 /* Returns hash value for invariant expression entry E. */ | |
| 436 | |
| 437 static hashval_t | |
| 438 hash_invariant_expr (const void *e) | |
| 439 { | |
| 440 const struct invariant_expr_entry *const entry = | |
| 441 (const struct invariant_expr_entry *) e; | |
| 442 | |
| 443 return entry->hash; | |
| 444 } | |
| 445 | |
| 446 /* Compares invariant expression entries E1 and E2. */ | |
| 447 | |
| 448 static int | |
| 449 eq_invariant_expr (const void *e1, const void *e2) | |
| 450 { | |
| 451 const struct invariant_expr_entry *const entry1 = | |
| 452 (const struct invariant_expr_entry *) e1; | |
| 453 const struct invariant_expr_entry *const entry2 = | |
| 454 (const struct invariant_expr_entry *) e2; | |
| 455 | |
| 456 if (entry1->mode != entry2->mode) | |
| 457 return 0; | |
| 458 | |
| 459 return invariant_expr_equal_p (entry1->inv->insn, entry1->expr, | |
| 460 entry2->inv->insn, entry2->expr); | |
| 461 } | |
| 462 | |
| 463 /* Checks whether invariant with value EXPR in machine mode MODE is | |
| 464 recorded in EQ. If this is the case, return the invariant. Otherwise | |
| 465 insert INV to the table for this expression and return INV. */ | |
| 466 | |
| 467 static struct invariant * | |
| 468 find_or_insert_inv (htab_t eq, rtx expr, enum machine_mode mode, | |
| 469 struct invariant *inv) | |
| 470 { | |
| 471 hashval_t hash = hash_invariant_expr_1 (inv->insn, expr); | |
| 472 struct invariant_expr_entry *entry; | |
| 473 struct invariant_expr_entry pentry; | |
| 474 PTR *slot; | |
| 475 | |
| 476 pentry.expr = expr; | |
| 477 pentry.inv = inv; | |
| 478 pentry.mode = mode; | |
| 479 slot = htab_find_slot_with_hash (eq, &pentry, hash, INSERT); | |
| 480 entry = (struct invariant_expr_entry *) *slot; | |
| 481 | |
| 482 if (entry) | |
| 483 return entry->inv; | |
| 484 | |
| 485 entry = XNEW (struct invariant_expr_entry); | |
| 486 entry->inv = inv; | |
| 487 entry->expr = expr; | |
| 488 entry->mode = mode; | |
| 489 entry->hash = hash; | |
| 490 *slot = entry; | |
| 491 | |
| 492 return inv; | |
| 493 } | |
| 494 | |
| 495 /* Finds invariants identical to INV and records the equivalence. EQ is the | |
| 496 hash table of the invariants. */ | |
| 497 | |
| 498 static void | |
| 499 find_identical_invariants (htab_t eq, struct invariant *inv) | |
| 500 { | |
| 501 unsigned depno; | |
| 502 bitmap_iterator bi; | |
| 503 struct invariant *dep; | |
| 504 rtx expr, set; | |
| 505 enum machine_mode mode; | |
| 506 | |
| 507 if (inv->eqto != ~0u) | |
| 508 return; | |
| 509 | |
| 510 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi) | |
| 511 { | |
| 512 dep = VEC_index (invariant_p, invariants, depno); | |
| 513 find_identical_invariants (eq, dep); | |
| 514 } | |
| 515 | |
| 516 set = single_set (inv->insn); | |
| 517 expr = SET_SRC (set); | |
| 518 mode = GET_MODE (expr); | |
| 519 if (mode == VOIDmode) | |
| 520 mode = GET_MODE (SET_DEST (set)); | |
| 521 inv->eqto = find_or_insert_inv (eq, expr, mode, inv)->invno; | |
| 522 | |
| 523 if (dump_file && inv->eqto != inv->invno) | |
| 524 fprintf (dump_file, | |
| 525 "Invariant %d is equivalent to invariant %d.\n", | |
| 526 inv->invno, inv->eqto); | |
| 527 } | |
| 528 | |
| 529 /* Find invariants with the same value and record the equivalences. */ | |
| 530 | |
| 531 static void | |
| 532 merge_identical_invariants (void) | |
| 533 { | |
| 534 unsigned i; | |
| 535 struct invariant *inv; | |
| 536 htab_t eq = htab_create (VEC_length (invariant_p, invariants), | |
| 537 hash_invariant_expr, eq_invariant_expr, free); | |
| 538 | |
|
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539 FOR_EACH_VEC_ELT (invariant_p, invariants, i, inv) |
| 0 | 540 find_identical_invariants (eq, inv); |
| 541 | |
| 542 htab_delete (eq); | |
| 543 } | |
| 544 | |
| 545 /* Determines the basic blocks inside LOOP that are always executed and | |
| 546 stores their bitmap to ALWAYS_REACHED. MAY_EXIT is a bitmap of | |
| 547 basic blocks that may either exit the loop, or contain the call that | |
| 548 does not have to return. BODY is body of the loop obtained by | |
| 549 get_loop_body_in_dom_order. */ | |
| 550 | |
| 551 static void | |
| 552 compute_always_reached (struct loop *loop, basic_block *body, | |
| 553 bitmap may_exit, bitmap always_reached) | |
| 554 { | |
| 555 unsigned i; | |
| 556 | |
| 557 for (i = 0; i < loop->num_nodes; i++) | |
| 558 { | |
| 559 if (dominated_by_p (CDI_DOMINATORS, loop->latch, body[i])) | |
| 560 bitmap_set_bit (always_reached, i); | |
| 561 | |
| 562 if (bitmap_bit_p (may_exit, i)) | |
| 563 return; | |
| 564 } | |
| 565 } | |
| 566 | |
| 567 /* Finds exits out of the LOOP with body BODY. Marks blocks in that we may | |
| 568 exit the loop by cfg edge to HAS_EXIT and MAY_EXIT. In MAY_EXIT | |
| 569 additionally mark blocks that may exit due to a call. */ | |
| 570 | |
| 571 static void | |
| 572 find_exits (struct loop *loop, basic_block *body, | |
| 573 bitmap may_exit, bitmap has_exit) | |
| 574 { | |
| 575 unsigned i; | |
| 576 edge_iterator ei; | |
| 577 edge e; | |
| 578 struct loop *outermost_exit = loop, *aexit; | |
| 579 bool has_call = false; | |
| 580 rtx insn; | |
| 581 | |
| 582 for (i = 0; i < loop->num_nodes; i++) | |
| 583 { | |
| 584 if (body[i]->loop_father == loop) | |
| 585 { | |
| 586 FOR_BB_INSNS (body[i], insn) | |
| 587 { | |
| 588 if (CALL_P (insn) | |
| 589 && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn) | |
| 590 || !RTL_CONST_OR_PURE_CALL_P (insn))) | |
| 591 { | |
| 592 has_call = true; | |
| 593 bitmap_set_bit (may_exit, i); | |
| 594 break; | |
| 595 } | |
| 596 } | |
| 597 | |
| 598 FOR_EACH_EDGE (e, ei, body[i]->succs) | |
| 599 { | |
| 600 if (flow_bb_inside_loop_p (loop, e->dest)) | |
| 601 continue; | |
| 602 | |
| 603 bitmap_set_bit (may_exit, i); | |
| 604 bitmap_set_bit (has_exit, i); | |
| 605 outermost_exit = find_common_loop (outermost_exit, | |
| 606 e->dest->loop_father); | |
| 607 } | |
| 608 continue; | |
| 609 } | |
| 610 | |
| 611 /* Use the data stored for the subloop to decide whether we may exit | |
| 612 through it. It is sufficient to do this for header of the loop, | |
| 613 as other basic blocks inside it must be dominated by it. */ | |
| 614 if (body[i]->loop_father->header != body[i]) | |
| 615 continue; | |
| 616 | |
| 617 if (LOOP_DATA (body[i]->loop_father)->has_call) | |
| 618 { | |
| 619 has_call = true; | |
| 620 bitmap_set_bit (may_exit, i); | |
| 621 } | |
| 622 aexit = LOOP_DATA (body[i]->loop_father)->outermost_exit; | |
| 623 if (aexit != loop) | |
| 624 { | |
| 625 bitmap_set_bit (may_exit, i); | |
| 626 bitmap_set_bit (has_exit, i); | |
| 627 | |
| 628 if (flow_loop_nested_p (aexit, outermost_exit)) | |
| 629 outermost_exit = aexit; | |
| 630 } | |
| 631 } | |
| 632 | |
|
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633 if (loop->aux == NULL) |
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634 { |
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635 loop->aux = xcalloc (1, sizeof (struct loop_data)); |
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636 bitmap_initialize (&LOOP_DATA (loop)->regs_ref, ®_obstack); |
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637 bitmap_initialize (&LOOP_DATA (loop)->regs_live, ®_obstack); |
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638 } |
| 0 | 639 LOOP_DATA (loop)->outermost_exit = outermost_exit; |
| 640 LOOP_DATA (loop)->has_call = has_call; | |
| 641 } | |
| 642 | |
| 643 /* Check whether we may assign a value to X from a register. */ | |
| 644 | |
| 645 static bool | |
| 646 may_assign_reg_p (rtx x) | |
| 647 { | |
| 648 return (GET_MODE (x) != VOIDmode | |
| 649 && GET_MODE (x) != BLKmode | |
| 650 && can_copy_p (GET_MODE (x)) | |
| 651 && (!REG_P (x) | |
| 652 || !HARD_REGISTER_P (x) | |
| 653 || REGNO_REG_CLASS (REGNO (x)) != NO_REGS)); | |
| 654 } | |
| 655 | |
| 656 /* Finds definitions that may correspond to invariants in LOOP with body | |
| 657 BODY. */ | |
| 658 | |
| 659 static void | |
| 660 find_defs (struct loop *loop, basic_block *body) | |
| 661 { | |
| 662 unsigned i; | |
| 663 bitmap blocks = BITMAP_ALLOC (NULL); | |
| 664 | |
| 665 for (i = 0; i < loop->num_nodes; i++) | |
| 666 bitmap_set_bit (blocks, body[i]->index); | |
| 667 | |
| 668 df_remove_problem (df_chain); | |
| 669 df_process_deferred_rescans (); | |
| 670 df_chain_add_problem (DF_UD_CHAIN); | |
| 671 df_set_blocks (blocks); | |
| 672 df_analyze (); | |
| 673 | |
| 674 if (dump_file) | |
| 675 { | |
| 676 df_dump_region (dump_file); | |
| 677 fprintf (dump_file, "*****starting processing of loop ******\n"); | |
| 678 print_rtl_with_bb (dump_file, get_insns ()); | |
| 679 fprintf (dump_file, "*****ending processing of loop ******\n"); | |
| 680 } | |
| 681 check_invariant_table_size (); | |
| 682 | |
| 683 BITMAP_FREE (blocks); | |
| 684 } | |
| 685 | |
| 686 /* Creates a new invariant for definition DEF in INSN, depending on invariants | |
| 687 in DEPENDS_ON. ALWAYS_EXECUTED is true if the insn is always executed, | |
| 688 unless the program ends due to a function call. The newly created invariant | |
| 689 is returned. */ | |
| 690 | |
| 691 static struct invariant * | |
| 692 create_new_invariant (struct def *def, rtx insn, bitmap depends_on, | |
| 693 bool always_executed) | |
| 694 { | |
| 695 struct invariant *inv = XNEW (struct invariant); | |
| 696 rtx set = single_set (insn); | |
| 697 bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)); | |
| 698 | |
| 699 inv->def = def; | |
| 700 inv->always_executed = always_executed; | |
| 701 inv->depends_on = depends_on; | |
| 702 | |
| 703 /* If the set is simple, usually by moving it we move the whole store out of | |
| 704 the loop. Otherwise we save only cost of the computation. */ | |
| 705 if (def) | |
|
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706 { |
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707 inv->cost = rtx_cost (set, SET, speed); |
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708 /* ??? Try to determine cheapness of address computation. Unfortunately |
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709 the address cost is only a relative measure, we can't really compare |
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710 it with any absolute number, but only with other address costs. |
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711 But here we don't have any other addresses, so compare with a magic |
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712 number anyway. It has to be large enough to not regress PR33928 |
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713 (by avoiding to move reg+8,reg+16,reg+24 invariants), but small |
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714 enough to not regress 410.bwaves either (by still moving reg+reg |
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715 invariants). |
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716 See http://gcc.gnu.org/ml/gcc-patches/2009-10/msg01210.html . */ |
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717 inv->cheap_address = address_cost (SET_SRC (set), word_mode, |
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718 ADDR_SPACE_GENERIC, speed) < 3; |
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719 } |
| 0 | 720 else |
|
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721 { |
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722 inv->cost = rtx_cost (SET_SRC (set), SET, speed); |
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723 inv->cheap_address = false; |
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724 } |
| 0 | 725 |
| 726 inv->move = false; | |
| 727 inv->reg = NULL_RTX; | |
|
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728 inv->orig_regno = -1; |
| 0 | 729 inv->stamp = 0; |
| 730 inv->insn = insn; | |
| 731 | |
| 732 inv->invno = VEC_length (invariant_p, invariants); | |
| 733 inv->eqto = ~0u; | |
| 734 if (def) | |
| 735 def->invno = inv->invno; | |
| 736 VEC_safe_push (invariant_p, heap, invariants, inv); | |
| 737 | |
| 738 if (dump_file) | |
| 739 { | |
| 740 fprintf (dump_file, | |
| 741 "Set in insn %d is invariant (%d), cost %d, depends on ", | |
| 742 INSN_UID (insn), inv->invno, inv->cost); | |
| 743 dump_bitmap (dump_file, inv->depends_on); | |
| 744 } | |
| 745 | |
| 746 return inv; | |
| 747 } | |
| 748 | |
| 749 /* Record USE at DEF. */ | |
| 750 | |
| 751 static void | |
|
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752 record_use (struct def *def, df_ref use) |
| 0 | 753 { |
| 754 struct use *u = XNEW (struct use); | |
| 755 | |
|
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756 u->pos = DF_REF_REAL_LOC (use); |
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757 u->insn = DF_REF_INSN (use); |
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758 u->addr_use_p = (DF_REF_TYPE (use) == DF_REF_REG_MEM_LOAD |
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759 || DF_REF_TYPE (use) == DF_REF_REG_MEM_STORE); |
| 0 | 760 u->next = def->uses; |
| 761 def->uses = u; | |
| 762 def->n_uses++; | |
|
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763 if (u->addr_use_p) |
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764 def->n_addr_uses++; |
| 0 | 765 } |
| 766 | |
| 767 /* Finds the invariants USE depends on and store them to the DEPENDS_ON | |
| 768 bitmap. Returns true if all dependencies of USE are known to be | |
| 769 loop invariants, false otherwise. */ | |
| 770 | |
| 771 static bool | |
| 772 check_dependency (basic_block bb, df_ref use, bitmap depends_on) | |
| 773 { | |
| 774 df_ref def; | |
| 775 basic_block def_bb; | |
| 776 struct df_link *defs; | |
| 777 struct def *def_data; | |
| 778 struct invariant *inv; | |
|
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779 |
| 0 | 780 if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE) |
| 781 return false; | |
|
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782 |
| 0 | 783 defs = DF_REF_CHAIN (use); |
| 784 if (!defs) | |
| 785 return true; | |
|
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786 |
| 0 | 787 if (defs->next) |
| 788 return false; | |
|
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789 |
| 0 | 790 def = defs->ref; |
| 791 check_invariant_table_size (); | |
| 792 inv = invariant_table[DF_REF_ID(def)]; | |
| 793 if (!inv) | |
| 794 return false; | |
|
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795 |
| 0 | 796 def_data = inv->def; |
| 797 gcc_assert (def_data != NULL); | |
|
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798 |
| 0 | 799 def_bb = DF_REF_BB (def); |
| 800 /* Note that in case bb == def_bb, we know that the definition | |
| 801 dominates insn, because def has invariant_table[DF_REF_ID(def)] | |
| 802 defined and we process the insns in the basic block bb | |
| 803 sequentially. */ | |
| 804 if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb)) | |
| 805 return false; | |
|
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806 |
| 0 | 807 bitmap_set_bit (depends_on, def_data->invno); |
| 808 return true; | |
| 809 } | |
| 810 | |
| 811 | |
| 812 /* Finds the invariants INSN depends on and store them to the DEPENDS_ON | |
| 813 bitmap. Returns true if all dependencies of INSN are known to be | |
| 814 loop invariants, false otherwise. */ | |
| 815 | |
| 816 static bool | |
| 817 check_dependencies (rtx insn, bitmap depends_on) | |
| 818 { | |
| 819 struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn); | |
| 820 df_ref *use_rec; | |
| 821 basic_block bb = BLOCK_FOR_INSN (insn); | |
| 822 | |
| 823 for (use_rec = DF_INSN_INFO_USES (insn_info); *use_rec; use_rec++) | |
| 824 if (!check_dependency (bb, *use_rec, depends_on)) | |
| 825 return false; | |
| 826 for (use_rec = DF_INSN_INFO_EQ_USES (insn_info); *use_rec; use_rec++) | |
| 827 if (!check_dependency (bb, *use_rec, depends_on)) | |
| 828 return false; | |
|
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829 |
| 0 | 830 return true; |
| 831 } | |
| 832 | |
| 833 /* Finds invariant in INSN. ALWAYS_REACHED is true if the insn is always | |
| 834 executed. ALWAYS_EXECUTED is true if the insn is always executed, | |
| 835 unless the program ends due to a function call. */ | |
| 836 | |
| 837 static void | |
| 838 find_invariant_insn (rtx insn, bool always_reached, bool always_executed) | |
| 839 { | |
| 840 df_ref ref; | |
| 841 struct def *def; | |
| 842 bitmap depends_on; | |
| 843 rtx set, dest; | |
| 844 bool simple = true; | |
| 845 struct invariant *inv; | |
| 846 | |
| 847 #ifdef HAVE_cc0 | |
| 848 /* We can't move a CC0 setter without the user. */ | |
| 849 if (sets_cc0_p (insn)) | |
| 850 return; | |
| 851 #endif | |
| 852 | |
| 853 set = single_set (insn); | |
| 854 if (!set) | |
| 855 return; | |
| 856 dest = SET_DEST (set); | |
| 857 | |
| 858 if (!REG_P (dest) | |
| 859 || HARD_REGISTER_P (dest)) | |
| 860 simple = false; | |
| 861 | |
| 862 if (!may_assign_reg_p (SET_DEST (set)) | |
| 863 || !check_maybe_invariant (SET_SRC (set))) | |
| 864 return; | |
| 865 | |
| 866 /* If the insn can throw exception, we cannot move it at all without changing | |
| 867 cfg. */ | |
| 868 if (can_throw_internal (insn)) | |
| 869 return; | |
| 870 | |
| 871 /* We cannot make trapping insn executed, unless it was executed before. */ | |
| 872 if (may_trap_or_fault_p (PATTERN (insn)) && !always_reached) | |
| 873 return; | |
| 874 | |
| 875 depends_on = BITMAP_ALLOC (NULL); | |
| 876 if (!check_dependencies (insn, depends_on)) | |
| 877 { | |
| 878 BITMAP_FREE (depends_on); | |
| 879 return; | |
| 880 } | |
| 881 | |
| 882 if (simple) | |
| 883 def = XCNEW (struct def); | |
| 884 else | |
| 885 def = NULL; | |
| 886 | |
| 887 inv = create_new_invariant (def, insn, depends_on, always_executed); | |
| 888 | |
| 889 if (simple) | |
| 890 { | |
| 891 ref = df_find_def (insn, dest); | |
| 892 check_invariant_table_size (); | |
| 893 invariant_table[DF_REF_ID(ref)] = inv; | |
| 894 } | |
| 895 } | |
| 896 | |
| 897 /* Record registers used in INSN that have a unique invariant definition. */ | |
| 898 | |
| 899 static void | |
| 900 record_uses (rtx insn) | |
| 901 { | |
| 902 struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn); | |
| 903 df_ref *use_rec; | |
| 904 struct invariant *inv; | |
| 905 | |
| 906 for (use_rec = DF_INSN_INFO_USES (insn_info); *use_rec; use_rec++) | |
| 907 { | |
| 908 df_ref use = *use_rec; | |
| 909 inv = invariant_for_use (use); | |
| 910 if (inv) | |
|
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911 record_use (inv->def, use); |
| 0 | 912 } |
| 913 for (use_rec = DF_INSN_INFO_EQ_USES (insn_info); *use_rec; use_rec++) | |
| 914 { | |
| 915 df_ref use = *use_rec; | |
| 916 inv = invariant_for_use (use); | |
| 917 if (inv) | |
|
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918 record_use (inv->def, use); |
| 0 | 919 } |
| 920 } | |
| 921 | |
| 922 /* Finds invariants in INSN. ALWAYS_REACHED is true if the insn is always | |
| 923 executed. ALWAYS_EXECUTED is true if the insn is always executed, | |
| 924 unless the program ends due to a function call. */ | |
| 925 | |
| 926 static void | |
| 927 find_invariants_insn (rtx insn, bool always_reached, bool always_executed) | |
| 928 { | |
| 929 find_invariant_insn (insn, always_reached, always_executed); | |
| 930 record_uses (insn); | |
| 931 } | |
| 932 | |
| 933 /* Finds invariants in basic block BB. ALWAYS_REACHED is true if the | |
| 934 basic block is always executed. ALWAYS_EXECUTED is true if the basic | |
| 935 block is always executed, unless the program ends due to a function | |
| 936 call. */ | |
| 937 | |
| 938 static void | |
| 939 find_invariants_bb (basic_block bb, bool always_reached, bool always_executed) | |
| 940 { | |
| 941 rtx insn; | |
| 942 | |
| 943 FOR_BB_INSNS (bb, insn) | |
| 944 { | |
|
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945 if (!NONDEBUG_INSN_P (insn)) |
| 0 | 946 continue; |
| 947 | |
| 948 find_invariants_insn (insn, always_reached, always_executed); | |
| 949 | |
| 950 if (always_reached | |
| 951 && CALL_P (insn) | |
| 952 && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn) | |
| 953 || ! RTL_CONST_OR_PURE_CALL_P (insn))) | |
| 954 always_reached = false; | |
| 955 } | |
| 956 } | |
| 957 | |
| 958 /* Finds invariants in LOOP with body BODY. ALWAYS_REACHED is the bitmap of | |
| 959 basic blocks in BODY that are always executed. ALWAYS_EXECUTED is the | |
| 960 bitmap of basic blocks in BODY that are always executed unless the program | |
| 961 ends due to a function call. */ | |
| 962 | |
| 963 static void | |
| 964 find_invariants_body (struct loop *loop, basic_block *body, | |
| 965 bitmap always_reached, bitmap always_executed) | |
| 966 { | |
| 967 unsigned i; | |
| 968 | |
| 969 for (i = 0; i < loop->num_nodes; i++) | |
| 970 find_invariants_bb (body[i], | |
| 971 bitmap_bit_p (always_reached, i), | |
| 972 bitmap_bit_p (always_executed, i)); | |
| 973 } | |
| 974 | |
| 975 /* Finds invariants in LOOP. */ | |
| 976 | |
| 977 static void | |
| 978 find_invariants (struct loop *loop) | |
| 979 { | |
| 980 bitmap may_exit = BITMAP_ALLOC (NULL); | |
| 981 bitmap always_reached = BITMAP_ALLOC (NULL); | |
| 982 bitmap has_exit = BITMAP_ALLOC (NULL); | |
| 983 bitmap always_executed = BITMAP_ALLOC (NULL); | |
| 984 basic_block *body = get_loop_body_in_dom_order (loop); | |
| 985 | |
| 986 find_exits (loop, body, may_exit, has_exit); | |
| 987 compute_always_reached (loop, body, may_exit, always_reached); | |
| 988 compute_always_reached (loop, body, has_exit, always_executed); | |
| 989 | |
| 990 find_defs (loop, body); | |
| 991 find_invariants_body (loop, body, always_reached, always_executed); | |
| 992 merge_identical_invariants (); | |
| 993 | |
| 994 BITMAP_FREE (always_reached); | |
| 995 BITMAP_FREE (always_executed); | |
| 996 BITMAP_FREE (may_exit); | |
| 997 BITMAP_FREE (has_exit); | |
| 998 free (body); | |
| 999 } | |
| 1000 | |
| 1001 /* Frees a list of uses USE. */ | |
| 1002 | |
| 1003 static void | |
| 1004 free_use_list (struct use *use) | |
| 1005 { | |
| 1006 struct use *next; | |
| 1007 | |
| 1008 for (; use; use = next) | |
| 1009 { | |
| 1010 next = use->next; | |
| 1011 free (use); | |
| 1012 } | |
| 1013 } | |
| 1014 | |
|
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1015 /* Return cover class and number of hard registers (through *NREGS) |
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1016 for destination of INSN. */ |
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1017 static enum reg_class |
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1018 get_cover_class_and_nregs (rtx insn, int *nregs) |
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1019 { |
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1020 rtx reg; |
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1021 enum reg_class cover_class; |
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1022 rtx set = single_set (insn); |
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1023 |
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1024 /* Considered invariant insns have only one set. */ |
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1025 gcc_assert (set != NULL_RTX); |
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1026 reg = SET_DEST (set); |
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1027 if (GET_CODE (reg) == SUBREG) |
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1028 reg = SUBREG_REG (reg); |
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1029 if (MEM_P (reg)) |
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1030 { |
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1031 *nregs = 0; |
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1032 cover_class = NO_REGS; |
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1033 } |
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1034 else |
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1035 { |
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1036 if (! REG_P (reg)) |
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1037 reg = NULL_RTX; |
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1038 if (reg == NULL_RTX) |
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1039 cover_class = GENERAL_REGS; |
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1040 else |
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1041 cover_class = reg_cover_class (REGNO (reg)); |
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1042 *nregs = ira_reg_class_nregs[cover_class][GET_MODE (SET_SRC (set))]; |
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1043 } |
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1044 return cover_class; |
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1045 } |
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1046 |
| 0 | 1047 /* Calculates cost and number of registers needed for moving invariant INV |
| 1048 out of the loop and stores them to *COST and *REGS_NEEDED. */ | |
| 1049 | |
| 1050 static void | |
| 1051 get_inv_cost (struct invariant *inv, int *comp_cost, unsigned *regs_needed) | |
| 1052 { | |
|
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1053 int i, acomp_cost; |
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1054 unsigned aregs_needed[N_REG_CLASSES]; |
| 0 | 1055 unsigned depno; |
| 1056 struct invariant *dep; | |
| 1057 bitmap_iterator bi; | |
| 1058 | |
| 1059 /* Find the representative of the class of the equivalent invariants. */ | |
| 1060 inv = VEC_index (invariant_p, invariants, inv->eqto); | |
| 1061 | |
| 1062 *comp_cost = 0; | |
|
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1063 if (! flag_ira_loop_pressure) |
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1064 regs_needed[0] = 0; |
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1065 else |
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1066 { |
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1067 for (i = 0; i < ira_reg_class_cover_size; i++) |
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1068 regs_needed[ira_reg_class_cover[i]] = 0; |
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1069 } |
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1070 |
| 0 | 1071 if (inv->move |
| 1072 || inv->stamp == actual_stamp) | |
| 1073 return; | |
| 1074 inv->stamp = actual_stamp; | |
| 1075 | |
|
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1076 if (! flag_ira_loop_pressure) |
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1077 regs_needed[0]++; |
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1078 else |
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1079 { |
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1080 int nregs; |
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1081 enum reg_class cover_class; |
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1082 |
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1083 cover_class = get_cover_class_and_nregs (inv->insn, &nregs); |
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1084 regs_needed[cover_class] += nregs; |
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1085 } |
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1086 |
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1087 if (!inv->cheap_address |
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1088 || inv->def->n_addr_uses < inv->def->n_uses) |
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1089 (*comp_cost) += inv->cost; |
| 0 | 1090 |
| 1091 #ifdef STACK_REGS | |
| 1092 { | |
| 1093 /* Hoisting constant pool constants into stack regs may cost more than | |
| 1094 just single register. On x87, the balance is affected both by the | |
| 1095 small number of FP registers, and by its register stack organization, | |
| 1096 that forces us to add compensation code in and around the loop to | |
| 1097 shuffle the operands to the top of stack before use, and pop them | |
| 1098 from the stack after the loop finishes. | |
| 1099 | |
| 1100 To model this effect, we increase the number of registers needed for | |
| 1101 stack registers by two: one register push, and one register pop. | |
| 1102 This usually has the effect that FP constant loads from the constant | |
| 1103 pool are not moved out of the loop. | |
| 1104 | |
| 1105 Note that this also means that dependent invariants can not be moved. | |
| 1106 However, the primary purpose of this pass is to move loop invariant | |
| 1107 address arithmetic out of loops, and address arithmetic that depends | |
| 1108 on floating point constants is unlikely to ever occur. */ | |
| 1109 rtx set = single_set (inv->insn); | |
| 1110 if (set | |
|
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1111 && IS_STACK_MODE (GET_MODE (SET_SRC (set))) |
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1112 && constant_pool_constant_p (SET_SRC (set))) |
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1113 { |
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1114 if (flag_ira_loop_pressure) |
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1115 regs_needed[STACK_REG_COVER_CLASS] += 2; |
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1116 else |
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1117 regs_needed[0] += 2; |
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1118 } |
| 0 | 1119 } |
| 1120 #endif | |
| 1121 | |
| 1122 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi) | |
| 1123 { | |
|
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|
1124 bool check_p; |
|
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1125 |
| 0 | 1126 dep = VEC_index (invariant_p, invariants, depno); |
| 1127 | |
|
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1128 get_inv_cost (dep, &acomp_cost, aregs_needed); |
| 0 | 1129 |
|
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|
1130 if (! flag_ira_loop_pressure) |
|
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1131 check_p = aregs_needed[0] != 0; |
|
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1132 else |
|
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1133 { |
|
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1134 for (i = 0; i < ira_reg_class_cover_size; i++) |
|
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1135 if (aregs_needed[ira_reg_class_cover[i]] != 0) |
|
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1136 break; |
|
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|
1137 check_p = i < ira_reg_class_cover_size; |
|
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1138 } |
|
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1139 if (check_p |
| 0 | 1140 /* We need to check always_executed, since if the original value of |
| 1141 the invariant may be preserved, we may need to keep it in a | |
| 1142 separate register. TODO check whether the register has an | |
| 1143 use outside of the loop. */ | |
| 1144 && dep->always_executed | |
| 1145 && !dep->def->uses->next) | |
| 1146 { | |
| 1147 /* If this is a single use, after moving the dependency we will not | |
| 1148 need a new register. */ | |
|
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|
1149 if (! flag_ira_loop_pressure) |
|
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|
1150 aregs_needed[0]--; |
|
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|
1151 else |
|
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1152 { |
|
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|
1153 int nregs; |
|
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|
1154 enum reg_class cover_class; |
|
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1155 |
|
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1156 cover_class = get_cover_class_and_nregs (inv->insn, &nregs); |
|
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|
1157 aregs_needed[cover_class] -= nregs; |
|
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1158 } |
| 0 | 1159 } |
| 1160 | |
|
55
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|
1161 if (! flag_ira_loop_pressure) |
|
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|
1162 regs_needed[0] += aregs_needed[0]; |
|
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|
1163 else |
|
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|
1164 { |
|
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|
1165 for (i = 0; i < ira_reg_class_cover_size; i++) |
|
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|
1166 regs_needed[ira_reg_class_cover[i]] |
|
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|
1167 += aregs_needed[ira_reg_class_cover[i]]; |
|
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|
1168 } |
| 0 | 1169 (*comp_cost) += acomp_cost; |
| 1170 } | |
| 1171 } | |
| 1172 | |
| 1173 /* Calculates gain for eliminating invariant INV. REGS_USED is the number | |
| 1174 of registers used in the loop, NEW_REGS is the number of new variables | |
| 1175 already added due to the invariant motion. The number of registers needed | |
|
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|
1176 for it is stored in *REGS_NEEDED. SPEED and CALL_P are flags passed |
|
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|
1177 through to estimate_reg_pressure_cost. */ |
| 0 | 1178 |
| 1179 static int | |
| 1180 gain_for_invariant (struct invariant *inv, unsigned *regs_needed, | |
|
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|
1181 unsigned *new_regs, unsigned regs_used, |
|
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|
1182 bool speed, bool call_p) |
| 0 | 1183 { |
| 1184 int comp_cost, size_cost; | |
| 1185 | |
| 1186 actual_stamp++; | |
| 1187 | |
|
55
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|
1188 get_inv_cost (inv, &comp_cost, regs_needed); |
|
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|
1189 |
|
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|
1190 if (! flag_ira_loop_pressure) |
|
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|
1191 { |
|
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|
1192 size_cost = (estimate_reg_pressure_cost (new_regs[0] + regs_needed[0], |
|
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diff
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|
1193 regs_used, speed, call_p) |
|
55
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|
1194 - estimate_reg_pressure_cost (new_regs[0], |
|
67
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|
1195 regs_used, speed, call_p)); |
|
55
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|
1196 } |
|
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diff
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|
1197 else |
|
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|
1198 { |
|
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diff
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|
1199 int i; |
|
77e2b8dfacca
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parents:
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diff
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|
1200 enum reg_class cover_class; |
|
77e2b8dfacca
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|
1201 |
|
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|
1202 for (i = 0; i < ira_reg_class_cover_size; i++) |
|
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|
1203 { |
|
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|
1204 cover_class = ira_reg_class_cover[i]; |
|
77e2b8dfacca
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parents:
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diff
changeset
|
1205 if ((int) new_regs[cover_class] |
|
77e2b8dfacca
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parents:
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diff
changeset
|
1206 + (int) regs_needed[cover_class] |
|
77e2b8dfacca
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parents:
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diff
changeset
|
1207 + LOOP_DATA (curr_loop)->max_reg_pressure[cover_class] |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1208 + IRA_LOOP_RESERVED_REGS |
|
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diff
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|
1209 > ira_available_class_regs[cover_class]) |
|
77e2b8dfacca
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diff
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|
1210 break; |
|
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diff
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|
1211 } |
|
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diff
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|
1212 if (i < ira_reg_class_cover_size) |
|
77e2b8dfacca
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diff
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|
1213 /* There will be register pressure excess and we want not to |
|
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diff
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|
1214 make this loop invariant motion. All loop invariants with |
|
77e2b8dfacca
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diff
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|
1215 non-positive gains will be rejected in function |
|
77e2b8dfacca
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0
diff
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|
1216 find_invariants_to_move. Therefore we return the negative |
|
77e2b8dfacca
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parents:
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diff
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|
1217 number here. |
|
77e2b8dfacca
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diff
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|
1218 |
|
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|
1219 One could think that this rejects also expensive loop |
|
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|
1220 invariant motions and this will hurt code performance. |
|
77e2b8dfacca
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diff
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|
1221 However numerous experiments with different heuristics |
|
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diff
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|
1222 taking invariant cost into account did not confirm this |
|
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diff
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|
1223 assumption. There are possible explanations for this |
|
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diff
changeset
|
1224 result: |
|
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|
1225 o probably all expensive invariants were already moved out |
|
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|
1226 of the loop by PRE and gimple invariant motion pass. |
|
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|
1227 o expensive invariant execution will be hidden by insn |
|
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|
1228 scheduling or OOO processor hardware because usually such |
|
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|
1229 invariants have a lot of freedom to be executed |
|
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|
1230 out-of-order. |
|
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|
1231 Another reason for ignoring invariant cost vs spilling cost |
|
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|
1232 heuristics is also in difficulties to evaluate accurately |
|
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|
1233 spill cost at this stage. */ |
|
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|
1234 return -1; |
|
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|
1235 else |
|
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|
1236 size_cost = 0; |
|
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|
1237 } |
| 0 | 1238 |
| 1239 return comp_cost - size_cost; | |
| 1240 } | |
| 1241 | |
| 1242 /* Finds invariant with best gain for moving. Returns the gain, stores | |
| 1243 the invariant in *BEST and number of registers needed for it to | |
| 1244 *REGS_NEEDED. REGS_USED is the number of registers used in the loop. | |
| 1245 NEW_REGS is the number of new variables already added due to invariant | |
| 1246 motion. */ | |
| 1247 | |
| 1248 static int | |
| 1249 best_gain_for_invariant (struct invariant **best, unsigned *regs_needed, | |
|
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|
1250 unsigned *new_regs, unsigned regs_used, |
|
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|
1251 bool speed, bool call_p) |
| 0 | 1252 { |
| 1253 struct invariant *inv; | |
|
55
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changeset
|
1254 int i, gain = 0, again; |
|
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|
1255 unsigned aregs_needed[N_REG_CLASSES], invno; |
| 0 | 1256 |
|
67
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|
1257 FOR_EACH_VEC_ELT (invariant_p, invariants, invno, inv) |
| 0 | 1258 { |
| 1259 if (inv->move) | |
| 1260 continue; | |
| 1261 | |
| 1262 /* Only consider the "representatives" of equivalent invariants. */ | |
| 1263 if (inv->eqto != inv->invno) | |
| 1264 continue; | |
| 1265 | |
|
55
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diff
changeset
|
1266 again = gain_for_invariant (inv, aregs_needed, new_regs, regs_used, |
|
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diff
changeset
|
1267 speed, call_p); |
| 0 | 1268 if (again > gain) |
| 1269 { | |
| 1270 gain = again; | |
| 1271 *best = inv; | |
|
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|
1272 if (! flag_ira_loop_pressure) |
|
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|
1273 regs_needed[0] = aregs_needed[0]; |
|
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|
1274 else |
|
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|
1275 { |
|
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|
1276 for (i = 0; i < ira_reg_class_cover_size; i++) |
|
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|
1277 regs_needed[ira_reg_class_cover[i]] |
|
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|
1278 = aregs_needed[ira_reg_class_cover[i]]; |
|
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|
1279 } |
| 0 | 1280 } |
| 1281 } | |
| 1282 | |
| 1283 return gain; | |
| 1284 } | |
| 1285 | |
| 1286 /* Marks invariant INVNO and all its dependencies for moving. */ | |
| 1287 | |
| 1288 static void | |
|
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|
1289 set_move_mark (unsigned invno, int gain) |
| 0 | 1290 { |
| 1291 struct invariant *inv = VEC_index (invariant_p, invariants, invno); | |
| 1292 bitmap_iterator bi; | |
| 1293 | |
| 1294 /* Find the representative of the class of the equivalent invariants. */ | |
| 1295 inv = VEC_index (invariant_p, invariants, inv->eqto); | |
| 1296 | |
| 1297 if (inv->move) | |
| 1298 return; | |
| 1299 inv->move = true; | |
| 1300 | |
| 1301 if (dump_file) | |
|
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|
1302 { |
|
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|
1303 if (gain >= 0) |
|
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|
1304 fprintf (dump_file, "Decided to move invariant %d -- gain %d\n", |
|
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|
1305 invno, gain); |
|
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|
1306 else |
|
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diff
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|
1307 fprintf (dump_file, "Decided to move dependent invariant %d\n", |
|
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|
1308 invno); |
|
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|
1309 }; |
| 0 | 1310 |
| 1311 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, invno, bi) | |
| 1312 { | |
|
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|
1313 set_move_mark (invno, -1); |
| 0 | 1314 } |
| 1315 } | |
| 1316 | |
| 1317 /* Determines which invariants to move. */ | |
| 1318 | |
| 1319 static void | |
|
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|
1320 find_invariants_to_move (bool speed, bool call_p) |
| 0 | 1321 { |
|
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|
1322 int gain; |
|
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|
1323 unsigned i, regs_used, regs_needed[N_REG_CLASSES], new_regs[N_REG_CLASSES]; |
| 0 | 1324 struct invariant *inv = NULL; |
| 1325 | |
| 1326 if (!VEC_length (invariant_p, invariants)) | |
| 1327 return; | |
| 1328 | |
|
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|
1329 if (flag_ira_loop_pressure) |
|
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|
1330 /* REGS_USED is actually never used when the flag is on. */ |
|
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|
1331 regs_used = 0; |
|
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|
1332 else |
|
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|
1333 /* We do not really do a good job in estimating number of |
|
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diff
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|
1334 registers used; we put some initial bound here to stand for |
|
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|
1335 induction variables etc. that we do not detect. */ |
|
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|
1336 { |
|
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|
1337 unsigned int n_regs = DF_REG_SIZE (df); |
| 0 | 1338 |
|
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|
1339 regs_used = 2; |
|
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|
1340 |
|
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|
1341 for (i = 0; i < n_regs; i++) |
| 0 | 1342 { |
|
55
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|
1343 if (!DF_REGNO_FIRST_DEF (i) && DF_REGNO_LAST_USE (i)) |
|
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|
1344 { |
|
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|
1345 /* This is a value that is used but not changed inside loop. */ |
|
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|
1346 regs_used++; |
|
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|
1347 } |
| 0 | 1348 } |
| 1349 } | |
| 1350 | |
|
55
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|
1351 if (! flag_ira_loop_pressure) |
|
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|
1352 new_regs[0] = regs_needed[0] = 0; |
|
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|
1353 else |
|
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|
1354 { |
|
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changeset
|
1355 for (i = 0; (int) i < ira_reg_class_cover_size; i++) |
|
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|
1356 new_regs[ira_reg_class_cover[i]] = 0; |
|
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|
1357 } |
|
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|
1358 while ((gain = best_gain_for_invariant (&inv, regs_needed, |
|
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|
1359 new_regs, regs_used, |
|
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|
1360 speed, call_p)) > 0) |
| 0 | 1361 { |
|
55
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|
1362 set_move_mark (inv->invno, gain); |
|
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|
1363 if (! flag_ira_loop_pressure) |
|
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|
1364 new_regs[0] += regs_needed[0]; |
|
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|
1365 else |
|
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|
1366 { |
|
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|
1367 for (i = 0; (int) i < ira_reg_class_cover_size; i++) |
|
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|
1368 new_regs[ira_reg_class_cover[i]] |
|
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|
1369 += regs_needed[ira_reg_class_cover[i]]; |
|
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|
1370 } |
| 0 | 1371 } |
| 1372 } | |
| 1373 | |
|
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diff
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|
1374 /* Replace the uses, reached by the definition of invariant INV, by REG. |
|
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|
1375 |
|
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diff
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|
1376 IN_GROUP is nonzero if this is part of a group of changes that must be |
|
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diff
changeset
|
1377 performed as a group. In that case, the changes will be stored. The |
|
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|
1378 function `apply_change_group' will validate and apply the changes. */ |
|
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diff
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|
1379 |
|
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diff
changeset
|
1380 static int |
|
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changeset
|
1381 replace_uses (struct invariant *inv, rtx reg, bool in_group) |
|
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|
1382 { |
|
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|
1383 /* Replace the uses we know to be dominated. It saves work for copy |
|
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|
1384 propagation, and also it is necessary so that dependent invariants |
|
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|
1385 are computed right. */ |
|
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|
1386 if (inv->def) |
|
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|
1387 { |
|
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diff
changeset
|
1388 struct use *use; |
|
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diff
changeset
|
1389 for (use = inv->def->uses; use; use = use->next) |
|
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diff
changeset
|
1390 validate_change (use->insn, use->pos, reg, true); |
|
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changeset
|
1391 |
|
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changeset
|
1392 /* If we aren't part of a larger group, apply the changes now. */ |
|
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changeset
|
1393 if (!in_group) |
|
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changeset
|
1394 return apply_change_group (); |
|
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|
1395 } |
|
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diff
changeset
|
1396 |
|
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changeset
|
1397 return 1; |
|
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changeset
|
1398 } |
|
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diff
changeset
|
1399 |
| 0 | 1400 /* Move invariant INVNO out of the LOOP. Returns true if this succeeds, false |
| 1401 otherwise. */ | |
| 1402 | |
| 1403 static bool | |
| 1404 move_invariant_reg (struct loop *loop, unsigned invno) | |
| 1405 { | |
| 1406 struct invariant *inv = VEC_index (invariant_p, invariants, invno); | |
| 1407 struct invariant *repr = VEC_index (invariant_p, invariants, inv->eqto); | |
| 1408 unsigned i; | |
| 1409 basic_block preheader = loop_preheader_edge (loop)->src; | |
| 1410 rtx reg, set, dest, note; | |
| 1411 bitmap_iterator bi; | |
|
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diff
changeset
|
1412 int regno = -1; |
| 0 | 1413 |
| 1414 if (inv->reg) | |
| 1415 return true; | |
| 1416 if (!repr->move) | |
| 1417 return false; | |
|
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changeset
|
1418 |
| 0 | 1419 /* If this is a representative of the class of equivalent invariants, |
| 1420 really move the invariant. Otherwise just replace its use with | |
| 1421 the register used for the representative. */ | |
| 1422 if (inv == repr) | |
| 1423 { | |
| 1424 if (inv->depends_on) | |
| 1425 { | |
| 1426 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, i, bi) | |
| 1427 { | |
| 1428 if (!move_invariant_reg (loop, i)) | |
| 1429 goto fail; | |
| 1430 } | |
| 1431 } | |
| 1432 | |
| 1433 /* Move the set out of the loop. If the set is always executed (we could | |
|
63
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55
diff
changeset
|
1434 omit this condition if we know that the register is unused outside of |
|
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55
diff
changeset
|
1435 the loop, but it does not seem worth finding out) and it has no uses |
|
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55
diff
changeset
|
1436 that would not be dominated by it, we may just move it (TODO). |
|
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55
diff
changeset
|
1437 Otherwise we need to create a temporary register. */ |
| 0 | 1438 set = single_set (inv->insn); |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1439 reg = dest = SET_DEST (set); |
|
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update it from 4.4.3 to 4.5.0
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diff
changeset
|
1440 if (GET_CODE (reg) == SUBREG) |
|
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update it from 4.4.3 to 4.5.0
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parents:
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diff
changeset
|
1441 reg = SUBREG_REG (reg); |
|
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update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1442 if (REG_P (reg)) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1443 regno = REGNO (reg); |
|
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0
diff
changeset
|
1444 |
| 0 | 1445 reg = gen_reg_rtx_and_attrs (dest); |
| 1446 | |
| 1447 /* Try replacing the destination by a new pseudoregister. */ | |
|
63
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55
diff
changeset
|
1448 validate_change (inv->insn, &SET_DEST (set), reg, true); |
|
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55
diff
changeset
|
1449 |
|
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55
diff
changeset
|
1450 /* As well as all the dominated uses. */ |
|
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55
diff
changeset
|
1451 replace_uses (inv, reg, true); |
|
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55
diff
changeset
|
1452 |
|
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update gcc from gcc-4.5.0 to gcc-4.6
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55
diff
changeset
|
1453 /* And validate all the changes. */ |
|
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diff
changeset
|
1454 if (!apply_change_group ()) |
| 0 | 1455 goto fail; |
| 1456 | |
| 1457 emit_insn_after (gen_move_insn (dest, reg), inv->insn); | |
| 1458 reorder_insns (inv->insn, inv->insn, BB_END (preheader)); | |
| 1459 | |
|
63
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55
diff
changeset
|
1460 /* If there is a REG_EQUAL note on the insn we just moved, and the |
|
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55
diff
changeset
|
1461 insn is in a basic block that is not always executed or the note |
|
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update gcc from gcc-4.5.0 to gcc-4.6
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55
diff
changeset
|
1462 contains something for which we don't know the invariant status, |
|
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update gcc from gcc-4.5.0 to gcc-4.6
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55
diff
changeset
|
1463 the note may no longer be valid after we move the insn. Note that |
|
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update gcc from gcc-4.5.0 to gcc-4.6
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55
diff
changeset
|
1464 uses in REG_EQUAL notes are taken into account in the computation |
|
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55
diff
changeset
|
1465 of invariants, so it is safe to retain the note even if it contains |
|
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55
diff
changeset
|
1466 register references for which we know the invariant status. */ |
|
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diff
changeset
|
1467 if ((note = find_reg_note (inv->insn, REG_EQUAL, NULL_RTX)) |
|
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55
diff
changeset
|
1468 && (!inv->always_executed |
|
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diff
changeset
|
1469 || !check_maybe_invariant (XEXP (note, 0)))) |
| 0 | 1470 remove_note (inv->insn, note); |
| 1471 } | |
| 1472 else | |
| 1473 { | |
| 1474 if (!move_invariant_reg (loop, repr->invno)) | |
| 1475 goto fail; | |
| 1476 reg = repr->reg; | |
|
55
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diff
changeset
|
1477 regno = repr->orig_regno; |
|
63
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diff
changeset
|
1478 if (!replace_uses (inv, reg, false)) |
|
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diff
changeset
|
1479 goto fail; |
| 0 | 1480 set = single_set (inv->insn); |
| 1481 emit_insn_after (gen_move_insn (SET_DEST (set), reg), inv->insn); | |
| 1482 delete_insn (inv->insn); | |
| 1483 } | |
| 1484 | |
| 1485 inv->reg = reg; | |
|
55
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diff
changeset
|
1486 inv->orig_regno = regno; |
| 0 | 1487 |
| 1488 return true; | |
| 1489 | |
| 1490 fail: | |
| 1491 /* If we failed, clear move flag, so that we do not try to move inv | |
| 1492 again. */ | |
| 1493 if (dump_file) | |
| 1494 fprintf (dump_file, "Failed to move invariant %d\n", invno); | |
| 1495 inv->move = false; | |
| 1496 inv->reg = NULL_RTX; | |
|
55
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parents:
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diff
changeset
|
1497 inv->orig_regno = -1; |
| 0 | 1498 |
| 1499 return false; | |
| 1500 } | |
| 1501 | |
| 1502 /* Move selected invariant out of the LOOP. Newly created regs are marked | |
| 1503 in TEMPORARY_REGS. */ | |
| 1504 | |
| 1505 static void | |
| 1506 move_invariants (struct loop *loop) | |
| 1507 { | |
| 1508 struct invariant *inv; | |
| 1509 unsigned i; | |
| 1510 | |
|
67
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
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63
diff
changeset
|
1511 FOR_EACH_VEC_ELT (invariant_p, invariants, i, inv) |
| 0 | 1512 move_invariant_reg (loop, i); |
|
55
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parents:
0
diff
changeset
|
1513 if (flag_ira_loop_pressure && resize_reg_info ()) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
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diff
changeset
|
1514 { |
|
67
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
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63
diff
changeset
|
1515 FOR_EACH_VEC_ELT (invariant_p, invariants, i, inv) |
|
55
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update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1516 if (inv->reg != NULL_RTX) |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1517 { |
|
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update it from 4.4.3 to 4.5.0
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parents:
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diff
changeset
|
1518 if (inv->orig_regno >= 0) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1519 setup_reg_classes (REGNO (inv->reg), |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1520 reg_preferred_class (inv->orig_regno), |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1521 reg_alternate_class (inv->orig_regno), |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1522 reg_cover_class (inv->orig_regno)); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1523 else |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1524 setup_reg_classes (REGNO (inv->reg), |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1525 GENERAL_REGS, NO_REGS, GENERAL_REGS); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1526 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1527 } |
| 0 | 1528 } |
| 1529 | |
| 1530 /* Initializes invariant motion data. */ | |
| 1531 | |
| 1532 static void | |
| 1533 init_inv_motion_data (void) | |
| 1534 { | |
| 1535 actual_stamp = 1; | |
| 1536 | |
| 1537 invariants = VEC_alloc (invariant_p, heap, 100); | |
| 1538 } | |
| 1539 | |
| 1540 /* Frees the data allocated by invariant motion. */ | |
| 1541 | |
| 1542 static void | |
| 1543 free_inv_motion_data (void) | |
| 1544 { | |
| 1545 unsigned i; | |
| 1546 struct def *def; | |
| 1547 struct invariant *inv; | |
| 1548 | |
| 1549 check_invariant_table_size (); | |
| 1550 for (i = 0; i < DF_DEFS_TABLE_SIZE (); i++) | |
| 1551 { | |
| 1552 inv = invariant_table[i]; | |
| 1553 if (inv) | |
| 1554 { | |
| 1555 def = inv->def; | |
| 1556 gcc_assert (def != NULL); | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1557 |
| 0 | 1558 free_use_list (def->uses); |
| 1559 free (def); | |
| 1560 invariant_table[i] = NULL; | |
| 1561 } | |
| 1562 } | |
| 1563 | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
1564 FOR_EACH_VEC_ELT (invariant_p, invariants, i, inv) |
| 0 | 1565 { |
| 1566 BITMAP_FREE (inv->depends_on); | |
| 1567 free (inv); | |
| 1568 } | |
| 1569 VEC_free (invariant_p, heap, invariants); | |
| 1570 } | |
| 1571 | |
| 1572 /* Move the invariants out of the LOOP. */ | |
| 1573 | |
| 1574 static void | |
| 1575 move_single_loop_invariants (struct loop *loop) | |
| 1576 { | |
| 1577 init_inv_motion_data (); | |
| 1578 | |
| 1579 find_invariants (loop); | |
|
67
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
1580 find_invariants_to_move (optimize_loop_for_speed_p (loop), |
|
f6334be47118
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
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diff
changeset
|
1581 LOOP_DATA (loop)->has_call); |
| 0 | 1582 move_invariants (loop); |
| 1583 | |
| 1584 free_inv_motion_data (); | |
| 1585 } | |
| 1586 | |
| 1587 /* Releases the auxiliary data for LOOP. */ | |
| 1588 | |
| 1589 static void | |
| 1590 free_loop_data (struct loop *loop) | |
| 1591 { | |
| 1592 struct loop_data *data = LOOP_DATA (loop); | |
|
55
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update it from 4.4.3 to 4.5.0
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parents:
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diff
changeset
|
1593 if (!data) |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1594 return; |
| 0 | 1595 |
|
55
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parents:
0
diff
changeset
|
1596 bitmap_clear (&LOOP_DATA (loop)->regs_ref); |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1597 bitmap_clear (&LOOP_DATA (loop)->regs_live); |
| 0 | 1598 free (data); |
| 1599 loop->aux = NULL; | |
| 1600 } | |
| 1601 | |
|
55
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diff
changeset
|
1602 |
|
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diff
changeset
|
1603 |
|
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parents:
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diff
changeset
|
1604 /* Registers currently living. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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diff
changeset
|
1605 static bitmap_head curr_regs_live; |
|
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diff
changeset
|
1606 |
|
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diff
changeset
|
1607 /* Current reg pressure for each cover class. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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diff
changeset
|
1608 static int curr_reg_pressure[N_REG_CLASSES]; |
|
77e2b8dfacca
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parents:
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diff
changeset
|
1609 |
|
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parents:
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diff
changeset
|
1610 /* Record all regs that are set in any one insn. Communication from |
|
77e2b8dfacca
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parents:
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diff
changeset
|
1611 mark_reg_{store,clobber} and global_conflicts. Asm can refer to |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
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diff
changeset
|
1612 all hard-registers. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
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diff
changeset
|
1613 static rtx regs_set[(FIRST_PSEUDO_REGISTER > MAX_RECOG_OPERANDS |
|
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parents:
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diff
changeset
|
1614 ? FIRST_PSEUDO_REGISTER : MAX_RECOG_OPERANDS) * 2]; |
|
77e2b8dfacca
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parents:
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diff
changeset
|
1615 /* Number of regs stored in the previous array. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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diff
changeset
|
1616 static int n_regs_set; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
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diff
changeset
|
1617 |
|
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parents:
0
diff
changeset
|
1618 /* Return cover class and number of needed hard registers (through |
|
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update it from 4.4.3 to 4.5.0
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parents:
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diff
changeset
|
1619 *NREGS) of register REGNO. */ |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1620 static enum reg_class |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1621 get_regno_cover_class (int regno, int *nregs) |
|
77e2b8dfacca
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parents:
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diff
changeset
|
1622 { |
|
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parents:
0
diff
changeset
|
1623 if (regno >= FIRST_PSEUDO_REGISTER) |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1624 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1625 enum reg_class cover_class = reg_cover_class (regno); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1626 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1627 *nregs = ira_reg_class_nregs[cover_class][PSEUDO_REGNO_MODE (regno)]; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1628 return cover_class; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1629 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1630 else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1631 && ! TEST_HARD_REG_BIT (eliminable_regset, regno)) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1632 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1633 *nregs = 1; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1634 return ira_class_translate[REGNO_REG_CLASS (regno)]; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1635 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1636 else |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1637 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1638 *nregs = 0; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1639 return NO_REGS; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1640 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1641 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1642 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1643 /* Increase (if INCR_P) or decrease current register pressure for |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1644 register REGNO. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1645 static void |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1646 change_pressure (int regno, bool incr_p) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1647 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1648 int nregs; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1649 enum reg_class cover_class; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1650 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1651 cover_class = get_regno_cover_class (regno, &nregs); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1652 if (! incr_p) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1653 curr_reg_pressure[cover_class] -= nregs; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1654 else |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1655 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1656 curr_reg_pressure[cover_class] += nregs; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1657 if (LOOP_DATA (curr_loop)->max_reg_pressure[cover_class] |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1658 < curr_reg_pressure[cover_class]) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1659 LOOP_DATA (curr_loop)->max_reg_pressure[cover_class] |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1660 = curr_reg_pressure[cover_class]; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1661 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1662 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1663 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1664 /* Mark REGNO birth. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1665 static void |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1666 mark_regno_live (int regno) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1667 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1668 struct loop *loop; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1669 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1670 for (loop = curr_loop; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1671 loop != current_loops->tree_root; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1672 loop = loop_outer (loop)) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1673 bitmap_set_bit (&LOOP_DATA (loop)->regs_live, regno); |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
1674 if (!bitmap_set_bit (&curr_regs_live, regno)) |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1675 return; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1676 change_pressure (regno, true); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1677 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1678 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1679 /* Mark REGNO death. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1680 static void |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1681 mark_regno_death (int regno) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1682 { |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
1683 if (! bitmap_clear_bit (&curr_regs_live, regno)) |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1684 return; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1685 change_pressure (regno, false); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1686 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1687 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1688 /* Mark setting register REG. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1689 static void |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1690 mark_reg_store (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1691 void *data ATTRIBUTE_UNUSED) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1692 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1693 int regno; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1694 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1695 if (GET_CODE (reg) == SUBREG) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1696 reg = SUBREG_REG (reg); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1697 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1698 if (! REG_P (reg)) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1699 return; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1700 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1701 regs_set[n_regs_set++] = reg; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1702 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1703 regno = REGNO (reg); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1704 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1705 if (regno >= FIRST_PSEUDO_REGISTER) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1706 mark_regno_live (regno); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1707 else |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1708 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1709 int last = regno + hard_regno_nregs[regno][GET_MODE (reg)]; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1710 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1711 while (regno < last) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1712 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1713 mark_regno_live (regno); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1714 regno++; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1715 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1716 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1717 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1718 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1719 /* Mark clobbering register REG. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1720 static void |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1721 mark_reg_clobber (rtx reg, const_rtx setter, void *data) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1722 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1723 if (GET_CODE (setter) == CLOBBER) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1724 mark_reg_store (reg, setter, data); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1725 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1726 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1727 /* Mark register REG death. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1728 static void |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1729 mark_reg_death (rtx reg) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1730 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1731 int regno = REGNO (reg); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1732 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1733 if (regno >= FIRST_PSEUDO_REGISTER) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1734 mark_regno_death (regno); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1735 else |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1736 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1737 int last = regno + hard_regno_nregs[regno][GET_MODE (reg)]; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1738 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1739 while (regno < last) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1740 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1741 mark_regno_death (regno); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1742 regno++; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1743 } |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1744 } |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1745 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1746 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1747 /* Mark occurrence of registers in X for the current loop. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1748 static void |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1749 mark_ref_regs (rtx x) |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1750 { |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1751 RTX_CODE code; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1752 int i; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1753 const char *fmt; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1754 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1755 if (!x) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1756 return; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1757 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1758 code = GET_CODE (x); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1759 if (code == REG) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1760 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1761 struct loop *loop; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1762 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1763 for (loop = curr_loop; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1764 loop != current_loops->tree_root; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1765 loop = loop_outer (loop)) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1766 bitmap_set_bit (&LOOP_DATA (loop)->regs_ref, REGNO (x)); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1767 return; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1768 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1769 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1770 fmt = GET_RTX_FORMAT (code); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1771 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1772 if (fmt[i] == 'e') |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1773 mark_ref_regs (XEXP (x, i)); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1774 else if (fmt[i] == 'E') |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1775 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1776 int j; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1777 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1778 for (j = 0; j < XVECLEN (x, i); j++) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1779 mark_ref_regs (XVECEXP (x, i, j)); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1780 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1781 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1782 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1783 /* Calculate register pressure in the loops. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1784 static void |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1785 calculate_loop_reg_pressure (void) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1786 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1787 int i; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1788 unsigned int j; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1789 bitmap_iterator bi; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1790 basic_block bb; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1791 rtx insn, link; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1792 struct loop *loop, *parent; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1793 loop_iterator li; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1794 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1795 FOR_EACH_LOOP (li, loop, 0) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1796 if (loop->aux == NULL) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1797 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1798 loop->aux = xcalloc (1, sizeof (struct loop_data)); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1799 bitmap_initialize (&LOOP_DATA (loop)->regs_ref, ®_obstack); |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1800 bitmap_initialize (&LOOP_DATA (loop)->regs_live, ®_obstack); |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1801 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
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parents:
0
diff
changeset
|
1802 ira_setup_eliminable_regset (); |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1803 bitmap_initialize (&curr_regs_live, ®_obstack); |
|
77e2b8dfacca
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0
diff
changeset
|
1804 FOR_EACH_BB (bb) |
|
77e2b8dfacca
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1805 { |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1806 curr_loop = bb->loop_father; |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1807 if (curr_loop == current_loops->tree_root) |
|
77e2b8dfacca
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parents:
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diff
changeset
|
1808 continue; |
|
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parents:
0
diff
changeset
|
1809 |
|
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parents:
0
diff
changeset
|
1810 for (loop = curr_loop; |
|
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parents:
0
diff
changeset
|
1811 loop != current_loops->tree_root; |
|
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parents:
0
diff
changeset
|
1812 loop = loop_outer (loop)) |
|
77e2b8dfacca
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0
diff
changeset
|
1813 bitmap_ior_into (&LOOP_DATA (loop)->regs_live, DF_LR_IN (bb)); |
|
77e2b8dfacca
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diff
changeset
|
1814 |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1815 bitmap_copy (&curr_regs_live, DF_LR_IN (bb)); |
|
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parents:
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diff
changeset
|
1816 for (i = 0; i < ira_reg_class_cover_size; i++) |
|
77e2b8dfacca
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parents:
0
diff
changeset
|
1817 curr_reg_pressure[ira_reg_class_cover[i]] = 0; |
|
77e2b8dfacca
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diff
changeset
|
1818 EXECUTE_IF_SET_IN_BITMAP (&curr_regs_live, 0, j, bi) |
|
77e2b8dfacca
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parents:
0
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changeset
|
1819 change_pressure (j, true); |
|
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parents:
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changeset
|
1820 |
|
77e2b8dfacca
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0
diff
changeset
|
1821 FOR_BB_INSNS (bb, insn) |
|
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parents:
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|
1822 { |
|
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changeset
|
1823 if (! NONDEBUG_INSN_P (insn)) |
|
77e2b8dfacca
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changeset
|
1824 continue; |
|
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changeset
|
1825 |
|
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changeset
|
1826 mark_ref_regs (PATTERN (insn)); |
|
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changeset
|
1827 n_regs_set = 0; |
|
77e2b8dfacca
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parents:
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diff
changeset
|
1828 note_stores (PATTERN (insn), mark_reg_clobber, NULL); |
|
77e2b8dfacca
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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changeset
|
1829 |
|
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changeset
|
1830 /* Mark any registers dead after INSN as dead now. */ |
|
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changeset
|
1831 |
|
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|
1832 for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
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1833 if (REG_NOTE_KIND (link) == REG_DEAD) |
|
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1834 mark_reg_death (XEXP (link, 0)); |
|
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1835 |
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1836 /* Mark any registers set in INSN as live, |
|
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1837 and mark them as conflicting with all other live regs. |
|
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1838 Clobbers are processed again, so they conflict with |
|
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1839 the registers that are set. */ |
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1840 |
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1841 note_stores (PATTERN (insn), mark_reg_store, NULL); |
|
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1842 |
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1843 #ifdef AUTO_INC_DEC |
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1844 for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
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1845 if (REG_NOTE_KIND (link) == REG_INC) |
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1846 mark_reg_store (XEXP (link, 0), NULL_RTX, NULL); |
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1847 #endif |
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1848 while (n_regs_set-- > 0) |
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1849 { |
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1850 rtx note = find_regno_note (insn, REG_UNUSED, |
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1851 REGNO (regs_set[n_regs_set])); |
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1852 if (! note) |
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1853 continue; |
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1854 |
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1855 mark_reg_death (XEXP (note, 0)); |
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1856 } |
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1857 } |
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1858 } |
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1859 bitmap_clear (&curr_regs_live); |
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1860 if (flag_ira_region == IRA_REGION_MIXED |
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1861 || flag_ira_region == IRA_REGION_ALL) |
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1862 FOR_EACH_LOOP (li, loop, 0) |
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1863 { |
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1864 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi) |
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1865 if (! bitmap_bit_p (&LOOP_DATA (loop)->regs_ref, j)) |
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1866 { |
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1867 enum reg_class cover_class; |
|
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1868 int nregs; |
|
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1869 |
|
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1870 cover_class = get_regno_cover_class (j, &nregs); |
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1871 LOOP_DATA (loop)->max_reg_pressure[cover_class] -= nregs; |
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1872 } |
|
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1873 } |
|
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1874 if (dump_file == NULL) |
|
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1875 return; |
|
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1876 FOR_EACH_LOOP (li, loop, 0) |
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1877 { |
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1878 parent = loop_outer (loop); |
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1879 fprintf (dump_file, "\n Loop %d (parent %d, header bb%d, depth %d)\n", |
|
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1880 loop->num, (parent == NULL ? -1 : parent->num), |
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1881 loop->header->index, loop_depth (loop)); |
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1882 fprintf (dump_file, "\n ref. regnos:"); |
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1883 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_ref, 0, j, bi) |
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1884 fprintf (dump_file, " %d", j); |
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1885 fprintf (dump_file, "\n live regnos:"); |
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1886 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi) |
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1887 fprintf (dump_file, " %d", j); |
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1888 fprintf (dump_file, "\n Pressure:"); |
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1889 for (i = 0; (int) i < ira_reg_class_cover_size; i++) |
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1890 { |
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1891 enum reg_class cover_class; |
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1892 |
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1893 cover_class = ira_reg_class_cover[i]; |
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1894 if (LOOP_DATA (loop)->max_reg_pressure[cover_class] == 0) |
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1895 continue; |
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1896 fprintf (dump_file, " %s=%d", reg_class_names[cover_class], |
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1897 LOOP_DATA (loop)->max_reg_pressure[cover_class]); |
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1898 } |
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1899 fprintf (dump_file, "\n"); |
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1900 } |
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1901 } |
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1902 |
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1903 |
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1904 |
| 0 | 1905 /* Move the invariants out of the loops. */ |
| 1906 | |
| 1907 void | |
| 1908 move_loop_invariants (void) | |
| 1909 { | |
| 1910 struct loop *loop; | |
| 1911 loop_iterator li; | |
| 1912 | |
|
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1913 if (flag_ira_loop_pressure) |
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1914 { |
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1915 df_analyze (); |
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1916 ira_set_pseudo_classes (dump_file); |
|
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1917 calculate_loop_reg_pressure (); |
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1918 } |
| 0 | 1919 df_set_flags (DF_EQ_NOTES + DF_DEFER_INSN_RESCAN); |
| 1920 /* Process the loops, innermost first. */ | |
| 1921 FOR_EACH_LOOP (li, loop, LI_FROM_INNERMOST) | |
| 1922 { | |
|
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1923 curr_loop = loop; |
| 0 | 1924 /* move_single_loop_invariants for very large loops |
| 1925 is time consuming and might need a lot of memory. */ | |
| 1926 if (loop->num_nodes <= (unsigned) LOOP_INVARIANT_MAX_BBS_IN_LOOP) | |
| 1927 move_single_loop_invariants (loop); | |
| 1928 } | |
| 1929 | |
| 1930 FOR_EACH_LOOP (li, loop, 0) | |
| 1931 { | |
| 1932 free_loop_data (loop); | |
| 1933 } | |
| 1934 | |
|
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1935 if (flag_ira_loop_pressure) |
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1936 /* There is no sense to keep this info because it was most |
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1937 probably outdated by subsequent passes. */ |
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|
1938 free_reg_info (); |
| 0 | 1939 free (invariant_table); |
| 1940 invariant_table = NULL; | |
| 1941 invariant_table_size = 0; | |
| 1942 | |
| 1943 #ifdef ENABLE_CHECKING | |
| 1944 verify_flow_info (); | |
| 1945 #endif | |
| 1946 } |