Mercurial > hg > CbC > CbC_gcc
annotate gcc/caller-save.c @ 63:b7f97abdc517 gcc-4.6-20100522
update gcc from gcc-4.5.0 to gcc-4.6
| author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Mon, 24 May 2010 12:47:05 +0900 |
| parents | 77e2b8dfacca |
| children | f6334be47118 |
| rev | line source |
|---|---|
| 0 | 1 /* Save and restore call-clobbered registers which are live across a call. |
| 2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000, | |
|
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3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 |
| 0 | 4 Free Software Foundation, Inc. |
| 5 | |
| 6 This file is part of GCC. | |
| 7 | |
| 8 GCC is free software; you can redistribute it and/or modify it under | |
| 9 the terms of the GNU General Public License as published by the Free | |
| 10 Software Foundation; either version 3, or (at your option) any later | |
| 11 version. | |
| 12 | |
| 13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
| 14 WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 16 for more details. | |
| 17 | |
| 18 You should have received a copy of the GNU General Public License | |
| 19 along with GCC; see the file COPYING3. If not see | |
| 20 <http://www.gnu.org/licenses/>. */ | |
| 21 | |
| 22 #include "config.h" | |
| 23 #include "system.h" | |
| 24 #include "coretypes.h" | |
| 25 #include "tm.h" | |
| 26 #include "rtl.h" | |
| 27 #include "regs.h" | |
| 28 #include "insn-config.h" | |
| 29 #include "flags.h" | |
| 30 #include "hard-reg-set.h" | |
| 31 #include "recog.h" | |
| 32 #include "basic-block.h" | |
|
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33 #include "df.h" |
| 0 | 34 #include "reload.h" |
| 35 #include "function.h" | |
| 36 #include "expr.h" | |
| 37 #include "toplev.h" | |
| 38 #include "tm_p.h" | |
| 39 #include "addresses.h" | |
| 40 #include "output.h" | |
| 41 #include "ggc.h" | |
| 42 | |
|
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43 /* True if caller-save has been initialized. */ |
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44 bool caller_save_initialized_p; |
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45 |
| 0 | 46 /* Call used hard registers which can not be saved because there is no |
| 47 insn for this. */ | |
| 48 HARD_REG_SET no_caller_save_reg_set; | |
| 49 | |
| 50 #ifndef MAX_MOVE_MAX | |
| 51 #define MAX_MOVE_MAX MOVE_MAX | |
| 52 #endif | |
| 53 | |
| 54 #ifndef MIN_UNITS_PER_WORD | |
| 55 #define MIN_UNITS_PER_WORD UNITS_PER_WORD | |
| 56 #endif | |
| 57 | |
| 58 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD) | |
| 59 | |
| 60 /* Modes for each hard register that we can save. The smallest mode is wide | |
| 61 enough to save the entire contents of the register. When saving the | |
| 62 register because it is live we first try to save in multi-register modes. | |
| 63 If that is not possible the save is done one register at a time. */ | |
| 64 | |
| 65 static enum machine_mode | |
| 66 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; | |
| 67 | |
| 68 /* For each hard register, a place on the stack where it can be saved, | |
| 69 if needed. */ | |
| 70 | |
| 71 static rtx | |
| 72 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; | |
| 73 | |
| 74 /* The number of elements in the subsequent array. */ | |
| 75 static int save_slots_num; | |
| 76 | |
| 77 /* Allocated slots so far. */ | |
| 78 static rtx save_slots[FIRST_PSEUDO_REGISTER]; | |
| 79 | |
| 80 /* We will only make a register eligible for caller-save if it can be | |
| 81 saved in its widest mode with a simple SET insn as long as the memory | |
| 82 address is valid. We record the INSN_CODE is those insns here since | |
| 83 when we emit them, the addresses might not be valid, so they might not | |
| 84 be recognized. */ | |
| 85 | |
| 86 static int | |
| 87 cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; | |
| 88 static int | |
| 89 cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; | |
| 90 | |
| 91 /* Set of hard regs currently residing in save area (during insn scan). */ | |
| 92 | |
| 93 static HARD_REG_SET hard_regs_saved; | |
| 94 | |
| 95 /* Number of registers currently in hard_regs_saved. */ | |
| 96 | |
| 97 static int n_regs_saved; | |
| 98 | |
| 99 /* Computed by mark_referenced_regs, all regs referenced in a given | |
| 100 insn. */ | |
| 101 static HARD_REG_SET referenced_regs; | |
| 102 | |
| 103 | |
|
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104 typedef void refmarker_fn (rtx *loc, enum machine_mode mode, int hardregno, |
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105 void *mark_arg); |
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106 |
| 0 | 107 static int reg_save_code (int, enum machine_mode); |
| 108 static int reg_restore_code (int, enum machine_mode); | |
| 109 | |
| 110 struct saved_hard_reg; | |
| 111 static void initiate_saved_hard_regs (void); | |
| 112 static struct saved_hard_reg *new_saved_hard_reg (int, int); | |
| 113 static void finish_saved_hard_regs (void); | |
| 114 static int saved_hard_reg_compare_func (const void *, const void *); | |
| 115 | |
| 116 static void mark_set_regs (rtx, const_rtx, void *); | |
|
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117 static void mark_referenced_regs (rtx *, refmarker_fn *mark, void *mark_arg); |
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118 static refmarker_fn mark_reg_as_referenced; |
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119 static refmarker_fn replace_reg_with_saved_mem; |
| 0 | 120 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *, |
| 121 enum machine_mode *); | |
| 122 static int insert_restore (struct insn_chain *, int, int, int, | |
| 123 enum machine_mode *); | |
| 124 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int, | |
| 125 rtx); | |
| 126 static void add_stored_regs (rtx, const_rtx, void *); | |
| 127 | |
| 128 | |
| 129 | |
| 130 static GTY(()) rtx savepat; | |
| 131 static GTY(()) rtx restpat; | |
| 132 static GTY(()) rtx test_reg; | |
| 133 static GTY(()) rtx test_mem; | |
| 134 static GTY(()) rtx saveinsn; | |
| 135 static GTY(()) rtx restinsn; | |
| 136 | |
| 137 /* Return the INSN_CODE used to save register REG in mode MODE. */ | |
| 138 static int | |
| 139 reg_save_code (int reg, enum machine_mode mode) | |
| 140 { | |
| 141 bool ok; | |
| 142 if (cached_reg_save_code[reg][mode]) | |
| 143 return cached_reg_save_code[reg][mode]; | |
| 144 if (!HARD_REGNO_MODE_OK (reg, mode)) | |
| 145 { | |
| 146 cached_reg_save_code[reg][mode] = -1; | |
| 147 cached_reg_restore_code[reg][mode] = -1; | |
| 148 return -1; | |
| 149 } | |
| 150 | |
| 151 /* Update the register number and modes of the register | |
| 152 and memory operand. */ | |
| 153 SET_REGNO (test_reg, reg); | |
| 154 PUT_MODE (test_reg, mode); | |
| 155 PUT_MODE (test_mem, mode); | |
| 156 | |
| 157 /* Force re-recognition of the modified insns. */ | |
| 158 INSN_CODE (saveinsn) = -1; | |
| 159 INSN_CODE (restinsn) = -1; | |
| 160 | |
| 161 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn); | |
| 162 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn); | |
| 163 | |
| 164 /* Now extract both insns and see if we can meet their | |
| 165 constraints. */ | |
| 166 ok = (cached_reg_save_code[reg][mode] != -1 | |
| 167 && cached_reg_restore_code[reg][mode] != -1); | |
| 168 if (ok) | |
| 169 { | |
| 170 extract_insn (saveinsn); | |
| 171 ok = constrain_operands (1); | |
| 172 extract_insn (restinsn); | |
| 173 ok &= constrain_operands (1); | |
| 174 } | |
| 175 | |
| 176 if (! ok) | |
| 177 { | |
| 178 cached_reg_save_code[reg][mode] = -1; | |
| 179 cached_reg_restore_code[reg][mode] = -1; | |
| 180 } | |
| 181 gcc_assert (cached_reg_save_code[reg][mode]); | |
| 182 return cached_reg_save_code[reg][mode]; | |
| 183 } | |
| 184 | |
| 185 /* Return the INSN_CODE used to restore register REG in mode MODE. */ | |
| 186 static int | |
| 187 reg_restore_code (int reg, enum machine_mode mode) | |
| 188 { | |
| 189 if (cached_reg_restore_code[reg][mode]) | |
| 190 return cached_reg_restore_code[reg][mode]; | |
| 191 /* Populate our cache. */ | |
| 192 reg_save_code (reg, mode); | |
| 193 return cached_reg_restore_code[reg][mode]; | |
| 194 } | |
| 195 | |
| 196 /* Initialize for caller-save. | |
| 197 | |
| 198 Look at all the hard registers that are used by a call and for which | |
| 199 reginfo.c has not already excluded from being used across a call. | |
| 200 | |
| 201 Ensure that we can find a mode to save the register and that there is a | |
| 202 simple insn to save and restore the register. This latter check avoids | |
| 203 problems that would occur if we tried to save the MQ register of some | |
| 204 machines directly into memory. */ | |
| 205 | |
| 206 void | |
| 207 init_caller_save (void) | |
| 208 { | |
| 209 rtx addr_reg; | |
| 210 int offset; | |
| 211 rtx address; | |
| 212 int i, j; | |
| 213 | |
|
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214 if (caller_save_initialized_p) |
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215 return; |
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216 |
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217 caller_save_initialized_p = true; |
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218 |
| 0 | 219 CLEAR_HARD_REG_SET (no_caller_save_reg_set); |
| 220 /* First find all the registers that we need to deal with and all | |
| 221 the modes that they can have. If we can't find a mode to use, | |
| 222 we can't have the register live over calls. */ | |
| 223 | |
| 224 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 225 { | |
|
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226 if (call_used_regs[i] |
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227 && !TEST_HARD_REG_BIT (call_fixed_reg_set, i)) |
| 0 | 228 { |
| 229 for (j = 1; j <= MOVE_MAX_WORDS; j++) | |
| 230 { | |
| 231 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j, | |
| 232 VOIDmode); | |
| 233 if (regno_save_mode[i][j] == VOIDmode && j == 1) | |
| 234 { | |
| 235 SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
| 236 } | |
| 237 } | |
| 238 } | |
| 239 else | |
| 240 regno_save_mode[i][1] = VOIDmode; | |
| 241 } | |
| 242 | |
| 243 /* The following code tries to approximate the conditions under which | |
| 244 we can easily save and restore a register without scratch registers or | |
| 245 other complexities. It will usually work, except under conditions where | |
| 246 the validity of an insn operand is dependent on the address offset. | |
| 247 No such cases are currently known. | |
| 248 | |
| 249 We first find a typical offset from some BASE_REG_CLASS register. | |
| 250 This address is chosen by finding the first register in the class | |
| 251 and by finding the smallest power of two that is a valid offset from | |
| 252 that register in every mode we will use to save registers. */ | |
| 253 | |
| 254 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 255 if (TEST_HARD_REG_BIT | |
| 256 (reg_class_contents | |
| 257 [(int) base_reg_class (regno_save_mode[i][1], PLUS, CONST_INT)], i)) | |
| 258 break; | |
| 259 | |
| 260 gcc_assert (i < FIRST_PSEUDO_REGISTER); | |
| 261 | |
| 262 addr_reg = gen_rtx_REG (Pmode, i); | |
| 263 | |
| 264 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1) | |
| 265 { | |
| 266 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset)); | |
| 267 | |
| 268 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 269 if (regno_save_mode[i][1] != VOIDmode | |
| 270 && ! strict_memory_address_p (regno_save_mode[i][1], address)) | |
| 271 break; | |
| 272 | |
| 273 if (i == FIRST_PSEUDO_REGISTER) | |
| 274 break; | |
| 275 } | |
| 276 | |
| 277 /* If we didn't find a valid address, we must use register indirect. */ | |
| 278 if (offset == 0) | |
| 279 address = addr_reg; | |
| 280 | |
| 281 /* Next we try to form an insn to save and restore the register. We | |
| 282 see if such an insn is recognized and meets its constraints. | |
| 283 | |
| 284 To avoid lots of unnecessary RTL allocation, we construct all the RTL | |
| 285 once, then modify the memory and register operands in-place. */ | |
| 286 | |
| 287 test_reg = gen_rtx_REG (VOIDmode, 0); | |
| 288 test_mem = gen_rtx_MEM (VOIDmode, address); | |
| 289 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg); | |
| 290 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem); | |
| 291 | |
| 292 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0); | |
| 293 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0); | |
| 294 | |
| 295 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 296 for (j = 1; j <= MOVE_MAX_WORDS; j++) | |
| 297 if (reg_save_code (i,regno_save_mode[i][j]) == -1) | |
| 298 { | |
| 299 regno_save_mode[i][j] = VOIDmode; | |
| 300 if (j == 1) | |
| 301 { | |
| 302 SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
| 303 if (call_used_regs[i]) | |
| 304 SET_HARD_REG_BIT (no_caller_save_reg_set, i); | |
| 305 } | |
| 306 } | |
| 307 } | |
| 308 | |
| 309 | |
| 310 | |
| 311 /* Initialize save areas by showing that we haven't allocated any yet. */ | |
| 312 | |
| 313 void | |
| 314 init_save_areas (void) | |
| 315 { | |
| 316 int i, j; | |
| 317 | |
| 318 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 319 for (j = 1; j <= MOVE_MAX_WORDS; j++) | |
| 320 regno_save_mem[i][j] = 0; | |
| 321 save_slots_num = 0; | |
|
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322 |
| 0 | 323 } |
| 324 | |
| 325 /* The structure represents a hard register which should be saved | |
| 326 through the call. It is used when the integrated register | |
| 327 allocator (IRA) is used and sharing save slots is on. */ | |
| 328 struct saved_hard_reg | |
| 329 { | |
| 330 /* Order number starting with 0. */ | |
| 331 int num; | |
| 332 /* The hard regno. */ | |
| 333 int hard_regno; | |
| 334 /* Execution frequency of all calls through which given hard | |
| 335 register should be saved. */ | |
| 336 int call_freq; | |
| 337 /* Stack slot reserved to save the hard register through calls. */ | |
| 338 rtx slot; | |
| 339 /* True if it is first hard register in the chain of hard registers | |
| 340 sharing the same stack slot. */ | |
| 341 int first_p; | |
| 342 /* Order number of the next hard register structure with the same | |
| 343 slot in the chain. -1 represents end of the chain. */ | |
| 344 int next; | |
| 345 }; | |
| 346 | |
| 347 /* Map: hard register number to the corresponding structure. */ | |
| 348 static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER]; | |
| 349 | |
| 350 /* The number of all structures representing hard registers should be | |
| 351 saved, in order words, the number of used elements in the following | |
| 352 array. */ | |
| 353 static int saved_regs_num; | |
| 354 | |
| 355 /* Pointers to all the structures. Index is the order number of the | |
| 356 corresponding structure. */ | |
| 357 static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER]; | |
| 358 | |
| 359 /* First called function for work with saved hard registers. */ | |
| 360 static void | |
| 361 initiate_saved_hard_regs (void) | |
| 362 { | |
| 363 int i; | |
| 364 | |
| 365 saved_regs_num = 0; | |
| 366 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 367 hard_reg_map[i] = NULL; | |
| 368 } | |
| 369 | |
| 370 /* Allocate and return new saved hard register with given REGNO and | |
| 371 CALL_FREQ. */ | |
| 372 static struct saved_hard_reg * | |
| 373 new_saved_hard_reg (int regno, int call_freq) | |
| 374 { | |
| 375 struct saved_hard_reg *saved_reg; | |
| 376 | |
| 377 saved_reg | |
| 378 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg)); | |
| 379 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg; | |
| 380 saved_reg->num = saved_regs_num++; | |
| 381 saved_reg->hard_regno = regno; | |
| 382 saved_reg->call_freq = call_freq; | |
| 383 saved_reg->first_p = FALSE; | |
| 384 saved_reg->next = -1; | |
| 385 return saved_reg; | |
| 386 } | |
| 387 | |
| 388 /* Free memory allocated for the saved hard registers. */ | |
| 389 static void | |
| 390 finish_saved_hard_regs (void) | |
| 391 { | |
| 392 int i; | |
| 393 | |
| 394 for (i = 0; i < saved_regs_num; i++) | |
| 395 free (all_saved_regs[i]); | |
| 396 } | |
| 397 | |
| 398 /* The function is used to sort the saved hard register structures | |
| 399 according their frequency. */ | |
| 400 static int | |
| 401 saved_hard_reg_compare_func (const void *v1p, const void *v2p) | |
| 402 { | |
| 403 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p; | |
| 404 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p; | |
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405 |
| 0 | 406 if (flag_omit_frame_pointer) |
| 407 { | |
| 408 if (p1->call_freq - p2->call_freq != 0) | |
| 409 return p1->call_freq - p2->call_freq; | |
| 410 } | |
| 411 else if (p2->call_freq - p1->call_freq != 0) | |
| 412 return p2->call_freq - p1->call_freq; | |
| 413 | |
| 414 return p1->num - p2->num; | |
| 415 } | |
| 416 | |
| 417 /* Allocate save areas for any hard registers that might need saving. | |
| 418 We take a conservative approach here and look for call-clobbered hard | |
| 419 registers that are assigned to pseudos that cross calls. This may | |
| 420 overestimate slightly (especially if some of these registers are later | |
| 421 used as spill registers), but it should not be significant. | |
| 422 | |
| 423 For IRA we use priority coloring to decrease stack slots needed for | |
| 424 saving hard registers through calls. We build conflicts for them | |
| 425 to do coloring. | |
| 426 | |
| 427 Future work: | |
| 428 | |
| 429 In the fallback case we should iterate backwards across all possible | |
| 430 modes for the save, choosing the largest available one instead of | |
| 431 falling back to the smallest mode immediately. (eg TF -> DF -> SF). | |
| 432 | |
| 433 We do not try to use "move multiple" instructions that exist | |
| 434 on some machines (such as the 68k moveml). It could be a win to try | |
| 435 and use them when possible. The hard part is doing it in a way that is | |
| 436 machine independent since they might be saving non-consecutive | |
| 437 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */ | |
| 438 | |
| 439 void | |
| 440 setup_save_areas (void) | |
| 441 { | |
| 442 int i, j, k; | |
| 443 unsigned int r; | |
| 444 HARD_REG_SET hard_regs_used; | |
| 445 | |
| 446 /* Allocate space in the save area for the largest multi-register | |
| 447 pseudos first, then work backwards to single register | |
| 448 pseudos. */ | |
| 449 | |
| 450 /* Find and record all call-used hard-registers in this function. */ | |
| 451 CLEAR_HARD_REG_SET (hard_regs_used); | |
| 452 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
| 453 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0) | |
| 454 { | |
| 455 unsigned int regno = reg_renumber[i]; | |
| 456 unsigned int endregno | |
| 457 = end_hard_regno (GET_MODE (regno_reg_rtx[i]), regno); | |
| 458 for (r = regno; r < endregno; r++) | |
| 459 if (call_used_regs[r]) | |
| 460 SET_HARD_REG_BIT (hard_regs_used, r); | |
| 461 } | |
| 462 | |
| 463 if (optimize && flag_ira_share_save_slots) | |
| 464 { | |
| 465 rtx insn, slot; | |
| 466 struct insn_chain *chain, *next; | |
| 467 char *saved_reg_conflicts; | |
| 468 unsigned int regno; | |
| 469 int next_k, freq; | |
| 470 struct saved_hard_reg *saved_reg, *saved_reg2, *saved_reg3; | |
| 471 int call_saved_regs_num; | |
| 472 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER]; | |
| 473 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets; | |
| 474 reg_set_iterator rsi; | |
| 475 int best_slot_num; | |
| 476 int prev_save_slots_num; | |
| 477 rtx prev_save_slots[FIRST_PSEUDO_REGISTER]; | |
|
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478 |
| 0 | 479 initiate_saved_hard_regs (); |
| 480 /* Create hard reg saved regs. */ | |
| 481 for (chain = reload_insn_chain; chain != 0; chain = next) | |
| 482 { | |
| 483 insn = chain->insn; | |
| 484 next = chain->next; | |
|
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485 if (!CALL_P (insn) |
| 0 | 486 || find_reg_note (insn, REG_NORETURN, NULL)) |
| 487 continue; | |
| 488 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn)); | |
| 489 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, | |
| 490 &chain->live_throughout); | |
| 491 COPY_HARD_REG_SET (used_regs, call_used_reg_set); | |
| 492 | |
| 493 /* Record all registers set in this call insn. These don't | |
| 494 need to be saved. N.B. the call insn might set a subreg | |
| 495 of a multi-hard-reg pseudo; then the pseudo is considered | |
| 496 live during the call, but the subreg that is set | |
| 497 isn't. */ | |
| 498 CLEAR_HARD_REG_SET (this_insn_sets); | |
| 499 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets); | |
| 500 /* Sibcalls are considered to set the return value. */ | |
| 501 if (SIBLING_CALL_P (insn) && crtl->return_rtx) | |
| 502 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets); | |
| 503 | |
| 504 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set); | |
| 505 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets); | |
| 506 AND_HARD_REG_SET (hard_regs_to_save, used_regs); | |
| 507 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 508 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) | |
| 509 { | |
| 510 if (hard_reg_map[regno] != NULL) | |
| 511 hard_reg_map[regno]->call_freq += freq; | |
| 512 else | |
| 513 saved_reg = new_saved_hard_reg (regno, freq); | |
| 514 } | |
| 515 /* Look through all live pseudos, mark their hard registers. */ | |
| 516 EXECUTE_IF_SET_IN_REG_SET | |
| 517 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) | |
| 518 { | |
| 519 int r = reg_renumber[regno]; | |
| 520 int bound; | |
|
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521 |
| 0 | 522 if (r < 0) |
| 523 continue; | |
|
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524 |
| 0 | 525 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)]; |
| 526 for (; r < bound; r++) | |
| 527 if (TEST_HARD_REG_BIT (used_regs, r)) | |
| 528 { | |
| 529 if (hard_reg_map[r] != NULL) | |
| 530 hard_reg_map[r]->call_freq += freq; | |
| 531 else | |
| 532 saved_reg = new_saved_hard_reg (r, freq); | |
| 533 SET_HARD_REG_BIT (hard_regs_to_save, r); | |
| 534 } | |
| 535 } | |
| 536 } | |
| 537 /* Find saved hard register conflicts. */ | |
| 538 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num); | |
| 539 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num); | |
| 540 for (chain = reload_insn_chain; chain != 0; chain = next) | |
| 541 { | |
| 542 call_saved_regs_num = 0; | |
| 543 insn = chain->insn; | |
| 544 next = chain->next; | |
|
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545 if (!CALL_P (insn) |
| 0 | 546 || find_reg_note (insn, REG_NORETURN, NULL)) |
| 547 continue; | |
| 548 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, | |
| 549 &chain->live_throughout); | |
| 550 COPY_HARD_REG_SET (used_regs, call_used_reg_set); | |
| 551 | |
| 552 /* Record all registers set in this call insn. These don't | |
| 553 need to be saved. N.B. the call insn might set a subreg | |
| 554 of a multi-hard-reg pseudo; then the pseudo is considered | |
| 555 live during the call, but the subreg that is set | |
| 556 isn't. */ | |
| 557 CLEAR_HARD_REG_SET (this_insn_sets); | |
| 558 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets); | |
| 559 /* Sibcalls are considered to set the return value, | |
|
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560 compare df-scan.c:df_get_call_refs. */ |
| 0 | 561 if (SIBLING_CALL_P (insn) && crtl->return_rtx) |
| 562 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets); | |
| 563 | |
| 564 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set); | |
| 565 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets); | |
| 566 AND_HARD_REG_SET (hard_regs_to_save, used_regs); | |
| 567 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 568 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) | |
| 569 { | |
| 570 gcc_assert (hard_reg_map[regno] != NULL); | |
| 571 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno]; | |
| 572 } | |
| 573 /* Look through all live pseudos, mark their hard registers. */ | |
| 574 EXECUTE_IF_SET_IN_REG_SET | |
| 575 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) | |
| 576 { | |
| 577 int r = reg_renumber[regno]; | |
| 578 int bound; | |
|
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579 |
| 0 | 580 if (r < 0) |
| 581 continue; | |
| 582 | |
| 583 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)]; | |
| 584 for (; r < bound; r++) | |
| 585 if (TEST_HARD_REG_BIT (used_regs, r)) | |
| 586 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r]; | |
| 587 } | |
| 588 for (i = 0; i < call_saved_regs_num; i++) | |
| 589 { | |
| 590 saved_reg = call_saved_regs[i]; | |
| 591 for (j = 0; j < call_saved_regs_num; j++) | |
| 592 if (i != j) | |
| 593 { | |
| 594 saved_reg2 = call_saved_regs[j]; | |
| 595 saved_reg_conflicts[saved_reg->num * saved_regs_num | |
| 596 + saved_reg2->num] | |
| 597 = saved_reg_conflicts[saved_reg2->num * saved_regs_num | |
| 598 + saved_reg->num] | |
| 599 = TRUE; | |
| 600 } | |
| 601 } | |
| 602 } | |
| 603 /* Sort saved hard regs. */ | |
| 604 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *), | |
| 605 saved_hard_reg_compare_func); | |
| 606 /* Initiate slots available from the previous reload | |
| 607 iteration. */ | |
| 608 prev_save_slots_num = save_slots_num; | |
| 609 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx)); | |
| 610 save_slots_num = 0; | |
| 611 /* Allocate stack slots for the saved hard registers. */ | |
| 612 for (i = 0; i < saved_regs_num; i++) | |
| 613 { | |
| 614 saved_reg = all_saved_regs[i]; | |
| 615 regno = saved_reg->hard_regno; | |
| 616 for (j = 0; j < i; j++) | |
| 617 { | |
| 618 saved_reg2 = all_saved_regs[j]; | |
| 619 if (! saved_reg2->first_p) | |
| 620 continue; | |
| 621 slot = saved_reg2->slot; | |
| 622 for (k = j; k >= 0; k = next_k) | |
| 623 { | |
| 624 saved_reg3 = all_saved_regs[k]; | |
| 625 next_k = saved_reg3->next; | |
| 626 if (saved_reg_conflicts[saved_reg->num * saved_regs_num | |
| 627 + saved_reg3->num]) | |
| 628 break; | |
| 629 } | |
| 630 if (k < 0 | |
| 631 && (GET_MODE_SIZE (regno_save_mode[regno][1]) | |
| 632 <= GET_MODE_SIZE (regno_save_mode | |
| 633 [saved_reg2->hard_regno][1]))) | |
| 634 { | |
| 635 saved_reg->slot | |
| 636 = adjust_address_nv | |
| 637 (slot, regno_save_mode[saved_reg->hard_regno][1], 0); | |
| 638 regno_save_mem[regno][1] = saved_reg->slot; | |
| 639 saved_reg->next = saved_reg2->next; | |
| 640 saved_reg2->next = i; | |
| 641 if (dump_file != NULL) | |
| 642 fprintf (dump_file, "%d uses slot of %d\n", | |
| 643 regno, saved_reg2->hard_regno); | |
| 644 break; | |
| 645 } | |
| 646 } | |
| 647 if (j == i) | |
| 648 { | |
| 649 saved_reg->first_p = TRUE; | |
| 650 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++) | |
| 651 { | |
| 652 slot = prev_save_slots[j]; | |
| 653 if (slot == NULL_RTX) | |
| 654 continue; | |
| 655 if (GET_MODE_SIZE (regno_save_mode[regno][1]) | |
| 656 <= GET_MODE_SIZE (GET_MODE (slot)) | |
| 657 && best_slot_num < 0) | |
| 658 best_slot_num = j; | |
| 659 if (GET_MODE (slot) == regno_save_mode[regno][1]) | |
| 660 break; | |
| 661 } | |
| 662 if (best_slot_num >= 0) | |
| 663 { | |
| 664 saved_reg->slot = prev_save_slots[best_slot_num]; | |
| 665 saved_reg->slot | |
| 666 = adjust_address_nv | |
| 667 (saved_reg->slot, | |
| 668 regno_save_mode[saved_reg->hard_regno][1], 0); | |
| 669 if (dump_file != NULL) | |
| 670 fprintf (dump_file, | |
| 671 "%d uses a slot from prev iteration\n", regno); | |
| 672 prev_save_slots[best_slot_num] = NULL_RTX; | |
| 673 if (best_slot_num + 1 == prev_save_slots_num) | |
| 674 prev_save_slots_num--; | |
| 675 } | |
| 676 else | |
| 677 { | |
| 678 saved_reg->slot | |
| 679 = assign_stack_local_1 | |
| 680 (regno_save_mode[regno][1], | |
| 681 GET_MODE_SIZE (regno_save_mode[regno][1]), 0, true); | |
| 682 if (dump_file != NULL) | |
| 683 fprintf (dump_file, "%d uses a new slot\n", regno); | |
| 684 } | |
| 685 regno_save_mem[regno][1] = saved_reg->slot; | |
| 686 save_slots[save_slots_num++] = saved_reg->slot; | |
| 687 } | |
| 688 } | |
| 689 free (saved_reg_conflicts); | |
| 690 finish_saved_hard_regs (); | |
| 691 } | |
| 692 else | |
| 693 { | |
| 694 /* Now run through all the call-used hard-registers and allocate | |
| 695 space for them in the caller-save area. Try to allocate space | |
| 696 in a manner which allows multi-register saves/restores to be done. */ | |
|
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697 |
| 0 | 698 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
| 699 for (j = MOVE_MAX_WORDS; j > 0; j--) | |
| 700 { | |
| 701 int do_save = 1; | |
|
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702 |
| 0 | 703 /* If no mode exists for this size, try another. Also break out |
| 704 if we have already saved this hard register. */ | |
| 705 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0) | |
| 706 continue; | |
|
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707 |
| 0 | 708 /* See if any register in this group has been saved. */ |
| 709 for (k = 0; k < j; k++) | |
| 710 if (regno_save_mem[i + k][1]) | |
| 711 { | |
| 712 do_save = 0; | |
| 713 break; | |
| 714 } | |
| 715 if (! do_save) | |
| 716 continue; | |
|
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717 |
| 0 | 718 for (k = 0; k < j; k++) |
| 719 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k)) | |
| 720 { | |
| 721 do_save = 0; | |
| 722 break; | |
| 723 } | |
| 724 if (! do_save) | |
| 725 continue; | |
|
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726 |
| 0 | 727 /* We have found an acceptable mode to store in. Since |
| 728 hard register is always saved in the widest mode | |
| 729 available, the mode may be wider than necessary, it is | |
| 730 OK to reduce the alignment of spill space. We will | |
| 731 verify that it is equal to or greater than required | |
| 732 when we restore and save the hard register in | |
| 733 insert_restore and insert_save. */ | |
| 734 regno_save_mem[i][j] | |
| 735 = assign_stack_local_1 (regno_save_mode[i][j], | |
| 736 GET_MODE_SIZE (regno_save_mode[i][j]), | |
| 737 0, true); | |
|
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738 |
| 0 | 739 /* Setup single word save area just in case... */ |
| 740 for (k = 0; k < j; k++) | |
| 741 /* This should not depend on WORDS_BIG_ENDIAN. | |
| 742 The order of words in regs is the same as in memory. */ | |
| 743 regno_save_mem[i + k][1] | |
| 744 = adjust_address_nv (regno_save_mem[i][j], | |
| 745 regno_save_mode[i + k][1], | |
| 746 k * UNITS_PER_WORD); | |
| 747 } | |
| 748 } | |
| 749 | |
| 750 /* Now loop again and set the alias set of any save areas we made to | |
| 751 the alias set used to represent frame objects. */ | |
| 752 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 753 for (j = MOVE_MAX_WORDS; j > 0; j--) | |
| 754 if (regno_save_mem[i][j] != 0) | |
| 755 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ()); | |
| 756 } | |
| 757 | |
| 758 | |
| 759 | |
| 760 /* Find the places where hard regs are live across calls and save them. */ | |
| 761 | |
| 762 void | |
| 763 save_call_clobbered_regs (void) | |
| 764 { | |
|
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765 struct insn_chain *chain, *next, *last = NULL; |
| 0 | 766 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER]; |
| 767 | |
| 768 /* Computed in mark_set_regs, holds all registers set by the current | |
| 769 instruction. */ | |
| 770 HARD_REG_SET this_insn_sets; | |
| 771 | |
| 772 CLEAR_HARD_REG_SET (hard_regs_saved); | |
| 773 n_regs_saved = 0; | |
| 774 | |
| 775 for (chain = reload_insn_chain; chain != 0; chain = next) | |
| 776 { | |
| 777 rtx insn = chain->insn; | |
| 778 enum rtx_code code = GET_CODE (insn); | |
| 779 | |
| 780 next = chain->next; | |
| 781 | |
| 782 gcc_assert (!chain->is_caller_save_insn); | |
| 783 | |
|
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784 if (NONDEBUG_INSN_P (insn)) |
| 0 | 785 { |
| 786 /* If some registers have been saved, see if INSN references | |
| 787 any of them. We must restore them before the insn if so. */ | |
| 788 | |
| 789 if (n_regs_saved) | |
| 790 { | |
| 791 int regno; | |
| 792 | |
| 793 if (code == JUMP_INSN) | |
| 794 /* Restore all registers if this is a JUMP_INSN. */ | |
| 795 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved); | |
| 796 else | |
| 797 { | |
| 798 CLEAR_HARD_REG_SET (referenced_regs); | |
|
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799 mark_referenced_regs (&PATTERN (insn), |
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800 mark_reg_as_referenced, NULL); |
| 0 | 801 AND_HARD_REG_SET (referenced_regs, hard_regs_saved); |
| 802 } | |
| 803 | |
| 804 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 805 if (TEST_HARD_REG_BIT (referenced_regs, regno)) | |
| 806 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode); | |
| 807 } | |
| 808 | |
| 809 if (code == CALL_INSN | |
| 810 && ! SIBLING_CALL_P (insn) | |
| 811 && ! find_reg_note (insn, REG_NORETURN, NULL)) | |
| 812 { | |
| 813 unsigned regno; | |
| 814 HARD_REG_SET hard_regs_to_save; | |
| 815 reg_set_iterator rsi; | |
| 816 | |
| 817 /* Use the register life information in CHAIN to compute which | |
| 818 regs are live during the call. */ | |
| 819 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, | |
| 820 &chain->live_throughout); | |
| 821 /* Save hard registers always in the widest mode available. */ | |
| 822 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 823 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) | |
| 824 save_mode [regno] = regno_save_mode [regno][1]; | |
| 825 else | |
| 826 save_mode [regno] = VOIDmode; | |
| 827 | |
| 828 /* Look through all live pseudos, mark their hard registers | |
| 829 and choose proper mode for saving. */ | |
| 830 EXECUTE_IF_SET_IN_REG_SET | |
| 831 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) | |
| 832 { | |
| 833 int r = reg_renumber[regno]; | |
| 834 int nregs; | |
| 835 enum machine_mode mode; | |
| 836 | |
| 837 if (r < 0) | |
| 838 continue; | |
| 839 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)]; | |
| 840 mode = HARD_REGNO_CALLER_SAVE_MODE | |
| 841 (r, nregs, PSEUDO_REGNO_MODE (regno)); | |
| 842 if (GET_MODE_BITSIZE (mode) | |
| 843 > GET_MODE_BITSIZE (save_mode[r])) | |
| 844 save_mode[r] = mode; | |
| 845 while (nregs-- > 0) | |
| 846 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs); | |
| 847 } | |
| 848 | |
| 849 /* Record all registers set in this call insn. These don't need | |
| 850 to be saved. N.B. the call insn might set a subreg of a | |
| 851 multi-hard-reg pseudo; then the pseudo is considered live | |
| 852 during the call, but the subreg that is set isn't. */ | |
| 853 CLEAR_HARD_REG_SET (this_insn_sets); | |
| 854 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets); | |
| 855 | |
| 856 /* Compute which hard regs must be saved before this call. */ | |
| 857 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set); | |
| 858 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets); | |
| 859 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved); | |
| 860 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set); | |
| 861 | |
| 862 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 863 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) | |
| 864 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode); | |
| 865 | |
| 866 /* Must recompute n_regs_saved. */ | |
| 867 n_regs_saved = 0; | |
| 868 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 869 if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
| 870 n_regs_saved++; | |
| 871 } | |
|
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872 last = chain; |
| 0 | 873 } |
|
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874 else if (DEBUG_INSN_P (insn) && n_regs_saved) |
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875 mark_referenced_regs (&PATTERN (insn), |
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876 replace_reg_with_saved_mem, |
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877 save_mode); |
| 0 | 878 |
| 879 if (chain->next == 0 || chain->next->block != chain->block) | |
| 880 { | |
| 881 int regno; | |
| 882 /* At the end of the basic block, we must restore any registers that | |
| 883 remain saved. If the last insn in the block is a JUMP_INSN, put | |
| 884 the restore before the insn, otherwise, put it after the insn. */ | |
| 885 | |
|
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886 if (DEBUG_INSN_P (insn) && last && last->block == chain->block) |
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887 { |
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888 rtx ins, prev; |
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889 basic_block bb = BLOCK_FOR_INSN (insn); |
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890 |
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891 /* When adding hard reg restores after a DEBUG_INSN, move |
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892 all notes between last real insn and this DEBUG_INSN after |
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893 the DEBUG_INSN, otherwise we could get code |
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894 -g/-g0 differences. */ |
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895 for (ins = PREV_INSN (insn); ins != last->insn; ins = prev) |
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896 { |
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897 prev = PREV_INSN (ins); |
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898 if (NOTE_P (ins)) |
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899 { |
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900 NEXT_INSN (prev) = NEXT_INSN (ins); |
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901 PREV_INSN (NEXT_INSN (ins)) = prev; |
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902 PREV_INSN (ins) = insn; |
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903 NEXT_INSN (ins) = NEXT_INSN (insn); |
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904 NEXT_INSN (insn) = ins; |
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905 if (NEXT_INSN (ins)) |
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906 PREV_INSN (NEXT_INSN (ins)) = ins; |
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907 if (BB_END (bb) == insn) |
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908 BB_END (bb) = ins; |
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909 } |
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910 else |
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911 gcc_assert (DEBUG_INSN_P (ins)); |
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912 } |
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913 } |
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914 last = NULL; |
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915 |
| 0 | 916 if (n_regs_saved) |
| 917 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 918 if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
| 919 regno += insert_restore (chain, JUMP_P (insn), | |
| 920 regno, MOVE_MAX_WORDS, save_mode); | |
| 921 } | |
| 922 } | |
| 923 } | |
| 924 | |
| 925 /* Here from note_stores, or directly from save_call_clobbered_regs, when | |
| 926 an insn stores a value in a register. | |
| 927 Set the proper bit or bits in this_insn_sets. All pseudos that have | |
| 928 been assigned hard regs have had their register number changed already, | |
| 929 so we can ignore pseudos. */ | |
| 930 static void | |
| 931 mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data) | |
| 932 { | |
| 933 int regno, endregno, i; | |
| 934 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data; | |
| 935 | |
| 936 if (GET_CODE (reg) == SUBREG) | |
| 937 { | |
| 938 rtx inner = SUBREG_REG (reg); | |
| 939 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER) | |
| 940 return; | |
| 941 regno = subreg_regno (reg); | |
| 942 endregno = regno + subreg_nregs (reg); | |
| 943 } | |
| 944 else if (REG_P (reg) | |
| 945 && REGNO (reg) < FIRST_PSEUDO_REGISTER) | |
| 946 { | |
| 947 regno = REGNO (reg); | |
| 948 endregno = END_HARD_REGNO (reg); | |
| 949 } | |
| 950 else | |
| 951 return; | |
| 952 | |
| 953 for (i = regno; i < endregno; i++) | |
| 954 SET_HARD_REG_BIT (*this_insn_sets, i); | |
| 955 } | |
| 956 | |
| 957 /* Here from note_stores when an insn stores a value in a register. | |
| 958 Set the proper bit or bits in the passed regset. All pseudos that have | |
| 959 been assigned hard regs have had their register number changed already, | |
| 960 so we can ignore pseudos. */ | |
| 961 static void | |
| 962 add_stored_regs (rtx reg, const_rtx setter, void *data) | |
| 963 { | |
| 964 int regno, endregno, i; | |
| 965 enum machine_mode mode = GET_MODE (reg); | |
| 966 int offset = 0; | |
| 967 | |
| 968 if (GET_CODE (setter) == CLOBBER) | |
| 969 return; | |
| 970 | |
| 971 if (GET_CODE (reg) == SUBREG | |
| 972 && REG_P (SUBREG_REG (reg)) | |
| 973 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER) | |
| 974 { | |
| 975 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)), | |
| 976 GET_MODE (SUBREG_REG (reg)), | |
| 977 SUBREG_BYTE (reg), | |
| 978 GET_MODE (reg)); | |
| 979 regno = REGNO (SUBREG_REG (reg)) + offset; | |
| 980 endregno = regno + subreg_nregs (reg); | |
| 981 } | |
| 982 else | |
| 983 { | |
| 984 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER) | |
| 985 return; | |
| 986 | |
| 987 regno = REGNO (reg) + offset; | |
| 988 endregno = end_hard_regno (mode, regno); | |
| 989 } | |
| 990 | |
| 991 for (i = regno; i < endregno; i++) | |
| 992 SET_REGNO_REG_SET ((regset) data, i); | |
| 993 } | |
| 994 | |
| 995 /* Walk X and record all referenced registers in REFERENCED_REGS. */ | |
| 996 static void | |
|
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997 mark_referenced_regs (rtx *loc, refmarker_fn *mark, void *arg) |
| 0 | 998 { |
|
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999 enum rtx_code code = GET_CODE (*loc); |
| 0 | 1000 const char *fmt; |
| 1001 int i, j; | |
| 1002 | |
| 1003 if (code == SET) | |
|
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1004 mark_referenced_regs (&SET_SRC (*loc), mark, arg); |
| 0 | 1005 if (code == SET || code == CLOBBER) |
| 1006 { | |
|
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1007 loc = &SET_DEST (*loc); |
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1008 code = GET_CODE (*loc); |
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1009 if ((code == REG && REGNO (*loc) < FIRST_PSEUDO_REGISTER) |
| 0 | 1010 || code == PC || code == CC0 |
|
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1011 || (code == SUBREG && REG_P (SUBREG_REG (*loc)) |
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1012 && REGNO (SUBREG_REG (*loc)) < FIRST_PSEUDO_REGISTER |
| 0 | 1013 /* If we're setting only part of a multi-word register, |
| 1014 we shall mark it as referenced, because the words | |
| 1015 that are not being set should be restored. */ | |
|
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1016 && ((GET_MODE_SIZE (GET_MODE (*loc)) |
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1017 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc)))) |
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1018 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc))) |
| 0 | 1019 <= UNITS_PER_WORD)))) |
| 1020 return; | |
| 1021 } | |
| 1022 if (code == MEM || code == SUBREG) | |
| 1023 { | |
|
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1024 loc = &XEXP (*loc, 0); |
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1025 code = GET_CODE (*loc); |
| 0 | 1026 } |
| 1027 | |
| 1028 if (code == REG) | |
| 1029 { | |
|
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1030 int regno = REGNO (*loc); |
| 0 | 1031 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno |
| 1032 : reg_renumber[regno]); | |
| 1033 | |
| 1034 if (hardregno >= 0) | |
|
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1035 mark (loc, GET_MODE (*loc), hardregno, arg); |
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1036 else if (arg) |
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1037 /* ??? Will we ever end up with an equiv expression in a debug |
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1038 insn, that would have required restoring a reg, or will |
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1039 reload take care of it for us? */ |
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1040 return; |
| 0 | 1041 /* If this is a pseudo that did not get a hard register, scan its |
| 1042 memory location, since it might involve the use of another | |
| 1043 register, which might be saved. */ | |
| 1044 else if (reg_equiv_mem[regno] != 0) | |
|
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1045 mark_referenced_regs (&XEXP (reg_equiv_mem[regno], 0), mark, arg); |
| 0 | 1046 else if (reg_equiv_address[regno] != 0) |
|
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1047 mark_referenced_regs (®_equiv_address[regno], mark, arg); |
| 0 | 1048 return; |
| 1049 } | |
| 1050 | |
| 1051 fmt = GET_RTX_FORMAT (code); | |
| 1052 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
| 1053 { | |
| 1054 if (fmt[i] == 'e') | |
|
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1055 mark_referenced_regs (&XEXP (*loc, i), mark, arg); |
| 0 | 1056 else if (fmt[i] == 'E') |
|
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1057 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--) |
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1058 mark_referenced_regs (&XVECEXP (*loc, i, j), mark, arg); |
| 0 | 1059 } |
| 1060 } | |
|
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1061 |
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1062 /* Parameter function for mark_referenced_regs() that adds registers |
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1063 present in the insn and in equivalent mems and addresses to |
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1064 referenced_regs. */ |
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1065 |
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1066 static void |
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1067 mark_reg_as_referenced (rtx *loc ATTRIBUTE_UNUSED, |
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1068 enum machine_mode mode, |
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1069 int hardregno, |
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1070 void *arg ATTRIBUTE_UNUSED) |
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1071 { |
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1072 add_to_hard_reg_set (&referenced_regs, mode, hardregno); |
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1073 } |
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1074 |
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1075 /* Parameter function for mark_referenced_regs() that replaces |
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1076 registers referenced in a debug_insn that would have been restored, |
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1077 should it be a non-debug_insn, with their save locations. */ |
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1078 |
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1079 static void |
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1080 replace_reg_with_saved_mem (rtx *loc, |
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1081 enum machine_mode mode, |
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1082 int regno, |
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1083 void *arg) |
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1084 { |
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1085 unsigned int i, nregs = hard_regno_nregs [regno][mode]; |
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1086 rtx mem; |
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1087 enum machine_mode *save_mode = (enum machine_mode *)arg; |
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1088 |
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1089 for (i = 0; i < nregs; i++) |
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1090 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) |
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1091 break; |
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1092 |
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1093 /* If none of the registers in the range would need restoring, we're |
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1094 all set. */ |
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1095 if (i == nregs) |
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1096 return; |
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1097 |
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1098 while (++i < nregs) |
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1099 if (!TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) |
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1100 break; |
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1101 |
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1102 if (i == nregs |
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1103 && regno_save_mem[regno][nregs]) |
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1104 { |
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1105 mem = copy_rtx (regno_save_mem[regno][nregs]); |
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1106 |
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1107 if (nregs == (unsigned int) hard_regno_nregs[regno][save_mode[regno]]) |
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1108 mem = adjust_address_nv (mem, save_mode[regno], 0); |
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1109 |
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1110 if (GET_MODE (mem) != mode) |
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1111 { |
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1112 /* This is gen_lowpart_if_possible(), but without validating |
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1113 the newly-formed address. */ |
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1114 int offset = 0; |
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1115 |
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1116 if (WORDS_BIG_ENDIAN) |
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1117 offset = (MAX (GET_MODE_SIZE (GET_MODE (mem)), UNITS_PER_WORD) |
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1118 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); |
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1119 if (BYTES_BIG_ENDIAN) |
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1120 /* Adjust the address so that the address-after-the-data is |
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1121 unchanged. */ |
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1122 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) |
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1123 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (mem)))); |
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1124 |
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1125 mem = adjust_address_nv (mem, mode, offset); |
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1126 } |
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1127 } |
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1128 else |
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1129 { |
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1130 mem = gen_rtx_CONCATN (mode, rtvec_alloc (nregs)); |
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1131 for (i = 0; i < nregs; i++) |
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1132 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) |
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1133 { |
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1134 gcc_assert (regno_save_mem[regno + i][1]); |
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1135 XVECEXP (mem, 0, i) = copy_rtx (regno_save_mem[regno + i][1]); |
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1136 } |
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1137 else |
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1138 { |
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1139 gcc_assert (save_mode[regno] != VOIDmode); |
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1140 XVECEXP (mem, 0, i) = gen_rtx_REG (save_mode [regno], |
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1141 regno + i); |
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1142 } |
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1143 } |
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1144 |
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1145 gcc_assert (GET_MODE (mem) == mode); |
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1146 *loc = mem; |
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1147 } |
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1148 |
| 0 | 1149 |
| 1150 /* Insert a sequence of insns to restore. Place these insns in front of | |
| 1151 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is | |
| 1152 the maximum number of registers which should be restored during this call. | |
| 1153 It should never be less than 1 since we only work with entire registers. | |
| 1154 | |
| 1155 Note that we have verified in init_caller_save that we can do this | |
| 1156 with a simple SET, so use it. Set INSN_CODE to what we save there | |
| 1157 since the address might not be valid so the insn might not be recognized. | |
| 1158 These insns will be reloaded and have register elimination done by | |
| 1159 find_reload, so we need not worry about that here. | |
| 1160 | |
| 1161 Return the extra number of registers saved. */ | |
| 1162 | |
| 1163 static int | |
| 1164 insert_restore (struct insn_chain *chain, int before_p, int regno, | |
| 1165 int maxrestore, enum machine_mode *save_mode) | |
| 1166 { | |
| 1167 int i, k; | |
| 1168 rtx pat = NULL_RTX; | |
| 1169 int code; | |
| 1170 unsigned int numregs = 0; | |
| 1171 struct insn_chain *new_chain; | |
| 1172 rtx mem; | |
| 1173 | |
| 1174 /* A common failure mode if register status is not correct in the | |
| 1175 RTL is for this routine to be called with a REGNO we didn't | |
| 1176 expect to save. That will cause us to write an insn with a (nil) | |
| 1177 SET_DEST or SET_SRC. Instead of doing so and causing a crash | |
| 1178 later, check for this common case here instead. This will remove | |
| 1179 one step in debugging such problems. */ | |
| 1180 gcc_assert (regno_save_mem[regno][1]); | |
| 1181 | |
| 1182 /* Get the pattern to emit and update our status. | |
| 1183 | |
| 1184 See if we can restore `maxrestore' registers at once. Work | |
| 1185 backwards to the single register case. */ | |
| 1186 for (i = maxrestore; i > 0; i--) | |
| 1187 { | |
| 1188 int j; | |
| 1189 int ok = 1; | |
| 1190 | |
| 1191 if (regno_save_mem[regno][i] == 0) | |
| 1192 continue; | |
| 1193 | |
| 1194 for (j = 0; j < i; j++) | |
| 1195 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j)) | |
| 1196 { | |
| 1197 ok = 0; | |
| 1198 break; | |
| 1199 } | |
| 1200 /* Must do this one restore at a time. */ | |
| 1201 if (! ok) | |
| 1202 continue; | |
| 1203 | |
| 1204 numregs = i; | |
| 1205 break; | |
| 1206 } | |
| 1207 | |
| 1208 mem = regno_save_mem [regno][numregs]; | |
| 1209 if (save_mode [regno] != VOIDmode | |
| 1210 && save_mode [regno] != GET_MODE (mem) | |
| 1211 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]] | |
| 1212 /* Check that insn to restore REGNO in save_mode[regno] is | |
| 1213 correct. */ | |
| 1214 && reg_save_code (regno, save_mode[regno]) >= 0) | |
| 1215 mem = adjust_address (mem, save_mode[regno], 0); | |
| 1216 else | |
| 1217 mem = copy_rtx (mem); | |
| 1218 | |
| 1219 /* Verify that the alignment of spill space is equal to or greater | |
| 1220 than required. */ | |
| 1221 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT, | |
| 1222 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem)); | |
| 1223 | |
| 1224 pat = gen_rtx_SET (VOIDmode, | |
| 1225 gen_rtx_REG (GET_MODE (mem), | |
| 1226 regno), mem); | |
| 1227 code = reg_restore_code (regno, GET_MODE (mem)); | |
| 1228 new_chain = insert_one_insn (chain, before_p, code, pat); | |
| 1229 | |
| 1230 /* Clear status for all registers we restored. */ | |
| 1231 for (k = 0; k < i; k++) | |
| 1232 { | |
| 1233 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k); | |
| 1234 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k); | |
| 1235 n_regs_saved--; | |
| 1236 } | |
| 1237 | |
| 1238 /* Tell our callers how many extra registers we saved/restored. */ | |
| 1239 return numregs - 1; | |
| 1240 } | |
| 1241 | |
| 1242 /* Like insert_restore above, but save registers instead. */ | |
| 1243 | |
| 1244 static int | |
| 1245 insert_save (struct insn_chain *chain, int before_p, int regno, | |
| 1246 HARD_REG_SET (*to_save), enum machine_mode *save_mode) | |
| 1247 { | |
| 1248 int i; | |
| 1249 unsigned int k; | |
| 1250 rtx pat = NULL_RTX; | |
| 1251 int code; | |
| 1252 unsigned int numregs = 0; | |
| 1253 struct insn_chain *new_chain; | |
| 1254 rtx mem; | |
| 1255 | |
| 1256 /* A common failure mode if register status is not correct in the | |
| 1257 RTL is for this routine to be called with a REGNO we didn't | |
| 1258 expect to save. That will cause us to write an insn with a (nil) | |
| 1259 SET_DEST or SET_SRC. Instead of doing so and causing a crash | |
| 1260 later, check for this common case here. This will remove one | |
| 1261 step in debugging such problems. */ | |
| 1262 gcc_assert (regno_save_mem[regno][1]); | |
| 1263 | |
| 1264 /* Get the pattern to emit and update our status. | |
| 1265 | |
| 1266 See if we can save several registers with a single instruction. | |
| 1267 Work backwards to the single register case. */ | |
| 1268 for (i = MOVE_MAX_WORDS; i > 0; i--) | |
| 1269 { | |
| 1270 int j; | |
| 1271 int ok = 1; | |
| 1272 if (regno_save_mem[regno][i] == 0) | |
| 1273 continue; | |
| 1274 | |
| 1275 for (j = 0; j < i; j++) | |
| 1276 if (! TEST_HARD_REG_BIT (*to_save, regno + j)) | |
| 1277 { | |
| 1278 ok = 0; | |
| 1279 break; | |
| 1280 } | |
| 1281 /* Must do this one save at a time. */ | |
| 1282 if (! ok) | |
| 1283 continue; | |
| 1284 | |
| 1285 numregs = i; | |
| 1286 break; | |
| 1287 } | |
| 1288 | |
| 1289 mem = regno_save_mem [regno][numregs]; | |
| 1290 if (save_mode [regno] != VOIDmode | |
| 1291 && save_mode [regno] != GET_MODE (mem) | |
| 1292 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]] | |
| 1293 /* Check that insn to save REGNO in save_mode[regno] is | |
| 1294 correct. */ | |
| 1295 && reg_save_code (regno, save_mode[regno]) >= 0) | |
| 1296 mem = adjust_address (mem, save_mode[regno], 0); | |
| 1297 else | |
| 1298 mem = copy_rtx (mem); | |
| 1299 | |
| 1300 /* Verify that the alignment of spill space is equal to or greater | |
| 1301 than required. */ | |
| 1302 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT, | |
| 1303 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem)); | |
| 1304 | |
| 1305 pat = gen_rtx_SET (VOIDmode, mem, | |
| 1306 gen_rtx_REG (GET_MODE (mem), | |
| 1307 regno)); | |
| 1308 code = reg_save_code (regno, GET_MODE (mem)); | |
| 1309 new_chain = insert_one_insn (chain, before_p, code, pat); | |
| 1310 | |
| 1311 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */ | |
| 1312 for (k = 0; k < numregs; k++) | |
| 1313 { | |
| 1314 SET_HARD_REG_BIT (hard_regs_saved, regno + k); | |
| 1315 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k); | |
| 1316 n_regs_saved++; | |
| 1317 } | |
| 1318 | |
| 1319 /* Tell our callers how many extra registers we saved/restored. */ | |
| 1320 return numregs - 1; | |
| 1321 } | |
| 1322 | |
| 1323 /* A for_each_rtx callback used by add_used_regs. Add the hard-register | |
| 1324 equivalent of each REG to regset DATA. */ | |
| 1325 | |
| 1326 static int | |
| 1327 add_used_regs_1 (rtx *loc, void *data) | |
| 1328 { | |
| 1329 int regno, i; | |
| 1330 regset live; | |
| 1331 rtx x; | |
| 1332 | |
| 1333 x = *loc; | |
| 1334 live = (regset) data; | |
| 1335 if (REG_P (x)) | |
| 1336 { | |
| 1337 regno = REGNO (x); | |
| 1338 if (!HARD_REGISTER_NUM_P (regno)) | |
| 1339 regno = reg_renumber[regno]; | |
| 1340 if (regno >= 0) | |
| 1341 for (i = hard_regno_nregs[regno][GET_MODE (x)] - 1; i >= 0; i--) | |
| 1342 SET_REGNO_REG_SET (live, regno + i); | |
| 1343 } | |
| 1344 return 0; | |
| 1345 } | |
| 1346 | |
| 1347 /* A note_uses callback used by insert_one_insn. Add the hard-register | |
| 1348 equivalent of each REG to regset DATA. */ | |
| 1349 | |
| 1350 static void | |
| 1351 add_used_regs (rtx *loc, void *data) | |
| 1352 { | |
| 1353 for_each_rtx (loc, add_used_regs_1, data); | |
| 1354 } | |
| 1355 | |
| 1356 /* Emit a new caller-save insn and set the code. */ | |
| 1357 static struct insn_chain * | |
| 1358 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat) | |
| 1359 { | |
| 1360 rtx insn = chain->insn; | |
| 1361 struct insn_chain *new_chain; | |
| 1362 | |
| 1363 #ifdef HAVE_cc0 | |
| 1364 /* If INSN references CC0, put our insns in front of the insn that sets | |
| 1365 CC0. This is always safe, since the only way we could be passed an | |
| 1366 insn that references CC0 is for a restore, and doing a restore earlier | |
| 1367 isn't a problem. We do, however, assume here that CALL_INSNs don't | |
| 1368 reference CC0. Guard against non-INSN's like CODE_LABEL. */ | |
| 1369 | |
| 1370 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn)) | |
| 1371 && before_p | |
| 1372 && reg_referenced_p (cc0_rtx, PATTERN (insn))) | |
| 1373 chain = chain->prev, insn = chain->insn; | |
| 1374 #endif | |
| 1375 | |
| 1376 new_chain = new_insn_chain (); | |
| 1377 if (before_p) | |
| 1378 { | |
| 1379 rtx link; | |
| 1380 | |
| 1381 new_chain->prev = chain->prev; | |
| 1382 if (new_chain->prev != 0) | |
| 1383 new_chain->prev->next = new_chain; | |
| 1384 else | |
| 1385 reload_insn_chain = new_chain; | |
| 1386 | |
| 1387 chain->prev = new_chain; | |
| 1388 new_chain->next = chain; | |
| 1389 new_chain->insn = emit_insn_before (pat, insn); | |
| 1390 /* ??? It would be nice if we could exclude the already / still saved | |
| 1391 registers from the live sets. */ | |
| 1392 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout); | |
| 1393 note_uses (&PATTERN (chain->insn), add_used_regs, | |
| 1394 &new_chain->live_throughout); | |
| 1395 /* If CHAIN->INSN is a call, then the registers which contain | |
| 1396 the arguments to the function are live in the new insn. */ | |
| 1397 if (CALL_P (chain->insn)) | |
| 1398 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn); | |
| 1399 link != NULL_RTX; | |
| 1400 link = XEXP (link, 1)) | |
| 1401 note_uses (&XEXP (link, 0), add_used_regs, | |
| 1402 &new_chain->live_throughout); | |
| 1403 | |
| 1404 CLEAR_REG_SET (&new_chain->dead_or_set); | |
| 1405 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block))) | |
| 1406 BB_HEAD (BASIC_BLOCK (chain->block)) = new_chain->insn; | |
| 1407 } | |
| 1408 else | |
| 1409 { | |
| 1410 new_chain->next = chain->next; | |
| 1411 if (new_chain->next != 0) | |
| 1412 new_chain->next->prev = new_chain; | |
| 1413 chain->next = new_chain; | |
| 1414 new_chain->prev = chain; | |
| 1415 new_chain->insn = emit_insn_after (pat, insn); | |
| 1416 /* ??? It would be nice if we could exclude the already / still saved | |
| 1417 registers from the live sets, and observe REG_UNUSED notes. */ | |
| 1418 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout); | |
| 1419 /* Registers that are set in CHAIN->INSN live in the new insn. | |
| 1420 (Unless there is a REG_UNUSED note for them, but we don't | |
| 1421 look for them here.) */ | |
| 1422 note_stores (PATTERN (chain->insn), add_stored_regs, | |
| 1423 &new_chain->live_throughout); | |
| 1424 CLEAR_REG_SET (&new_chain->dead_or_set); | |
| 1425 if (chain->insn == BB_END (BASIC_BLOCK (chain->block))) | |
| 1426 BB_END (BASIC_BLOCK (chain->block)) = new_chain->insn; | |
| 1427 } | |
| 1428 new_chain->block = chain->block; | |
| 1429 new_chain->is_caller_save_insn = 1; | |
| 1430 | |
| 1431 INSN_CODE (new_chain->insn) = code; | |
| 1432 return new_chain; | |
| 1433 } | |
| 1434 #include "gt-caller-save.h" |