Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/mcore/mcore.h @ 63:b7f97abdc517 gcc-4.6-20100522
update gcc from gcc-4.5.0 to gcc-4.6
| author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Mon, 24 May 2010 12:47:05 +0900 |
| parents | 77e2b8dfacca |
| children | f6334be47118 |
| rev | line source |
|---|---|
| 0 | 1 /* Definitions of target machine for GNU compiler, |
| 2 for Motorola M*CORE Processor. | |
| 3 Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, | |
|
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77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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changeset
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4 2008, 2009 Free Software Foundation, Inc. |
| 0 | 5 |
| 6 This file is part of GCC. | |
| 7 | |
| 8 GCC is free software; you can redistribute it and/or modify it | |
| 9 under the terms of the GNU General Public License as published | |
| 10 by the Free Software Foundation; either version 3, or (at your | |
| 11 option) any later version. | |
| 12 | |
| 13 GCC is distributed in the hope that it will be useful, but WITHOUT | |
| 14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
| 15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
| 16 License for more details. | |
| 17 | |
| 18 You should have received a copy of the GNU General Public License | |
| 19 along with GCC; see the file COPYING3. If not see | |
| 20 <http://www.gnu.org/licenses/>. */ | |
| 21 | |
| 22 #ifndef GCC_MCORE_H | |
| 23 #define GCC_MCORE_H | |
| 24 | |
| 25 /* RBE: need to move these elsewhere. */ | |
| 26 #undef LIKE_PPC_ABI | |
| 27 #define MCORE_STRUCT_ARGS | |
| 28 /* RBE: end of "move elsewhere". */ | |
| 29 | |
| 30 /* Run-time Target Specification. */ | |
| 31 #define TARGET_MCORE | |
| 32 | |
| 33 /* Get tree.c to declare a target-specific specialization of | |
| 34 merge_decl_attributes. */ | |
| 35 #define TARGET_DLLIMPORT_DECL_ATTRIBUTES 1 | |
| 36 | |
| 37 #define TARGET_CPU_CPP_BUILTINS() \ | |
| 38 do \ | |
| 39 { \ | |
| 40 builtin_define ("__mcore__"); \ | |
| 41 builtin_define ("__MCORE__"); \ | |
| 42 if (TARGET_LITTLE_END) \ | |
| 43 builtin_define ("__MCORELE__"); \ | |
| 44 else \ | |
| 45 builtin_define ("__MCOREBE__"); \ | |
| 46 if (TARGET_M340) \ | |
| 47 builtin_define ("__M340__"); \ | |
| 48 else \ | |
| 49 builtin_define ("__M210__"); \ | |
| 50 } \ | |
| 51 while (0) | |
| 52 | |
| 53 #undef CPP_SPEC | |
| 54 #define CPP_SPEC "%{m210:%{mlittle-endian:%ethe m210 does not have little endian support}}" | |
| 55 | |
| 56 /* We don't have a -lg library, so don't put it in the list. */ | |
| 57 #undef LIB_SPEC | |
| 58 #define LIB_SPEC "%{!shared: %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}}" | |
| 59 | |
| 60 #undef ASM_SPEC | |
| 61 #define ASM_SPEC "%{mbig-endian:-EB} %{m210:-cpu=210 -EB}" | |
| 62 | |
| 63 #undef LINK_SPEC | |
| 64 #define LINK_SPEC "%{mbig-endian:-EB} %{m210:-EB} -X" | |
| 65 | |
| 66 #define TARGET_DEFAULT \ | |
| 67 (MASK_HARDLIT \ | |
| 68 | MASK_DIV \ | |
| 69 | MASK_RELAX_IMM \ | |
| 70 | MASK_M340 \ | |
| 71 | MASK_LITTLE_END) | |
| 72 | |
| 73 #ifndef MULTILIB_DEFAULTS | |
| 74 #define MULTILIB_DEFAULTS { "mlittle-endian", "m340" } | |
| 75 #endif | |
| 76 | |
| 77 /* The ability to have 4 byte alignment is being suppressed for now. | |
| 78 If this ability is reenabled, you must disable the definition below | |
| 79 *and* edit t-mcore to enable multilibs for 4 byte alignment code. */ | |
| 80 #undef TARGET_8ALIGN | |
| 81 #define TARGET_8ALIGN 1 | |
| 82 | |
| 83 extern char * mcore_current_function_name; | |
| 84 | |
| 85 /* The MCore ABI says that bitfields are unsigned by default. */ | |
| 86 #define CC1_SPEC "-funsigned-bitfields" | |
| 87 | |
| 88 /* What options are we going to default to specific settings when | |
| 89 -O* happens; the user can subsequently override these settings. | |
| 90 | |
| 91 Omitting the frame pointer is a very good idea on the MCore. | |
| 92 Scheduling isn't worth anything on the current MCore implementation. */ | |
| 93 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \ | |
| 94 { \ | |
| 95 if (LEVEL) \ | |
| 96 { \ | |
| 97 flag_no_function_cse = 1; \ | |
| 98 flag_omit_frame_pointer = 1; \ | |
| 99 \ | |
| 100 if (LEVEL >= 2) \ | |
| 101 { \ | |
| 102 flag_caller_saves = 0; \ | |
| 103 flag_schedule_insns = 0; \ | |
| 104 flag_schedule_insns_after_reload = 0; \ | |
| 105 } \ | |
| 106 } \ | |
| 107 if (SIZE) \ | |
| 108 { \ | |
| 109 target_flags &= ~MASK_HARDLIT; \ | |
| 110 } \ | |
| 111 } | |
| 112 | |
| 113 /* What options are we going to force to specific settings, | |
| 114 regardless of what the user thought he wanted. | |
| 115 We also use this for some post-processing of options. */ | |
| 116 #define OVERRIDE_OPTIONS mcore_override_options () | |
| 117 | |
| 118 /* Target machine storage Layout. */ | |
| 119 | |
| 120 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
| 121 if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
| 122 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
| 123 { \ | |
| 124 (MODE) = SImode; \ | |
| 125 (UNSIGNEDP) = 1; \ | |
| 126 } | |
| 127 | |
| 128 /* Define this if most significant bit is lowest numbered | |
| 129 in instructions that operate on numbered bit-fields. */ | |
| 130 #define BITS_BIG_ENDIAN 0 | |
| 131 | |
| 132 /* Define this if most significant byte of a word is the lowest numbered. */ | |
| 133 #define BYTES_BIG_ENDIAN (! TARGET_LITTLE_END) | |
| 134 | |
| 135 /* Define this if most significant word of a multiword number is the lowest | |
| 136 numbered. */ | |
| 137 #define WORDS_BIG_ENDIAN (! TARGET_LITTLE_END) | |
| 138 | |
| 139 #define LIBGCC2_WORDS_BIG_ENDIAN 1 | |
| 140 #ifdef __MCORELE__ | |
| 141 #undef LIBGCC2_WORDS_BIG_ENDIAN | |
| 142 #define LIBGCC2_WORDS_BIG_ENDIAN 0 | |
| 143 #endif | |
| 144 | |
| 145 #define MAX_BITS_PER_WORD 32 | |
| 146 | |
| 147 /* Width of a word, in units (bytes). */ | |
| 148 #define UNITS_PER_WORD 4 | |
| 149 | |
| 150 /* A C expression for the size in bits of the type `long long' on the | |
| 151 target machine. If you don't define this, the default is two | |
| 152 words. */ | |
| 153 #define LONG_LONG_TYPE_SIZE 64 | |
| 154 | |
| 155 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
| 156 #define PARM_BOUNDARY 32 | |
| 157 | |
| 158 /* Doubles must be aligned to an 8 byte boundary. */ | |
| 159 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ | |
| 160 ((MODE != BLKmode && (GET_MODE_SIZE (MODE) == 8)) \ | |
| 161 ? BIGGEST_ALIGNMENT : PARM_BOUNDARY) | |
| 162 | |
| 163 /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
| 164 #define STACK_BOUNDARY (TARGET_8ALIGN ? 64 : 32) | |
| 165 | |
| 166 /* Largest increment in UNITS we allow the stack to grow in a single operation. */ | |
| 167 extern int mcore_stack_increment; | |
| 168 #define STACK_UNITS_MAXSTEP 4096 | |
| 169 | |
| 170 /* Allocation boundary (in *bits*) for the code of a function. */ | |
| 171 #define FUNCTION_BOUNDARY ((TARGET_OVERALIGN_FUNC) ? 32 : 16) | |
| 172 | |
| 173 /* Alignment of field after `int : 0' in a structure. */ | |
| 174 #define EMPTY_FIELD_BOUNDARY 32 | |
| 175 | |
| 176 /* No data type wants to be aligned rounder than this. */ | |
| 177 #define BIGGEST_ALIGNMENT (TARGET_8ALIGN ? 64 : 32) | |
| 178 | |
| 179 /* The best alignment to use in cases where we have a choice. */ | |
| 180 #define FASTEST_ALIGNMENT 32 | |
| 181 | |
| 182 /* Every structures size must be a multiple of 8 bits. */ | |
| 183 #define STRUCTURE_SIZE_BOUNDARY 8 | |
| 184 | |
| 185 /* Look at the fundamental type that is used for a bit-field and use | |
| 186 that to impose alignment on the enclosing structure. | |
| 187 struct s {int a:8}; should have same alignment as "int", not "char". */ | |
| 188 #define PCC_BITFIELD_TYPE_MATTERS 1 | |
| 189 | |
| 190 /* Largest integer machine mode for structures. If undefined, the default | |
| 191 is GET_MODE_SIZE(DImode). */ | |
| 192 #define MAX_FIXED_MODE_SIZE 32 | |
| 193 | |
| 194 /* Make strings word-aligned so strcpy from constants will be faster. */ | |
| 195 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
| 196 ((TREE_CODE (EXP) == STRING_CST \ | |
| 197 && (ALIGN) < FASTEST_ALIGNMENT) \ | |
| 198 ? FASTEST_ALIGNMENT : (ALIGN)) | |
| 199 | |
| 200 /* Make arrays of chars word-aligned for the same reasons. */ | |
| 201 #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
| 202 (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
| 203 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
| 204 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN)) | |
| 205 | |
| 206 /* Set this nonzero if move instructions will actually fail to work | |
| 207 when given unaligned data. */ | |
| 208 #define STRICT_ALIGNMENT 1 | |
| 209 | |
| 210 /* Standard register usage. */ | |
| 211 | |
| 212 /* Register allocation for our first guess | |
| 213 | |
| 214 r0 stack pointer | |
| 215 r1 scratch, target reg for xtrb? | |
| 216 r2-r7 arguments. | |
| 217 r8-r14 call saved | |
| 218 r15 link register | |
| 219 ap arg pointer (doesn't really exist, always eliminated) | |
| 220 c c bit | |
| 221 fp frame pointer (doesn't really exist, always eliminated) | |
| 222 x19 two control registers. */ | |
| 223 | |
| 224 /* Number of actual hardware registers. | |
| 225 The hardware registers are assigned numbers for the compiler | |
| 226 from 0 to just below FIRST_PSEUDO_REGISTER. | |
| 227 All registers that the compiler knows about must be given numbers, | |
| 228 even those that are not normally considered general registers. | |
| 229 | |
| 230 MCore has 16 integer registers and 2 control registers + the arg | |
| 231 pointer. */ | |
| 232 | |
| 233 #define FIRST_PSEUDO_REGISTER 20 | |
| 234 | |
| 235 #define R1_REG 1 /* Where literals are forced. */ | |
| 236 #define LK_REG 15 /* Overloaded on general register. */ | |
| 237 #define AP_REG 16 /* Fake arg pointer register. */ | |
| 238 /* RBE: mcore.md depends on CC_REG being set to 17. */ | |
| 239 #define CC_REG 17 /* Can't name it C_REG. */ | |
| 240 #define FP_REG 18 /* Fake frame pointer register. */ | |
| 241 | |
| 242 /* Specify the registers used for certain standard purposes. | |
| 243 The values of these macros are register numbers. */ | |
| 244 | |
| 245 | |
| 246 #undef PC_REGNUM /* Define this if the program counter is overloaded on a register. */ | |
| 247 #define STACK_POINTER_REGNUM 0 /* Register to use for pushing function arguments. */ | |
| 248 #define FRAME_POINTER_REGNUM 8 /* When we need FP, use r8. */ | |
| 249 | |
| 250 /* The assembler's names for the registers. RFP need not always be used as | |
| 251 the Real framepointer; it can also be used as a normal general register. | |
| 252 Note that the name `fp' is horribly misleading since `fp' is in fact only | |
| 253 the argument-and-return-context pointer. */ | |
| 254 #define REGISTER_NAMES \ | |
| 255 { \ | |
| 256 "sp", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ | |
| 257 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ | |
| 258 "apvirtual", "c", "fpvirtual", "x19" \ | |
| 259 } | |
| 260 | |
| 261 /* 1 for registers that have pervasive standard uses | |
| 262 and are not available for the register allocator. */ | |
| 263 #define FIXED_REGISTERS \ | |
| 264 /* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 ap c fp x19 */ \ | |
| 265 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1} | |
| 266 | |
| 267 /* 1 for registers not available across function calls. | |
| 268 These must include the FIXED_REGISTERS and also any | |
| 269 registers that can be used without being saved. | |
| 270 The latter must include the registers where values are returned | |
| 271 and the register where structure-value addresses are passed. | |
| 272 Aside from that, you can include as many other registers as you like. */ | |
| 273 | |
| 274 /* RBE: r15 {link register} not available across calls, | |
| 275 But we don't mark it that way here.... */ | |
| 276 #define CALL_USED_REGISTERS \ | |
| 277 /* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 ap c fp x19 */ \ | |
| 278 { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1} | |
| 279 | |
| 280 /* The order in which register should be allocated. */ | |
| 281 #define REG_ALLOC_ORDER \ | |
| 282 /* r7 r6 r5 r4 r3 r2 r15 r14 r13 r12 r11 r10 r9 r8 r1 r0 ap c fp x19*/ \ | |
| 283 { 7, 6, 5, 4, 3, 2, 15, 14, 13, 12, 11, 10, 9, 8, 1, 0, 16, 17, 18, 19} | |
| 284 | |
| 285 /* Return number of consecutive hard regs needed starting at reg REGNO | |
| 286 to hold something of mode MODE. | |
| 287 This is ordinarily the length in words of a value of mode MODE | |
| 288 but can be less for certain modes in special long registers. | |
| 289 | |
| 290 On the MCore regs are UNITS_PER_WORD bits wide; */ | |
| 291 #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
| 292 (((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
| 293 | |
| 294 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
| 295 We may keep double values in even registers. */ | |
| 296 #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
| 297 ((TARGET_8ALIGN && GET_MODE_SIZE (MODE) > UNITS_PER_WORD) ? (((REGNO) & 1) == 0) : (REGNO < 18)) | |
| 298 | |
| 299 /* Value is 1 if it is a good idea to tie two pseudo registers | |
| 300 when one has mode MODE1 and one has mode MODE2. | |
| 301 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
| 302 for any hard reg, then this must be 0 for correct output. */ | |
| 303 #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
| 304 ((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2)) | |
| 305 | |
| 306 /* Definitions for register eliminations. | |
| 307 | |
| 308 We have two registers that can be eliminated on the MCore. First, the | |
| 309 frame pointer register can often be eliminated in favor of the stack | |
| 310 pointer register. Secondly, the argument pointer register can always be | |
| 311 eliminated; it is replaced with either the stack or frame pointer. */ | |
| 312 | |
| 313 /* Base register for access to arguments of the function. */ | |
| 314 #define ARG_POINTER_REGNUM 16 | |
| 315 | |
| 316 /* Register in which the static-chain is passed to a function. */ | |
| 317 #define STATIC_CHAIN_REGNUM 1 | |
| 318 | |
| 319 /* This is an array of structures. Each structure initializes one pair | |
| 320 of eliminable registers. The "from" register number is given first, | |
| 321 followed by "to". Eliminations of the same "from" register are listed | |
| 322 in order of preference. */ | |
| 323 #define ELIMINABLE_REGS \ | |
| 324 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
| 325 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
| 326 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},} | |
| 327 | |
| 328 /* Define the offset between two registers, one to be eliminated, and the other | |
| 329 its replacement, at the start of a routine. */ | |
| 330 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
| 331 OFFSET = mcore_initial_elimination_offset (FROM, TO) | |
| 332 | |
| 333 /* Define the classes of registers for register constraints in the | |
| 334 machine description. Also define ranges of constants. | |
| 335 | |
| 336 One of the classes must always be named ALL_REGS and include all hard regs. | |
| 337 If there is more than one class, another class must be named NO_REGS | |
| 338 and contain no registers. | |
| 339 | |
| 340 The name GENERAL_REGS must be the name of a class (or an alias for | |
| 341 another name such as ALL_REGS). This is the class of registers | |
| 342 that is allowed by "g" or "r" in a register constraint. | |
| 343 Also, registers outside this class are allocated only when | |
| 344 instructions express preferences for them. | |
| 345 | |
| 346 The classes must be numbered in nondecreasing order; that is, | |
| 347 a larger-numbered class must never be contained completely | |
| 348 in a smaller-numbered class. | |
| 349 | |
| 350 For any two classes, it is very desirable that there be another | |
| 351 class that represents their union. */ | |
| 352 | |
| 353 /* The MCore has only general registers. There are | |
| 354 also some special purpose registers: the T bit register, the | |
| 355 procedure Link and the Count Registers. */ | |
| 356 enum reg_class | |
| 357 { | |
| 358 NO_REGS, | |
| 359 ONLYR1_REGS, | |
| 360 LRW_REGS, | |
| 361 GENERAL_REGS, | |
| 362 C_REGS, | |
| 363 ALL_REGS, | |
| 364 LIM_REG_CLASSES | |
| 365 }; | |
| 366 | |
| 367 #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
| 368 | |
| 369 #define IRA_COVER_CLASSES \ | |
| 370 { \ | |
| 371 GENERAL_REGS, C_REGS, LIM_REG_CLASSES \ | |
| 372 } | |
| 373 | |
| 374 | |
| 375 /* Give names of register classes as strings for dump file. */ | |
| 376 #define REG_CLASS_NAMES \ | |
| 377 { \ | |
| 378 "NO_REGS", \ | |
| 379 "ONLYR1_REGS", \ | |
| 380 "LRW_REGS", \ | |
| 381 "GENERAL_REGS", \ | |
| 382 "C_REGS", \ | |
| 383 "ALL_REGS", \ | |
| 384 } | |
| 385 | |
| 386 /* Define which registers fit in which classes. | |
| 387 This is an initializer for a vector of HARD_REG_SET | |
| 388 of length N_REG_CLASSES. */ | |
| 389 | |
| 390 /* ??? STACK_POINTER_REGNUM should be excluded from LRW_REGS. */ | |
| 391 #define REG_CLASS_CONTENTS \ | |
| 392 { \ | |
| 393 {0x000000}, /* NO_REGS */ \ | |
| 394 {0x000002}, /* ONLYR1_REGS */ \ | |
| 395 {0x007FFE}, /* LRW_REGS */ \ | |
| 396 {0x01FFFF}, /* GENERAL_REGS */ \ | |
| 397 {0x020000}, /* C_REGS */ \ | |
| 398 {0x0FFFFF} /* ALL_REGS */ \ | |
| 399 } | |
| 400 | |
| 401 /* The same information, inverted: | |
| 402 Return the class number of the smallest class containing | |
| 403 reg number REGNO. This could be a conditional expression | |
| 404 or could index an array. */ | |
| 405 | |
|
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77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
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406 extern const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER]; |
| 0 | 407 #define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO] |
| 408 | |
|
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parents:
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diff
changeset
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409 /* When this hook returns true for MODE, the compiler allows |
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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changeset
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410 registers explicitly used in the rtl to be used as spill registers |
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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diff
changeset
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411 but prevents the compiler from extending the lifetime of these |
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b7f97abdc517
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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diff
changeset
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412 registers. */ |
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b7f97abdc517
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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diff
changeset
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413 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
| 0 | 414 |
| 415 /* The class value for index registers, and the one for base regs. */ | |
| 416 #define INDEX_REG_CLASS NO_REGS | |
| 417 #define BASE_REG_CLASS GENERAL_REGS | |
| 418 | |
| 419 /* Get reg_class from a letter such as appears in the machine | |
| 420 description. */ | |
| 421 extern const enum reg_class reg_class_from_letter[]; | |
| 422 | |
| 423 #define REG_CLASS_FROM_LETTER(C) \ | |
| 424 (ISLOWER (C) ? reg_class_from_letter[(C) - 'a'] : NO_REGS) | |
| 425 | |
| 426 /* The letters I, J, K, L, M, N, O, and P in a register constraint string | |
| 427 can be used to stand for particular ranges of immediate operands. | |
| 428 This macro defines what the ranges are. | |
| 429 C is the letter, and VALUE is a constant value. | |
| 430 Return 1 if VALUE is in the range specified by C. | |
| 431 I: loadable by movi (0..127) | |
| 432 J: arithmetic operand 1..32 | |
| 433 K: shift operand 0..31 | |
| 434 L: negative arithmetic operand -1..-32 | |
| 435 M: powers of two, constants loadable by bgeni | |
| 436 N: powers of two minus 1, constants loadable by bmaski, including -1 | |
| 437 O: allowed by cmov with two constants +/- 1 of each other | |
| 438 P: values we will generate 'inline' -- without an 'lrw' | |
| 439 | |
| 440 Others defined for use after reload | |
| 441 Q: constant 1 | |
| 442 R: a label | |
| 443 S: 0/1/2 cleared bits out of 32 [for bclri's] | |
| 444 T: 2 set bits out of 32 [for bseti's] | |
| 445 U: constant 0 | |
| 446 xxxS: 1 cleared bit out of 32 (complement of power of 2). for bclri | |
| 447 xxxT: 2 cleared bits out of 32. for pairs of bclris. */ | |
| 448 #define CONST_OK_FOR_I(VALUE) (((HOST_WIDE_INT)(VALUE)) >= 0 && ((HOST_WIDE_INT)(VALUE)) <= 0x7f) | |
| 449 #define CONST_OK_FOR_J(VALUE) (((HOST_WIDE_INT)(VALUE)) > 0 && ((HOST_WIDE_INT)(VALUE)) <= 32) | |
| 450 #define CONST_OK_FOR_L(VALUE) (((HOST_WIDE_INT)(VALUE)) < 0 && ((HOST_WIDE_INT)(VALUE)) >= -32) | |
| 451 #define CONST_OK_FOR_K(VALUE) (((HOST_WIDE_INT)(VALUE)) >= 0 && ((HOST_WIDE_INT)(VALUE)) <= 31) | |
| 452 #define CONST_OK_FOR_M(VALUE) (exact_log2 (VALUE) >= 0 && exact_log2 (VALUE) <= 30) | |
| 453 #define CONST_OK_FOR_N(VALUE) (((HOST_WIDE_INT)(VALUE)) == -1 || (exact_log2 ((VALUE) + 1) >= 0 && exact_log2 ((VALUE) + 1) <= 30)) | |
| 454 #define CONST_OK_FOR_O(VALUE) (CONST_OK_FOR_I(VALUE) || \ | |
| 455 CONST_OK_FOR_M(VALUE) || \ | |
| 456 CONST_OK_FOR_N(VALUE) || \ | |
| 457 CONST_OK_FOR_M((HOST_WIDE_INT)(VALUE) - 1) || \ | |
| 458 CONST_OK_FOR_N((HOST_WIDE_INT)(VALUE) + 1)) | |
| 459 | |
| 460 #define CONST_OK_FOR_P(VALUE) (mcore_const_ok_for_inline (VALUE)) | |
| 461 | |
| 462 #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
| 463 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) \ | |
| 464 : (C) == 'J' ? CONST_OK_FOR_J (VALUE) \ | |
| 465 : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \ | |
| 466 : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \ | |
| 467 : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \ | |
| 468 : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \ | |
| 469 : (C) == 'P' ? CONST_OK_FOR_P (VALUE) \ | |
| 470 : (C) == 'O' ? CONST_OK_FOR_O (VALUE) \ | |
| 471 : 0) | |
| 472 | |
| 473 /* Similar, but for floating constants, and defining letters G and H. | |
| 474 Here VALUE is the CONST_DOUBLE rtx itself. */ | |
| 475 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
| 476 ((C) == 'G' ? CONST_OK_FOR_I (CONST_DOUBLE_HIGH (VALUE)) \ | |
| 477 && CONST_OK_FOR_I (CONST_DOUBLE_LOW (VALUE)) \ | |
| 478 : 0) | |
| 479 | |
| 480 /* Letters in the range `Q' through `U' in a register constraint string | |
| 481 may be defined in a machine-dependent fashion to stand for arbitrary | |
| 482 operand types. */ | |
| 483 #define EXTRA_CONSTRAINT(OP, C) \ | |
| 484 ((C) == 'R' ? (GET_CODE (OP) == MEM \ | |
| 485 && GET_CODE (XEXP (OP, 0)) == LABEL_REF) \ | |
| 486 : (C) == 'S' ? (GET_CODE (OP) == CONST_INT \ | |
| 487 && mcore_num_zeros (INTVAL (OP)) <= 2) \ | |
| 488 : (C) == 'T' ? (GET_CODE (OP) == CONST_INT \ | |
| 489 && mcore_num_ones (INTVAL (OP)) == 2) \ | |
| 490 : (C) == 'Q' ? (GET_CODE (OP) == CONST_INT \ | |
| 491 && INTVAL(OP) == 1) \ | |
| 492 : (C) == 'U' ? (GET_CODE (OP) == CONST_INT \ | |
| 493 && INTVAL(OP) == 0) \ | |
| 494 : 0) | |
| 495 | |
| 496 /* Given an rtx X being reloaded into a reg required to be | |
| 497 in class CLASS, return the class of reg to actually use. | |
| 498 In general this is just CLASS; but on some machines | |
| 499 in some cases it is preferable to use a more restrictive class. */ | |
| 500 #define PREFERRED_RELOAD_CLASS(X, CLASS) mcore_reload_class (X, CLASS) | |
| 501 | |
| 502 /* Return the register class of a scratch register needed to copy IN into | |
| 503 or out of a register in CLASS in MODE. If it can be done directly, | |
| 504 NO_REGS is returned. */ | |
| 505 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \ | |
| 506 mcore_secondary_reload_class (CLASS, MODE, X) | |
| 507 | |
| 508 /* Return the maximum number of consecutive registers | |
| 509 needed to represent mode MODE in a register of class CLASS. | |
| 510 | |
| 511 On MCore this is the size of MODE in words. */ | |
| 512 #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
| 513 (ROUND_ADVANCE (GET_MODE_SIZE (MODE))) | |
| 514 | |
| 515 /* Stack layout; function entry, exit and calling. */ | |
| 516 | |
| 517 /* Define the number of register that can hold parameters. | |
| 518 These two macros are used only in other macro definitions below. */ | |
| 519 #define NPARM_REGS 6 | |
| 520 #define FIRST_PARM_REG 2 | |
| 521 #define FIRST_RET_REG 2 | |
| 522 | |
| 523 /* Define this if pushing a word on the stack | |
| 524 makes the stack pointer a smaller address. */ | |
| 525 #define STACK_GROWS_DOWNWARD | |
| 526 | |
| 527 /* Offset within stack frame to start allocating local variables at. | |
| 528 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
| 529 first local allocated. Otherwise, it is the offset to the BEGINNING | |
| 530 of the first local allocated. */ | |
| 531 #define STARTING_FRAME_OFFSET 0 | |
| 532 | |
| 533 /* If defined, the maximum amount of space required for outgoing arguments | |
| 534 will be computed and placed into the variable | |
| 535 `crtl->outgoing_args_size'. No space will be pushed | |
| 536 onto the stack for each call; instead, the function prologue should | |
| 537 increase the stack frame size by this amount. */ | |
| 538 #define ACCUMULATE_OUTGOING_ARGS 1 | |
| 539 | |
| 540 /* Offset of first parameter from the argument pointer register value. */ | |
| 541 #define FIRST_PARM_OFFSET(FNDECL) 0 | |
| 542 | |
| 543 /* Value is the number of byte of arguments automatically | |
| 544 popped when returning from a subroutine call. | |
| 545 FUNTYPE is the data type of the function (as a tree), | |
| 546 or for a library call it is an identifier node for the subroutine name. | |
| 547 SIZE is the number of bytes of arguments passed on the stack. | |
| 548 | |
| 549 On the MCore, the callee does not pop any of its arguments that were passed | |
| 550 on the stack. */ | |
| 551 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 | |
| 552 | |
| 553 /* Define how to find the value returned by a function. | |
| 554 VALTYPE is the data type of the value (as a tree). | |
| 555 If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
| 556 otherwise, FUNC is 0. */ | |
| 557 #define FUNCTION_VALUE(VALTYPE, FUNC) mcore_function_value (VALTYPE, FUNC) | |
| 558 | |
| 559 /* Don't default to pcc-struct-return, because gcc is the only compiler, and | |
| 560 we want to retain compatibility with older gcc versions. */ | |
| 561 #define DEFAULT_PCC_STRUCT_RETURN 0 | |
| 562 | |
| 563 /* Define how to find the value returned by a library function | |
| 564 assuming the value has mode MODE. */ | |
| 565 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RET_REG) | |
| 566 | |
| 567 /* 1 if N is a possible register number for a function value. | |
| 568 On the MCore, only r4 can return results. */ | |
| 569 #define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == FIRST_RET_REG) | |
| 570 | |
| 571 /* 1 if N is a possible register number for function argument passing. */ | |
| 572 #define FUNCTION_ARG_REGNO_P(REGNO) \ | |
| 573 ((REGNO) >= FIRST_PARM_REG && (REGNO) < (NPARM_REGS + FIRST_PARM_REG)) | |
| 574 | |
| 575 /* Define a data type for recording info about an argument list | |
| 576 during the scan of that argument list. This data type should | |
| 577 hold all necessary information about the function itself | |
| 578 and about the args processed so far, enough to enable macros | |
| 579 such as FUNCTION_ARG to determine where the next arg should go. | |
| 580 | |
| 581 On MCore, this is a single integer, which is a number of words | |
| 582 of arguments scanned so far (including the invisible argument, | |
| 583 if any, which holds the structure-value-address). | |
| 584 Thus NARGREGS or more means all following args should go on the stack. */ | |
| 585 #define CUMULATIVE_ARGS int | |
| 586 | |
| 587 #define ROUND_ADVANCE(SIZE) \ | |
| 588 ((SIZE + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
| 589 | |
| 590 /* Round a register number up to a proper boundary for an arg of mode | |
| 591 MODE. | |
| 592 | |
| 593 We round to an even reg for things larger than a word. */ | |
| 594 #define ROUND_REG(X, MODE) \ | |
| 595 ((TARGET_8ALIGN \ | |
| 596 && GET_MODE_UNIT_SIZE ((MODE)) > UNITS_PER_WORD) \ | |
| 597 ? ((X) + ((X) & 1)) : (X)) | |
| 598 | |
| 599 | |
| 600 /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
| 601 for a call to a function whose data type is FNTYPE. | |
| 602 For a library call, FNTYPE is 0. | |
| 603 | |
| 604 On MCore, the offset always starts at 0: the first parm reg is always | |
| 605 the same reg. */ | |
| 606 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ | |
| 607 ((CUM) = 0) | |
| 608 | |
| 609 /* Update the data in CUM to advance over an argument | |
| 610 of mode MODE and data type TYPE. | |
| 611 (TYPE is null for libcalls where that information may not be | |
| 612 available.) */ | |
| 613 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
| 614 ((CUM) = (ROUND_REG ((CUM), (MODE)) \ | |
| 615 + ((NAMED) * mcore_num_arg_regs (MODE, TYPE)))) \ | |
| 616 | |
| 617 /* Define where to put the arguments to a function. */ | |
| 618 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
| 619 mcore_function_arg (CUM, MODE, TYPE, NAMED) | |
| 620 | |
| 621 /* Call the function profiler with a given profile label. */ | |
| 622 #define FUNCTION_PROFILER(STREAM,LABELNO) \ | |
| 623 { \ | |
| 624 fprintf (STREAM, " trap 1\n"); \ | |
| 625 fprintf (STREAM, " .align 2\n"); \ | |
| 626 fprintf (STREAM, " .long LP%d\n", (LABELNO)); \ | |
| 627 } | |
| 628 | |
| 629 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
| 630 the stack pointer does not matter. The value is tested only in | |
| 631 functions that have frame pointers. | |
| 632 No definition is equivalent to always zero. */ | |
| 633 #define EXIT_IGNORE_STACK 0 | |
| 634 | |
| 635 /* Length in units of the trampoline for entering a nested function. */ | |
| 636 #define TRAMPOLINE_SIZE 12 | |
| 637 | |
| 638 /* Alignment required for a trampoline in bits. */ | |
| 639 #define TRAMPOLINE_ALIGNMENT 32 | |
| 640 | |
| 641 /* Macros to check register numbers against specific register classes. */ | |
| 642 | |
| 643 /* These assume that REGNO is a hard or pseudo reg number. | |
| 644 They give nonzero only if REGNO is a hard reg of the suitable class | |
| 645 or a pseudo reg currently allocated to a suitable hard reg. | |
| 646 Since they use reg_renumber, they are safe only once reg_renumber | |
| 647 has been allocated, which happens in local-alloc.c. */ | |
| 648 #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
| 649 ((REGNO) < AP_REG || (unsigned) reg_renumber[(REGNO)] < AP_REG) | |
| 650 | |
| 651 #define REGNO_OK_FOR_INDEX_P(REGNO) 0 | |
| 652 | |
| 653 /* Maximum number of registers that can appear in a valid memory | |
| 654 address. */ | |
| 655 #define MAX_REGS_PER_ADDRESS 1 | |
| 656 | |
| 657 /* Recognize any constant value that is a valid address. */ | |
| 658 #define CONSTANT_ADDRESS_P(X) (GET_CODE (X) == LABEL_REF) | |
| 659 | |
| 660 /* Nonzero if the constant value X is a legitimate general operand. | |
| 661 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. | |
| 662 | |
| 663 On the MCore, allow anything but a double. */ | |
| 664 #define LEGITIMATE_CONSTANT_P(X) (GET_CODE(X) != CONST_DOUBLE \ | |
| 665 && CONSTANT_P (X)) | |
| 666 | |
| 667 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
| 668 and check its validity for a certain class. | |
| 669 We have two alternate definitions for each of them. | |
| 670 The usual definition accepts all pseudo regs; the other rejects | |
| 671 them unless they have been allocated suitable hard regs. | |
| 672 The symbol REG_OK_STRICT causes the latter definition to be used. */ | |
| 673 #ifndef REG_OK_STRICT | |
| 674 | |
| 675 /* Nonzero if X is a hard reg that can be used as a base reg | |
| 676 or if it is a pseudo reg. */ | |
| 677 #define REG_OK_FOR_BASE_P(X) \ | |
| 678 (REGNO (X) <= 16 || REGNO (X) >= FIRST_PSEUDO_REGISTER) | |
| 679 | |
| 680 /* Nonzero if X is a hard reg that can be used as an index | |
| 681 or if it is a pseudo reg. */ | |
| 682 #define REG_OK_FOR_INDEX_P(X) 0 | |
| 683 | |
| 684 #else | |
| 685 | |
| 686 /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
| 687 #define REG_OK_FOR_BASE_P(X) \ | |
| 688 REGNO_OK_FOR_BASE_P (REGNO (X)) | |
| 689 | |
| 690 /* Nonzero if X is a hard reg that can be used as an index. */ | |
| 691 #define REG_OK_FOR_INDEX_P(X) 0 | |
| 692 | |
| 693 #endif | |
| 694 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
| 695 that is a valid memory address for an instruction. | |
| 696 The MODE argument is the machine mode for the MEM expression | |
| 697 that wants to use this address. | |
| 698 | |
| 699 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */ | |
| 700 #define BASE_REGISTER_RTX_P(X) \ | |
| 701 (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) | |
| 702 | |
| 703 #define INDEX_REGISTER_RTX_P(X) \ | |
| 704 (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) | |
| 705 | |
| 706 | |
| 707 /* Jump to LABEL if X is a valid address RTX. This must also take | |
| 708 REG_OK_STRICT into account when deciding about valid registers, but it uses | |
| 709 the above macros so we are in luck. | |
| 710 | |
| 711 Allow REG | |
| 712 REG+disp | |
| 713 | |
| 714 A legitimate index for a QI is 0..15, for HI is 0..30, for SI is 0..60, | |
| 715 and for DI is 0..56 because we use two SI loads, etc. */ | |
| 716 #define GO_IF_LEGITIMATE_INDEX(MODE, REGNO, OP, LABEL) \ | |
| 717 do \ | |
| 718 { \ | |
| 719 if (GET_CODE (OP) == CONST_INT) \ | |
| 720 { \ | |
| 721 if (GET_MODE_SIZE (MODE) >= 4 \ | |
| 722 && (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 4) == 0 \ | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
723 && ((unsigned HOST_WIDE_INT) INTVAL (OP)) \ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
724 <= (unsigned HOST_WIDE_INT) 64 - GET_MODE_SIZE (MODE)) \ |
| 0 | 725 goto LABEL; \ |
| 726 if (GET_MODE_SIZE (MODE) == 2 \ | |
| 727 && (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 2) == 0 \ | |
| 728 && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 30) \ | |
| 729 goto LABEL; \ | |
| 730 if (GET_MODE_SIZE (MODE) == 1 \ | |
| 731 && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 15) \ | |
| 732 goto LABEL; \ | |
| 733 } \ | |
| 734 } \ | |
| 735 while (0) | |
| 736 | |
| 737 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ | |
| 738 { \ | |
| 739 if (BASE_REGISTER_RTX_P (X)) \ | |
| 740 goto LABEL; \ | |
| 741 else if (GET_CODE (X) == PLUS || GET_CODE (X) == LO_SUM) \ | |
| 742 { \ | |
| 743 rtx xop0 = XEXP (X,0); \ | |
| 744 rtx xop1 = XEXP (X,1); \ | |
| 745 if (BASE_REGISTER_RTX_P (xop0)) \ | |
| 746 GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop0), xop1, LABEL); \ | |
| 747 if (BASE_REGISTER_RTX_P (xop1)) \ | |
| 748 GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop1), xop0, LABEL); \ | |
| 749 } \ | |
| 750 } | |
| 751 | |
| 752 /* Specify the machine mode that this machine uses | |
| 753 for the index in the tablejump instruction. */ | |
| 754 #define CASE_VECTOR_MODE SImode | |
| 755 | |
| 756 /* 'char' is signed by default. */ | |
| 757 #define DEFAULT_SIGNED_CHAR 0 | |
| 758 | |
| 759 /* The type of size_t unsigned int. */ | |
| 760 #define SIZE_TYPE "unsigned int" | |
| 761 | |
| 762 /* Max number of bytes we can move from memory to memory | |
| 763 in one reasonably fast instruction. */ | |
| 764 #define MOVE_MAX 4 | |
| 765 | |
| 766 /* Define if operations between registers always perform the operation | |
| 767 on the full register even if a narrower mode is specified. */ | |
| 768 #define WORD_REGISTER_OPERATIONS | |
| 769 | |
| 770 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
| 771 will either zero-extend or sign-extend. The value of this macro should | |
| 772 be the code that says which one of the two operations is implicitly | |
| 773 done, UNKNOWN if none. */ | |
| 774 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
| 775 | |
| 776 /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
| 777 #define SLOW_BYTE_ACCESS TARGET_SLOW_BYTES | |
| 778 | |
| 779 /* Shift counts are truncated to 6-bits (0 to 63) instead of the expected | |
| 780 5-bits, so we can not define SHIFT_COUNT_TRUNCATED to true for this | |
| 781 target. */ | |
| 782 #define SHIFT_COUNT_TRUNCATED 0 | |
| 783 | |
| 784 /* All integers have the same format so truncation is easy. */ | |
| 785 #define TRULY_NOOP_TRUNCATION(OUTPREC,INPREC) 1 | |
| 786 | |
| 787 /* Define this if addresses of constant functions | |
| 788 shouldn't be put through pseudo regs where they can be cse'd. | |
| 789 Desirable on machines where ordinary constants are expensive | |
| 790 but a CALL with constant address is cheap. */ | |
| 791 /* Why is this defined??? -- dac */ | |
| 792 #define NO_FUNCTION_CSE 1 | |
| 793 | |
| 794 /* The machine modes of pointers and functions. */ | |
| 795 #define Pmode SImode | |
| 796 #define FUNCTION_MODE Pmode | |
| 797 | |
| 798 /* Compute extra cost of moving data between one register class | |
| 799 and another. All register moves are cheap. */ | |
| 800 #define REGISTER_MOVE_COST(MODE, SRCCLASS, DSTCLASS) 2 | |
| 801 | |
| 802 #define WORD_REGISTER_OPERATIONS | |
| 803 | |
| 804 /* Assembler output control. */ | |
| 805 #define ASM_COMMENT_START "\t//" | |
| 806 | |
| 807 #define ASM_APP_ON "// inline asm begin\n" | |
| 808 #define ASM_APP_OFF "// inline asm end\n" | |
| 809 | |
| 810 #define FILE_ASM_OP "\t.file\n" | |
| 811 | |
| 812 /* Switch to the text or data segment. */ | |
| 813 #define TEXT_SECTION_ASM_OP "\t.text" | |
| 814 #define DATA_SECTION_ASM_OP "\t.data" | |
| 815 | |
| 816 /* Switch into a generic section. */ | |
| 817 #undef TARGET_ASM_NAMED_SECTION | |
| 818 #define TARGET_ASM_NAMED_SECTION mcore_asm_named_section | |
| 819 | |
| 820 /* This is how to output an insn to push a register on the stack. | |
| 821 It need not be very fast code. */ | |
| 822 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
| 823 fprintf (FILE, "\tsubi\t %s,%d\n\tstw\t %s,(%s)\n", \ | |
| 824 reg_names[STACK_POINTER_REGNUM], \ | |
| 825 (STACK_BOUNDARY / BITS_PER_UNIT), \ | |
| 826 reg_names[REGNO], \ | |
| 827 reg_names[STACK_POINTER_REGNUM]) | |
| 828 | |
| 829 /* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH. */ | |
| 830 #define REG_PUSH_LENGTH 2 | |
| 831 | |
| 832 /* This is how to output an insn to pop a register from the stack. */ | |
| 833 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
| 834 fprintf (FILE, "\tldw\t %s,(%s)\n\taddi\t %s,%d\n", \ | |
| 835 reg_names[REGNO], \ | |
| 836 reg_names[STACK_POINTER_REGNUM], \ | |
| 837 reg_names[STACK_POINTER_REGNUM], \ | |
| 838 (STACK_BOUNDARY / BITS_PER_UNIT)) | |
| 839 | |
| 840 | |
| 841 /* Output a reference to a label. */ | |
| 842 #undef ASM_OUTPUT_LABELREF | |
| 843 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \ | |
| 844 fprintf (STREAM, "%s%s", USER_LABEL_PREFIX, \ | |
| 845 (* targetm.strip_name_encoding) (NAME)) | |
| 846 | |
| 847 /* This is how to output an assembler line | |
| 848 that says to advance the location counter | |
| 849 to a multiple of 2**LOG bytes. */ | |
| 850 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
| 851 if ((LOG) != 0) \ | |
| 852 fprintf (FILE, "\t.align\t%d\n", LOG) | |
| 853 | |
| 854 #ifndef ASM_DECLARE_RESULT | |
| 855 #define ASM_DECLARE_RESULT(FILE, RESULT) | |
| 856 #endif | |
| 857 | |
| 858 #define MULTIPLE_SYMBOL_SPACES 1 | |
| 859 | |
| 860 #define SUPPORTS_ONE_ONLY 1 | |
| 861 | |
| 862 /* A pair of macros to output things for the callgraph data. | |
| 863 VALUE means (to the tools that reads this info later): | |
| 864 0 a call from src to dst | |
| 865 1 the call is special (e.g. dst is "unknown" or "alloca") | |
| 866 2 the call is special (e.g., the src is a table instead of routine) | |
| 867 | |
| 868 Frame sizes are augmented with timestamps to help later tools | |
| 869 differentiate between static entities with same names in different | |
| 870 files. */ | |
| 871 extern long mcore_current_compilation_timestamp; | |
| 872 #define ASM_OUTPUT_CG_NODE(FILE,SRCNAME,VALUE) \ | |
| 873 do \ | |
| 874 { \ | |
| 875 if (mcore_current_compilation_timestamp == 0) \ | |
| 876 mcore_current_compilation_timestamp = time (0); \ | |
| 877 fprintf ((FILE),"\t.equ\t__$frame$size$_%s_$_%08lx,%d\n", \ | |
| 878 (SRCNAME), mcore_current_compilation_timestamp, (VALUE)); \ | |
| 879 } \ | |
| 880 while (0) | |
| 881 | |
| 882 #define ASM_OUTPUT_CG_EDGE(FILE,SRCNAME,DSTNAME,VALUE) \ | |
| 883 do \ | |
| 884 { \ | |
| 885 fprintf ((FILE),"\t.equ\t__$function$call$_%s_$_%s,%d\n", \ | |
| 886 (SRCNAME), (DSTNAME), (VALUE)); \ | |
| 887 } \ | |
| 888 while (0) | |
| 889 | |
| 890 /* Globalizing directive for a label. */ | |
| 891 #define GLOBAL_ASM_OP "\t.export\t" | |
| 892 | |
| 893 /* The prefix to add to user-visible assembler symbols. */ | |
| 894 #undef USER_LABEL_PREFIX | |
| 895 #define USER_LABEL_PREFIX "" | |
| 896 | |
| 897 /* Make an internal label into a string. */ | |
| 898 #undef ASM_GENERATE_INTERNAL_LABEL | |
| 899 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ | |
| 900 sprintf (STRING, "*.%s%ld", PREFIX, (long) NUM) | |
| 901 | |
| 902 /* Jump tables must be 32 bit aligned. */ | |
| 903 #undef ASM_OUTPUT_CASE_LABEL | |
| 904 #define ASM_OUTPUT_CASE_LABEL(STREAM,PREFIX,NUM,TABLE) \ | |
| 905 fprintf (STREAM, "\t.align 2\n.%s%d:\n", PREFIX, NUM); | |
| 906 | |
| 907 /* Output a relative address. Not needed since jump tables are absolute | |
| 908 but we must define it anyway. */ | |
| 909 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,BODY,VALUE,REL) \ | |
| 910 fputs ("- - - ASM_OUTPUT_ADDR_DIFF_ELT called!\n", STREAM) | |
| 911 | |
| 912 /* Output an element of a dispatch table. */ | |
| 913 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \ | |
| 914 fprintf (STREAM, "\t.long\t.L%d\n", VALUE) | |
| 915 | |
| 916 /* Output various types of constants. */ | |
| 917 | |
| 918 /* This is how to output an assembler line | |
| 919 that says to advance the location counter by SIZE bytes. */ | |
| 920 #undef ASM_OUTPUT_SKIP | |
| 921 #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
| 922 fprintf (FILE, "\t.fill %d, 1\n", (int)(SIZE)) | |
| 923 | |
| 924 /* This says how to output an assembler line | |
| 925 to define a global common symbol, with alignment information. */ | |
| 926 /* XXX - for now we ignore the alignment. */ | |
| 927 #undef ASM_OUTPUT_ALIGNED_COMMON | |
| 928 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ | |
| 929 do \ | |
| 930 { \ | |
| 931 if (mcore_dllexport_name_p (NAME)) \ | |
| 932 MCORE_EXPORT_NAME (FILE, NAME) \ | |
| 933 if (! mcore_dllimport_name_p (NAME)) \ | |
| 934 { \ | |
| 935 fputs ("\t.comm\t", FILE); \ | |
| 936 assemble_name (FILE, NAME); \ | |
| 937 fprintf (FILE, ",%lu\n", (unsigned long)(SIZE)); \ | |
| 938 } \ | |
| 939 } \ | |
| 940 while (0) | |
| 941 | |
| 942 /* This says how to output an assembler line | |
| 943 to define a local common symbol.... */ | |
| 944 #undef ASM_OUTPUT_LOCAL | |
| 945 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ | |
| 946 (fputs ("\t.lcomm\t", FILE), \ | |
| 947 assemble_name (FILE, NAME), \ | |
| 948 fprintf (FILE, ",%d\n", (int)SIZE)) | |
| 949 | |
| 950 /* ... and how to define a local common symbol whose alignment | |
| 951 we wish to specify. ALIGN comes in as bits, we have to turn | |
| 952 it into bytes. */ | |
| 953 #undef ASM_OUTPUT_ALIGNED_LOCAL | |
| 954 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ | |
| 955 do \ | |
| 956 { \ | |
| 957 fputs ("\t.bss\t", (FILE)); \ | |
| 958 assemble_name ((FILE), (NAME)); \ | |
| 959 fprintf ((FILE), ",%d,%d\n", (int)(SIZE), (ALIGN) / BITS_PER_UNIT);\ | |
| 960 } \ | |
| 961 while (0) | |
| 962 | |
| 963 /* Print operand X (an rtx) in assembler syntax to file FILE. | |
| 964 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
| 965 For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
| 966 #define PRINT_OPERAND(STREAM, X, CODE) mcore_print_operand (STREAM, X, CODE) | |
| 967 | |
| 968 /* Print a memory address as an operand to reference that memory location. */ | |
| 969 #define PRINT_OPERAND_ADDRESS(STREAM,X) mcore_print_operand_address (STREAM, X) | |
| 970 | |
| 971 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ | |
| 972 ((CHAR)=='.' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^' || (CHAR) == '!') | |
| 973 | |
| 974 #endif /* ! GCC_MCORE_H */ |