Mercurial > hg > CbC > CbC_gcc
annotate gcc/regs.h @ 63:b7f97abdc517 gcc-4.6-20100522
update gcc from gcc-4.5.0 to gcc-4.6
author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
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date | Mon, 24 May 2010 12:47:05 +0900 |
parents | 77e2b8dfacca |
children | f6334be47118 |
rev | line source |
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0 | 1 /* Define per-register tables for data flow info and register allocation. |
2 Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998, | |
3 1999, 2000, 2003, 2004, 2005, 2006, 2007, 2008 Free Software | |
4 Foundation, Inc. | |
5 | |
6 This file is part of GCC. | |
7 | |
8 GCC is free software; you can redistribute it and/or modify it under | |
9 the terms of the GNU General Public License as published by the Free | |
10 Software Foundation; either version 3, or (at your option) any later | |
11 version. | |
12 | |
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 for more details. | |
17 | |
18 You should have received a copy of the GNU General Public License | |
19 along with GCC; see the file COPYING3. If not see | |
20 <http://www.gnu.org/licenses/>. */ | |
21 | |
22 #ifndef GCC_REGS_H | |
23 #define GCC_REGS_H | |
24 | |
25 #include "obstack.h" | |
26 #include "hard-reg-set.h" | |
27 #include "basic-block.h" | |
28 | |
29 #define REG_BYTES(R) mode_size[(int) GET_MODE (R)] | |
30 | |
31 /* When you only have the mode of a pseudo register before it has a hard | |
32 register chosen for it, this reports the size of each hard register | |
33 a pseudo in such a mode would get allocated to. A target may | |
34 override this. */ | |
35 | |
36 #ifndef REGMODE_NATURAL_SIZE | |
37 #define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD | |
38 #endif | |
39 | |
40 /* Maximum register number used in this function, plus one. */ | |
41 | |
42 extern int max_regno; | |
43 | |
44 /* REG_N_REFS and REG_N_SETS are initialized by a call to | |
45 regstat_init_n_sets_and_refs from the current values of | |
46 DF_REG_DEF_COUNT and DF_REG_USE_COUNT. REG_N_REFS and REG_N_SETS | |
47 should only be used if a pass need to change these values in some | |
48 magical way or or the pass needs to have accurate values for these | |
49 and is not using incremental df scanning. | |
50 | |
51 At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
52 should be made to regstat_free_n_sets_and_refs. |
0 | 53 |
54 Local alloc seems to play pretty loose with these values. | |
55 REG_N_REFS is set to 0 if the register is used in an asm. | |
56 Furthermore, local_alloc calls regclass to hack both REG_N_REFS and | |
57 REG_N_SETS for three address insns. Other passes seem to have | |
58 other special values. */ | |
59 | |
60 | |
61 | |
62 /* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */ | |
63 | |
64 struct regstat_n_sets_and_refs_t | |
65 { | |
66 int sets; /* # of times (REG n) is set */ | |
67 int refs; /* # of times (REG n) is used or set */ | |
68 }; | |
69 | |
70 extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs; | |
71 | |
72 /* Indexed by n, gives number of times (REG n) is used or set. */ | |
73 static inline int | |
74 REG_N_REFS(int regno) | |
75 { | |
76 return regstat_n_sets_and_refs[regno].refs; | |
77 } | |
78 | |
79 /* Indexed by n, gives number of times (REG n) is used or set. */ | |
80 #define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V) | |
81 #define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V) | |
82 | |
83 /* Indexed by n, gives number of times (REG n) is set. */ | |
84 static inline int | |
85 REG_N_SETS (int regno) | |
86 { | |
87 return regstat_n_sets_and_refs[regno].sets; | |
88 } | |
89 | |
90 /* Indexed by n, gives number of times (REG n) is set. */ | |
91 #define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V) | |
92 #define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V) | |
93 | |
94 | |
95 /* Functions defined in reg-stat.c. */ | |
96 extern void regstat_init_n_sets_and_refs (void); | |
97 extern void regstat_free_n_sets_and_refs (void); | |
98 extern void regstat_compute_ri (void); | |
99 extern void regstat_free_ri (void); | |
100 extern bitmap regstat_get_setjmp_crosses (void); | |
101 extern void regstat_compute_calls_crossed (void); | |
102 extern void regstat_free_calls_crossed (void); | |
103 | |
104 | |
105 /* Register information indexed by register number. This structure is | |
106 initialized by calling regstat_compute_ri and is destroyed by | |
107 calling regstat_free_ri. */ | |
108 struct reg_info_t | |
109 { | |
110 int freq; /* # estimated frequency (REG n) is used or set */ | |
111 int deaths; /* # of times (REG n) dies */ | |
112 int live_length; /* # of instructions (REG n) is live */ | |
113 int calls_crossed; /* # of calls (REG n) is live across */ | |
114 int freq_calls_crossed; /* # estimated frequency (REG n) crosses call */ | |
115 int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */ | |
116 int basic_block; /* # of basic blocks (REG n) is used in */ | |
117 }; | |
118 | |
119 extern struct reg_info_t *reg_info_p; | |
120 | |
121 /* The number allocated elements of reg_info_p. */ | |
122 extern size_t reg_info_p_size; | |
123 | |
124 /* Estimate frequency of references to register N. */ | |
125 | |
126 #define REG_FREQ(N) (reg_info_p[N].freq) | |
127 | |
128 /* The weights for each insn varies from 0 to REG_FREQ_BASE. | |
129 This constant does not need to be high, as in infrequently executed | |
130 regions we want to count instructions equivalently to optimize for | |
131 size instead of speed. */ | |
132 #define REG_FREQ_MAX 1000 | |
133 | |
134 /* Compute register frequency from the BB frequency. When optimizing for size, | |
135 or profile driven feedback is available and the function is never executed, | |
136 frequency is always equivalent. Otherwise rescale the basic block | |
137 frequency. */ | |
138 #define REG_FREQ_FROM_BB(bb) (optimize_size \ | |
139 || (flag_branch_probabilities \ | |
140 && !ENTRY_BLOCK_PTR->count) \ | |
141 ? REG_FREQ_MAX \ | |
142 : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\ | |
143 ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\ | |
144 : 1) | |
145 | |
146 /* Indexed by N, gives number of insns in which register N dies. | |
147 Note that if register N is live around loops, it can die | |
148 in transitions between basic blocks, and that is not counted here. | |
149 So this is only a reliable indicator of how many regions of life there are | |
150 for registers that are contained in one basic block. */ | |
151 | |
152 #define REG_N_DEATHS(N) (reg_info_p[N].deaths) | |
153 | |
154 /* Get the number of consecutive words required to hold pseudo-reg N. */ | |
155 | |
156 #define PSEUDO_REGNO_SIZE(N) \ | |
157 ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \ | |
158 / UNITS_PER_WORD) | |
159 | |
160 /* Get the number of bytes required to hold pseudo-reg N. */ | |
161 | |
162 #define PSEUDO_REGNO_BYTES(N) \ | |
163 GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) | |
164 | |
165 /* Get the machine mode of pseudo-reg N. */ | |
166 | |
167 #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N]) | |
168 | |
169 /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */ | |
170 | |
171 #define REG_N_CALLS_CROSSED(N) (reg_info_p[N].calls_crossed) | |
172 #define REG_FREQ_CALLS_CROSSED(N) (reg_info_p[N].freq_calls_crossed) | |
173 | |
174 /* Indexed by N, gives number of CALL_INSNS that may throw, across which | |
175 (REG n) is live. */ | |
176 | |
177 #define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed) | |
178 | |
179 /* Total number of instructions at which (REG n) is live. The larger | |
180 this is, the less priority (REG n) gets for allocation in a hard | |
181 register (in global-alloc). This is set in df-problems.c whenever | |
182 register info is requested and remains valid for the rest of the | |
183 compilation of the function; it is used to control register | |
184 allocation. | |
185 | |
186 local-alloc.c may alter this number to change the priority. | |
187 | |
188 Negative values are special. | |
189 -1 is used to mark a pseudo reg which has a constant or memory equivalent | |
190 and is used infrequently enough that it should not get a hard register. | |
191 -2 is used to mark a pseudo reg for a parameter, when a frame pointer | |
192 is not required. global.c makes an allocno for this but does | |
193 not try to assign a hard register to it. */ | |
194 | |
195 #define REG_LIVE_LENGTH(N) (reg_info_p[N].live_length) | |
196 | |
197 /* Indexed by n, gives number of basic block that (REG n) is used in. | |
198 If the value is REG_BLOCK_GLOBAL (-1), | |
199 it means (REG n) is used in more than one basic block. | |
200 REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know. | |
201 This information remains valid for the rest of the compilation | |
202 of the current function; it is used to control register allocation. */ | |
203 | |
204 #define REG_BLOCK_UNKNOWN 0 | |
205 #define REG_BLOCK_GLOBAL -1 | |
206 | |
207 #define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block) | |
208 | |
209 /* Vector of substitutions of register numbers, | |
210 used to map pseudo regs into hardware regs. | |
211 | |
212 This can't be folded into reg_n_info without changing all of the | |
213 machine dependent directories, since the reload functions | |
214 in the machine dependent files access it. */ | |
215 | |
216 extern short *reg_renumber; | |
217 | |
218 /* Vector indexed by machine mode saying whether there are regs of that mode. */ | |
219 | |
220 extern bool have_regs_of_mode [MAX_MACHINE_MODE]; | |
221 | |
222 /* For each hard register, the widest mode object that it can contain. | |
223 This will be a MODE_INT mode if the register can hold integers. Otherwise | |
224 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the | |
225 register. */ | |
226 | |
227 extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER]; | |
228 | |
229 /* Flag set by local-alloc or global-alloc if they decide to allocate | |
230 something in a call-clobbered register. */ | |
231 | |
232 extern int caller_save_needed; | |
233 | |
234 /* Predicate to decide whether to give a hard reg to a pseudo which | |
235 is referenced REFS times and would need to be saved and restored | |
236 around a call CALLS times. */ | |
237 | |
238 #ifndef CALLER_SAVE_PROFITABLE | |
239 #define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS)) | |
240 #endif | |
241 | |
242 /* On most machines a register class is likely to be spilled if it | |
243 only has one register. */ | |
244 #ifndef CLASS_LIKELY_SPILLED_P | |
245 #define CLASS_LIKELY_SPILLED_P(CLASS) (reg_class_size[(int) (CLASS)] == 1) | |
246 #endif | |
247 | |
248 /* Select a register mode required for caller save of hard regno REGNO. */ | |
249 #ifndef HARD_REGNO_CALLER_SAVE_MODE | |
250 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ | |
251 choose_hard_reg_mode (REGNO, NREGS, false) | |
252 #endif | |
253 | |
254 /* Registers that get partially clobbered by a call in a given mode. | |
255 These must not be call used registers. */ | |
256 #ifndef HARD_REGNO_CALL_PART_CLOBBERED | |
257 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0 | |
258 #endif | |
259 | |
260 /* 1 if the corresponding class does contain register of given | |
261 mode. */ | |
262 extern char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE]; | |
263 | |
264 typedef unsigned short move_table[N_REG_CLASSES]; | |
265 | |
266 /* Maximum cost of moving from a register in one class to a register | |
267 in another class. */ | |
268 extern move_table *move_cost[MAX_MACHINE_MODE]; | |
269 | |
270 /* Specify number of hard registers given machine mode occupy. */ | |
271 extern unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; | |
272 | |
273 /* Similar, but here we don't have to move if the first index is a | |
274 subset of the second so in that case the cost is zero. */ | |
275 extern move_table *may_move_in_cost[MAX_MACHINE_MODE]; | |
276 | |
277 /* Similar, but here we don't have to move if the first index is a | |
278 superset of the second so in that case the cost is zero. */ | |
279 extern move_table *may_move_out_cost[MAX_MACHINE_MODE]; | |
280 | |
281 /* Return an exclusive upper bound on the registers occupied by hard | |
282 register (reg:MODE REGNO). */ | |
283 | |
284 static inline unsigned int | |
285 end_hard_regno (enum machine_mode mode, unsigned int regno) | |
286 { | |
287 return regno + hard_regno_nregs[regno][(int) mode]; | |
288 } | |
289 | |
290 /* Likewise for hard register X. */ | |
291 | |
292 #define END_HARD_REGNO(X) end_hard_regno (GET_MODE (X), REGNO (X)) | |
293 | |
294 /* Likewise for hard or pseudo register X. */ | |
295 | |
296 #define END_REGNO(X) (HARD_REGISTER_P (X) ? END_HARD_REGNO (X) : REGNO (X) + 1) | |
297 | |
298 /* Add to REGS all the registers required to store a value of mode MODE | |
299 in register REGNO. */ | |
300 | |
301 static inline void | |
302 add_to_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode, | |
303 unsigned int regno) | |
304 { | |
305 unsigned int end_regno; | |
306 | |
307 end_regno = end_hard_regno (mode, regno); | |
308 do | |
309 SET_HARD_REG_BIT (*regs, regno); | |
310 while (++regno < end_regno); | |
311 } | |
312 | |
313 /* Likewise, but remove the registers. */ | |
314 | |
315 static inline void | |
316 remove_from_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode, | |
317 unsigned int regno) | |
318 { | |
319 unsigned int end_regno; | |
320 | |
321 end_regno = end_hard_regno (mode, regno); | |
322 do | |
323 CLEAR_HARD_REG_BIT (*regs, regno); | |
324 while (++regno < end_regno); | |
325 } | |
326 | |
327 /* Return true if REGS contains the whole of (reg:MODE REGNO). */ | |
328 | |
329 static inline bool | |
330 in_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode, | |
331 unsigned int regno) | |
332 { | |
333 unsigned int end_regno; | |
334 | |
335 if (!TEST_HARD_REG_BIT (regs, regno)) | |
336 return false; | |
337 | |
338 end_regno = end_hard_regno (mode, regno); | |
339 while (++regno < end_regno) | |
340 if (!TEST_HARD_REG_BIT (regs, regno)) | |
341 return false; | |
342 | |
343 return true; | |
344 } | |
345 | |
346 /* Return true if (reg:MODE REGNO) includes an element of REGS. */ | |
347 | |
348 static inline bool | |
349 overlaps_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode, | |
350 unsigned int regno) | |
351 { | |
352 unsigned int end_regno; | |
353 | |
354 if (TEST_HARD_REG_BIT (regs, regno)) | |
355 return true; | |
356 | |
357 end_regno = end_hard_regno (mode, regno); | |
358 while (++regno < end_regno) | |
359 if (TEST_HARD_REG_BIT (regs, regno)) | |
360 return true; | |
361 | |
362 return false; | |
363 } | |
364 | |
365 #endif /* GCC_REGS_H */ |