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1 /* Register to Stack convert for GNU compiler.
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2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
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3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
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4 Free Software Foundation, Inc.
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5
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6 This file is part of GCC.
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7
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8 GCC is free software; you can redistribute it and/or modify it
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9 under the terms of the GNU General Public License as published by
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10 the Free Software Foundation; either version 3, or (at your option)
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11 any later version.
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12
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13 GCC is distributed in the hope that it will be useful, but WITHOUT
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14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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16 License for more details.
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17
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18 You should have received a copy of the GNU General Public License
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19 along with GCC; see the file COPYING3. If not see
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20 <http://www.gnu.org/licenses/>. */
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21
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22 /* This pass converts stack-like registers from the "flat register
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23 file" model that gcc uses, to a stack convention that the 387 uses.
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24
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25 * The form of the input:
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26
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27 On input, the function consists of insn that have had their
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28 registers fully allocated to a set of "virtual" registers. Note that
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29 the word "virtual" is used differently here than elsewhere in gcc: for
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30 each virtual stack reg, there is a hard reg, but the mapping between
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31 them is not known until this pass is run. On output, hard register
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32 numbers have been substituted, and various pop and exchange insns have
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33 been emitted. The hard register numbers and the virtual register
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34 numbers completely overlap - before this pass, all stack register
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35 numbers are virtual, and afterward they are all hard.
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36
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37 The virtual registers can be manipulated normally by gcc, and their
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38 semantics are the same as for normal registers. After the hard
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39 register numbers are substituted, the semantics of an insn containing
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40 stack-like regs are not the same as for an insn with normal regs: for
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41 instance, it is not safe to delete an insn that appears to be a no-op
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42 move. In general, no insn containing hard regs should be changed
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43 after this pass is done.
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44
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45 * The form of the output:
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46
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47 After this pass, hard register numbers represent the distance from
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48 the current top of stack to the desired register. A reference to
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49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
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50 represents the register just below that, and so forth. Also, REG_DEAD
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51 notes indicate whether or not a stack register should be popped.
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52
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53 A "swap" insn looks like a parallel of two patterns, where each
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54 pattern is a SET: one sets A to B, the other B to A.
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55
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56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
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57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
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58 will replace the existing stack top, not push a new value.
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59
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60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
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61 SET_SRC is REG or MEM.
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62
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63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
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64 appears ambiguous. As a special case, the presence of a REG_DEAD note
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65 for FIRST_STACK_REG differentiates between a load insn and a pop.
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66
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67 If a REG_DEAD is present, the insn represents a "pop" that discards
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68 the top of the register stack. If there is no REG_DEAD note, then the
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69 insn represents a "dup" or a push of the current top of stack onto the
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70 stack.
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71
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72 * Methodology:
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73
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74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
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75 deleted and recreated from scratch. REG_DEAD is never created for a
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76 SET_DEST, only REG_UNUSED.
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77
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78 * asm_operands:
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79
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80 There are several rules on the usage of stack-like regs in
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81 asm_operands insns. These rules apply only to the operands that are
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82 stack-like regs:
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83
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84 1. Given a set of input regs that die in an asm_operands, it is
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85 necessary to know which are implicitly popped by the asm, and
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86 which must be explicitly popped by gcc.
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87
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88 An input reg that is implicitly popped by the asm must be
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89 explicitly clobbered, unless it is constrained to match an
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90 output operand.
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91
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92 2. For any input reg that is implicitly popped by an asm, it is
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93 necessary to know how to adjust the stack to compensate for the pop.
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94 If any non-popped input is closer to the top of the reg-stack than
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95 the implicitly popped reg, it would not be possible to know what the
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96 stack looked like - it's not clear how the rest of the stack "slides
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97 up".
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98
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99 All implicitly popped input regs must be closer to the top of
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100 the reg-stack than any input that is not implicitly popped.
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101
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102 3. It is possible that if an input dies in an insn, reload might
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103 use the input reg for an output reload. Consider this example:
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104
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105 asm ("foo" : "=t" (a) : "f" (b));
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106
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107 This asm says that input B is not popped by the asm, and that
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108 the asm pushes a result onto the reg-stack, i.e., the stack is one
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109 deeper after the asm than it was before. But, it is possible that
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110 reload will think that it can use the same reg for both the input and
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111 the output, if input B dies in this insn.
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112
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113 If any input operand uses the "f" constraint, all output reg
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114 constraints must use the "&" earlyclobber.
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115
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116 The asm above would be written as
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117
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118 asm ("foo" : "=&t" (a) : "f" (b));
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119
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120 4. Some operands need to be in particular places on the stack. All
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121 output operands fall in this category - there is no other way to
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122 know which regs the outputs appear in unless the user indicates
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123 this in the constraints.
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124
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125 Output operands must specifically indicate which reg an output
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126 appears in after an asm. "=f" is not allowed: the operand
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127 constraints must select a class with a single reg.
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128
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129 5. Output operands may not be "inserted" between existing stack regs.
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130 Since no 387 opcode uses a read/write operand, all output operands
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131 are dead before the asm_operands, and are pushed by the asm_operands.
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132 It makes no sense to push anywhere but the top of the reg-stack.
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133
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134 Output operands must start at the top of the reg-stack: output
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135 operands may not "skip" a reg.
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136
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137 6. Some asm statements may need extra stack space for internal
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138 calculations. This can be guaranteed by clobbering stack registers
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139 unrelated to the inputs and outputs.
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140
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141 Here are a couple of reasonable asms to want to write. This asm
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142 takes one input, which is internally popped, and produces two outputs.
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143
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144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
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145
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146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
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147 and replaces them with one output. The user must code the "st(1)"
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148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
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149
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150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
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151
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152 */
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153
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154 #include "config.h"
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155 #include "system.h"
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156 #include "coretypes.h"
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157 #include "tm.h"
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158 #include "tree.h"
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159 #include "rtl.h"
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160 #include "tm_p.h"
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161 #include "function.h"
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162 #include "insn-config.h"
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163 #include "regs.h"
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164 #include "hard-reg-set.h"
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165 #include "flags.h"
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166 #include "toplev.h"
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167 #include "recog.h"
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168 #include "output.h"
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169 #include "basic-block.h"
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170 #include "cfglayout.h"
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171 #include "varray.h"
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172 #include "reload.h"
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173 #include "ggc.h"
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174 #include "timevar.h"
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175 #include "tree-pass.h"
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176 #include "target.h"
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177 #include "df.h"
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178 #include "vecprim.h"
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179
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180 #ifdef STACK_REGS
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181
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182 /* We use this array to cache info about insns, because otherwise we
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183 spend too much time in stack_regs_mentioned_p.
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184
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185 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
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186 the insn uses stack registers, two indicates the insn does not use
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187 stack registers. */
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188 static VEC(char,heap) *stack_regs_mentioned_data;
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189
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190 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
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191
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192 int regstack_completed = 0;
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193
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194 /* This is the basic stack record. TOP is an index into REG[] such
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195 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
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196
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197 If TOP is -2, REG[] is not yet initialized. Stack initialization
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198 consists of placing each live reg in array `reg' and setting `top'
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199 appropriately.
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200
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201 REG_SET indicates which registers are live. */
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202
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203 typedef struct stack_def
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204 {
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205 int top; /* index to top stack element */
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206 HARD_REG_SET reg_set; /* set of live registers */
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207 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
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208 } *stack;
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209
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210 /* This is used to carry information about basic blocks. It is
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211 attached to the AUX field of the standard CFG block. */
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212
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213 typedef struct block_info_def
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214 {
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215 struct stack_def stack_in; /* Input stack configuration. */
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216 struct stack_def stack_out; /* Output stack configuration. */
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217 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
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218 int done; /* True if block already converted. */
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219 int predecessors; /* Number of predecessors that need
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220 to be visited. */
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221 } *block_info;
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222
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223 #define BLOCK_INFO(B) ((block_info) (B)->aux)
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224
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225 /* Passed to change_stack to indicate where to emit insns. */
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226 enum emit_where
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227 {
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228 EMIT_AFTER,
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229 EMIT_BEFORE
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230 };
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231
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232 /* The block we're currently working on. */
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233 static basic_block current_block;
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234
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235 /* In the current_block, whether we're processing the first register
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236 stack or call instruction, i.e. the regstack is currently the
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237 same as BLOCK_INFO(current_block)->stack_in. */
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238 static bool starting_stack_p;
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239
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240 /* This is the register file for all register after conversion. */
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241 static rtx
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242 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
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243
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244 #define FP_MODE_REG(regno,mode) \
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245 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
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246
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247 /* Used to initialize uninitialized registers. */
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248 static rtx not_a_num;
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249
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250 /* Forward declarations */
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251
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252 static int stack_regs_mentioned_p (const_rtx pat);
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253 static void pop_stack (stack, int);
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254 static rtx *get_true_reg (rtx *);
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255
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256 static int check_asm_stack_operands (rtx);
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257 static int get_asm_operand_n_inputs (rtx);
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258 static rtx stack_result (tree);
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259 static void replace_reg (rtx *, int);
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260 static void remove_regno_note (rtx, enum reg_note, unsigned int);
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261 static int get_hard_regnum (stack, rtx);
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262 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where);
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263 static void swap_to_top(rtx, stack, rtx, rtx);
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264 static bool move_for_stack_reg (rtx, stack, rtx);
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265 static bool move_nan_for_stack_reg (rtx, stack, rtx);
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266 static int swap_rtx_condition_1 (rtx);
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267 static int swap_rtx_condition (rtx);
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268 static void compare_for_stack_reg (rtx, stack, rtx);
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269 static bool subst_stack_regs_pat (rtx, stack, rtx);
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270 static void subst_asm_stack_regs (rtx, stack);
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271 static bool subst_stack_regs (rtx, stack);
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272 static void change_stack (rtx, stack, stack, enum emit_where);
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273 static void print_stack (FILE *, stack);
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274 static rtx next_flags_user (rtx);
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275
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276 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
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277
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278 static int
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279 stack_regs_mentioned_p (const_rtx pat)
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280 {
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281 const char *fmt;
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282 int i;
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283
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284 if (STACK_REG_P (pat))
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285 return 1;
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286
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287 fmt = GET_RTX_FORMAT (GET_CODE (pat));
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288 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
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289 {
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290 if (fmt[i] == 'E')
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291 {
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292 int j;
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293
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294 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
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295 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
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296 return 1;
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297 }
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298 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
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299 return 1;
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300 }
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301
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302 return 0;
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303 }
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304
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305 /* Return nonzero if INSN mentions stacked registers, else return zero. */
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306
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307 int
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308 stack_regs_mentioned (const_rtx insn)
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309 {
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310 unsigned int uid, max;
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311 int test;
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312
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313 if (! INSN_P (insn) || !stack_regs_mentioned_data)
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314 return 0;
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315
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316 uid = INSN_UID (insn);
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317 max = VEC_length (char, stack_regs_mentioned_data);
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318 if (uid >= max)
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319 {
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320 /* Allocate some extra size to avoid too many reallocs, but
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321 do not grow too quickly. */
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322 max = uid + uid / 20 + 1;
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323 VEC_safe_grow_cleared (char, heap, stack_regs_mentioned_data, max);
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324 }
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325
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326 test = VEC_index (char, stack_regs_mentioned_data, uid);
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327 if (test == 0)
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328 {
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329 /* This insn has yet to be examined. Do so now. */
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330 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
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331 VEC_replace (char, stack_regs_mentioned_data, uid, test);
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332 }
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333
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334 return test == 1;
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335 }
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336
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337 static rtx ix86_flags_rtx;
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338
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339 static rtx
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340 next_flags_user (rtx insn)
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341 {
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342 /* Search forward looking for the first use of this value.
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343 Stop at block boundaries. */
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344
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345 while (insn != BB_END (current_block))
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346 {
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347 insn = NEXT_INSN (insn);
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348
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349 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
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350 return insn;
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351
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352 if (CALL_P (insn))
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353 return NULL_RTX;
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354 }
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355 return NULL_RTX;
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356 }
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357
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358 /* Reorganize the stack into ascending numbers, before this insn. */
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359
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360 static void
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361 straighten_stack (rtx insn, stack regstack)
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362 {
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363 struct stack_def temp_stack;
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364 int top;
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365
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366 /* If there is only a single register on the stack, then the stack is
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367 already in increasing order and no reorganization is needed.
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368
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369 Similarly if the stack is empty. */
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370 if (regstack->top <= 0)
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371 return;
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372
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373 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
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374
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375 for (top = temp_stack.top = regstack->top; top >= 0; top--)
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376 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
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377
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378 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
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379 }
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380
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381 /* Pop a register from the stack. */
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382
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383 static void
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384 pop_stack (stack regstack, int regno)
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385 {
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386 int top = regstack->top;
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387
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388 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
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389 regstack->top--;
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|
390 /* If regno was not at the top of stack then adjust stack. */
|
|
|
391 if (regstack->reg [top] != regno)
|
|
|
392 {
|
|
|
393 int i;
|
|
|
394 for (i = regstack->top; i >= 0; i--)
|
|
|
395 if (regstack->reg [i] == regno)
|
|
|
396 {
|
|
|
397 int j;
|
|
|
398 for (j = i; j < top; j++)
|
|
|
399 regstack->reg [j] = regstack->reg [j + 1];
|
|
|
400 break;
|
|
|
401 }
|
|
|
402 }
|
|
|
403 }
|
|
|
404
|
|
|
405 /* Return a pointer to the REG expression within PAT. If PAT is not a
|
|
|
406 REG, possible enclosed by a conversion rtx, return the inner part of
|
|
|
407 PAT that stopped the search. */
|
|
|
408
|
|
|
409 static rtx *
|
|
|
410 get_true_reg (rtx *pat)
|
|
|
411 {
|
|
|
412 for (;;)
|
|
|
413 switch (GET_CODE (*pat))
|
|
|
414 {
|
|
|
415 case SUBREG:
|
|
|
416 /* Eliminate FP subregister accesses in favor of the
|
|
|
417 actual FP register in use. */
|
|
|
418 {
|
|
|
419 rtx subreg;
|
|
|
420 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
|
|
|
421 {
|
|
|
422 int regno_off = subreg_regno_offset (REGNO (subreg),
|
|
|
423 GET_MODE (subreg),
|
|
|
424 SUBREG_BYTE (*pat),
|
|
|
425 GET_MODE (*pat));
|
|
|
426 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
|
|
|
427 GET_MODE (subreg));
|
|
|
428 return pat;
|
|
|
429 }
|
|
|
430 }
|
|
|
431 case FLOAT:
|
|
|
432 case FIX:
|
|
|
433 case FLOAT_EXTEND:
|
|
|
434 pat = & XEXP (*pat, 0);
|
|
|
435 break;
|
|
|
436
|
|
|
437 case UNSPEC:
|
|
|
438 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP)
|
|
|
439 pat = & XVECEXP (*pat, 0, 0);
|
|
|
440 return pat;
|
|
|
441
|
|
|
442 case FLOAT_TRUNCATE:
|
|
|
443 if (!flag_unsafe_math_optimizations)
|
|
|
444 return pat;
|
|
|
445 pat = & XEXP (*pat, 0);
|
|
|
446 break;
|
|
|
447
|
|
|
448 default:
|
|
|
449 return pat;
|
|
|
450 }
|
|
|
451 }
|
|
|
452
|
|
|
453 /* Set if we find any malformed asms in a block. */
|
|
|
454 static bool any_malformed_asm;
|
|
|
455
|
|
|
456 /* There are many rules that an asm statement for stack-like regs must
|
|
|
457 follow. Those rules are explained at the top of this file: the rule
|
|
|
458 numbers below refer to that explanation. */
|
|
|
459
|
|
|
460 static int
|
|
|
461 check_asm_stack_operands (rtx insn)
|
|
|
462 {
|
|
|
463 int i;
|
|
|
464 int n_clobbers;
|
|
|
465 int malformed_asm = 0;
|
|
|
466 rtx body = PATTERN (insn);
|
|
|
467
|
|
|
468 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
|
|
|
469 char implicitly_dies[FIRST_PSEUDO_REGISTER];
|
|
|
470 int alt;
|
|
|
471
|
|
|
472 rtx *clobber_reg = 0;
|
|
|
473 int n_inputs, n_outputs;
|
|
|
474
|
|
|
475 /* Find out what the constraints require. If no constraint
|
|
|
476 alternative matches, this asm is malformed. */
|
|
|
477 extract_insn (insn);
|
|
|
478 constrain_operands (1);
|
|
|
479 alt = which_alternative;
|
|
|
480
|
|
|
481 preprocess_constraints ();
|
|
|
482
|
|
|
483 n_inputs = get_asm_operand_n_inputs (body);
|
|
|
484 n_outputs = recog_data.n_operands - n_inputs;
|
|
|
485
|
|
|
486 if (alt < 0)
|
|
|
487 {
|
|
|
488 malformed_asm = 1;
|
|
|
489 /* Avoid further trouble with this insn. */
|
|
|
490 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
|
|
|
491 return 0;
|
|
|
492 }
|
|
|
493
|
|
|
494 /* Strip SUBREGs here to make the following code simpler. */
|
|
|
495 for (i = 0; i < recog_data.n_operands; i++)
|
|
|
496 if (GET_CODE (recog_data.operand[i]) == SUBREG
|
|
|
497 && REG_P (SUBREG_REG (recog_data.operand[i])))
|
|
|
498 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
|
|
|
499
|
|
|
500 /* Set up CLOBBER_REG. */
|
|
|
501
|
|
|
502 n_clobbers = 0;
|
|
|
503
|
|
|
504 if (GET_CODE (body) == PARALLEL)
|
|
|
505 {
|
|
|
506 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
|
|
|
507
|
|
|
508 for (i = 0; i < XVECLEN (body, 0); i++)
|
|
|
509 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
|
|
|
510 {
|
|
|
511 rtx clobber = XVECEXP (body, 0, i);
|
|
|
512 rtx reg = XEXP (clobber, 0);
|
|
|
513
|
|
|
514 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
|
|
|
515 reg = SUBREG_REG (reg);
|
|
|
516
|
|
|
517 if (STACK_REG_P (reg))
|
|
|
518 {
|
|
|
519 clobber_reg[n_clobbers] = reg;
|
|
|
520 n_clobbers++;
|
|
|
521 }
|
|
|
522 }
|
|
|
523 }
|
|
|
524
|
|
|
525 /* Enforce rule #4: Output operands must specifically indicate which
|
|
|
526 reg an output appears in after an asm. "=f" is not allowed: the
|
|
|
527 operand constraints must select a class with a single reg.
|
|
|
528
|
|
|
529 Also enforce rule #5: Output operands must start at the top of
|
|
|
530 the reg-stack: output operands may not "skip" a reg. */
|
|
|
531
|
|
|
532 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
|
|
|
533 for (i = 0; i < n_outputs; i++)
|
|
|
534 if (STACK_REG_P (recog_data.operand[i]))
|
|
|
535 {
|
|
|
536 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1)
|
|
|
537 {
|
|
|
538 error_for_asm (insn, "output constraint %d must specify a single register", i);
|
|
|
539 malformed_asm = 1;
|
|
|
540 }
|
|
|
541 else
|
|
|
542 {
|
|
|
543 int j;
|
|
|
544
|
|
|
545 for (j = 0; j < n_clobbers; j++)
|
|
|
546 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
|
|
|
547 {
|
|
|
548 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
|
|
|
549 i, reg_names [REGNO (clobber_reg[j])]);
|
|
|
550 malformed_asm = 1;
|
|
|
551 break;
|
|
|
552 }
|
|
|
553 if (j == n_clobbers)
|
|
|
554 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
|
|
|
555 }
|
|
|
556 }
|
|
|
557
|
|
|
558
|
|
|
559 /* Search for first non-popped reg. */
|
|
|
560 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
|
|
|
561 if (! reg_used_as_output[i])
|
|
|
562 break;
|
|
|
563
|
|
|
564 /* If there are any other popped regs, that's an error. */
|
|
|
565 for (; i < LAST_STACK_REG + 1; i++)
|
|
|
566 if (reg_used_as_output[i])
|
|
|
567 break;
|
|
|
568
|
|
|
569 if (i != LAST_STACK_REG + 1)
|
|
|
570 {
|
|
|
571 error_for_asm (insn, "output regs must be grouped at top of stack");
|
|
|
572 malformed_asm = 1;
|
|
|
573 }
|
|
|
574
|
|
|
575 /* Enforce rule #2: All implicitly popped input regs must be closer
|
|
|
576 to the top of the reg-stack than any input that is not implicitly
|
|
|
577 popped. */
|
|
|
578
|
|
|
579 memset (implicitly_dies, 0, sizeof (implicitly_dies));
|
|
|
580 for (i = n_outputs; i < n_outputs + n_inputs; i++)
|
|
|
581 if (STACK_REG_P (recog_data.operand[i]))
|
|
|
582 {
|
|
|
583 /* An input reg is implicitly popped if it is tied to an
|
|
|
584 output, or if there is a CLOBBER for it. */
|
|
|
585 int j;
|
|
|
586
|
|
|
587 for (j = 0; j < n_clobbers; j++)
|
|
|
588 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
|
|
|
589 break;
|
|
|
590
|
|
|
591 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
|
|
|
592 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
|
|
|
593 }
|
|
|
594
|
|
|
595 /* Search for first non-popped reg. */
|
|
|
596 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
|
|
|
597 if (! implicitly_dies[i])
|
|
|
598 break;
|
|
|
599
|
|
|
600 /* If there are any other popped regs, that's an error. */
|
|
|
601 for (; i < LAST_STACK_REG + 1; i++)
|
|
|
602 if (implicitly_dies[i])
|
|
|
603 break;
|
|
|
604
|
|
|
605 if (i != LAST_STACK_REG + 1)
|
|
|
606 {
|
|
|
607 error_for_asm (insn,
|
|
|
608 "implicitly popped regs must be grouped at top of stack");
|
|
|
609 malformed_asm = 1;
|
|
|
610 }
|
|
|
611
|
|
|
612 /* Enforce rule #3: If any input operand uses the "f" constraint, all
|
|
|
613 output constraints must use the "&" earlyclobber.
|
|
|
614
|
|
|
615 ??? Detect this more deterministically by having constrain_asm_operands
|
|
|
616 record any earlyclobber. */
|
|
|
617
|
|
|
618 for (i = n_outputs; i < n_outputs + n_inputs; i++)
|
|
|
619 if (recog_op_alt[i][alt].matches == -1)
|
|
|
620 {
|
|
|
621 int j;
|
|
|
622
|
|
|
623 for (j = 0; j < n_outputs; j++)
|
|
|
624 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
|
|
|
625 {
|
|
|
626 error_for_asm (insn,
|
|
|
627 "output operand %d must use %<&%> constraint", j);
|
|
|
628 malformed_asm = 1;
|
|
|
629 }
|
|
|
630 }
|
|
|
631
|
|
|
632 if (malformed_asm)
|
|
|
633 {
|
|
|
634 /* Avoid further trouble with this insn. */
|
|
|
635 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
|
|
|
636 any_malformed_asm = true;
|
|
|
637 return 0;
|
|
|
638 }
|
|
|
639
|
|
|
640 return 1;
|
|
|
641 }
|
|
|
642
|
|
|
643 /* Calculate the number of inputs and outputs in BODY, an
|
|
|
644 asm_operands. N_OPERANDS is the total number of operands, and
|
|
|
645 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
|
|
|
646 placed. */
|
|
|
647
|
|
|
648 static int
|
|
|
649 get_asm_operand_n_inputs (rtx body)
|
|
|
650 {
|
|
|
651 switch (GET_CODE (body))
|
|
|
652 {
|
|
|
653 case SET:
|
|
|
654 gcc_assert (GET_CODE (SET_SRC (body)) == ASM_OPERANDS);
|
|
|
655 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
|
|
|
656
|
|
|
657 case ASM_OPERANDS:
|
|
|
658 return ASM_OPERANDS_INPUT_LENGTH (body);
|
|
|
659
|
|
|
660 case PARALLEL:
|
|
|
661 return get_asm_operand_n_inputs (XVECEXP (body, 0, 0));
|
|
|
662
|
|
|
663 default:
|
|
|
664 gcc_unreachable ();
|
|
|
665 }
|
|
|
666 }
|
|
|
667
|
|
|
668 /* If current function returns its result in an fp stack register,
|
|
|
669 return the REG. Otherwise, return 0. */
|
|
|
670
|
|
|
671 static rtx
|
|
|
672 stack_result (tree decl)
|
|
|
673 {
|
|
|
674 rtx result;
|
|
|
675
|
|
|
676 /* If the value is supposed to be returned in memory, then clearly
|
|
|
677 it is not returned in a stack register. */
|
|
|
678 if (aggregate_value_p (DECL_RESULT (decl), decl))
|
|
|
679 return 0;
|
|
|
680
|
|
|
681 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
|
|
|
682 if (result != 0)
|
|
|
683 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
|
|
|
684 decl, true);
|
|
|
685
|
|
|
686 return result != 0 && STACK_REG_P (result) ? result : 0;
|
|
|
687 }
|
|
|
688
|
|
|
689
|
|
|
690 /*
|
|
|
691 * This section deals with stack register substitution, and forms the second
|
|
|
692 * pass over the RTL.
|
|
|
693 */
|
|
|
694
|
|
|
695 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
|
|
|
696 the desired hard REGNO. */
|
|
|
697
|
|
|
698 static void
|
|
|
699 replace_reg (rtx *reg, int regno)
|
|
|
700 {
|
|
|
701 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG));
|
|
|
702 gcc_assert (STACK_REG_P (*reg));
|
|
|
703
|
|
|
704 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
|
|
|
705 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
|
|
|
706
|
|
|
707 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
|
|
|
708 }
|
|
|
709
|
|
|
710 /* Remove a note of type NOTE, which must be found, for register
|
|
|
711 number REGNO from INSN. Remove only one such note. */
|
|
|
712
|
|
|
713 static void
|
|
|
714 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
|
|
|
715 {
|
|
|
716 rtx *note_link, this_rtx;
|
|
|
717
|
|
|
718 note_link = ®_NOTES (insn);
|
|
|
719 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1))
|
|
|
720 if (REG_NOTE_KIND (this_rtx) == note
|
|
|
721 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno)
|
|
|
722 {
|
|
|
723 *note_link = XEXP (this_rtx, 1);
|
|
|
724 return;
|
|
|
725 }
|
|
|
726 else
|
|
|
727 note_link = &XEXP (this_rtx, 1);
|
|
|
728
|
|
|
729 gcc_unreachable ();
|
|
|
730 }
|
|
|
731
|
|
|
732 /* Find the hard register number of virtual register REG in REGSTACK.
|
|
|
733 The hard register number is relative to the top of the stack. -1 is
|
|
|
734 returned if the register is not found. */
|
|
|
735
|
|
|
736 static int
|
|
|
737 get_hard_regnum (stack regstack, rtx reg)
|
|
|
738 {
|
|
|
739 int i;
|
|
|
740
|
|
|
741 gcc_assert (STACK_REG_P (reg));
|
|
|
742
|
|
|
743 for (i = regstack->top; i >= 0; i--)
|
|
|
744 if (regstack->reg[i] == REGNO (reg))
|
|
|
745 break;
|
|
|
746
|
|
|
747 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
|
|
|
748 }
|
|
|
749
|
|
|
750 /* Emit an insn to pop virtual register REG before or after INSN.
|
|
|
751 REGSTACK is the stack state after INSN and is updated to reflect this
|
|
|
752 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
|
|
|
753 is represented as a SET whose destination is the register to be popped
|
|
|
754 and source is the top of stack. A death note for the top of stack
|
|
|
755 cases the movdf pattern to pop. */
|
|
|
756
|
|
|
757 static rtx
|
|
|
758 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where)
|
|
|
759 {
|
|
|
760 rtx pop_insn, pop_rtx;
|
|
|
761 int hard_regno;
|
|
|
762
|
|
|
763 /* For complex types take care to pop both halves. These may survive in
|
|
|
764 CLOBBER and USE expressions. */
|
|
|
765 if (COMPLEX_MODE_P (GET_MODE (reg)))
|
|
|
766 {
|
|
|
767 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
|
|
|
768 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
|
|
|
769
|
|
|
770 pop_insn = NULL_RTX;
|
|
|
771 if (get_hard_regnum (regstack, reg1) >= 0)
|
|
|
772 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
|
|
|
773 if (get_hard_regnum (regstack, reg2) >= 0)
|
|
|
774 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
|
|
|
775 gcc_assert (pop_insn);
|
|
|
776 return pop_insn;
|
|
|
777 }
|
|
|
778
|
|
|
779 hard_regno = get_hard_regnum (regstack, reg);
|
|
|
780
|
|
|
781 gcc_assert (hard_regno >= FIRST_STACK_REG);
|
|
|
782
|
|
|
783 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
|
|
|
784 FP_MODE_REG (FIRST_STACK_REG, DFmode));
|
|
|
785
|
|
|
786 if (where == EMIT_AFTER)
|
|
|
787 pop_insn = emit_insn_after (pop_rtx, insn);
|
|
|
788 else
|
|
|
789 pop_insn = emit_insn_before (pop_rtx, insn);
|
|
|
790
|
|
|
791 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode));
|
|
|
792
|
|
|
793 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
|
|
|
794 = regstack->reg[regstack->top];
|
|
|
795 regstack->top -= 1;
|
|
|
796 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
|
|
|
797
|
|
|
798 return pop_insn;
|
|
|
799 }
|
|
|
800
|
|
|
801 /* Emit an insn before or after INSN to swap virtual register REG with
|
|
|
802 the top of stack. REGSTACK is the stack state before the swap, and
|
|
|
803 is updated to reflect the swap. A swap insn is represented as a
|
|
|
804 PARALLEL of two patterns: each pattern moves one reg to the other.
|
|
|
805
|
|
|
806 If REG is already at the top of the stack, no insn is emitted. */
|
|
|
807
|
|
|
808 static void
|
|
|
809 emit_swap_insn (rtx insn, stack regstack, rtx reg)
|
|
|
810 {
|
|
|
811 int hard_regno;
|
|
|
812 rtx swap_rtx;
|
|
|
813 int tmp, other_reg; /* swap regno temps */
|
|
|
814 rtx i1; /* the stack-reg insn prior to INSN */
|
|
|
815 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
|
|
|
816
|
|
|
817 hard_regno = get_hard_regnum (regstack, reg);
|
|
|
818
|
|
|
819 if (hard_regno == FIRST_STACK_REG)
|
|
|
820 return;
|
|
|
821 if (hard_regno == -1)
|
|
|
822 {
|
|
|
823 /* Something failed if the register wasn't on the stack. If we had
|
|
|
824 malformed asms, we zapped the instruction itself, but that didn't
|
|
|
825 produce the same pattern of register sets as before. To prevent
|
|
|
826 further failure, adjust REGSTACK to include REG at TOP. */
|
|
|
827 gcc_assert (any_malformed_asm);
|
|
|
828 regstack->reg[++regstack->top] = REGNO (reg);
|
|
|
829 return;
|
|
|
830 }
|
|
|
831 gcc_assert (hard_regno >= FIRST_STACK_REG);
|
|
|
832
|
|
|
833 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
|
|
|
834
|
|
|
835 tmp = regstack->reg[other_reg];
|
|
|
836 regstack->reg[other_reg] = regstack->reg[regstack->top];
|
|
|
837 regstack->reg[regstack->top] = tmp;
|
|
|
838
|
|
|
839 /* Find the previous insn involving stack regs, but don't pass a
|
|
|
840 block boundary. */
|
|
|
841 i1 = NULL;
|
|
|
842 if (current_block && insn != BB_HEAD (current_block))
|
|
|
843 {
|
|
|
844 rtx tmp = PREV_INSN (insn);
|
|
|
845 rtx limit = PREV_INSN (BB_HEAD (current_block));
|
|
|
846 while (tmp != limit)
|
|
|
847 {
|
|
|
848 if (LABEL_P (tmp)
|
|
|
849 || CALL_P (tmp)
|
|
|
850 || NOTE_INSN_BASIC_BLOCK_P (tmp)
|
|
|
851 || (NONJUMP_INSN_P (tmp)
|
|
|
852 && stack_regs_mentioned (tmp)))
|
|
|
853 {
|
|
|
854 i1 = tmp;
|
|
|
855 break;
|
|
|
856 }
|
|
|
857 tmp = PREV_INSN (tmp);
|
|
|
858 }
|
|
|
859 }
|
|
|
860
|
|
|
861 if (i1 != NULL_RTX
|
|
|
862 && (i1set = single_set (i1)) != NULL_RTX)
|
|
|
863 {
|
|
|
864 rtx i1src = *get_true_reg (&SET_SRC (i1set));
|
|
|
865 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
|
|
|
866
|
|
|
867 /* If the previous register stack push was from the reg we are to
|
|
|
868 swap with, omit the swap. */
|
|
|
869
|
|
|
870 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
|
|
|
871 && REG_P (i1src)
|
|
|
872 && REGNO (i1src) == (unsigned) hard_regno - 1
|
|
|
873 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
|
|
|
874 return;
|
|
|
875
|
|
|
876 /* If the previous insn wrote to the reg we are to swap with,
|
|
|
877 omit the swap. */
|
|
|
878
|
|
|
879 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
|
|
|
880 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
|
|
|
881 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
|
|
|
882 return;
|
|
|
883 }
|
|
|
884
|
|
|
885 /* Avoid emitting the swap if this is the first register stack insn
|
|
|
886 of the current_block. Instead update the current_block's stack_in
|
|
|
887 and let compensate edges take care of this for us. */
|
|
|
888 if (current_block && starting_stack_p)
|
|
|
889 {
|
|
|
890 BLOCK_INFO (current_block)->stack_in = *regstack;
|
|
|
891 starting_stack_p = false;
|
|
|
892 return;
|
|
|
893 }
|
|
|
894
|
|
|
895 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
|
|
|
896 FP_MODE_REG (FIRST_STACK_REG, XFmode));
|
|
|
897
|
|
|
898 if (i1)
|
|
|
899 emit_insn_after (swap_rtx, i1);
|
|
|
900 else if (current_block)
|
|
|
901 emit_insn_before (swap_rtx, BB_HEAD (current_block));
|
|
|
902 else
|
|
|
903 emit_insn_before (swap_rtx, insn);
|
|
|
904 }
|
|
|
905
|
|
|
906 /* Emit an insns before INSN to swap virtual register SRC1 with
|
|
|
907 the top of stack and virtual register SRC2 with second stack
|
|
|
908 slot. REGSTACK is the stack state before the swaps, and
|
|
|
909 is updated to reflect the swaps. A swap insn is represented as a
|
|
|
910 PARALLEL of two patterns: each pattern moves one reg to the other.
|
|
|
911
|
|
|
912 If SRC1 and/or SRC2 are already at the right place, no swap insn
|
|
|
913 is emitted. */
|
|
|
914
|
|
|
915 static void
|
|
|
916 swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2)
|
|
|
917 {
|
|
|
918 struct stack_def temp_stack;
|
|
|
919 int regno, j, k, temp;
|
|
|
920
|
|
|
921 temp_stack = *regstack;
|
|
|
922
|
|
|
923 /* Place operand 1 at the top of stack. */
|
|
|
924 regno = get_hard_regnum (&temp_stack, src1);
|
|
|
925 gcc_assert (regno >= 0);
|
|
|
926 if (regno != FIRST_STACK_REG)
|
|
|
927 {
|
|
|
928 k = temp_stack.top - (regno - FIRST_STACK_REG);
|
|
|
929 j = temp_stack.top;
|
|
|
930
|
|
|
931 temp = temp_stack.reg[k];
|
|
|
932 temp_stack.reg[k] = temp_stack.reg[j];
|
|
|
933 temp_stack.reg[j] = temp;
|
|
|
934 }
|
|
|
935
|
|
|
936 /* Place operand 2 next on the stack. */
|
|
|
937 regno = get_hard_regnum (&temp_stack, src2);
|
|
|
938 gcc_assert (regno >= 0);
|
|
|
939 if (regno != FIRST_STACK_REG + 1)
|
|
|
940 {
|
|
|
941 k = temp_stack.top - (regno - FIRST_STACK_REG);
|
|
|
942 j = temp_stack.top - 1;
|
|
|
943
|
|
|
944 temp = temp_stack.reg[k];
|
|
|
945 temp_stack.reg[k] = temp_stack.reg[j];
|
|
|
946 temp_stack.reg[j] = temp;
|
|
|
947 }
|
|
|
948
|
|
|
949 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
|
|
|
950 }
|
|
|
951
|
|
|
952 /* Handle a move to or from a stack register in PAT, which is in INSN.
|
|
|
953 REGSTACK is the current stack. Return whether a control flow insn
|
|
|
954 was deleted in the process. */
|
|
|
955
|
|
|
956 static bool
|
|
|
957 move_for_stack_reg (rtx insn, stack regstack, rtx pat)
|
|
|
958 {
|
|
|
959 rtx *psrc = get_true_reg (&SET_SRC (pat));
|
|
|
960 rtx *pdest = get_true_reg (&SET_DEST (pat));
|
|
|
961 rtx src, dest;
|
|
|
962 rtx note;
|
|
|
963 bool control_flow_insn_deleted = false;
|
|
|
964
|
|
|
965 src = *psrc; dest = *pdest;
|
|
|
966
|
|
|
967 if (STACK_REG_P (src) && STACK_REG_P (dest))
|
|
|
968 {
|
|
|
969 /* Write from one stack reg to another. If SRC dies here, then
|
|
|
970 just change the register mapping and delete the insn. */
|
|
|
971
|
|
|
972 note = find_regno_note (insn, REG_DEAD, REGNO (src));
|
|
|
973 if (note)
|
|
|
974 {
|
|
|
975 int i;
|
|
|
976
|
|
|
977 /* If this is a no-op move, there must not be a REG_DEAD note. */
|
|
|
978 gcc_assert (REGNO (src) != REGNO (dest));
|
|
|
979
|
|
|
980 for (i = regstack->top; i >= 0; i--)
|
|
|
981 if (regstack->reg[i] == REGNO (src))
|
|
|
982 break;
|
|
|
983
|
|
|
984 /* The destination must be dead, or life analysis is borked. */
|
|
|
985 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
|
|
|
986
|
|
|
987 /* If the source is not live, this is yet another case of
|
|
|
988 uninitialized variables. Load up a NaN instead. */
|
|
|
989 if (i < 0)
|
|
|
990 return move_nan_for_stack_reg (insn, regstack, dest);
|
|
|
991
|
|
|
992 /* It is possible that the dest is unused after this insn.
|
|
|
993 If so, just pop the src. */
|
|
|
994
|
|
|
995 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
|
|
|
996 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
|
|
|
997 else
|
|
|
998 {
|
|
|
999 regstack->reg[i] = REGNO (dest);
|
|
|
1000 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
|
|
|
1001 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
|
|
|
1002 }
|
|
|
1003
|
|
|
1004 control_flow_insn_deleted |= control_flow_insn_p (insn);
|
|
|
1005 delete_insn (insn);
|
|
|
1006 return control_flow_insn_deleted;
|
|
|
1007 }
|
|
|
1008
|
|
|
1009 /* The source reg does not die. */
|
|
|
1010
|
|
|
1011 /* If this appears to be a no-op move, delete it, or else it
|
|
|
1012 will confuse the machine description output patterns. But if
|
|
|
1013 it is REG_UNUSED, we must pop the reg now, as per-insn processing
|
|
|
1014 for REG_UNUSED will not work for deleted insns. */
|
|
|
1015
|
|
|
1016 if (REGNO (src) == REGNO (dest))
|
|
|
1017 {
|
|
|
1018 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
|
|
|
1019 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
|
|
|
1020
|
|
|
1021 control_flow_insn_deleted |= control_flow_insn_p (insn);
|
|
|
1022 delete_insn (insn);
|
|
|
1023 return control_flow_insn_deleted;
|
|
|
1024 }
|
|
|
1025
|
|
|
1026 /* The destination ought to be dead. */
|
|
|
1027 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
|
|
|
1028
|
|
|
1029 replace_reg (psrc, get_hard_regnum (regstack, src));
|
|
|
1030
|
|
|
1031 regstack->reg[++regstack->top] = REGNO (dest);
|
|
|
1032 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
|
|
|
1033 replace_reg (pdest, FIRST_STACK_REG);
|
|
|
1034 }
|
|
|
1035 else if (STACK_REG_P (src))
|
|
|
1036 {
|
|
|
1037 /* Save from a stack reg to MEM, or possibly integer reg. Since
|
|
|
1038 only top of stack may be saved, emit an exchange first if
|
|
|
1039 needs be. */
|
|
|
1040
|
|
|
1041 emit_swap_insn (insn, regstack, src);
|
|
|
1042
|
|
|
1043 note = find_regno_note (insn, REG_DEAD, REGNO (src));
|
|
|
1044 if (note)
|
|
|
1045 {
|
|
|
1046 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
|
|
|
1047 regstack->top--;
|
|
|
1048 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
|
|
|
1049 }
|
|
|
1050 else if ((GET_MODE (src) == XFmode)
|
|
|
1051 && regstack->top < REG_STACK_SIZE - 1)
|
|
|
1052 {
|
|
|
1053 /* A 387 cannot write an XFmode value to a MEM without
|
|
|
1054 clobbering the source reg. The output code can handle
|
|
|
1055 this by reading back the value from the MEM.
|
|
|
1056 But it is more efficient to use a temp register if one is
|
|
|
1057 available. Push the source value here if the register
|
|
|
1058 stack is not full, and then write the value to memory via
|
|
|
1059 a pop. */
|
|
|
1060 rtx push_rtx;
|
|
|
1061 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
|
|
|
1062
|
|
|
1063 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
|
|
|
1064 emit_insn_before (push_rtx, insn);
|
|
|
1065 add_reg_note (insn, REG_DEAD, top_stack_reg);
|
|
|
1066 }
|
|
|
1067
|
|
|
1068 replace_reg (psrc, FIRST_STACK_REG);
|
|
|
1069 }
|
|
|
1070 else
|
|
|
1071 {
|
|
|
1072 rtx pat = PATTERN (insn);
|
|
|
1073
|
|
|
1074 gcc_assert (STACK_REG_P (dest));
|
|
|
1075
|
|
|
1076 /* Load from MEM, or possibly integer REG or constant, into the
|
|
|
1077 stack regs. The actual target is always the top of the
|
|
|
1078 stack. The stack mapping is changed to reflect that DEST is
|
|
|
1079 now at top of stack. */
|
|
|
1080
|
|
|
1081 /* The destination ought to be dead. However, there is a
|
|
|
1082 special case with i387 UNSPEC_TAN, where destination is live
|
|
|
1083 (an argument to fptan) but inherent load of 1.0 is modelled
|
|
|
1084 as a load from a constant. */
|
|
|
1085 if (GET_CODE (pat) == PARALLEL
|
|
|
1086 && XVECLEN (pat, 0) == 2
|
|
|
1087 && GET_CODE (XVECEXP (pat, 0, 1)) == SET
|
|
|
1088 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC
|
|
|
1089 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN)
|
|
|
1090 emit_swap_insn (insn, regstack, dest);
|
|
|
1091 else
|
|
|
1092 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
|
|
|
1093
|
|
|
1094 gcc_assert (regstack->top < REG_STACK_SIZE);
|
|
|
1095
|
|
|
1096 regstack->reg[++regstack->top] = REGNO (dest);
|
|
|
1097 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
|
|
|
1098 replace_reg (pdest, FIRST_STACK_REG);
|
|
|
1099 }
|
|
|
1100
|
|
|
1101 return control_flow_insn_deleted;
|
|
|
1102 }
|
|
|
1103
|
|
|
1104 /* A helper function which replaces INSN with a pattern that loads up
|
|
|
1105 a NaN into DEST, then invokes move_for_stack_reg. */
|
|
|
1106
|
|
|
1107 static bool
|
|
|
1108 move_nan_for_stack_reg (rtx insn, stack regstack, rtx dest)
|
|
|
1109 {
|
|
|
1110 rtx pat;
|
|
|
1111
|
|
|
1112 dest = FP_MODE_REG (REGNO (dest), SFmode);
|
|
|
1113 pat = gen_rtx_SET (VOIDmode, dest, not_a_num);
|
|
|
1114 PATTERN (insn) = pat;
|
|
|
1115 INSN_CODE (insn) = -1;
|
|
|
1116
|
|
|
1117 return move_for_stack_reg (insn, regstack, pat);
|
|
|
1118 }
|
|
|
1119
|
|
|
1120 /* Swap the condition on a branch, if there is one. Return true if we
|
|
|
1121 found a condition to swap. False if the condition was not used as
|
|
|
1122 such. */
|
|
|
1123
|
|
|
1124 static int
|
|
|
1125 swap_rtx_condition_1 (rtx pat)
|
|
|
1126 {
|
|
|
1127 const char *fmt;
|
|
|
1128 int i, r = 0;
|
|
|
1129
|
|
|
1130 if (COMPARISON_P (pat))
|
|
|
1131 {
|
|
|
1132 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
|
|
|
1133 r = 1;
|
|
|
1134 }
|
|
|
1135 else
|
|
|
1136 {
|
|
|
1137 fmt = GET_RTX_FORMAT (GET_CODE (pat));
|
|
|
1138 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
|
|
|
1139 {
|
|
|
1140 if (fmt[i] == 'E')
|
|
|
1141 {
|
|
|
1142 int j;
|
|
|
1143
|
|
|
1144 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
|
|
|
1145 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
|
|
|
1146 }
|
|
|
1147 else if (fmt[i] == 'e')
|
|
|
1148 r |= swap_rtx_condition_1 (XEXP (pat, i));
|
|
|
1149 }
|
|
|
1150 }
|
|
|
1151
|
|
|
1152 return r;
|
|
|
1153 }
|
|
|
1154
|
|
|
1155 static int
|
|
|
1156 swap_rtx_condition (rtx insn)
|
|
|
1157 {
|
|
|
1158 rtx pat = PATTERN (insn);
|
|
|
1159
|
|
|
1160 /* We're looking for a single set to cc0 or an HImode temporary. */
|
|
|
1161
|
|
|
1162 if (GET_CODE (pat) == SET
|
|
|
1163 && REG_P (SET_DEST (pat))
|
|
|
1164 && REGNO (SET_DEST (pat)) == FLAGS_REG)
|
|
|
1165 {
|
|
|
1166 insn = next_flags_user (insn);
|
|
|
1167 if (insn == NULL_RTX)
|
|
|
1168 return 0;
|
|
|
1169 pat = PATTERN (insn);
|
|
|
1170 }
|
|
|
1171
|
|
|
1172 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
|
|
|
1173 with the cc value right now. We may be able to search for one
|
|
|
1174 though. */
|
|
|
1175
|
|
|
1176 if (GET_CODE (pat) == SET
|
|
|
1177 && GET_CODE (SET_SRC (pat)) == UNSPEC
|
|
|
1178 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
|
|
|
1179 {
|
|
|
1180 rtx dest = SET_DEST (pat);
|
|
|
1181
|
|
|
1182 /* Search forward looking for the first use of this value.
|
|
|
1183 Stop at block boundaries. */
|
|
|
1184 while (insn != BB_END (current_block))
|
|
|
1185 {
|
|
|
1186 insn = NEXT_INSN (insn);
|
|
|
1187 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
|
|
|
1188 break;
|
|
|
1189 if (CALL_P (insn))
|
|
|
1190 return 0;
|
|
|
1191 }
|
|
|
1192
|
|
|
1193 /* We haven't found it. */
|
|
|
1194 if (insn == BB_END (current_block))
|
|
|
1195 return 0;
|
|
|
1196
|
|
|
1197 /* So we've found the insn using this value. If it is anything
|
|
|
1198 other than sahf or the value does not die (meaning we'd have
|
|
|
1199 to search further), then we must give up. */
|
|
|
1200 pat = PATTERN (insn);
|
|
|
1201 if (GET_CODE (pat) != SET
|
|
|
1202 || GET_CODE (SET_SRC (pat)) != UNSPEC
|
|
|
1203 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
|
|
|
1204 || ! dead_or_set_p (insn, dest))
|
|
|
1205 return 0;
|
|
|
1206
|
|
|
1207 /* Now we are prepared to handle this as a normal cc0 setter. */
|
|
|
1208 insn = next_flags_user (insn);
|
|
|
1209 if (insn == NULL_RTX)
|
|
|
1210 return 0;
|
|
|
1211 pat = PATTERN (insn);
|
|
|
1212 }
|
|
|
1213
|
|
|
1214 if (swap_rtx_condition_1 (pat))
|
|
|
1215 {
|
|
|
1216 int fail = 0;
|
|
|
1217 INSN_CODE (insn) = -1;
|
|
|
1218 if (recog_memoized (insn) == -1)
|
|
|
1219 fail = 1;
|
|
|
1220 /* In case the flags don't die here, recurse to try fix
|
|
|
1221 following user too. */
|
|
|
1222 else if (! dead_or_set_p (insn, ix86_flags_rtx))
|
|
|
1223 {
|
|
|
1224 insn = next_flags_user (insn);
|
|
|
1225 if (!insn || !swap_rtx_condition (insn))
|
|
|
1226 fail = 1;
|
|
|
1227 }
|
|
|
1228 if (fail)
|
|
|
1229 {
|
|
|
1230 swap_rtx_condition_1 (pat);
|
|
|
1231 return 0;
|
|
|
1232 }
|
|
|
1233 return 1;
|
|
|
1234 }
|
|
|
1235 return 0;
|
|
|
1236 }
|
|
|
1237
|
|
|
1238 /* Handle a comparison. Special care needs to be taken to avoid
|
|
|
1239 causing comparisons that a 387 cannot do correctly, such as EQ.
|
|
|
1240
|
|
|
1241 Also, a pop insn may need to be emitted. The 387 does have an
|
|
|
1242 `fcompp' insn that can pop two regs, but it is sometimes too expensive
|
|
|
1243 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
|
|
|
1244 set up. */
|
|
|
1245
|
|
|
1246 static void
|
|
|
1247 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src)
|
|
|
1248 {
|
|
|
1249 rtx *src1, *src2;
|
|
|
1250 rtx src1_note, src2_note;
|
|
|
1251
|
|
|
1252 src1 = get_true_reg (&XEXP (pat_src, 0));
|
|
|
1253 src2 = get_true_reg (&XEXP (pat_src, 1));
|
|
|
1254
|
|
|
1255 /* ??? If fxch turns out to be cheaper than fstp, give priority to
|
|
|
1256 registers that die in this insn - move those to stack top first. */
|
|
|
1257 if ((! STACK_REG_P (*src1)
|
|
|
1258 || (STACK_REG_P (*src2)
|
|
|
1259 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
|
|
|
1260 && swap_rtx_condition (insn))
|
|
|
1261 {
|
|
|
1262 rtx temp;
|
|
|
1263 temp = XEXP (pat_src, 0);
|
|
|
1264 XEXP (pat_src, 0) = XEXP (pat_src, 1);
|
|
|
1265 XEXP (pat_src, 1) = temp;
|
|
|
1266
|
|
|
1267 src1 = get_true_reg (&XEXP (pat_src, 0));
|
|
|
1268 src2 = get_true_reg (&XEXP (pat_src, 1));
|
|
|
1269
|
|
|
1270 INSN_CODE (insn) = -1;
|
|
|
1271 }
|
|
|
1272
|
|
|
1273 /* We will fix any death note later. */
|
|
|
1274
|
|
|
1275 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
|
|
|
1276
|
|
|
1277 if (STACK_REG_P (*src2))
|
|
|
1278 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
|
|
|
1279 else
|
|
|
1280 src2_note = NULL_RTX;
|
|
|
1281
|
|
|
1282 emit_swap_insn (insn, regstack, *src1);
|
|
|
1283
|
|
|
1284 replace_reg (src1, FIRST_STACK_REG);
|
|
|
1285
|
|
|
1286 if (STACK_REG_P (*src2))
|
|
|
1287 replace_reg (src2, get_hard_regnum (regstack, *src2));
|
|
|
1288
|
|
|
1289 if (src1_note)
|
|
|
1290 {
|
|
|
1291 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
|
|
|
1292 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
|
|
|
1293 }
|
|
|
1294
|
|
|
1295 /* If the second operand dies, handle that. But if the operands are
|
|
|
1296 the same stack register, don't bother, because only one death is
|
|
|
1297 needed, and it was just handled. */
|
|
|
1298
|
|
|
1299 if (src2_note
|
|
|
1300 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
|
|
|
1301 && REGNO (*src1) == REGNO (*src2)))
|
|
|
1302 {
|
|
|
1303 /* As a special case, two regs may die in this insn if src2 is
|
|
|
1304 next to top of stack and the top of stack also dies. Since
|
|
|
1305 we have already popped src1, "next to top of stack" is really
|
|
|
1306 at top (FIRST_STACK_REG) now. */
|
|
|
1307
|
|
|
1308 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
|
|
|
1309 && src1_note)
|
|
|
1310 {
|
|
|
1311 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
|
|
|
1312 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
|
|
|
1313 }
|
|
|
1314 else
|
|
|
1315 {
|
|
|
1316 /* The 386 can only represent death of the first operand in
|
|
|
1317 the case handled above. In all other cases, emit a separate
|
|
|
1318 pop and remove the death note from here. */
|
|
|
1319
|
|
|
1320 /* link_cc0_insns (insn); */
|
|
|
1321
|
|
|
1322 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
|
|
|
1323
|
|
|
1324 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
|
|
|
1325 EMIT_AFTER);
|
|
|
1326 }
|
|
|
1327 }
|
|
|
1328 }
|
|
|
1329
|
|
|
1330 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
|
|
|
1331 is the current register layout. Return whether a control flow insn
|
|
|
1332 was deleted in the process. */
|
|
|
1333
|
|
|
1334 static bool
|
|
|
1335 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
|
|
|
1336 {
|
|
|
1337 rtx *dest, *src;
|
|
|
1338 bool control_flow_insn_deleted = false;
|
|
|
1339
|
|
|
1340 switch (GET_CODE (pat))
|
|
|
1341 {
|
|
|
1342 case USE:
|
|
|
1343 /* Deaths in USE insns can happen in non optimizing compilation.
|
|
|
1344 Handle them by popping the dying register. */
|
|
|
1345 src = get_true_reg (&XEXP (pat, 0));
|
|
|
1346 if (STACK_REG_P (*src)
|
|
|
1347 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
|
|
|
1348 {
|
|
|
1349 /* USEs are ignored for liveness information so USEs of dead
|
|
|
1350 register might happen. */
|
|
|
1351 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src)))
|
|
|
1352 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
|
|
|
1353 return control_flow_insn_deleted;
|
|
|
1354 }
|
|
|
1355 /* Uninitialized USE might happen for functions returning uninitialized
|
|
|
1356 value. We will properly initialize the USE on the edge to EXIT_BLOCK,
|
|
|
1357 so it is safe to ignore the use here. This is consistent with behavior
|
|
|
1358 of dataflow analyzer that ignores USE too. (This also imply that
|
|
|
1359 forcibly initializing the register to NaN here would lead to ICE later,
|
|
|
1360 since the REG_DEAD notes are not issued.) */
|
|
|
1361 break;
|
|
|
1362
|
|
|
1363 case CLOBBER:
|
|
|
1364 {
|
|
|
1365 rtx note;
|
|
|
1366
|
|
|
1367 dest = get_true_reg (&XEXP (pat, 0));
|
|
|
1368 if (STACK_REG_P (*dest))
|
|
|
1369 {
|
|
|
1370 note = find_reg_note (insn, REG_DEAD, *dest);
|
|
|
1371
|
|
|
1372 if (pat != PATTERN (insn))
|
|
|
1373 {
|
|
|
1374 /* The fix_truncdi_1 pattern wants to be able to allocate
|
|
|
1375 its own scratch register. It does this by clobbering
|
|
|
1376 an fp reg so that it is assured of an empty reg-stack
|
|
|
1377 register. If the register is live, kill it now.
|
|
|
1378 Remove the DEAD/UNUSED note so we don't try to kill it
|
|
|
1379 later too. */
|
|
|
1380
|
|
|
1381 if (note)
|
|
|
1382 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
|
|
|
1383 else
|
|
|
1384 {
|
|
|
1385 note = find_reg_note (insn, REG_UNUSED, *dest);
|
|
|
1386 gcc_assert (note);
|
|
|
1387 }
|
|
|
1388 remove_note (insn, note);
|
|
|
1389 replace_reg (dest, FIRST_STACK_REG + 1);
|
|
|
1390 }
|
|
|
1391 else
|
|
|
1392 {
|
|
|
1393 /* A top-level clobber with no REG_DEAD, and no hard-regnum
|
|
|
1394 indicates an uninitialized value. Because reload removed
|
|
|
1395 all other clobbers, this must be due to a function
|
|
|
1396 returning without a value. Load up a NaN. */
|
|
|
1397
|
|
|
1398 if (!note)
|
|
|
1399 {
|
|
|
1400 rtx t = *dest;
|
|
|
1401 if (COMPLEX_MODE_P (GET_MODE (t)))
|
|
|
1402 {
|
|
|
1403 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
|
|
|
1404 if (get_hard_regnum (regstack, u) == -1)
|
|
|
1405 {
|
|
|
1406 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
|
|
|
1407 rtx insn2 = emit_insn_before (pat2, insn);
|
|
|
1408 control_flow_insn_deleted
|
|
|
1409 |= move_nan_for_stack_reg (insn2, regstack, u);
|
|
|
1410 }
|
|
|
1411 }
|
|
|
1412 if (get_hard_regnum (regstack, t) == -1)
|
|
|
1413 control_flow_insn_deleted
|
|
|
1414 |= move_nan_for_stack_reg (insn, regstack, t);
|
|
|
1415 }
|
|
|
1416 }
|
|
|
1417 }
|
|
|
1418 break;
|
|
|
1419 }
|
|
|
1420
|
|
|
1421 case SET:
|
|
|
1422 {
|
|
|
1423 rtx *src1 = (rtx *) 0, *src2;
|
|
|
1424 rtx src1_note, src2_note;
|
|
|
1425 rtx pat_src;
|
|
|
1426
|
|
|
1427 dest = get_true_reg (&SET_DEST (pat));
|
|
|
1428 src = get_true_reg (&SET_SRC (pat));
|
|
|
1429 pat_src = SET_SRC (pat);
|
|
|
1430
|
|
|
1431 /* See if this is a `movM' pattern, and handle elsewhere if so. */
|
|
|
1432 if (STACK_REG_P (*src)
|
|
|
1433 || (STACK_REG_P (*dest)
|
|
|
1434 && (REG_P (*src) || MEM_P (*src)
|
|
|
1435 || GET_CODE (*src) == CONST_DOUBLE)))
|
|
|
1436 {
|
|
|
1437 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
|
|
|
1438 break;
|
|
|
1439 }
|
|
|
1440
|
|
|
1441 switch (GET_CODE (pat_src))
|
|
|
1442 {
|
|
|
1443 case COMPARE:
|
|
|
1444 compare_for_stack_reg (insn, regstack, pat_src);
|
|
|
1445 break;
|
|
|
1446
|
|
|
1447 case CALL:
|
|
|
1448 {
|
|
|
1449 int count;
|
|
|
1450 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
|
|
|
1451 --count >= 0;)
|
|
|
1452 {
|
|
|
1453 regstack->reg[++regstack->top] = REGNO (*dest) + count;
|
|
|
1454 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
|
|
|
1455 }
|
|
|
1456 }
|
|
|
1457 replace_reg (dest, FIRST_STACK_REG);
|
|
|
1458 break;
|
|
|
1459
|
|
|
1460 case REG:
|
|
|
1461 /* This is a `tstM2' case. */
|
|
|
1462 gcc_assert (*dest == cc0_rtx);
|
|
|
1463 src1 = src;
|
|
|
1464
|
|
|
1465 /* Fall through. */
|
|
|
1466
|
|
|
1467 case FLOAT_TRUNCATE:
|
|
|
1468 case SQRT:
|
|
|
1469 case ABS:
|
|
|
1470 case NEG:
|
|
|
1471 /* These insns only operate on the top of the stack. DEST might
|
|
|
1472 be cc0_rtx if we're processing a tstM pattern. Also, it's
|
|
|
1473 possible that the tstM case results in a REG_DEAD note on the
|
|
|
1474 source. */
|
|
|
1475
|
|
|
1476 if (src1 == 0)
|
|
|
1477 src1 = get_true_reg (&XEXP (pat_src, 0));
|
|
|
1478
|
|
|
1479 emit_swap_insn (insn, regstack, *src1);
|
|
|
1480
|
|
|
1481 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
|
|
|
1482
|
|
|
1483 if (STACK_REG_P (*dest))
|
|
|
1484 replace_reg (dest, FIRST_STACK_REG);
|
|
|
1485
|
|
|
1486 if (src1_note)
|
|
|
1487 {
|
|
|
1488 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
|
|
|
1489 regstack->top--;
|
|
|
1490 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
|
|
|
1491 }
|
|
|
1492
|
|
|
1493 replace_reg (src1, FIRST_STACK_REG);
|
|
|
1494 break;
|
|
|
1495
|
|
|
1496 case MINUS:
|
|
|
1497 case DIV:
|
|
|
1498 /* On i386, reversed forms of subM3 and divM3 exist for
|
|
|
1499 MODE_FLOAT, so the same code that works for addM3 and mulM3
|
|
|
1500 can be used. */
|
|
|
1501 case MULT:
|
|
|
1502 case PLUS:
|
|
|
1503 /* These insns can accept the top of stack as a destination
|
|
|
1504 from a stack reg or mem, or can use the top of stack as a
|
|
|
1505 source and some other stack register (possibly top of stack)
|
|
|
1506 as a destination. */
|
|
|
1507
|
|
|
1508 src1 = get_true_reg (&XEXP (pat_src, 0));
|
|
|
1509 src2 = get_true_reg (&XEXP (pat_src, 1));
|
|
|
1510
|
|
|
1511 /* We will fix any death note later. */
|
|
|
1512
|
|
|
1513 if (STACK_REG_P (*src1))
|
|
|
1514 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
|
|
|
1515 else
|
|
|
1516 src1_note = NULL_RTX;
|
|
|
1517 if (STACK_REG_P (*src2))
|
|
|
1518 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
|
|
|
1519 else
|
|
|
1520 src2_note = NULL_RTX;
|
|
|
1521
|
|
|
1522 /* If either operand is not a stack register, then the dest
|
|
|
1523 must be top of stack. */
|
|
|
1524
|
|
|
1525 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
|
|
|
1526 emit_swap_insn (insn, regstack, *dest);
|
|
|
1527 else
|
|
|
1528 {
|
|
|
1529 /* Both operands are REG. If neither operand is already
|
|
|
1530 at the top of stack, choose to make the one that is the
|
|
|
1531 dest the new top of stack. */
|
|
|
1532
|
|
|
1533 int src1_hard_regnum, src2_hard_regnum;
|
|
|
1534
|
|
|
1535 src1_hard_regnum = get_hard_regnum (regstack, *src1);
|
|
|
1536 src2_hard_regnum = get_hard_regnum (regstack, *src2);
|
|
|
1537
|
|
|
1538 /* If the source is not live, this is yet another case of
|
|
|
1539 uninitialized variables. Load up a NaN instead. */
|
|
|
1540 if (src1_hard_regnum == -1)
|
|
|
1541 {
|
|
|
1542 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1);
|
|
|
1543 rtx insn2 = emit_insn_before (pat2, insn);
|
|
|
1544 control_flow_insn_deleted
|
|
|
1545 |= move_nan_for_stack_reg (insn2, regstack, *src1);
|
|
|
1546 }
|
|
|
1547 if (src2_hard_regnum == -1)
|
|
|
1548 {
|
|
|
1549 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2);
|
|
|
1550 rtx insn2 = emit_insn_before (pat2, insn);
|
|
|
1551 control_flow_insn_deleted
|
|
|
1552 |= move_nan_for_stack_reg (insn2, regstack, *src2);
|
|
|
1553 }
|
|
|
1554
|
|
|
1555 if (src1_hard_regnum != FIRST_STACK_REG
|
|
|
1556 && src2_hard_regnum != FIRST_STACK_REG)
|
|
|
1557 emit_swap_insn (insn, regstack, *dest);
|
|
|
1558 }
|
|
|
1559
|
|
|
1560 if (STACK_REG_P (*src1))
|
|
|
1561 replace_reg (src1, get_hard_regnum (regstack, *src1));
|
|
|
1562 if (STACK_REG_P (*src2))
|
|
|
1563 replace_reg (src2, get_hard_regnum (regstack, *src2));
|
|
|
1564
|
|
|
1565 if (src1_note)
|
|
|
1566 {
|
|
|
1567 rtx src1_reg = XEXP (src1_note, 0);
|
|
|
1568
|
|
|
1569 /* If the register that dies is at the top of stack, then
|
|
|
1570 the destination is somewhere else - merely substitute it.
|
|
|
1571 But if the reg that dies is not at top of stack, then
|
|
|
1572 move the top of stack to the dead reg, as though we had
|
|
|
1573 done the insn and then a store-with-pop. */
|
|
|
1574
|
|
|
1575 if (REGNO (src1_reg) == regstack->reg[regstack->top])
|
|
|
1576 {
|
|
|
1577 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
|
|
|
1578 replace_reg (dest, get_hard_regnum (regstack, *dest));
|
|
|
1579 }
|
|
|
1580 else
|
|
|
1581 {
|
|
|
1582 int regno = get_hard_regnum (regstack, src1_reg);
|
|
|
1583
|
|
|
1584 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
|
|
|
1585 replace_reg (dest, regno);
|
|
|
1586
|
|
|
1587 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
|
|
|
1588 = regstack->reg[regstack->top];
|
|
|
1589 }
|
|
|
1590
|
|
|
1591 CLEAR_HARD_REG_BIT (regstack->reg_set,
|
|
|
1592 REGNO (XEXP (src1_note, 0)));
|
|
|
1593 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
|
|
|
1594 regstack->top--;
|
|
|
1595 }
|
|
|
1596 else if (src2_note)
|
|
|
1597 {
|
|
|
1598 rtx src2_reg = XEXP (src2_note, 0);
|
|
|
1599 if (REGNO (src2_reg) == regstack->reg[regstack->top])
|
|
|
1600 {
|
|
|
1601 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
|
|
|
1602 replace_reg (dest, get_hard_regnum (regstack, *dest));
|
|
|
1603 }
|
|
|
1604 else
|
|
|
1605 {
|
|
|
1606 int regno = get_hard_regnum (regstack, src2_reg);
|
|
|
1607
|
|
|
1608 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
|
|
|
1609 replace_reg (dest, regno);
|
|
|
1610
|
|
|
1611 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
|
|
|
1612 = regstack->reg[regstack->top];
|
|
|
1613 }
|
|
|
1614
|
|
|
1615 CLEAR_HARD_REG_BIT (regstack->reg_set,
|
|
|
1616 REGNO (XEXP (src2_note, 0)));
|
|
|
1617 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
|
|
|
1618 regstack->top--;
|
|
|
1619 }
|
|
|
1620 else
|
|
|
1621 {
|
|
|
1622 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
|
|
|
1623 replace_reg (dest, get_hard_regnum (regstack, *dest));
|
|
|
1624 }
|
|
|
1625
|
|
|
1626 /* Keep operand 1 matching with destination. */
|
|
|
1627 if (COMMUTATIVE_ARITH_P (pat_src)
|
|
|
1628 && REG_P (*src1) && REG_P (*src2)
|
|
|
1629 && REGNO (*src1) != REGNO (*dest))
|
|
|
1630 {
|
|
|
1631 int tmp = REGNO (*src1);
|
|
|
1632 replace_reg (src1, REGNO (*src2));
|
|
|
1633 replace_reg (src2, tmp);
|
|
|
1634 }
|
|
|
1635 break;
|
|
|
1636
|
|
|
1637 case UNSPEC:
|
|
|
1638 switch (XINT (pat_src, 1))
|
|
|
1639 {
|
|
|
1640 case UNSPEC_FIST:
|
|
|
1641
|
|
|
1642 case UNSPEC_FIST_FLOOR:
|
|
|
1643 case UNSPEC_FIST_CEIL:
|
|
|
1644
|
|
|
1645 /* These insns only operate on the top of the stack. */
|
|
|
1646
|
|
|
1647 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
|
|
|
1648 emit_swap_insn (insn, regstack, *src1);
|
|
|
1649
|
|
|
1650 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
|
|
|
1651
|
|
|
1652 if (STACK_REG_P (*dest))
|
|
|
1653 replace_reg (dest, FIRST_STACK_REG);
|
|
|
1654
|
|
|
1655 if (src1_note)
|
|
|
1656 {
|
|
|
1657 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
|
|
|
1658 regstack->top--;
|
|
|
1659 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
|
|
|
1660 }
|
|
|
1661
|
|
|
1662 replace_reg (src1, FIRST_STACK_REG);
|
|
|
1663 break;
|
|
|
1664
|
|
|
1665 case UNSPEC_FXAM:
|
|
|
1666
|
|
|
1667 /* This insn only operate on the top of the stack. */
|
|
|
1668
|
|
|
1669 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
|
|
|
1670 emit_swap_insn (insn, regstack, *src1);
|
|
|
1671
|
|
|
1672 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
|
|
|
1673
|
|
|
1674 replace_reg (src1, FIRST_STACK_REG);
|
|
|
1675
|
|
|
1676 if (src1_note)
|
|
|
1677 {
|
|
|
1678 remove_regno_note (insn, REG_DEAD,
|
|
|
1679 REGNO (XEXP (src1_note, 0)));
|
|
|
1680 emit_pop_insn (insn, regstack, XEXP (src1_note, 0),
|
|
|
1681 EMIT_AFTER);
|
|
|
1682 }
|
|
|
1683
|
|
|
1684 break;
|
|
|
1685
|
|
|
1686 case UNSPEC_SIN:
|
|
|
1687 case UNSPEC_COS:
|
|
|
1688 case UNSPEC_FRNDINT:
|
|
|
1689 case UNSPEC_F2XM1:
|
|
|
1690
|
|
|
1691 case UNSPEC_FRNDINT_FLOOR:
|
|
|
1692 case UNSPEC_FRNDINT_CEIL:
|
|
|
1693 case UNSPEC_FRNDINT_TRUNC:
|
|
|
1694 case UNSPEC_FRNDINT_MASK_PM:
|
|
|
1695
|
|
|
1696 /* Above insns operate on the top of the stack. */
|
|
|
1697
|
|
|
1698 case UNSPEC_SINCOS_COS:
|
|
|
1699 case UNSPEC_XTRACT_FRACT:
|
|
|
1700
|
|
|
1701 /* Above insns operate on the top two stack slots,
|
|
|
1702 first part of one input, double output insn. */
|
|
|
1703
|
|
|
1704 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
|
|
|
1705
|
|
|
1706 emit_swap_insn (insn, regstack, *src1);
|
|
|
1707
|
|
|
1708 /* Input should never die, it is replaced with output. */
|
|
|
1709 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
|
|
|
1710 gcc_assert (!src1_note);
|
|
|
1711
|
|
|
1712 if (STACK_REG_P (*dest))
|
|
|
1713 replace_reg (dest, FIRST_STACK_REG);
|
|
|
1714
|
|
|
1715 replace_reg (src1, FIRST_STACK_REG);
|
|
|
1716 break;
|
|
|
1717
|
|
|
1718 case UNSPEC_SINCOS_SIN:
|
|
|
1719 case UNSPEC_XTRACT_EXP:
|
|
|
1720
|
|
|
1721 /* These insns operate on the top two stack slots,
|
|
|
1722 second part of one input, double output insn. */
|
|
|
1723
|
|
|
1724 regstack->top++;
|
|
|
1725 /* FALLTHRU */
|
|
|
1726
|
|
|
1727 case UNSPEC_TAN:
|
|
|
1728
|
|
|
1729 /* For UNSPEC_TAN, regstack->top is already increased
|
|
|
1730 by inherent load of constant 1.0. */
|
|
|
1731
|
|
|
1732 /* Output value is generated in the second stack slot.
|
|
|
1733 Move current value from second slot to the top. */
|
|
|
1734 regstack->reg[regstack->top]
|
|
|
1735 = regstack->reg[regstack->top - 1];
|
|
|
1736
|
|
|
1737 gcc_assert (STACK_REG_P (*dest));
|
|
|
1738
|
|
|
1739 regstack->reg[regstack->top - 1] = REGNO (*dest);
|
|
|
1740 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
|
|
|
1741 replace_reg (dest, FIRST_STACK_REG + 1);
|
|
|
1742
|
|
|
1743 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
|
|
|
1744
|
|
|
1745 replace_reg (src1, FIRST_STACK_REG);
|
|
|
1746 break;
|
|
|
1747
|
|
|
1748 case UNSPEC_FPATAN:
|
|
|
1749 case UNSPEC_FYL2X:
|
|
|
1750 case UNSPEC_FYL2XP1:
|
|
|
1751 /* These insns operate on the top two stack slots. */
|
|
|
1752
|
|
|
1753 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
|
|
|
1754 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
|
|
|
1755
|
|
|
1756 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
|
|
|
1757 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
|
|
|
1758
|
|
|
1759 swap_to_top (insn, regstack, *src1, *src2);
|
|
|
1760
|
|
|
1761 replace_reg (src1, FIRST_STACK_REG);
|
|
|
1762 replace_reg (src2, FIRST_STACK_REG + 1);
|
|
|
1763
|
|
|
1764 if (src1_note)
|
|
|
1765 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
|
|
|
1766 if (src2_note)
|
|
|
1767 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
|
|
|
1768
|
|
|
1769 /* Pop both input operands from the stack. */
|
|
|
1770 CLEAR_HARD_REG_BIT (regstack->reg_set,
|
|
|
1771 regstack->reg[regstack->top]);
|
|
|
1772 CLEAR_HARD_REG_BIT (regstack->reg_set,
|
|
|
1773 regstack->reg[regstack->top - 1]);
|
|
|
1774 regstack->top -= 2;
|
|
|
1775
|
|
|
1776 /* Push the result back onto the stack. */
|
|
|
1777 regstack->reg[++regstack->top] = REGNO (*dest);
|
|
|
1778 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
|
|
|
1779 replace_reg (dest, FIRST_STACK_REG);
|
|
|
1780 break;
|
|
|
1781
|
|
|
1782 case UNSPEC_FSCALE_FRACT:
|
|
|
1783 case UNSPEC_FPREM_F:
|
|
|
1784 case UNSPEC_FPREM1_F:
|
|
|
1785 /* These insns operate on the top two stack slots,
|
|
|
1786 first part of double input, double output insn. */
|
|
|
1787
|
|
|
1788 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
|
|
|
1789 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
|
|
|
1790
|
|
|
1791 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
|
|
|
1792 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
|
|
|
1793
|
|
|
1794 /* Inputs should never die, they are
|
|
|
1795 replaced with outputs. */
|
|
|
1796 gcc_assert (!src1_note);
|
|
|
1797 gcc_assert (!src2_note);
|
|
|
1798
|
|
|
1799 swap_to_top (insn, regstack, *src1, *src2);
|
|
|
1800
|
|
|
1801 /* Push the result back onto stack. Empty stack slot
|
|
|
1802 will be filled in second part of insn. */
|
|
|
1803 if (STACK_REG_P (*dest))
|
|
|
1804 {
|
|
|
1805 regstack->reg[regstack->top] = REGNO (*dest);
|
|
|
1806 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
|
|
|
1807 replace_reg (dest, FIRST_STACK_REG);
|
|
|
1808 }
|
|
|
1809
|
|
|
1810 replace_reg (src1, FIRST_STACK_REG);
|
|
|
1811 replace_reg (src2, FIRST_STACK_REG + 1);
|
|
|
1812 break;
|
|
|
1813
|
|
|
1814 case UNSPEC_FSCALE_EXP:
|
|
|
1815 case UNSPEC_FPREM_U:
|
|
|
1816 case UNSPEC_FPREM1_U:
|
|
|
1817 /* These insns operate on the top two stack slots,
|
|
|
1818 second part of double input, double output insn. */
|
|
|
1819
|
|
|
1820 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
|
|
|
1821 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
|
|
|
1822
|
|
|
1823 /* Push the result back onto stack. Fill empty slot from
|
|
|
1824 first part of insn and fix top of stack pointer. */
|
|
|
1825 if (STACK_REG_P (*dest))
|
|
|
1826 {
|
|
|
1827 regstack->reg[regstack->top - 1] = REGNO (*dest);
|
|
|
1828 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
|
|
|
1829 replace_reg (dest, FIRST_STACK_REG + 1);
|
|
|
1830 }
|
|
|
1831
|
|
|
1832 replace_reg (src1, FIRST_STACK_REG);
|
|
|
1833 replace_reg (src2, FIRST_STACK_REG + 1);
|
|
|
1834 break;
|
|
|
1835
|
|
|
1836 case UNSPEC_C2_FLAG:
|
|
|
1837 /* This insn operates on the top two stack slots,
|
|
|
1838 third part of C2 setting double input insn. */
|
|
|
1839
|
|
|
1840 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
|
|
|
1841 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
|
|
|
1842
|
|
|
1843 replace_reg (src1, FIRST_STACK_REG);
|
|
|
1844 replace_reg (src2, FIRST_STACK_REG + 1);
|
|
|
1845 break;
|
|
|
1846
|
|
|
1847 case UNSPEC_SAHF:
|
|
|
1848 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
|
|
|
1849 The combination matches the PPRO fcomi instruction. */
|
|
|
1850
|
|
|
1851 pat_src = XVECEXP (pat_src, 0, 0);
|
|
|
1852 gcc_assert (GET_CODE (pat_src) == UNSPEC);
|
|
|
1853 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
|
|
|
1854 /* Fall through. */
|
|
|
1855
|
|
|
1856 case UNSPEC_FNSTSW:
|
|
|
1857 /* Combined fcomp+fnstsw generated for doing well with
|
|
|
1858 CSE. When optimizing this would have been broken
|
|
|
1859 up before now. */
|
|
|
1860
|
|
|
1861 pat_src = XVECEXP (pat_src, 0, 0);
|
|
|
1862 gcc_assert (GET_CODE (pat_src) == COMPARE);
|
|
|
1863
|
|
|
1864 compare_for_stack_reg (insn, regstack, pat_src);
|
|
|
1865 break;
|
|
|
1866
|
|
|
1867 default:
|
|
|
1868 gcc_unreachable ();
|
|
|
1869 }
|
|
|
1870 break;
|
|
|
1871
|
|
|
1872 case IF_THEN_ELSE:
|
|
|
1873 /* This insn requires the top of stack to be the destination. */
|
|
|
1874
|
|
|
1875 src1 = get_true_reg (&XEXP (pat_src, 1));
|
|
|
1876 src2 = get_true_reg (&XEXP (pat_src, 2));
|
|
|
1877
|
|
|
1878 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
|
|
|
1879 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
|
|
|
1880
|
|
|
1881 /* If the comparison operator is an FP comparison operator,
|
|
|
1882 it is handled correctly by compare_for_stack_reg () who
|
|
|
1883 will move the destination to the top of stack. But if the
|
|
|
1884 comparison operator is not an FP comparison operator, we
|
|
|
1885 have to handle it here. */
|
|
|
1886 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
|
|
|
1887 && REGNO (*dest) != regstack->reg[regstack->top])
|
|
|
1888 {
|
|
|
1889 /* In case one of operands is the top of stack and the operands
|
|
|
1890 dies, it is safe to make it the destination operand by
|
|
|
1891 reversing the direction of cmove and avoid fxch. */
|
|
|
1892 if ((REGNO (*src1) == regstack->reg[regstack->top]
|
|
|
1893 && src1_note)
|
|
|
1894 || (REGNO (*src2) == regstack->reg[regstack->top]
|
|
|
1895 && src2_note))
|
|
|
1896 {
|
|
|
1897 int idx1 = (get_hard_regnum (regstack, *src1)
|
|
|
1898 - FIRST_STACK_REG);
|
|
|
1899 int idx2 = (get_hard_regnum (regstack, *src2)
|
|
|
1900 - FIRST_STACK_REG);
|
|
|
1901
|
|
|
1902 /* Make reg-stack believe that the operands are already
|
|
|
1903 swapped on the stack */
|
|
|
1904 regstack->reg[regstack->top - idx1] = REGNO (*src2);
|
|
|
1905 regstack->reg[regstack->top - idx2] = REGNO (*src1);
|
|
|
1906
|
|
|
1907 /* Reverse condition to compensate the operand swap.
|
|
|
1908 i386 do have comparison always reversible. */
|
|
|
1909 PUT_CODE (XEXP (pat_src, 0),
|
|
|
1910 reversed_comparison_code (XEXP (pat_src, 0), insn));
|
|
|
1911 }
|
|
|
1912 else
|
|
|
1913 emit_swap_insn (insn, regstack, *dest);
|
|
|
1914 }
|
|
|
1915
|
|
|
1916 {
|
|
|
1917 rtx src_note [3];
|
|
|
1918 int i;
|
|
|
1919
|
|
|
1920 src_note[0] = 0;
|
|
|
1921 src_note[1] = src1_note;
|
|
|
1922 src_note[2] = src2_note;
|
|
|
1923
|
|
|
1924 if (STACK_REG_P (*src1))
|
|
|
1925 replace_reg (src1, get_hard_regnum (regstack, *src1));
|
|
|
1926 if (STACK_REG_P (*src2))
|
|
|
1927 replace_reg (src2, get_hard_regnum (regstack, *src2));
|
|
|
1928
|
|
|
1929 for (i = 1; i <= 2; i++)
|
|
|
1930 if (src_note [i])
|
|
|
1931 {
|
|
|
1932 int regno = REGNO (XEXP (src_note[i], 0));
|
|
|
1933
|
|
|
1934 /* If the register that dies is not at the top of
|
|
|
1935 stack, then move the top of stack to the dead reg.
|
|
|
1936 Top of stack should never die, as it is the
|
|
|
1937 destination. */
|
|
|
1938 gcc_assert (regno != regstack->reg[regstack->top]);
|
|
|
1939 remove_regno_note (insn, REG_DEAD, regno);
|
|
|
1940 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
|
|
|
1941 EMIT_AFTER);
|
|
|
1942 }
|
|
|
1943 }
|
|
|
1944
|
|
|
1945 /* Make dest the top of stack. Add dest to regstack if
|
|
|
1946 not present. */
|
|
|
1947 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
|
|
|
1948 regstack->reg[++regstack->top] = REGNO (*dest);
|
|
|
1949 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
|
|
|
1950 replace_reg (dest, FIRST_STACK_REG);
|
|
|
1951 break;
|
|
|
1952
|
|
|
1953 default:
|
|
|
1954 gcc_unreachable ();
|
|
|
1955 }
|
|
|
1956 break;
|
|
|
1957 }
|
|
|
1958
|
|
|
1959 default:
|
|
|
1960 break;
|
|
|
1961 }
|
|
|
1962
|
|
|
1963 return control_flow_insn_deleted;
|
|
|
1964 }
|
|
|
1965
|
|
|
1966 /* Substitute hard regnums for any stack regs in INSN, which has
|
|
|
1967 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
|
|
|
1968 before the insn, and is updated with changes made here.
|
|
|
1969
|
|
|
1970 There are several requirements and assumptions about the use of
|
|
|
1971 stack-like regs in asm statements. These rules are enforced by
|
|
|
1972 record_asm_stack_regs; see comments there for details. Any
|
|
|
1973 asm_operands left in the RTL at this point may be assume to meet the
|
|
|
1974 requirements, since record_asm_stack_regs removes any problem asm. */
|
|
|
1975
|
|
|
1976 static void
|
|
|
1977 subst_asm_stack_regs (rtx insn, stack regstack)
|
|
|
1978 {
|
|
|
1979 rtx body = PATTERN (insn);
|
|
|
1980 int alt;
|
|
|
1981
|
|
|
1982 rtx *note_reg; /* Array of note contents */
|
|
|
1983 rtx **note_loc; /* Address of REG field of each note */
|
|
|
1984 enum reg_note *note_kind; /* The type of each note */
|
|
|
1985
|
|
|
1986 rtx *clobber_reg = 0;
|
|
|
1987 rtx **clobber_loc = 0;
|
|
|
1988
|
|
|
1989 struct stack_def temp_stack;
|
|
|
1990 int n_notes;
|
|
|
1991 int n_clobbers;
|
|
|
1992 rtx note;
|
|
|
1993 int i;
|
|
|
1994 int n_inputs, n_outputs;
|
|
|
1995
|
|
|
1996 if (! check_asm_stack_operands (insn))
|
|
|
1997 return;
|
|
|
1998
|
|
|
1999 /* Find out what the constraints required. If no constraint
|
|
|
2000 alternative matches, that is a compiler bug: we should have caught
|
|
|
2001 such an insn in check_asm_stack_operands. */
|
|
|
2002 extract_insn (insn);
|
|
|
2003 constrain_operands (1);
|
|
|
2004 alt = which_alternative;
|
|
|
2005
|
|
|
2006 preprocess_constraints ();
|
|
|
2007
|
|
|
2008 n_inputs = get_asm_operand_n_inputs (body);
|
|
|
2009 n_outputs = recog_data.n_operands - n_inputs;
|
|
|
2010
|
|
|
2011 gcc_assert (alt >= 0);
|
|
|
2012
|
|
|
2013 /* Strip SUBREGs here to make the following code simpler. */
|
|
|
2014 for (i = 0; i < recog_data.n_operands; i++)
|
|
|
2015 if (GET_CODE (recog_data.operand[i]) == SUBREG
|
|
|
2016 && REG_P (SUBREG_REG (recog_data.operand[i])))
|
|
|
2017 {
|
|
|
2018 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
|
|
|
2019 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
|
|
|
2020 }
|
|
|
2021
|
|
|
2022 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
|
|
|
2023
|
|
|
2024 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
|
|
|
2025 i++;
|
|
|
2026
|
|
|
2027 note_reg = XALLOCAVEC (rtx, i);
|
|
|
2028 note_loc = XALLOCAVEC (rtx *, i);
|
|
|
2029 note_kind = XALLOCAVEC (enum reg_note, i);
|
|
|
2030
|
|
|
2031 n_notes = 0;
|
|
|
2032 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
|
|
|
2033 {
|
|
|
2034 rtx reg = XEXP (note, 0);
|
|
|
2035 rtx *loc = & XEXP (note, 0);
|
|
|
2036
|
|
|
2037 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
|
|
|
2038 {
|
|
|
2039 loc = & SUBREG_REG (reg);
|
|
|
2040 reg = SUBREG_REG (reg);
|
|
|
2041 }
|
|
|
2042
|
|
|
2043 if (STACK_REG_P (reg)
|
|
|
2044 && (REG_NOTE_KIND (note) == REG_DEAD
|
|
|
2045 || REG_NOTE_KIND (note) == REG_UNUSED))
|
|
|
2046 {
|
|
|
2047 note_reg[n_notes] = reg;
|
|
|
2048 note_loc[n_notes] = loc;
|
|
|
2049 note_kind[n_notes] = REG_NOTE_KIND (note);
|
|
|
2050 n_notes++;
|
|
|
2051 }
|
|
|
2052 }
|
|
|
2053
|
|
|
2054 /* Set up CLOBBER_REG and CLOBBER_LOC. */
|
|
|
2055
|
|
|
2056 n_clobbers = 0;
|
|
|
2057
|
|
|
2058 if (GET_CODE (body) == PARALLEL)
|
|
|
2059 {
|
|
|
2060 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
|
|
|
2061 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0));
|
|
|
2062
|
|
|
2063 for (i = 0; i < XVECLEN (body, 0); i++)
|
|
|
2064 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
|
|
|
2065 {
|
|
|
2066 rtx clobber = XVECEXP (body, 0, i);
|
|
|
2067 rtx reg = XEXP (clobber, 0);
|
|
|
2068 rtx *loc = & XEXP (clobber, 0);
|
|
|
2069
|
|
|
2070 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
|
|
|
2071 {
|
|
|
2072 loc = & SUBREG_REG (reg);
|
|
|
2073 reg = SUBREG_REG (reg);
|
|
|
2074 }
|
|
|
2075
|
|
|
2076 if (STACK_REG_P (reg))
|
|
|
2077 {
|
|
|
2078 clobber_reg[n_clobbers] = reg;
|
|
|
2079 clobber_loc[n_clobbers] = loc;
|
|
|
2080 n_clobbers++;
|
|
|
2081 }
|
|
|
2082 }
|
|
|
2083 }
|
|
|
2084
|
|
|
2085 temp_stack = *regstack;
|
|
|
2086
|
|
|
2087 /* Put the input regs into the desired place in TEMP_STACK. */
|
|
|
2088
|
|
|
2089 for (i = n_outputs; i < n_outputs + n_inputs; i++)
|
|
|
2090 if (STACK_REG_P (recog_data.operand[i])
|
|
|
2091 && reg_class_subset_p (recog_op_alt[i][alt].cl,
|
|
|
2092 FLOAT_REGS)
|
|
|
2093 && recog_op_alt[i][alt].cl != FLOAT_REGS)
|
|
|
2094 {
|
|
|
2095 /* If an operand needs to be in a particular reg in
|
|
|
2096 FLOAT_REGS, the constraint was either 't' or 'u'. Since
|
|
|
2097 these constraints are for single register classes, and
|
|
|
2098 reload guaranteed that operand[i] is already in that class,
|
|
|
2099 we can just use REGNO (recog_data.operand[i]) to know which
|
|
|
2100 actual reg this operand needs to be in. */
|
|
|
2101
|
|
|
2102 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
|
|
|
2103
|
|
|
2104 gcc_assert (regno >= 0);
|
|
|
2105
|
|
|
2106 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
|
|
|
2107 {
|
|
|
2108 /* recog_data.operand[i] is not in the right place. Find
|
|
|
2109 it and swap it with whatever is already in I's place.
|
|
|
2110 K is where recog_data.operand[i] is now. J is where it
|
|
|
2111 should be. */
|
|
|
2112 int j, k, temp;
|
|
|
2113
|
|
|
2114 k = temp_stack.top - (regno - FIRST_STACK_REG);
|
|
|
2115 j = (temp_stack.top
|
|
|
2116 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
|
|
|
2117
|
|
|
2118 temp = temp_stack.reg[k];
|
|
|
2119 temp_stack.reg[k] = temp_stack.reg[j];
|
|
|
2120 temp_stack.reg[j] = temp;
|
|
|
2121 }
|
|
|
2122 }
|
|
|
2123
|
|
|
2124 /* Emit insns before INSN to make sure the reg-stack is in the right
|
|
|
2125 order. */
|
|
|
2126
|
|
|
2127 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
|
|
|
2128
|
|
|
2129 /* Make the needed input register substitutions. Do death notes and
|
|
|
2130 clobbers too, because these are for inputs, not outputs. */
|
|
|
2131
|
|
|
2132 for (i = n_outputs; i < n_outputs + n_inputs; i++)
|
|
|
2133 if (STACK_REG_P (recog_data.operand[i]))
|
|
|
2134 {
|
|
|
2135 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
|
|
|
2136
|
|
|
2137 gcc_assert (regnum >= 0);
|
|
|
2138
|
|
|
2139 replace_reg (recog_data.operand_loc[i], regnum);
|
|
|
2140 }
|
|
|
2141
|
|
|
2142 for (i = 0; i < n_notes; i++)
|
|
|
2143 if (note_kind[i] == REG_DEAD)
|
|
|
2144 {
|
|
|
2145 int regnum = get_hard_regnum (regstack, note_reg[i]);
|
|
|
2146
|
|
|
2147 gcc_assert (regnum >= 0);
|
|
|
2148
|
|
|
2149 replace_reg (note_loc[i], regnum);
|
|
|
2150 }
|
|
|
2151
|
|
|
2152 for (i = 0; i < n_clobbers; i++)
|
|
|
2153 {
|
|
|
2154 /* It's OK for a CLOBBER to reference a reg that is not live.
|
|
|
2155 Don't try to replace it in that case. */
|
|
|
2156 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
|
|
|
2157
|
|
|
2158 if (regnum >= 0)
|
|
|
2159 {
|
|
|
2160 /* Sigh - clobbers always have QImode. But replace_reg knows
|
|
|
2161 that these regs can't be MODE_INT and will assert. Just put
|
|
|
2162 the right reg there without calling replace_reg. */
|
|
|
2163
|
|
|
2164 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
|
|
|
2165 }
|
|
|
2166 }
|
|
|
2167
|
|
|
2168 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
|
|
|
2169
|
|
|
2170 for (i = n_outputs; i < n_outputs + n_inputs; i++)
|
|
|
2171 if (STACK_REG_P (recog_data.operand[i]))
|
|
|
2172 {
|
|
|
2173 /* An input reg is implicitly popped if it is tied to an
|
|
|
2174 output, or if there is a CLOBBER for it. */
|
|
|
2175 int j;
|
|
|
2176
|
|
|
2177 for (j = 0; j < n_clobbers; j++)
|
|
|
2178 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
|
|
|
2179 break;
|
|
|
2180
|
|
|
2181 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
|
|
|
2182 {
|
|
|
2183 /* recog_data.operand[i] might not be at the top of stack.
|
|
|
2184 But that's OK, because all we need to do is pop the
|
|
|
2185 right number of regs off of the top of the reg-stack.
|
|
|
2186 record_asm_stack_regs guaranteed that all implicitly
|
|
|
2187 popped regs were grouped at the top of the reg-stack. */
|
|
|
2188
|
|
|
2189 CLEAR_HARD_REG_BIT (regstack->reg_set,
|
|
|
2190 regstack->reg[regstack->top]);
|
|
|
2191 regstack->top--;
|
|
|
2192 }
|
|
|
2193 }
|
|
|
2194
|
|
|
2195 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
|
|
|
2196 Note that there isn't any need to substitute register numbers.
|
|
|
2197 ??? Explain why this is true. */
|
|
|
2198
|
|
|
2199 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
|
|
|
2200 {
|
|
|
2201 /* See if there is an output for this hard reg. */
|
|
|
2202 int j;
|
|
|
2203
|
|
|
2204 for (j = 0; j < n_outputs; j++)
|
|
|
2205 if (STACK_REG_P (recog_data.operand[j])
|
|
|
2206 && REGNO (recog_data.operand[j]) == (unsigned) i)
|
|
|
2207 {
|
|
|
2208 regstack->reg[++regstack->top] = i;
|
|
|
2209 SET_HARD_REG_BIT (regstack->reg_set, i);
|
|
|
2210 break;
|
|
|
2211 }
|
|
|
2212 }
|
|
|
2213
|
|
|
2214 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
|
|
|
2215 input that the asm didn't implicitly pop. If the asm didn't
|
|
|
2216 implicitly pop an input reg, that reg will still be live.
|
|
|
2217
|
|
|
2218 Note that we can't use find_regno_note here: the register numbers
|
|
|
2219 in the death notes have already been substituted. */
|
|
|
2220
|
|
|
2221 for (i = 0; i < n_outputs; i++)
|
|
|
2222 if (STACK_REG_P (recog_data.operand[i]))
|
|
|
2223 {
|
|
|
2224 int j;
|
|
|
2225
|
|
|
2226 for (j = 0; j < n_notes; j++)
|
|
|
2227 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
|
|
|
2228 && note_kind[j] == REG_UNUSED)
|
|
|
2229 {
|
|
|
2230 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
|
|
|
2231 EMIT_AFTER);
|
|
|
2232 break;
|
|
|
2233 }
|
|
|
2234 }
|
|
|
2235
|
|
|
2236 for (i = n_outputs; i < n_outputs + n_inputs; i++)
|
|
|
2237 if (STACK_REG_P (recog_data.operand[i]))
|
|
|
2238 {
|
|
|
2239 int j;
|
|
|
2240
|
|
|
2241 for (j = 0; j < n_notes; j++)
|
|
|
2242 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
|
|
|
2243 && note_kind[j] == REG_DEAD
|
|
|
2244 && TEST_HARD_REG_BIT (regstack->reg_set,
|
|
|
2245 REGNO (recog_data.operand[i])))
|
|
|
2246 {
|
|
|
2247 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
|
|
|
2248 EMIT_AFTER);
|
|
|
2249 break;
|
|
|
2250 }
|
|
|
2251 }
|
|
|
2252 }
|
|
|
2253
|
|
|
2254 /* Substitute stack hard reg numbers for stack virtual registers in
|
|
|
2255 INSN. Non-stack register numbers are not changed. REGSTACK is the
|
|
|
2256 current stack content. Insns may be emitted as needed to arrange the
|
|
|
2257 stack for the 387 based on the contents of the insn. Return whether
|
|
|
2258 a control flow insn was deleted in the process. */
|
|
|
2259
|
|
|
2260 static bool
|
|
|
2261 subst_stack_regs (rtx insn, stack regstack)
|
|
|
2262 {
|
|
|
2263 rtx *note_link, note;
|
|
|
2264 bool control_flow_insn_deleted = false;
|
|
|
2265 int i;
|
|
|
2266
|
|
|
2267 if (CALL_P (insn))
|
|
|
2268 {
|
|
|
2269 int top = regstack->top;
|
|
|
2270
|
|
|
2271 /* If there are any floating point parameters to be passed in
|
|
|
2272 registers for this call, make sure they are in the right
|
|
|
2273 order. */
|
|
|
2274
|
|
|
2275 if (top >= 0)
|
|
|
2276 {
|
|
|
2277 straighten_stack (insn, regstack);
|
|
|
2278
|
|
|
2279 /* Now mark the arguments as dead after the call. */
|
|
|
2280
|
|
|
2281 while (regstack->top >= 0)
|
|
|
2282 {
|
|
|
2283 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
|
|
|
2284 regstack->top--;
|
|
|
2285 }
|
|
|
2286 }
|
|
|
2287 }
|
|
|
2288
|
|
|
2289 /* Do the actual substitution if any stack regs are mentioned.
|
|
|
2290 Since we only record whether entire insn mentions stack regs, and
|
|
|
2291 subst_stack_regs_pat only works for patterns that contain stack regs,
|
|
|
2292 we must check each pattern in a parallel here. A call_value_pop could
|
|
|
2293 fail otherwise. */
|
|
|
2294
|
|
|
2295 if (stack_regs_mentioned (insn))
|
|
|
2296 {
|
|
|
2297 int n_operands = asm_noperands (PATTERN (insn));
|
|
|
2298 if (n_operands >= 0)
|
|
|
2299 {
|
|
|
2300 /* This insn is an `asm' with operands. Decode the operands,
|
|
|
2301 decide how many are inputs, and do register substitution.
|
|
|
2302 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
|
|
|
2303
|
|
|
2304 subst_asm_stack_regs (insn, regstack);
|
|
|
2305 return control_flow_insn_deleted;
|
|
|
2306 }
|
|
|
2307
|
|
|
2308 if (GET_CODE (PATTERN (insn)) == PARALLEL)
|
|
|
2309 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
|
|
|
2310 {
|
|
|
2311 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
|
|
|
2312 {
|
|
|
2313 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
|
|
|
2314 XVECEXP (PATTERN (insn), 0, i)
|
|
|
2315 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
|
|
|
2316 control_flow_insn_deleted
|
|
|
2317 |= subst_stack_regs_pat (insn, regstack,
|
|
|
2318 XVECEXP (PATTERN (insn), 0, i));
|
|
|
2319 }
|
|
|
2320 }
|
|
|
2321 else
|
|
|
2322 control_flow_insn_deleted
|
|
|
2323 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
|
|
|
2324 }
|
|
|
2325
|
|
|
2326 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
|
|
|
2327 REG_UNUSED will already have been dealt with, so just return. */
|
|
|
2328
|
|
|
2329 if (NOTE_P (insn) || INSN_DELETED_P (insn))
|
|
|
2330 return control_flow_insn_deleted;
|
|
|
2331
|
|
|
2332 /* If this a noreturn call, we can't insert pop insns after it.
|
|
|
2333 Instead, reset the stack state to empty. */
|
|
|
2334 if (CALL_P (insn)
|
|
|
2335 && find_reg_note (insn, REG_NORETURN, NULL))
|
|
|
2336 {
|
|
|
2337 regstack->top = -1;
|
|
|
2338 CLEAR_HARD_REG_SET (regstack->reg_set);
|
|
|
2339 return control_flow_insn_deleted;
|
|
|
2340 }
|
|
|
2341
|
|
|
2342 /* If there is a REG_UNUSED note on a stack register on this insn,
|
|
|
2343 the indicated reg must be popped. The REG_UNUSED note is removed,
|
|
|
2344 since the form of the newly emitted pop insn references the reg,
|
|
|
2345 making it no longer `unset'. */
|
|
|
2346
|
|
|
2347 note_link = ®_NOTES (insn);
|
|
|
2348 for (note = *note_link; note; note = XEXP (note, 1))
|
|
|
2349 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
|
|
|
2350 {
|
|
|
2351 *note_link = XEXP (note, 1);
|
|
|
2352 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
|
|
|
2353 }
|
|
|
2354 else
|
|
|
2355 note_link = &XEXP (note, 1);
|
|
|
2356
|
|
|
2357 return control_flow_insn_deleted;
|
|
|
2358 }
|
|
|
2359
|
|
|
2360 /* Change the organization of the stack so that it fits a new basic
|
|
|
2361 block. Some registers might have to be popped, but there can never be
|
|
|
2362 a register live in the new block that is not now live.
|
|
|
2363
|
|
|
2364 Insert any needed insns before or after INSN, as indicated by
|
|
|
2365 WHERE. OLD is the original stack layout, and NEW is the desired
|
|
|
2366 form. OLD is updated to reflect the code emitted, i.e., it will be
|
|
|
2367 the same as NEW upon return.
|
|
|
2368
|
|
|
2369 This function will not preserve block_end[]. But that information
|
|
|
2370 is no longer needed once this has executed. */
|
|
|
2371
|
|
|
2372 static void
|
|
|
2373 change_stack (rtx insn, stack old, stack new_stack, enum emit_where where)
|
|
|
2374 {
|
|
|
2375 int reg;
|
|
|
2376 int update_end = 0;
|
|
|
2377 int i;
|
|
|
2378
|
|
|
2379 /* Stack adjustments for the first insn in a block update the
|
|
|
2380 current_block's stack_in instead of inserting insns directly.
|
|
|
2381 compensate_edges will add the necessary code later. */
|
|
|
2382 if (current_block
|
|
|
2383 && starting_stack_p
|
|
|
2384 && where == EMIT_BEFORE)
|
|
|
2385 {
|
|
|
2386 BLOCK_INFO (current_block)->stack_in = *new_stack;
|
|
|
2387 starting_stack_p = false;
|
|
|
2388 *old = *new_stack;
|
|
|
2389 return;
|
|
|
2390 }
|
|
|
2391
|
|
|
2392 /* We will be inserting new insns "backwards". If we are to insert
|
|
|
2393 after INSN, find the next insn, and insert before it. */
|
|
|
2394
|
|
|
2395 if (where == EMIT_AFTER)
|
|
|
2396 {
|
|
|
2397 if (current_block && BB_END (current_block) == insn)
|
|
|
2398 update_end = 1;
|
|
|
2399 insn = NEXT_INSN (insn);
|
|
|
2400 }
|
|
|
2401
|
|
|
2402 /* Initialize partially dead variables. */
|
|
|
2403 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
|
|
|
2404 if (TEST_HARD_REG_BIT (new_stack->reg_set, i)
|
|
|
2405 && !TEST_HARD_REG_BIT (old->reg_set, i))
|
|
|
2406 {
|
|
|
2407 old->reg[++old->top] = i;
|
|
|
2408 SET_HARD_REG_BIT (old->reg_set, i);
|
|
|
2409 emit_insn_before (gen_rtx_SET (VOIDmode,
|
|
|
2410 FP_MODE_REG (i, SFmode), not_a_num), insn);
|
|
|
2411 }
|
|
|
2412
|
|
|
2413 /* Pop any registers that are not needed in the new block. */
|
|
|
2414
|
|
|
2415 /* If the destination block's stack already has a specified layout
|
|
|
2416 and contains two or more registers, use a more intelligent algorithm
|
|
|
2417 to pop registers that minimizes the number number of fxchs below. */
|
|
|
2418 if (new_stack->top > 0)
|
|
|
2419 {
|
|
|
2420 bool slots[REG_STACK_SIZE];
|
|
|
2421 int pops[REG_STACK_SIZE];
|
|
|
2422 int next, dest, topsrc;
|
|
|
2423
|
|
|
2424 /* First pass to determine the free slots. */
|
|
|
2425 for (reg = 0; reg <= new_stack->top; reg++)
|
|
|
2426 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]);
|
|
|
2427
|
|
|
2428 /* Second pass to allocate preferred slots. */
|
|
|
2429 topsrc = -1;
|
|
|
2430 for (reg = old->top; reg > new_stack->top; reg--)
|
|
|
2431 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
|
|
|
2432 {
|
|
|
2433 dest = -1;
|
|
|
2434 for (next = 0; next <= new_stack->top; next++)
|
|
|
2435 if (!slots[next] && new_stack->reg[next] == old->reg[reg])
|
|
|
2436 {
|
|
|
2437 /* If this is a preference for the new top of stack, record
|
|
|
2438 the fact by remembering it's old->reg in topsrc. */
|
|
|
2439 if (next == new_stack->top)
|
|
|
2440 topsrc = reg;
|
|
|
2441 slots[next] = true;
|
|
|
2442 dest = next;
|
|
|
2443 break;
|
|
|
2444 }
|
|
|
2445 pops[reg] = dest;
|
|
|
2446 }
|
|
|
2447 else
|
|
|
2448 pops[reg] = reg;
|
|
|
2449
|
|
|
2450 /* Intentionally, avoid placing the top of stack in it's correct
|
|
|
2451 location, if we still need to permute the stack below and we
|
|
|
2452 can usefully place it somewhere else. This is the case if any
|
|
|
2453 slot is still unallocated, in which case we should place the
|
|
|
2454 top of stack there. */
|
|
|
2455 if (topsrc != -1)
|
|
|
2456 for (reg = 0; reg < new_stack->top; reg++)
|
|
|
2457 if (!slots[reg])
|
|
|
2458 {
|
|
|
2459 pops[topsrc] = reg;
|
|
|
2460 slots[new_stack->top] = false;
|
|
|
2461 slots[reg] = true;
|
|
|
2462 break;
|
|
|
2463 }
|
|
|
2464
|
|
|
2465 /* Third pass allocates remaining slots and emits pop insns. */
|
|
|
2466 next = new_stack->top;
|
|
|
2467 for (reg = old->top; reg > new_stack->top; reg--)
|
|
|
2468 {
|
|
|
2469 dest = pops[reg];
|
|
|
2470 if (dest == -1)
|
|
|
2471 {
|
|
|
2472 /* Find next free slot. */
|
|
|
2473 while (slots[next])
|
|
|
2474 next--;
|
|
|
2475 dest = next--;
|
|
|
2476 }
|
|
|
2477 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
|
|
|
2478 EMIT_BEFORE);
|
|
|
2479 }
|
|
|
2480 }
|
|
|
2481 else
|
|
|
2482 {
|
|
|
2483 /* The following loop attempts to maximize the number of times we
|
|
|
2484 pop the top of the stack, as this permits the use of the faster
|
|
|
2485 ffreep instruction on platforms that support it. */
|
|
|
2486 int live, next;
|
|
|
2487
|
|
|
2488 live = 0;
|
|
|
2489 for (reg = 0; reg <= old->top; reg++)
|
|
|
2490 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
|
|
|
2491 live++;
|
|
|
2492
|
|
|
2493 next = live;
|
|
|
2494 while (old->top >= live)
|
|
|
2495 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top]))
|
|
|
2496 {
|
|
|
2497 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next]))
|
|
|
2498 next--;
|
|
|
2499 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
|
|
|
2500 EMIT_BEFORE);
|
|
|
2501 }
|
|
|
2502 else
|
|
|
2503 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
|
|
|
2504 EMIT_BEFORE);
|
|
|
2505 }
|
|
|
2506
|
|
|
2507 if (new_stack->top == -2)
|
|
|
2508 {
|
|
|
2509 /* If the new block has never been processed, then it can inherit
|
|
|
2510 the old stack order. */
|
|
|
2511
|
|
|
2512 new_stack->top = old->top;
|
|
|
2513 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg));
|
|
|
2514 }
|
|
|
2515 else
|
|
|
2516 {
|
|
|
2517 /* This block has been entered before, and we must match the
|
|
|
2518 previously selected stack order. */
|
|
|
2519
|
|
|
2520 /* By now, the only difference should be the order of the stack,
|
|
|
2521 not their depth or liveliness. */
|
|
|
2522
|
|
|
2523 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set));
|
|
|
2524 gcc_assert (old->top == new_stack->top);
|
|
|
2525
|
|
|
2526 /* If the stack is not empty (new_stack->top != -1), loop here emitting
|
|
|
2527 swaps until the stack is correct.
|
|
|
2528
|
|
|
2529 The worst case number of swaps emitted is N + 2, where N is the
|
|
|
2530 depth of the stack. In some cases, the reg at the top of
|
|
|
2531 stack may be correct, but swapped anyway in order to fix
|
|
|
2532 other regs. But since we never swap any other reg away from
|
|
|
2533 its correct slot, this algorithm will converge. */
|
|
|
2534
|
|
|
2535 if (new_stack->top != -1)
|
|
|
2536 do
|
|
|
2537 {
|
|
|
2538 /* Swap the reg at top of stack into the position it is
|
|
|
2539 supposed to be in, until the correct top of stack appears. */
|
|
|
2540
|
|
|
2541 while (old->reg[old->top] != new_stack->reg[new_stack->top])
|
|
|
2542 {
|
|
|
2543 for (reg = new_stack->top; reg >= 0; reg--)
|
|
|
2544 if (new_stack->reg[reg] == old->reg[old->top])
|
|
|
2545 break;
|
|
|
2546
|
|
|
2547 gcc_assert (reg != -1);
|
|
|
2548
|
|
|
2549 emit_swap_insn (insn, old,
|
|
|
2550 FP_MODE_REG (old->reg[reg], DFmode));
|
|
|
2551 }
|
|
|
2552
|
|
|
2553 /* See if any regs remain incorrect. If so, bring an
|
|
|
2554 incorrect reg to the top of stack, and let the while loop
|
|
|
2555 above fix it. */
|
|
|
2556
|
|
|
2557 for (reg = new_stack->top; reg >= 0; reg--)
|
|
|
2558 if (new_stack->reg[reg] != old->reg[reg])
|
|
|
2559 {
|
|
|
2560 emit_swap_insn (insn, old,
|
|
|
2561 FP_MODE_REG (old->reg[reg], DFmode));
|
|
|
2562 break;
|
|
|
2563 }
|
|
|
2564 } while (reg >= 0);
|
|
|
2565
|
|
|
2566 /* At this point there must be no differences. */
|
|
|
2567
|
|
|
2568 for (reg = old->top; reg >= 0; reg--)
|
|
|
2569 gcc_assert (old->reg[reg] == new_stack->reg[reg]);
|
|
|
2570 }
|
|
|
2571
|
|
|
2572 if (update_end)
|
|
|
2573 BB_END (current_block) = PREV_INSN (insn);
|
|
|
2574 }
|
|
|
2575
|
|
|
2576 /* Print stack configuration. */
|
|
|
2577
|
|
|
2578 static void
|
|
|
2579 print_stack (FILE *file, stack s)
|
|
|
2580 {
|
|
|
2581 if (! file)
|
|
|
2582 return;
|
|
|
2583
|
|
|
2584 if (s->top == -2)
|
|
|
2585 fprintf (file, "uninitialized\n");
|
|
|
2586 else if (s->top == -1)
|
|
|
2587 fprintf (file, "empty\n");
|
|
|
2588 else
|
|
|
2589 {
|
|
|
2590 int i;
|
|
|
2591 fputs ("[ ", file);
|
|
|
2592 for (i = 0; i <= s->top; ++i)
|
|
|
2593 fprintf (file, "%d ", s->reg[i]);
|
|
|
2594 fputs ("]\n", file);
|
|
|
2595 }
|
|
|
2596 }
|
|
|
2597
|
|
|
2598 /* This function was doing life analysis. We now let the regular live
|
|
|
2599 code do it's job, so we only need to check some extra invariants
|
|
|
2600 that reg-stack expects. Primary among these being that all registers
|
|
|
2601 are initialized before use.
|
|
|
2602
|
|
|
2603 The function returns true when code was emitted to CFG edges and
|
|
|
2604 commit_edge_insertions needs to be called. */
|
|
|
2605
|
|
|
2606 static int
|
|
|
2607 convert_regs_entry (void)
|
|
|
2608 {
|
|
|
2609 int inserted = 0;
|
|
|
2610 edge e;
|
|
|
2611 edge_iterator ei;
|
|
|
2612
|
|
|
2613 /* Load something into each stack register live at function entry.
|
|
|
2614 Such live registers can be caused by uninitialized variables or
|
|
|
2615 functions not returning values on all paths. In order to keep
|
|
|
2616 the push/pop code happy, and to not scrog the register stack, we
|
|
|
2617 must put something in these registers. Use a QNaN.
|
|
|
2618
|
|
|
2619 Note that we are inserting converted code here. This code is
|
|
|
2620 never seen by the convert_regs pass. */
|
|
|
2621
|
|
|
2622 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
|
|
|
2623 {
|
|
|
2624 basic_block block = e->dest;
|
|
|
2625 block_info bi = BLOCK_INFO (block);
|
|
|
2626 int reg, top = -1;
|
|
|
2627
|
|
|
2628 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
|
|
|
2629 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
|
|
|
2630 {
|
|
|
2631 rtx init;
|
|
|
2632
|
|
|
2633 bi->stack_in.reg[++top] = reg;
|
|
|
2634
|
|
|
2635 init = gen_rtx_SET (VOIDmode,
|
|
|
2636 FP_MODE_REG (FIRST_STACK_REG, SFmode),
|
|
|
2637 not_a_num);
|
|
|
2638 insert_insn_on_edge (init, e);
|
|
|
2639 inserted = 1;
|
|
|
2640 }
|
|
|
2641
|
|
|
2642 bi->stack_in.top = top;
|
|
|
2643 }
|
|
|
2644
|
|
|
2645 return inserted;
|
|
|
2646 }
|
|
|
2647
|
|
|
2648 /* Construct the desired stack for function exit. This will either
|
|
|
2649 be `empty', or the function return value at top-of-stack. */
|
|
|
2650
|
|
|
2651 static void
|
|
|
2652 convert_regs_exit (void)
|
|
|
2653 {
|
|
|
2654 int value_reg_low, value_reg_high;
|
|
|
2655 stack output_stack;
|
|
|
2656 rtx retvalue;
|
|
|
2657
|
|
|
2658 retvalue = stack_result (current_function_decl);
|
|
|
2659 value_reg_low = value_reg_high = -1;
|
|
|
2660 if (retvalue)
|
|
|
2661 {
|
|
|
2662 value_reg_low = REGNO (retvalue);
|
|
|
2663 value_reg_high = END_HARD_REGNO (retvalue) - 1;
|
|
|
2664 }
|
|
|
2665
|
|
|
2666 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
|
|
|
2667 if (value_reg_low == -1)
|
|
|
2668 output_stack->top = -1;
|
|
|
2669 else
|
|
|
2670 {
|
|
|
2671 int reg;
|
|
|
2672
|
|
|
2673 output_stack->top = value_reg_high - value_reg_low;
|
|
|
2674 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
|
|
|
2675 {
|
|
|
2676 output_stack->reg[value_reg_high - reg] = reg;
|
|
|
2677 SET_HARD_REG_BIT (output_stack->reg_set, reg);
|
|
|
2678 }
|
|
|
2679 }
|
|
|
2680 }
|
|
|
2681
|
|
|
2682 /* Copy the stack info from the end of edge E's source block to the
|
|
|
2683 start of E's destination block. */
|
|
|
2684
|
|
|
2685 static void
|
|
|
2686 propagate_stack (edge e)
|
|
|
2687 {
|
|
|
2688 stack src_stack = &BLOCK_INFO (e->src)->stack_out;
|
|
|
2689 stack dest_stack = &BLOCK_INFO (e->dest)->stack_in;
|
|
|
2690 int reg;
|
|
|
2691
|
|
|
2692 /* Preserve the order of the original stack, but check whether
|
|
|
2693 any pops are needed. */
|
|
|
2694 dest_stack->top = -1;
|
|
|
2695 for (reg = 0; reg <= src_stack->top; ++reg)
|
|
|
2696 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
|
|
|
2697 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
|
|
|
2698
|
|
|
2699 /* Push in any partially dead values. */
|
|
|
2700 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++)
|
|
|
2701 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg)
|
|
|
2702 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg))
|
|
|
2703 dest_stack->reg[++dest_stack->top] = reg;
|
|
|
2704 }
|
|
|
2705
|
|
|
2706
|
|
|
2707 /* Adjust the stack of edge E's source block on exit to match the stack
|
|
|
2708 of it's target block upon input. The stack layouts of both blocks
|
|
|
2709 should have been defined by now. */
|
|
|
2710
|
|
|
2711 static bool
|
|
|
2712 compensate_edge (edge e)
|
|
|
2713 {
|
|
|
2714 basic_block source = e->src, target = e->dest;
|
|
|
2715 stack target_stack = &BLOCK_INFO (target)->stack_in;
|
|
|
2716 stack source_stack = &BLOCK_INFO (source)->stack_out;
|
|
|
2717 struct stack_def regstack;
|
|
|
2718 int reg;
|
|
|
2719
|
|
|
2720 if (dump_file)
|
|
|
2721 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
|
|
|
2722
|
|
|
2723 gcc_assert (target_stack->top != -2);
|
|
|
2724
|
|
|
2725 /* Check whether stacks are identical. */
|
|
|
2726 if (target_stack->top == source_stack->top)
|
|
|
2727 {
|
|
|
2728 for (reg = target_stack->top; reg >= 0; --reg)
|
|
|
2729 if (target_stack->reg[reg] != source_stack->reg[reg])
|
|
|
2730 break;
|
|
|
2731
|
|
|
2732 if (reg == -1)
|
|
|
2733 {
|
|
|
2734 if (dump_file)
|
|
|
2735 fprintf (dump_file, "no changes needed\n");
|
|
|
2736 return false;
|
|
|
2737 }
|
|
|
2738 }
|
|
|
2739
|
|
|
2740 if (dump_file)
|
|
|
2741 {
|
|
|
2742 fprintf (dump_file, "correcting stack to ");
|
|
|
2743 print_stack (dump_file, target_stack);
|
|
|
2744 }
|
|
|
2745
|
|
|
2746 /* Abnormal calls may appear to have values live in st(0), but the
|
|
|
2747 abnormal return path will not have actually loaded the values. */
|
|
|
2748 if (e->flags & EDGE_ABNORMAL_CALL)
|
|
|
2749 {
|
|
|
2750 /* Assert that the lifetimes are as we expect -- one value
|
|
|
2751 live at st(0) on the end of the source block, and no
|
|
|
2752 values live at the beginning of the destination block.
|
|
|
2753 For complex return values, we may have st(1) live as well. */
|
|
|
2754 gcc_assert (source_stack->top == 0 || source_stack->top == 1);
|
|
|
2755 gcc_assert (target_stack->top == -1);
|
|
|
2756 return false;
|
|
|
2757 }
|
|
|
2758
|
|
|
2759 /* Handle non-call EH edges specially. The normal return path have
|
|
|
2760 values in registers. These will be popped en masse by the unwind
|
|
|
2761 library. */
|
|
|
2762 if (e->flags & EDGE_EH)
|
|
|
2763 {
|
|
|
2764 gcc_assert (target_stack->top == -1);
|
|
|
2765 return false;
|
|
|
2766 }
|
|
|
2767
|
|
|
2768 /* We don't support abnormal edges. Global takes care to
|
|
|
2769 avoid any live register across them, so we should never
|
|
|
2770 have to insert instructions on such edges. */
|
|
|
2771 gcc_assert (! (e->flags & EDGE_ABNORMAL));
|
|
|
2772
|
|
|
2773 /* Make a copy of source_stack as change_stack is destructive. */
|
|
|
2774 regstack = *source_stack;
|
|
|
2775
|
|
|
2776 /* It is better to output directly to the end of the block
|
|
|
2777 instead of to the edge, because emit_swap can do minimal
|
|
|
2778 insn scheduling. We can do this when there is only one
|
|
|
2779 edge out, and it is not abnormal. */
|
|
|
2780 if (EDGE_COUNT (source->succs) == 1)
|
|
|
2781 {
|
|
|
2782 current_block = source;
|
|
|
2783 change_stack (BB_END (source), ®stack, target_stack,
|
|
|
2784 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
|
|
|
2785 }
|
|
|
2786 else
|
|
|
2787 {
|
|
|
2788 rtx seq, after;
|
|
|
2789
|
|
|
2790 current_block = NULL;
|
|
|
2791 start_sequence ();
|
|
|
2792
|
|
|
2793 /* ??? change_stack needs some point to emit insns after. */
|
|
|
2794 after = emit_note (NOTE_INSN_DELETED);
|
|
|
2795
|
|
|
2796 change_stack (after, ®stack, target_stack, EMIT_BEFORE);
|
|
|
2797
|
|
|
2798 seq = get_insns ();
|
|
|
2799 end_sequence ();
|
|
|
2800
|
|
|
2801 insert_insn_on_edge (seq, e);
|
|
|
2802 return true;
|
|
|
2803 }
|
|
|
2804 return false;
|
|
|
2805 }
|
|
|
2806
|
|
|
2807 /* Traverse all non-entry edges in the CFG, and emit the necessary
|
|
|
2808 edge compensation code to change the stack from stack_out of the
|
|
|
2809 source block to the stack_in of the destination block. */
|
|
|
2810
|
|
|
2811 static bool
|
|
|
2812 compensate_edges (void)
|
|
|
2813 {
|
|
|
2814 bool inserted = false;
|
|
|
2815 basic_block bb;
|
|
|
2816
|
|
|
2817 starting_stack_p = false;
|
|
|
2818
|
|
|
2819 FOR_EACH_BB (bb)
|
|
|
2820 if (bb != ENTRY_BLOCK_PTR)
|
|
|
2821 {
|
|
|
2822 edge e;
|
|
|
2823 edge_iterator ei;
|
|
|
2824
|
|
|
2825 FOR_EACH_EDGE (e, ei, bb->succs)
|
|
|
2826 inserted |= compensate_edge (e);
|
|
|
2827 }
|
|
|
2828 return inserted;
|
|
|
2829 }
|
|
|
2830
|
|
|
2831 /* Select the better of two edges E1 and E2 to use to determine the
|
|
|
2832 stack layout for their shared destination basic block. This is
|
|
|
2833 typically the more frequently executed. The edge E1 may be NULL
|
|
|
2834 (in which case E2 is returned), but E2 is always non-NULL. */
|
|
|
2835
|
|
|
2836 static edge
|
|
|
2837 better_edge (edge e1, edge e2)
|
|
|
2838 {
|
|
|
2839 if (!e1)
|
|
|
2840 return e2;
|
|
|
2841
|
|
|
2842 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
|
|
|
2843 return e1;
|
|
|
2844 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
|
|
|
2845 return e2;
|
|
|
2846
|
|
|
2847 if (e1->count > e2->count)
|
|
|
2848 return e1;
|
|
|
2849 if (e1->count < e2->count)
|
|
|
2850 return e2;
|
|
|
2851
|
|
|
2852 /* Prefer critical edges to minimize inserting compensation code on
|
|
|
2853 critical edges. */
|
|
|
2854
|
|
|
2855 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
|
|
|
2856 return EDGE_CRITICAL_P (e1) ? e1 : e2;
|
|
|
2857
|
|
|
2858 /* Avoid non-deterministic behavior. */
|
|
|
2859 return (e1->src->index < e2->src->index) ? e1 : e2;
|
|
|
2860 }
|
|
|
2861
|
|
|
2862 /* Convert stack register references in one block. */
|
|
|
2863
|
|
|
2864 static void
|
|
|
2865 convert_regs_1 (basic_block block)
|
|
|
2866 {
|
|
|
2867 struct stack_def regstack;
|
|
|
2868 block_info bi = BLOCK_INFO (block);
|
|
|
2869 int reg;
|
|
|
2870 rtx insn, next;
|
|
|
2871 bool control_flow_insn_deleted = false;
|
|
|
2872
|
|
|
2873 any_malformed_asm = false;
|
|
|
2874
|
|
|
2875 /* Choose an initial stack layout, if one hasn't already been chosen. */
|
|
|
2876 if (bi->stack_in.top == -2)
|
|
|
2877 {
|
|
|
2878 edge e, beste = NULL;
|
|
|
2879 edge_iterator ei;
|
|
|
2880
|
|
|
2881 /* Select the best incoming edge (typically the most frequent) to
|
|
|
2882 use as a template for this basic block. */
|
|
|
2883 FOR_EACH_EDGE (e, ei, block->preds)
|
|
|
2884 if (BLOCK_INFO (e->src)->done)
|
|
|
2885 beste = better_edge (beste, e);
|
|
|
2886
|
|
|
2887 if (beste)
|
|
|
2888 propagate_stack (beste);
|
|
|
2889 else
|
|
|
2890 {
|
|
|
2891 /* No predecessors. Create an arbitrary input stack. */
|
|
|
2892 bi->stack_in.top = -1;
|
|
|
2893 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
|
|
|
2894 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
|
|
|
2895 bi->stack_in.reg[++bi->stack_in.top] = reg;
|
|
|
2896 }
|
|
|
2897 }
|
|
|
2898
|
|
|
2899 if (dump_file)
|
|
|
2900 {
|
|
|
2901 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
|
|
|
2902 print_stack (dump_file, &bi->stack_in);
|
|
|
2903 }
|
|
|
2904
|
|
|
2905 /* Process all insns in this block. Keep track of NEXT so that we
|
|
|
2906 don't process insns emitted while substituting in INSN. */
|
|
|
2907 current_block = block;
|
|
|
2908 next = BB_HEAD (block);
|
|
|
2909 regstack = bi->stack_in;
|
|
|
2910 starting_stack_p = true;
|
|
|
2911
|
|
|
2912 do
|
|
|
2913 {
|
|
|
2914 insn = next;
|
|
|
2915 next = NEXT_INSN (insn);
|
|
|
2916
|
|
|
2917 /* Ensure we have not missed a block boundary. */
|
|
|
2918 gcc_assert (next);
|
|
|
2919 if (insn == BB_END (block))
|
|
|
2920 next = NULL;
|
|
|
2921
|
|
|
2922 /* Don't bother processing unless there is a stack reg
|
|
|
2923 mentioned or if it's a CALL_INSN. */
|
|
|
2924 if (stack_regs_mentioned (insn)
|
|
|
2925 || CALL_P (insn))
|
|
|
2926 {
|
|
|
2927 if (dump_file)
|
|
|
2928 {
|
|
|
2929 fprintf (dump_file, " insn %d input stack: ",
|
|
|
2930 INSN_UID (insn));
|
|
|
2931 print_stack (dump_file, ®stack);
|
|
|
2932 }
|
|
|
2933 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
|
|
|
2934 starting_stack_p = false;
|
|
|
2935 }
|
|
|
2936 }
|
|
|
2937 while (next);
|
|
|
2938
|
|
|
2939 if (dump_file)
|
|
|
2940 {
|
|
|
2941 fprintf (dump_file, "Expected live registers [");
|
|
|
2942 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
|
|
|
2943 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
|
|
|
2944 fprintf (dump_file, " %d", reg);
|
|
|
2945 fprintf (dump_file, " ]\nOutput stack: ");
|
|
|
2946 print_stack (dump_file, ®stack);
|
|
|
2947 }
|
|
|
2948
|
|
|
2949 insn = BB_END (block);
|
|
|
2950 if (JUMP_P (insn))
|
|
|
2951 insn = PREV_INSN (insn);
|
|
|
2952
|
|
|
2953 /* If the function is declared to return a value, but it returns one
|
|
|
2954 in only some cases, some registers might come live here. Emit
|
|
|
2955 necessary moves for them. */
|
|
|
2956
|
|
|
2957 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
|
|
|
2958 {
|
|
|
2959 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
|
|
|
2960 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
|
|
|
2961 {
|
|
|
2962 rtx set;
|
|
|
2963
|
|
|
2964 if (dump_file)
|
|
|
2965 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
|
|
|
2966
|
|
|
2967 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num);
|
|
|
2968 insn = emit_insn_after (set, insn);
|
|
|
2969 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
|
|
|
2970 }
|
|
|
2971 }
|
|
|
2972
|
|
|
2973 /* Amongst the insns possibly deleted during the substitution process above,
|
|
|
2974 might have been the only trapping insn in the block. We purge the now
|
|
|
2975 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
|
|
|
2976 called at the end of convert_regs. The order in which we process the
|
|
|
2977 blocks ensures that we never delete an already processed edge.
|
|
|
2978
|
|
|
2979 Note that, at this point, the CFG may have been damaged by the emission
|
|
|
2980 of instructions after an abnormal call, which moves the basic block end
|
|
|
2981 (and is the reason why we call fixup_abnormal_edges later). So we must
|
|
|
2982 be sure that the trapping insn has been deleted before trying to purge
|
|
|
2983 dead edges, otherwise we risk purging valid edges.
|
|
|
2984
|
|
|
2985 ??? We are normally supposed not to delete trapping insns, so we pretend
|
|
|
2986 that the insns deleted above don't actually trap. It would have been
|
|
|
2987 better to detect this earlier and avoid creating the EH edge in the first
|
|
|
2988 place, still, but we don't have enough information at that time. */
|
|
|
2989
|
|
|
2990 if (control_flow_insn_deleted)
|
|
|
2991 purge_dead_edges (block);
|
|
|
2992
|
|
|
2993 /* Something failed if the stack lives don't match. If we had malformed
|
|
|
2994 asms, we zapped the instruction itself, but that didn't produce the
|
|
|
2995 same pattern of register kills as before. */
|
|
|
2996
|
|
|
2997 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set)
|
|
|
2998 || any_malformed_asm);
|
|
|
2999 bi->stack_out = regstack;
|
|
|
3000 bi->done = true;
|
|
|
3001 }
|
|
|
3002
|
|
|
3003 /* Convert registers in all blocks reachable from BLOCK. */
|
|
|
3004
|
|
|
3005 static void
|
|
|
3006 convert_regs_2 (basic_block block)
|
|
|
3007 {
|
|
|
3008 basic_block *stack, *sp;
|
|
|
3009
|
|
|
3010 /* We process the blocks in a top-down manner, in a way such that one block
|
|
|
3011 is only processed after all its predecessors. The number of predecessors
|
|
|
3012 of every block has already been computed. */
|
|
|
3013
|
|
|
3014 stack = XNEWVEC (basic_block, n_basic_blocks);
|
|
|
3015 sp = stack;
|
|
|
3016
|
|
|
3017 *sp++ = block;
|
|
|
3018
|
|
|
3019 do
|
|
|
3020 {
|
|
|
3021 edge e;
|
|
|
3022 edge_iterator ei;
|
|
|
3023
|
|
|
3024 block = *--sp;
|
|
|
3025
|
|
|
3026 /* Processing BLOCK is achieved by convert_regs_1, which may purge
|
|
|
3027 some dead EH outgoing edge after the deletion of the trapping
|
|
|
3028 insn inside the block. Since the number of predecessors of
|
|
|
3029 BLOCK's successors was computed based on the initial edge set,
|
|
|
3030 we check the necessity to process some of these successors
|
|
|
3031 before such an edge deletion may happen. However, there is
|
|
|
3032 a pitfall: if BLOCK is the only predecessor of a successor and
|
|
|
3033 the edge between them happens to be deleted, the successor
|
|
|
3034 becomes unreachable and should not be processed. The problem
|
|
|
3035 is that there is no way to preventively detect this case so we
|
|
|
3036 stack the successor in all cases and hand over the task of
|
|
|
3037 fixing up the discrepancy to convert_regs_1. */
|
|
|
3038
|
|
|
3039 FOR_EACH_EDGE (e, ei, block->succs)
|
|
|
3040 if (! (e->flags & EDGE_DFS_BACK))
|
|
|
3041 {
|
|
|
3042 BLOCK_INFO (e->dest)->predecessors--;
|
|
|
3043 if (!BLOCK_INFO (e->dest)->predecessors)
|
|
|
3044 *sp++ = e->dest;
|
|
|
3045 }
|
|
|
3046
|
|
|
3047 convert_regs_1 (block);
|
|
|
3048 }
|
|
|
3049 while (sp != stack);
|
|
|
3050
|
|
|
3051 free (stack);
|
|
|
3052 }
|
|
|
3053
|
|
|
3054 /* Traverse all basic blocks in a function, converting the register
|
|
|
3055 references in each insn from the "flat" register file that gcc uses,
|
|
|
3056 to the stack-like registers the 387 uses. */
|
|
|
3057
|
|
|
3058 static void
|
|
|
3059 convert_regs (void)
|
|
|
3060 {
|
|
|
3061 int inserted;
|
|
|
3062 basic_block b;
|
|
|
3063 edge e;
|
|
|
3064 edge_iterator ei;
|
|
|
3065
|
|
|
3066 /* Initialize uninitialized registers on function entry. */
|
|
|
3067 inserted = convert_regs_entry ();
|
|
|
3068
|
|
|
3069 /* Construct the desired stack for function exit. */
|
|
|
3070 convert_regs_exit ();
|
|
|
3071 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
|
|
|
3072
|
|
|
3073 /* ??? Future: process inner loops first, and give them arbitrary
|
|
|
3074 initial stacks which emit_swap_insn can modify. This ought to
|
|
|
3075 prevent double fxch that often appears at the head of a loop. */
|
|
|
3076
|
|
|
3077 /* Process all blocks reachable from all entry points. */
|
|
|
3078 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
|
|
|
3079 convert_regs_2 (e->dest);
|
|
|
3080
|
|
|
3081 /* ??? Process all unreachable blocks. Though there's no excuse
|
|
|
3082 for keeping these even when not optimizing. */
|
|
|
3083 FOR_EACH_BB (b)
|
|
|
3084 {
|
|
|
3085 block_info bi = BLOCK_INFO (b);
|
|
|
3086
|
|
|
3087 if (! bi->done)
|
|
|
3088 convert_regs_2 (b);
|
|
|
3089 }
|
|
|
3090
|
|
|
3091 inserted |= compensate_edges ();
|
|
|
3092
|
|
|
3093 clear_aux_for_blocks ();
|
|
|
3094
|
|
|
3095 fixup_abnormal_edges ();
|
|
|
3096 if (inserted)
|
|
|
3097 commit_edge_insertions ();
|
|
|
3098
|
|
|
3099 if (dump_file)
|
|
|
3100 fputc ('\n', dump_file);
|
|
|
3101 }
|
|
|
3102
|
|
|
3103 /* Convert register usage from "flat" register file usage to a "stack
|
|
|
3104 register file. FILE is the dump file, if used.
|
|
|
3105
|
|
|
3106 Construct a CFG and run life analysis. Then convert each insn one
|
|
|
3107 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
|
|
|
3108 code duplication created when the converter inserts pop insns on
|
|
|
3109 the edges. */
|
|
|
3110
|
|
|
3111 static bool
|
|
|
3112 reg_to_stack (void)
|
|
|
3113 {
|
|
|
3114 basic_block bb;
|
|
|
3115 int i;
|
|
|
3116 int max_uid;
|
|
|
3117
|
|
|
3118 /* Clean up previous run. */
|
|
|
3119 if (stack_regs_mentioned_data != NULL)
|
|
|
3120 VEC_free (char, heap, stack_regs_mentioned_data);
|
|
|
3121
|
|
|
3122 /* See if there is something to do. Flow analysis is quite
|
|
|
3123 expensive so we might save some compilation time. */
|
|
|
3124 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
|
|
|
3125 if (df_regs_ever_live_p (i))
|
|
|
3126 break;
|
|
|
3127 if (i > LAST_STACK_REG)
|
|
|
3128 return false;
|
|
|
3129
|
|
|
3130 df_note_add_problem ();
|
|
|
3131 df_analyze ();
|
|
|
3132
|
|
|
3133 mark_dfs_back_edges ();
|
|
|
3134
|
|
|
3135 /* Set up block info for each basic block. */
|
|
|
3136 alloc_aux_for_blocks (sizeof (struct block_info_def));
|
|
|
3137 FOR_EACH_BB (bb)
|
|
|
3138 {
|
|
|
3139 block_info bi = BLOCK_INFO (bb);
|
|
|
3140 edge_iterator ei;
|
|
|
3141 edge e;
|
|
|
3142 int reg;
|
|
|
3143
|
|
|
3144 FOR_EACH_EDGE (e, ei, bb->preds)
|
|
|
3145 if (!(e->flags & EDGE_DFS_BACK)
|
|
|
3146 && e->src != ENTRY_BLOCK_PTR)
|
|
|
3147 bi->predecessors++;
|
|
|
3148
|
|
|
3149 /* Set current register status at last instruction `uninitialized'. */
|
|
|
3150 bi->stack_in.top = -2;
|
|
|
3151
|
|
|
3152 /* Copy live_at_end and live_at_start into temporaries. */
|
|
|
3153 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
|
|
|
3154 {
|
|
|
3155 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg))
|
|
|
3156 SET_HARD_REG_BIT (bi->out_reg_set, reg);
|
|
|
3157 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg))
|
|
|
3158 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
|
|
|
3159 }
|
|
|
3160 }
|
|
|
3161
|
|
|
3162 /* Create the replacement registers up front. */
|
|
|
3163 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
|
|
|
3164 {
|
|
|
3165 enum machine_mode mode;
|
|
|
3166 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
|
|
|
3167 mode != VOIDmode;
|
|
|
3168 mode = GET_MODE_WIDER_MODE (mode))
|
|
|
3169 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
|
|
|
3170 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
|
|
|
3171 mode != VOIDmode;
|
|
|
3172 mode = GET_MODE_WIDER_MODE (mode))
|
|
|
3173 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
|
|
|
3174 }
|
|
|
3175
|
|
|
3176 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
|
|
|
3177
|
|
|
3178 /* A QNaN for initializing uninitialized variables.
|
|
|
3179
|
|
|
3180 ??? We can't load from constant memory in PIC mode, because
|
|
|
3181 we're inserting these instructions before the prologue and
|
|
|
3182 the PIC register hasn't been set up. In that case, fall back
|
|
|
3183 on zero, which we can get from `fldz'. */
|
|
|
3184
|
|
|
3185 if ((flag_pic && !TARGET_64BIT)
|
|
|
3186 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
|
|
|
3187 not_a_num = CONST0_RTX (SFmode);
|
|
|
3188 else
|
|
|
3189 {
|
|
|
3190 REAL_VALUE_TYPE r;
|
|
|
3191
|
|
|
3192 real_nan (&r, "", 1, SFmode);
|
|
|
3193 not_a_num = CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode);
|
|
|
3194 not_a_num = force_const_mem (SFmode, not_a_num);
|
|
|
3195 }
|
|
|
3196
|
|
|
3197 /* Allocate a cache for stack_regs_mentioned. */
|
|
|
3198 max_uid = get_max_uid ();
|
|
|
3199 stack_regs_mentioned_data = VEC_alloc (char, heap, max_uid + 1);
|
|
|
3200 memset (VEC_address (char, stack_regs_mentioned_data),
|
|
|
3201 0, sizeof (char) * (max_uid + 1));
|
|
|
3202
|
|
|
3203 convert_regs ();
|
|
|
3204
|
|
|
3205 free_aux_for_blocks ();
|
|
|
3206 return true;
|
|
|
3207 }
|
|
|
3208 #endif /* STACK_REGS */
|
|
|
3209
|
|
|
3210 static bool
|
|
|
3211 gate_handle_stack_regs (void)
|
|
|
3212 {
|
|
|
3213 #ifdef STACK_REGS
|
|
|
3214 return 1;
|
|
|
3215 #else
|
|
|
3216 return 0;
|
|
|
3217 #endif
|
|
|
3218 }
|
|
|
3219
|
|
|
3220 struct rtl_opt_pass pass_stack_regs =
|
|
|
3221 {
|
|
|
3222 {
|
|
|
3223 RTL_PASS,
|
|
|
3224 NULL, /* name */
|
|
|
3225 gate_handle_stack_regs, /* gate */
|
|
|
3226 NULL, /* execute */
|
|
|
3227 NULL, /* sub */
|
|
|
3228 NULL, /* next */
|
|
|
3229 0, /* static_pass_number */
|
|
|
3230 TV_REG_STACK, /* tv_id */
|
|
|
3231 0, /* properties_required */
|
|
|
3232 0, /* properties_provided */
|
|
|
3233 0, /* properties_destroyed */
|
|
|
3234 0, /* todo_flags_start */
|
|
|
3235 0 /* todo_flags_finish */
|
|
|
3236 }
|
|
|
3237 };
|
|
|
3238
|
|
|
3239 /* Convert register usage from flat register file usage to a stack
|
|
|
3240 register file. */
|
|
|
3241 static unsigned int
|
|
|
3242 rest_of_handle_stack_regs (void)
|
|
|
3243 {
|
|
|
3244 #ifdef STACK_REGS
|
|
|
3245 reg_to_stack ();
|
|
|
3246 regstack_completed = 1;
|
|
|
3247 #endif
|
|
|
3248 return 0;
|
|
|
3249 }
|
|
|
3250
|
|
|
3251 struct rtl_opt_pass pass_stack_regs_run =
|
|
|
3252 {
|
|
|
3253 {
|
|
|
3254 RTL_PASS,
|
|
|
3255 "stack", /* name */
|
|
|
3256 NULL, /* gate */
|
|
|
3257 rest_of_handle_stack_regs, /* execute */
|
|
|
3258 NULL, /* sub */
|
|
|
3259 NULL, /* next */
|
|
|
3260 0, /* static_pass_number */
|
|
|
3261 TV_REG_STACK, /* tv_id */
|
|
|
3262 0, /* properties_required */
|
|
|
3263 0, /* properties_provided */
|
|
|
3264 0, /* properties_destroyed */
|
|
|
3265 0, /* todo_flags_start */
|
|
|
3266 TODO_df_finish | TODO_verify_rtl_sharing |
|
|
|
3267 TODO_dump_func |
|
|
|
3268 TODO_ggc_collect /* todo_flags_finish */
|
|
|
3269 }
|
|
|
3270 };
|
