Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/m68k/m68k.h @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
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date | Tue, 22 Mar 2011 17:18:12 +0900 |
parents | 77e2b8dfacca |
children | 04ced10e8804 |
rev | line source |
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0 | 1 /* Definitions of target machine for GCC for Motorola 680x0/ColdFire. |
2 Copyright (C) 1987, 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999, | |
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
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4 Free Software Foundation, Inc. |
0 | 5 |
6 This file is part of GCC. | |
7 | |
8 GCC is free software; you can redistribute it and/or modify | |
9 it under the terms of the GNU General Public License as published by | |
10 the Free Software Foundation; either version 3, or (at your option) | |
11 any later version. | |
12 | |
13 GCC is distributed in the hope that it will be useful, | |
14 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 GNU General Public License for more details. | |
17 | |
18 You should have received a copy of the GNU General Public License | |
19 along with GCC; see the file COPYING3. If not see | |
20 <http://www.gnu.org/licenses/>. */ | |
21 | |
22 /* We need to have MOTOROLA always defined (either 0 or 1) because we use | |
23 if-statements and ?: on it. This way we have compile-time error checking | |
24 for both the MOTOROLA and MIT code paths. We do rely on the host compiler | |
25 to optimize away all constant tests. */ | |
26 #if MOTOROLA /* Use the Motorola assembly syntax. */ | |
27 # define TARGET_VERSION fprintf (stderr, " (68k, Motorola syntax)") | |
28 #else | |
29 # define MOTOROLA 0 /* Use the MIT assembly syntax. */ | |
30 # define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)") | |
31 #endif | |
32 | |
33 /* Handle --with-cpu default option from configure script. */ | |
34 #define OPTION_DEFAULT_SPECS \ | |
35 { "cpu", "%{!mc68000:%{!m68000:%{!m68302:%{!m68010:%{!mc68020:%{!m68020:\ | |
36 %{!m68030:%{!m68040:%{!m68020-40:%{!m68020-60:%{!m68060:%{!mcpu32:\ | |
37 %{!m68332:%{!m5200:%{!m5206e:%{!m528x:%{!m5307:%{!m5407:%{!mcfv4e:\ | |
38 %{!mcpu=*:%{!march=*:-%(VALUE)}}}}}}}}}}}}}}}}}}}}}" }, | |
39 | |
40 /* Pass flags to gas indicating which type of processor we have. This | |
41 can be simplified when we can rely on the assembler supporting .cpu | |
42 and .arch directives. */ | |
43 | |
44 #define ASM_CPU_SPEC "\ | |
45 %{m68851}%{mno-68851} %{m68881}%{mno-68881} %{msoft-float:-mno-float} \ | |
46 %{m68000}%{m68302}%{mc68000}%{m68010}%{m68020}%{mc68020}%{m68030}\ | |
47 %{m68040}%{m68020-40:-m68040}%{m68020-60:-m68040}\ | |
48 %{m68060}%{mcpu32}%{m68332}%{m5200}%{m5206e}%{m528x}%{m5307}%{m5407}%{mcfv4e}\ | |
49 %{mcpu=*:-mcpu=%*}%{march=*:-march=%*}\ | |
50 " | |
51 #define ASM_PCREL_SPEC "%{fPIC|fpic|mpcrel:--pcrel} \ | |
52 %{msep-data|mid-shared-library:--pcrel} \ | |
53 " | |
54 | |
55 #define ASM_SPEC "%(asm_cpu_spec) %(asm_pcrel_spec)" | |
56 | |
57 #define EXTRA_SPECS \ | |
58 { "asm_cpu_spec", ASM_CPU_SPEC }, \ | |
59 { "asm_pcrel_spec", ASM_PCREL_SPEC }, \ | |
60 SUBTARGET_EXTRA_SPECS | |
61 | |
62 #define SUBTARGET_EXTRA_SPECS | |
63 | |
64 /* Note that some other tm.h files include this one and then override | |
65 many of the definitions that relate to assembler syntax. */ | |
66 | |
67 #define TARGET_CPU_CPP_BUILTINS() \ | |
68 do \ | |
69 { \ | |
70 builtin_define ("__m68k__"); \ | |
71 builtin_define_std ("mc68000"); \ | |
72 /* The other mc680x0 macros have traditionally been derived \ | |
73 from the tuning setting. For example, -m68020-60 defines \ | |
74 m68060, even though it generates pure 68020 code. */ \ | |
75 switch (m68k_tune) \ | |
76 { \ | |
77 case u68010: \ | |
78 builtin_define_std ("mc68010"); \ | |
79 break; \ | |
80 \ | |
81 case u68020: \ | |
82 builtin_define_std ("mc68020"); \ | |
83 break; \ | |
84 \ | |
85 case u68030: \ | |
86 builtin_define_std ("mc68030"); \ | |
87 break; \ | |
88 \ | |
89 case u68040: \ | |
90 builtin_define_std ("mc68040"); \ | |
91 break; \ | |
92 \ | |
93 case u68060: \ | |
94 builtin_define_std ("mc68060"); \ | |
95 break; \ | |
96 \ | |
97 case u68020_60: \ | |
98 builtin_define_std ("mc68060"); \ | |
99 /* Fall through. */ \ | |
100 case u68020_40: \ | |
101 builtin_define_std ("mc68040"); \ | |
102 builtin_define_std ("mc68030"); \ | |
103 builtin_define_std ("mc68020"); \ | |
104 break; \ | |
105 \ | |
106 case ucpu32: \ | |
107 builtin_define_std ("mc68332"); \ | |
108 builtin_define_std ("mcpu32"); \ | |
109 builtin_define_std ("mc68020"); \ | |
110 break; \ | |
111 \ | |
112 case ucfv1: \ | |
113 builtin_define ("__mcfv1__"); \ | |
114 break; \ | |
115 \ | |
116 case ucfv2: \ | |
117 builtin_define ("__mcfv2__"); \ | |
118 break; \ | |
119 \ | |
120 case ucfv3: \ | |
121 builtin_define ("__mcfv3__"); \ | |
122 break; \ | |
123 \ | |
124 case ucfv4: \ | |
125 builtin_define ("__mcfv4__"); \ | |
126 break; \ | |
127 \ | |
128 case ucfv4e: \ | |
129 builtin_define ("__mcfv4e__"); \ | |
130 break; \ | |
131 \ | |
132 case ucfv5: \ | |
133 builtin_define ("__mcfv5__"); \ | |
134 break; \ | |
135 \ | |
136 default: \ | |
137 break; \ | |
138 } \ | |
139 \ | |
140 if (TARGET_68881) \ | |
141 builtin_define ("__HAVE_68881__"); \ | |
142 \ | |
143 if (TARGET_COLDFIRE) \ | |
144 { \ | |
145 const char *tmp; \ | |
146 \ | |
147 tmp = m68k_cpp_cpu_ident ("cf"); \ | |
148 if (tmp) \ | |
149 builtin_define (tmp); \ | |
150 tmp = m68k_cpp_cpu_family ("cf"); \ | |
151 if (tmp) \ | |
152 builtin_define (tmp); \ | |
153 builtin_define ("__mcoldfire__"); \ | |
154 \ | |
155 if (TARGET_ISAC) \ | |
156 builtin_define ("__mcfisac__"); \ | |
157 else if (TARGET_ISAB) \ | |
158 { \ | |
159 builtin_define ("__mcfisab__"); \ | |
160 /* ISA_B: Legacy 5407 defines. */ \ | |
161 builtin_define ("__mcf5400__"); \ | |
162 builtin_define ("__mcf5407__"); \ | |
163 } \ | |
164 else if (TARGET_ISAAPLUS) \ | |
165 { \ | |
166 builtin_define ("__mcfisaaplus__"); \ | |
167 /* ISA_A+: legacy defines. */ \ | |
168 builtin_define ("__mcf528x__"); \ | |
169 builtin_define ("__mcf5200__"); \ | |
170 } \ | |
171 else \ | |
172 { \ | |
173 builtin_define ("__mcfisaa__"); \ | |
174 /* ISA_A: legacy defines. */ \ | |
175 switch (m68k_tune) \ | |
176 { \ | |
177 case ucfv2: \ | |
178 builtin_define ("__mcf5200__"); \ | |
179 break; \ | |
180 \ | |
181 case ucfv3: \ | |
182 builtin_define ("__mcf5307__"); \ | |
183 builtin_define ("__mcf5300__"); \ | |
184 break; \ | |
185 \ | |
186 default: \ | |
187 break; \ | |
188 } \ | |
189 } \ | |
190 } \ | |
191 \ | |
192 if (TARGET_COLDFIRE_FPU) \ | |
193 builtin_define ("__mcffpu__"); \ | |
194 \ | |
195 if (TARGET_CF_HWDIV) \ | |
196 builtin_define ("__mcfhwdiv__"); \ | |
197 \ | |
198 if (TARGET_FIDOA) \ | |
199 builtin_define ("__mfido__"); \ | |
200 \ | |
201 builtin_assert ("cpu=m68k"); \ | |
202 builtin_assert ("machine=m68k"); \ | |
203 } \ | |
204 while (0) | |
205 | |
206 /* Classify the groups of pseudo-ops used to assemble QI, HI and SI | |
207 quantities. */ | |
208 #define INT_OP_STANDARD 0 /* .byte, .short, .long */ | |
209 #define INT_OP_DOT_WORD 1 /* .byte, .word, .long */ | |
210 #define INT_OP_NO_DOT 2 /* byte, short, long */ | |
211 #define INT_OP_DC 3 /* dc.b, dc.w, dc.l */ | |
212 | |
213 /* Set the default. */ | |
214 #define INT_OP_GROUP INT_OP_DOT_WORD | |
215 | |
216 /* Bit values used by m68k-devices.def to identify processor capabilities. */ | |
217 #define FL_BITFIELD (1 << 0) /* Support bitfield instructions. */ | |
218 #define FL_68881 (1 << 1) /* (Default) support for 68881/2. */ | |
219 #define FL_COLDFIRE (1 << 2) /* ColdFire processor. */ | |
220 #define FL_CF_HWDIV (1 << 3) /* ColdFire hardware divide supported. */ | |
221 #define FL_CF_MAC (1 << 4) /* ColdFire MAC unit supported. */ | |
222 #define FL_CF_EMAC (1 << 5) /* ColdFire eMAC unit supported. */ | |
223 #define FL_CF_EMAC_B (1 << 6) /* ColdFire eMAC-B unit supported. */ | |
224 #define FL_CF_USP (1 << 7) /* ColdFire User Stack Pointer supported. */ | |
225 #define FL_CF_FPU (1 << 8) /* ColdFire FPU supported. */ | |
226 #define FL_ISA_68000 (1 << 9) | |
227 #define FL_ISA_68010 (1 << 10) | |
228 #define FL_ISA_68020 (1 << 11) | |
229 #define FL_ISA_68040 (1 << 12) | |
230 #define FL_ISA_A (1 << 13) | |
231 #define FL_ISA_APLUS (1 << 14) | |
232 #define FL_ISA_B (1 << 15) | |
233 #define FL_ISA_C (1 << 16) | |
234 #define FL_FIDOA (1 << 17) | |
235 #define FL_MMU 0 /* Used by multilib machinery. */ | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
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236 #define FL_UCLINUX 0 /* Used by multilib machinery. */ |
0 | 237 |
238 #define TARGET_68010 ((m68k_cpu_flags & FL_ISA_68010) != 0) | |
239 #define TARGET_68020 ((m68k_cpu_flags & FL_ISA_68020) != 0) | |
240 #define TARGET_68040 ((m68k_cpu_flags & FL_ISA_68040) != 0) | |
241 #define TARGET_COLDFIRE ((m68k_cpu_flags & FL_COLDFIRE) != 0) | |
242 #define TARGET_COLDFIRE_FPU (m68k_fpu == FPUTYPE_COLDFIRE) | |
243 #define TARGET_68881 (m68k_fpu == FPUTYPE_68881) | |
244 #define TARGET_FIDOA ((m68k_cpu_flags & FL_FIDOA) != 0) | |
245 | |
246 /* Size (in bytes) of FPU registers. */ | |
247 #define TARGET_FP_REG_SIZE (TARGET_COLDFIRE ? 8 : 12) | |
248 | |
249 #define TARGET_ISAAPLUS ((m68k_cpu_flags & FL_ISA_APLUS) != 0) | |
250 #define TARGET_ISAB ((m68k_cpu_flags & FL_ISA_B) != 0) | |
251 #define TARGET_ISAC ((m68k_cpu_flags & FL_ISA_C) != 0) | |
252 | |
253 /* Some instructions are common to more than one ISA. */ | |
254 #define ISA_HAS_MVS_MVZ (TARGET_ISAB || TARGET_ISAC) | |
255 #define ISA_HAS_FF1 (TARGET_ISAAPLUS || TARGET_ISAC) | |
256 | |
257 #define TUNE_68000 (m68k_tune == u68000) | |
258 #define TUNE_68010 (m68k_tune == u68010) | |
259 #define TUNE_68000_10 (TUNE_68000 || TUNE_68010) | |
260 #define TUNE_68030 (m68k_tune == u68030 \ | |
261 || m68k_tune == u68020_40 \ | |
262 || m68k_tune == u68020_60) | |
263 #define TUNE_68040 (m68k_tune == u68040 \ | |
264 || m68k_tune == u68020_40 \ | |
265 || m68k_tune == u68020_60) | |
266 #define TUNE_68060 (m68k_tune == u68060 || m68k_tune == u68020_60) | |
267 #define TUNE_68040_60 (TUNE_68040 || TUNE_68060) | |
268 #define TUNE_CPU32 (m68k_tune == ucpu32) | |
269 #define TUNE_CFV1 (m68k_tune == ucfv1) | |
270 #define TUNE_CFV2 (m68k_tune == ucfv2) | |
271 #define TUNE_CFV3 (m68k_tune == ucfv3) | |
272 #define TUNE_CFV4 (m68k_tune == ucfv4 || m68k_tune == ucfv4e) | |
273 | |
274 #define TUNE_MAC ((m68k_tune_flags & FL_CF_MAC) != 0) | |
275 #define TUNE_EMAC ((m68k_tune_flags & FL_CF_EMAC) != 0) | |
276 | |
277 /* These are meant to be redefined in the host dependent files */ | |
278 #define SUBTARGET_OVERRIDE_OPTIONS | |
279 | |
280 /* target machine storage layout */ | |
281 | |
282 /* "long double" is the same as "double" on ColdFire and fido | |
283 targets. */ | |
284 | |
285 #define LONG_DOUBLE_TYPE_SIZE \ | |
286 ((TARGET_COLDFIRE || TARGET_FIDOA) ? 64 : 80) | |
287 | |
288 /* We need to know the size of long double at compile-time in libgcc2. */ | |
289 | |
290 #if defined(__mcoldfire__) || defined(__mfido__) | |
291 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64 | |
292 #else | |
293 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 80 | |
294 #endif | |
295 | |
296 /* Set the value of FLT_EVAL_METHOD in float.h. When using 68040 fp | |
297 instructions, we get proper intermediate rounding, otherwise we | |
298 get extended precision results. */ | |
299 #define TARGET_FLT_EVAL_METHOD ((TARGET_68040 || ! TARGET_68881) ? 0 : 2) | |
300 | |
301 #define BITS_BIG_ENDIAN 1 | |
302 #define BYTES_BIG_ENDIAN 1 | |
303 #define WORDS_BIG_ENDIAN 1 | |
304 | |
305 #define UNITS_PER_WORD 4 | |
306 | |
307 #define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32) | |
308 #define STACK_BOUNDARY 16 | |
309 #define FUNCTION_BOUNDARY 16 | |
310 #define EMPTY_FIELD_BOUNDARY 16 | |
311 /* ColdFire and fido strongly prefer a 32-bit aligned stack. */ | |
312 #define PREFERRED_STACK_BOUNDARY \ | |
313 ((TARGET_COLDFIRE || TARGET_FIDOA) ? 32 : 16) | |
314 | |
315 /* No data type wants to be aligned rounder than this. | |
316 Most published ABIs say that ints should be aligned on 16-bit | |
317 boundaries, but CPUs with 32-bit busses get better performance | |
318 aligned on 32-bit boundaries. */ | |
319 #define BIGGEST_ALIGNMENT (TARGET_ALIGN_INT ? 32 : 16) | |
320 | |
321 #define STRICT_ALIGNMENT (TARGET_STRICT_ALIGNMENT) | |
322 #define M68K_HONOR_TARGET_STRICT_ALIGNMENT 1 | |
323 | |
324 #define DWARF_CIE_DATA_ALIGNMENT -2 | |
325 | |
326 #define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32) | |
327 | |
328 /* Define these to avoid dependence on meaning of `int'. */ | |
329 #define WCHAR_TYPE "long int" | |
330 #define WCHAR_TYPE_SIZE 32 | |
331 | |
332 /* Maximum number of library IDs we permit with -mid-shared-library. */ | |
333 #define MAX_LIBRARY_ID 255 | |
334 | |
335 | |
336 /* Standard register usage. */ | |
337 | |
338 /* For the m68k, we give the data registers numbers 0-7, | |
339 the address registers numbers 010-017 (8-15), | |
340 and the 68881 floating point registers numbers 020-027 (16-23). | |
341 We also have a fake `arg-pointer' register 030 (24) used for | |
342 register elimination. */ | |
343 #define FIRST_PSEUDO_REGISTER 25 | |
344 | |
345 /* All m68k targets (except AmigaOS) use %a5 as the PIC register */ | |
346 #define PIC_OFFSET_TABLE_REGNUM \ | |
347 (!flag_pic ? INVALID_REGNUM \ | |
348 : reload_completed ? REGNO (pic_offset_table_rtx) \ | |
349 : PIC_REG) | |
350 | |
351 /* 1 for registers that have pervasive standard uses | |
352 and are not available for the register allocator. | |
353 On the m68k, only the stack pointer is such. | |
354 Our fake arg-pointer is obviously fixed as well. */ | |
355 #define FIXED_REGISTERS \ | |
356 {/* Data registers. */ \ | |
357 0, 0, 0, 0, 0, 0, 0, 0, \ | |
358 \ | |
359 /* Address registers. */ \ | |
360 0, 0, 0, 0, 0, 0, 0, 1, \ | |
361 \ | |
362 /* Floating point registers \ | |
363 (if available). */ \ | |
364 0, 0, 0, 0, 0, 0, 0, 0, \ | |
365 \ | |
366 /* Arg pointer. */ \ | |
367 1 } | |
368 | |
369 /* 1 for registers not available across function calls. | |
370 These must include the FIXED_REGISTERS and also any | |
371 registers that can be used without being saved. | |
372 The latter must include the registers where values are returned | |
373 and the register where structure-value addresses are passed. | |
374 Aside from that, you can include as many other registers as you like. */ | |
375 #define CALL_USED_REGISTERS \ | |
376 {/* Data registers. */ \ | |
377 1, 1, 0, 0, 0, 0, 0, 0, \ | |
378 \ | |
379 /* Address registers. */ \ | |
380 1, 1, 0, 0, 0, 0, 0, 1, \ | |
381 \ | |
382 /* Floating point registers \ | |
383 (if available). */ \ | |
384 1, 1, 0, 0, 0, 0, 0, 0, \ | |
385 \ | |
386 /* Arg pointer. */ \ | |
387 1 } | |
388 | |
389 #define REG_ALLOC_ORDER \ | |
390 { /* d0/d1/a0/a1 */ \ | |
391 0, 1, 8, 9, \ | |
392 /* d2-d7 */ \ | |
393 2, 3, 4, 5, 6, 7, \ | |
394 /* a2-a7/arg */ \ | |
395 10, 11, 12, 13, 14, 15, 24, \ | |
396 /* fp0-fp7 */ \ | |
397 16, 17, 18, 19, 20, 21, 22, 23\ | |
398 } | |
399 | |
400 | |
401 /* On the m68k, ordinary registers hold 32 bits worth; | |
402 for the 68881 registers, a single register is always enough for | |
403 anything that can be stored in them at all. */ | |
404 #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
405 ((REGNO) >= 16 ? GET_MODE_NUNITS (MODE) \ | |
406 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
407 | |
408 /* A C expression that is nonzero if hard register NEW_REG can be | |
409 considered for use as a rename register for OLD_REG register. */ | |
410 | |
411 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ | |
412 m68k_hard_regno_rename_ok (OLD_REG, NEW_REG) | |
413 | |
414 #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
415 m68k_regno_mode_ok ((REGNO), (MODE)) | |
416 | |
417 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \ | |
418 m68k_secondary_reload_class (CLASS, MODE, X) | |
419 | |
420 #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
421 (! TARGET_HARD_FLOAT \ | |
422 || ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
423 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \ | |
424 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
425 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))) | |
426 | |
427 /* Specify the registers used for certain standard purposes. | |
428 The values of these macros are register numbers. */ | |
429 | |
430 #define STACK_POINTER_REGNUM SP_REG | |
431 | |
432 /* Most m68k targets use %a6 as a frame pointer. The AmigaOS | |
433 ABI uses %a6 for shared library calls, therefore the frame | |
434 pointer is shifted to %a5 on this target. */ | |
435 #define FRAME_POINTER_REGNUM A6_REG | |
436 | |
437 /* Base register for access to arguments of the function. | |
438 * This isn't a hardware register. It will be eliminated to the | |
439 * stack pointer or frame pointer. | |
440 */ | |
441 #define ARG_POINTER_REGNUM 24 | |
442 | |
443 #define STATIC_CHAIN_REGNUM A0_REG | |
444 #define M68K_STATIC_CHAIN_REG_NAME REGISTER_PREFIX "a0" | |
445 | |
446 /* Register in which address to store a structure value | |
447 is passed to a function. */ | |
448 #define M68K_STRUCT_VALUE_REGNUM A1_REG | |
449 | |
450 | |
451 | |
452 /* The m68k has three kinds of registers, so eight classes would be | |
453 a complete set. One of them is not needed. */ | |
454 enum reg_class { | |
455 NO_REGS, DATA_REGS, | |
456 ADDR_REGS, FP_REGS, | |
457 GENERAL_REGS, DATA_OR_FP_REGS, | |
458 ADDR_OR_FP_REGS, ALL_REGS, | |
459 LIM_REG_CLASSES }; | |
460 | |
461 #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
462 | |
463 #define REG_CLASS_NAMES \ | |
464 { "NO_REGS", "DATA_REGS", \ | |
465 "ADDR_REGS", "FP_REGS", \ | |
466 "GENERAL_REGS", "DATA_OR_FP_REGS", \ | |
467 "ADDR_OR_FP_REGS", "ALL_REGS" } | |
468 | |
469 #define REG_CLASS_CONTENTS \ | |
470 { \ | |
471 {0x00000000}, /* NO_REGS */ \ | |
472 {0x000000ff}, /* DATA_REGS */ \ | |
473 {0x0100ff00}, /* ADDR_REGS */ \ | |
474 {0x00ff0000}, /* FP_REGS */ \ | |
475 {0x0100ffff}, /* GENERAL_REGS */ \ | |
476 {0x00ff00ff}, /* DATA_OR_FP_REGS */ \ | |
477 {0x01ffff00}, /* ADDR_OR_FP_REGS */ \ | |
478 {0x01ffffff}, /* ALL_REGS */ \ | |
479 } | |
480 | |
481 extern enum reg_class regno_reg_class[]; | |
482 #define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)]) | |
483 #define INDEX_REG_CLASS GENERAL_REGS | |
484 #define BASE_REG_CLASS ADDR_REGS | |
485 | |
486 #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
487 m68k_preferred_reload_class (X, CLASS) | |
488 | |
489 /* On the m68k, this is the size of MODE in words, | |
490 except in the FP regs, where a single reg is always enough. */ | |
491 #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
492 ((CLASS) == FP_REGS ? 1 \ | |
493 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
494 | |
495 /* Moves between fp regs and other regs are two insns. */ | |
496 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ | |
497 ((((CLASS1) == FP_REGS) != ((CLASS2) == FP_REGS)) ? 4 : 2) | |
498 | |
499 #define IRA_COVER_CLASSES \ | |
500 { \ | |
501 ALL_REGS, LIM_REG_CLASSES \ | |
502 } | |
503 | |
504 /* Stack layout; function entry, exit and calling. */ | |
505 | |
506 #define STACK_GROWS_DOWNWARD 1 | |
507 #define FRAME_GROWS_DOWNWARD 1 | |
508 #define STARTING_FRAME_OFFSET 0 | |
509 | |
510 /* On the 680x0, sp@- in a byte insn really pushes a word. | |
511 On the ColdFire, sp@- in a byte insn pushes just a byte. */ | |
512 #define PUSH_ROUNDING(BYTES) (TARGET_COLDFIRE ? BYTES : ((BYTES) + 1) & ~1) | |
513 | |
514 #define FIRST_PARM_OFFSET(FNDECL) 8 | |
515 | |
516 /* On the m68k the return value defaults to D0. */ | |
517 #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
518 gen_rtx_REG (TYPE_MODE (VALTYPE), D0_REG) | |
519 | |
520 /* On the m68k the return value defaults to D0. */ | |
521 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, D0_REG) | |
522 | |
523 /* On the m68k, D0 is usually the only register used. */ | |
524 #define FUNCTION_VALUE_REGNO_P(N) ((N) == D0_REG) | |
525 | |
526 /* Define this to be true when FUNCTION_VALUE_REGNO_P is true for | |
527 more than one register. | |
528 XXX This macro is m68k specific and used only for m68kemb.h. */ | |
529 #define NEEDS_UNTYPED_CALL 0 | |
530 | |
531 /* On the m68k, all arguments are usually pushed on the stack. */ | |
532 #define FUNCTION_ARG_REGNO_P(N) 0 | |
533 | |
534 /* On the m68k, this is a single integer, which is a number of bytes | |
535 of arguments scanned so far. */ | |
536 #define CUMULATIVE_ARGS int | |
537 | |
538 /* On the m68k, the offset starts at 0. */ | |
539 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ | |
540 ((CUM) = 0) | |
541 | |
542 #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
543 asm_fprintf (FILE, "\tlea %LLP%d,%Ra0\n\tjsr mcount\n", (LABELNO)) | |
544 | |
545 #define EXIT_IGNORE_STACK 1 | |
546 | |
547 /* Output assembler code for a block containing the constant parts | |
548 of a trampoline, leaving space for the variable parts. | |
549 | |
550 On the m68k, the trampoline looks like this: | |
551 movl #STATIC,a0 | |
552 jmp FUNCTION | |
553 | |
554 WARNING: Targets that may run on 68040+ cpus must arrange for | |
555 the instruction cache to be flushed. Previous incarnations of | |
556 the m68k trampoline code attempted to get around this by either | |
557 using an out-of-line transfer function or pc-relative data, but | |
558 the fact remains that the code to jump to the transfer function | |
559 or the code to load the pc-relative data needs to be flushed | |
560 just as much as the "variable" portion of the trampoline. | |
561 Recognizing that a cache flush is going to be required anyway, | |
562 dispense with such notions and build a smaller trampoline. | |
563 | |
564 Since more instructions are required to move a template into | |
565 place than to create it on the spot, don't use a template. */ | |
566 | |
567 #define TRAMPOLINE_SIZE 12 | |
568 #define TRAMPOLINE_ALIGNMENT 16 | |
569 | |
570 /* Targets redefine this to invoke code to either flush the cache, | |
571 or enable stack execution (or both). */ | |
572 #ifndef FINALIZE_TRAMPOLINE | |
573 #define FINALIZE_TRAMPOLINE(TRAMP) | |
574 #endif | |
575 | |
576 /* This is the library routine that is used to transfer control from the | |
577 trampoline to the actual nested function. It is defined for backward | |
578 compatibility, for linking with object code that used the old trampoline | |
579 definition. | |
580 | |
581 A colon is used with no explicit operands to cause the template string | |
582 to be scanned for %-constructs. | |
583 | |
584 The function name __transfer_from_trampoline is not actually used. | |
585 The function definition just permits use of "asm with operands" | |
586 (though the operand list is empty). */ | |
587 #define TRANSFER_FROM_TRAMPOLINE \ | |
588 void \ | |
589 __transfer_from_trampoline () \ | |
590 { \ | |
591 register char *a0 asm (M68K_STATIC_CHAIN_REG_NAME); \ | |
592 asm (GLOBAL_ASM_OP "___trampoline"); \ | |
593 asm ("___trampoline:"); \ | |
594 asm volatile ("move%.l %0,%@" : : "m" (a0[22])); \ | |
595 asm volatile ("move%.l %1,%0" : "=a" (a0) : "m" (a0[18])); \ | |
596 asm ("rts":); \ | |
597 } | |
598 | |
599 /* There are two registers that can always be eliminated on the m68k. | |
600 The frame pointer and the arg pointer can be replaced by either the | |
601 hard frame pointer or to the stack pointer, depending upon the | |
602 circumstances. The hard frame pointer is not used before reload and | |
603 so it is not eligible for elimination. */ | |
604 #define ELIMINABLE_REGS \ | |
605 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ | |
606 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \ | |
607 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }} | |
608 | |
609 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
610 (OFFSET) = m68k_initial_elimination_offset(FROM, TO) | |
611 | |
612 /* Addressing modes, and classification of registers for them. */ | |
613 | |
614 #define HAVE_POST_INCREMENT 1 | |
615 #define HAVE_PRE_DECREMENT 1 | |
616 | |
617 /* Macros to check register numbers against specific register classes. */ | |
618 | |
619 /* True for data registers, D0 through D7. */ | |
620 #define DATA_REGNO_P(REGNO) IN_RANGE (REGNO, 0, 7) | |
621 | |
622 /* True for address registers, A0 through A7. */ | |
623 #define ADDRESS_REGNO_P(REGNO) IN_RANGE (REGNO, 8, 15) | |
624 | |
625 /* True for integer registers, D0 through D7 and A0 through A7. */ | |
626 #define INT_REGNO_P(REGNO) IN_RANGE (REGNO, 0, 15) | |
627 | |
628 /* True for floating point registers, FP0 through FP7. */ | |
629 #define FP_REGNO_P(REGNO) IN_RANGE (REGNO, 16, 23) | |
630 | |
631 #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
632 (INT_REGNO_P (REGNO) \ | |
633 || INT_REGNO_P (reg_renumber[REGNO])) | |
634 | |
635 #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
636 (ADDRESS_REGNO_P (REGNO) \ | |
637 || ADDRESS_REGNO_P (reg_renumber[REGNO])) | |
638 | |
639 #define REGNO_OK_FOR_INDEX_NONSTRICT_P(REGNO) \ | |
640 (INT_REGNO_P (REGNO) \ | |
641 || REGNO == ARG_POINTER_REGNUM \ | |
642 || REGNO >= FIRST_PSEUDO_REGISTER) | |
643 | |
644 #define REGNO_OK_FOR_BASE_NONSTRICT_P(REGNO) \ | |
645 (ADDRESS_REGNO_P (REGNO) \ | |
646 || REGNO == ARG_POINTER_REGNUM \ | |
647 || REGNO >= FIRST_PSEUDO_REGISTER) | |
648 | |
649 /* Now macros that check whether X is a register and also, | |
650 strictly, whether it is in a specified class. | |
651 | |
652 These macros are specific to the m68k, and may be used only | |
653 in code for printing assembler insns and in conditions for | |
654 define_optimization. */ | |
655 | |
656 /* 1 if X is a data register. */ | |
657 #define DATA_REG_P(X) (REG_P (X) && DATA_REGNO_P (REGNO (X))) | |
658 | |
659 /* 1 if X is an fp register. */ | |
660 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X))) | |
661 | |
662 /* 1 if X is an address register */ | |
663 #define ADDRESS_REG_P(X) (REG_P (X) && ADDRESS_REGNO_P (REGNO (X))) | |
664 | |
665 /* True if SYMBOL + OFFSET constants must refer to something within | |
666 SYMBOL's section. */ | |
667 #ifndef M68K_OFFSETS_MUST_BE_WITHIN_SECTIONS_P | |
668 #define M68K_OFFSETS_MUST_BE_WITHIN_SECTIONS_P 0 | |
669 #endif | |
670 | |
671 #define MAX_REGS_PER_ADDRESS 2 | |
672 | |
673 #define CONSTANT_ADDRESS_P(X) \ | |
674 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
675 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ | |
676 || GET_CODE (X) == HIGH) \ | |
677 && LEGITIMATE_CONSTANT_P (X)) | |
678 | |
679 /* Nonzero if the constant value X is a legitimate general operand. | |
680 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
681 #define LEGITIMATE_CONSTANT_P(X) \ | |
682 (GET_MODE (X) != XFmode \ | |
683 && !m68k_illegitimate_symbolic_constant_p (X)) | |
684 | |
685 #ifndef REG_OK_STRICT | |
686 #define REG_STRICT_P 0 | |
687 #else | |
688 #define REG_STRICT_P 1 | |
689 #endif | |
690 | |
691 #define LEGITIMATE_PIC_OPERAND_P(X) \ | |
692 (!symbolic_operand (X, VOIDmode) \ | |
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693 || (TARGET_PCREL && REG_STRICT_P) \ |
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694 || m68k_tls_reference_p (X, true)) |
0 | 695 |
696 #define REG_OK_FOR_BASE_P(X) \ | |
697 m68k_legitimate_base_reg_p (X, REG_STRICT_P) | |
698 | |
699 #define REG_OK_FOR_INDEX_P(X) \ | |
700 m68k_legitimate_index_reg_p (X, REG_STRICT_P) | |
701 | |
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702 |
0 | 703 /* This address is OK as it stands. */ |
704 #define PIC_CASE_VECTOR_ADDRESS(index) index | |
705 #define CASE_VECTOR_MODE HImode | |
706 #define CASE_VECTOR_PC_RELATIVE 1 | |
707 | |
708 #define DEFAULT_SIGNED_CHAR 1 | |
709 #define MOVE_MAX 4 | |
710 #define SLOW_BYTE_ACCESS 0 | |
711 | |
712 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
713 | |
714 /* The ColdFire FF1 instruction returns 32 for zero. */ | |
715 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1) | |
716 | |
717 #define STORE_FLAG_VALUE (-1) | |
718 | |
719 #define Pmode SImode | |
720 #define FUNCTION_MODE QImode | |
721 | |
722 | |
723 /* Tell final.c how to eliminate redundant test instructions. */ | |
724 | |
725 /* Here we define machine-dependent flags and fields in cc_status | |
726 (see `conditions.h'). */ | |
727 | |
728 /* Set if the cc value is actually in the 68881, so a floating point | |
729 conditional branch must be output. */ | |
730 #define CC_IN_68881 04000 | |
731 | |
732 /* On the 68000, all the insns to store in an address register fail to | |
733 set the cc's. However, in some cases these instructions can make it | |
734 possibly invalid to use the saved cc's. In those cases we clear out | |
735 some or all of the saved cc's so they won't be used. */ | |
736 #define NOTICE_UPDATE_CC(EXP,INSN) notice_update_cc (EXP, INSN) | |
737 | |
738 /* The shift instructions always clear the overflow bit. */ | |
739 #define CC_OVERFLOW_UNUSABLE 01000 | |
740 | |
741 /* The shift instructions use the carry bit in a way not compatible with | |
742 conditional branches. conditions.h uses CC_NO_OVERFLOW for this purpose. | |
743 Rename it to something more understandable. */ | |
744 #define CC_NO_CARRY CC_NO_OVERFLOW | |
745 | |
746 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \ | |
747 do { if (cc_prev_status.flags & CC_IN_68881) \ | |
748 return FLOAT; \ | |
749 if (cc_prev_status.flags & CC_NO_OVERFLOW) \ | |
750 return NO_OV; \ | |
751 return NORMAL; } while (0) | |
752 | |
753 /* Control the assembler format that we output. */ | |
754 | |
755 #define ASM_APP_ON "#APP\n" | |
756 #define ASM_APP_OFF "#NO_APP\n" | |
757 #define TEXT_SECTION_ASM_OP "\t.text" | |
758 #define DATA_SECTION_ASM_OP "\t.data" | |
759 #define GLOBAL_ASM_OP "\t.globl\t" | |
760 #define REGISTER_PREFIX "" | |
761 #define LOCAL_LABEL_PREFIX "" | |
762 #define USER_LABEL_PREFIX "_" | |
763 #define IMMEDIATE_PREFIX "#" | |
764 | |
765 #define REGISTER_NAMES \ | |
766 {REGISTER_PREFIX"d0", REGISTER_PREFIX"d1", REGISTER_PREFIX"d2", \ | |
767 REGISTER_PREFIX"d3", REGISTER_PREFIX"d4", REGISTER_PREFIX"d5", \ | |
768 REGISTER_PREFIX"d6", REGISTER_PREFIX"d7", \ | |
769 REGISTER_PREFIX"a0", REGISTER_PREFIX"a1", REGISTER_PREFIX"a2", \ | |
770 REGISTER_PREFIX"a3", REGISTER_PREFIX"a4", REGISTER_PREFIX"a5", \ | |
771 REGISTER_PREFIX"a6", REGISTER_PREFIX"sp", \ | |
772 REGISTER_PREFIX"fp0", REGISTER_PREFIX"fp1", REGISTER_PREFIX"fp2", \ | |
773 REGISTER_PREFIX"fp3", REGISTER_PREFIX"fp4", REGISTER_PREFIX"fp5", \ | |
774 REGISTER_PREFIX"fp6", REGISTER_PREFIX"fp7", REGISTER_PREFIX"argptr" } | |
775 | |
776 #define M68K_FP_REG_NAME REGISTER_PREFIX"fp" | |
777 | |
778 /* Return a register name by index, handling %fp nicely. | |
779 We don't replace %fp for targets that don't map it to %a6 | |
780 since it may confuse GAS. */ | |
781 #define M68K_REGNAME(r) ( \ | |
782 ((FRAME_POINTER_REGNUM == A6_REG) \ | |
783 && ((r) == FRAME_POINTER_REGNUM) \ | |
784 && frame_pointer_needed) ? \ | |
785 M68K_FP_REG_NAME : reg_names[(r)]) | |
786 | |
787 /* On the Sun-3, the floating point registers have numbers | |
788 18 to 25, not 16 to 23 as they do in the compiler. */ | |
789 #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2) | |
790 | |
791 /* Before the prologue, RA is at 0(%sp). */ | |
792 #define INCOMING_RETURN_ADDR_RTX \ | |
793 gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) | |
794 | |
795 /* After the prologue, RA is at 4(AP) in the current frame. */ | |
796 #define RETURN_ADDR_RTX(COUNT, FRAME) \ | |
797 ((COUNT) == 0 \ | |
798 ? gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, UNITS_PER_WORD)) \ | |
799 : gen_rtx_MEM (Pmode, plus_constant (FRAME, UNITS_PER_WORD))) | |
800 | |
801 /* We must not use the DBX register numbers for the DWARF 2 CFA column | |
802 numbers because that maps to numbers beyond FIRST_PSEUDO_REGISTER. | |
803 Instead use the identity mapping. */ | |
804 #define DWARF_FRAME_REGNUM(REG) \ | |
805 (INT_REGNO_P (REG) || FP_REGNO_P (REG) ? (REG) : INVALID_REGNUM) | |
806 | |
807 /* The return column was originally 24, but gcc used 25 for a while too. | |
808 Define both registers 24 and 25 as Pmode ones and use 24 in our own | |
809 unwind information. */ | |
810 #define DWARF_FRAME_REGISTERS 25 | |
811 #define DWARF_FRAME_RETURN_COLUMN 24 | |
812 #define DWARF_ALT_FRAME_RETURN_COLUMN 25 | |
813 | |
814 /* Before the prologue, the top of the frame is at 4(%sp). */ | |
815 #define INCOMING_FRAME_SP_OFFSET 4 | |
816 | |
817 /* All registers are live on exit from an interrupt routine. */ | |
818 #define EPILOGUE_USES(REGNO) \ | |
819 (reload_completed \ | |
820 && (m68k_get_function_kind (current_function_decl) \ | |
821 == m68k_fk_interrupt_handler)) | |
822 | |
823 /* Describe how we implement __builtin_eh_return. */ | |
824 #define EH_RETURN_DATA_REGNO(N) \ | |
825 ((N) < 2 ? (N) : INVALID_REGNUM) | |
826 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, A0_REG) | |
827 #define EH_RETURN_HANDLER_RTX \ | |
828 gen_rtx_MEM (Pmode, \ | |
829 gen_rtx_PLUS (Pmode, arg_pointer_rtx, \ | |
830 plus_constant (EH_RETURN_STACKADJ_RTX, \ | |
831 UNITS_PER_WORD))) | |
832 | |
833 /* Select a format to encode pointers in exception handling data. CODE | |
834 is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is | |
835 true if the symbol may be affected by dynamic relocations. | |
836 | |
837 TARGET_ID_SHARED_LIBRARY and TARGET_SEP_DATA are designed to support | |
838 a read-only text segment without imposing a fixed gap between the | |
839 text and data segments. As a result, the text segment cannot refer | |
840 to anything in the data segment, even in PC-relative form. Because | |
841 .eh_frame refers to both code and data, it follows that .eh_frame | |
842 must be in the data segment itself, and that the offset between | |
843 .eh_frame and code will not be a link-time constant. | |
844 | |
845 In theory, we could create a read-only .eh_frame by using DW_EH_PE_pcrel | |
846 | DW_EH_PE_indirect for all code references. However, gcc currently | |
847 handles indirect references using a per-TU constant pool. This means | |
848 that if a function and its eh_frame are removed by the linker, the | |
849 eh_frame's indirect references to the removed function will not be | |
850 removed, leading to an unresolved symbol error. | |
851 | |
852 It isn't clear that any -msep-data or -mid-shared-library target | |
853 would benefit from a read-only .eh_frame anyway. In particular, | |
854 no known target that supports these options has a feature like | |
855 PT_GNU_RELRO. Without any such feature to motivate them, indirect | |
856 references would be unnecessary bloat, so we simply use an absolute | |
857 pointer for code and global references. We still use pc-relative | |
858 references to data, as this avoids a relocation. */ | |
859 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ | |
860 (flag_pic \ | |
861 && !((TARGET_ID_SHARED_LIBRARY || TARGET_SEP_DATA) \ | |
862 && ((GLOBAL) || (CODE))) \ | |
863 ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \ | |
864 : DW_EH_PE_absptr) | |
865 | |
866 #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
867 asm_fprintf (FILE, "%U%s", NAME) | |
868 | |
869 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
870 sprintf (LABEL, "*%s%s%ld", LOCAL_LABEL_PREFIX, PREFIX, (long)(NUM)) | |
871 | |
872 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
873 asm_fprintf (FILE, (MOTOROLA \ | |
874 ? "\tmove.l %s,-(%Rsp)\n" \ | |
875 : "\tmovel %s,%Rsp@-\n"), \ | |
876 reg_names[REGNO]) | |
877 | |
878 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
879 asm_fprintf (FILE, (MOTOROLA \ | |
880 ? "\tmove.l (%Rsp)+,%s\n" \ | |
881 : "\tmovel %Rsp@+,%s\n"), \ | |
882 reg_names[REGNO]) | |
883 | |
884 /* The m68k does not use absolute case-vectors, but we must define this macro | |
885 anyway. */ | |
886 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
887 asm_fprintf (FILE, "\t.long %LL%d\n", VALUE) | |
888 | |
889 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ | |
890 asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL) | |
891 | |
892 /* We don't have a way to align to more than a two-byte boundary, so do the | |
893 best we can and don't complain. */ | |
894 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
895 if ((LOG) >= 1) \ | |
896 fprintf (FILE, "\t.even\n"); | |
897 | |
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898 #ifdef HAVE_GAS_BALIGN_AND_P2ALIGN |
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899 /* Use "move.l %a4,%a4" to advance within code. */ |
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900 #define ASM_OUTPUT_ALIGN_WITH_NOP(FILE,LOG) \ |
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901 if ((LOG) > 0) \ |
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902 fprintf ((FILE), "\t.balignw %u,0x284c\n", 1 << (LOG)); |
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903 #endif |
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904 |
0 | 905 #define ASM_OUTPUT_SKIP(FILE,SIZE) \ |
906 fprintf (FILE, "\t.skip %u\n", (int)(SIZE)) | |
907 | |
908 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
909 ( fputs (".comm ", (FILE)), \ | |
910 assemble_name ((FILE), (NAME)), \ | |
911 fprintf ((FILE), ",%u\n", (int)(ROUNDED))) | |
912 | |
913 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ | |
914 ( fputs (".lcomm ", (FILE)), \ | |
915 assemble_name ((FILE), (NAME)), \ | |
916 fprintf ((FILE), ",%u\n", (int)(ROUNDED))) | |
917 | |
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918 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \ |
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919 m68k_final_prescan_insn (INSN, OPVEC, NOPERANDS) |
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920 |
0 | 921 /* On the 68000, we use several CODE characters: |
922 '.' for dot needed in Motorola-style opcode names. | |
923 '-' for an operand pushing on the stack: | |
924 sp@-, -(sp) or -(%sp) depending on the style of syntax. | |
925 '+' for an operand pushing on the stack: | |
926 sp@+, (sp)+ or (%sp)+ depending on the style of syntax. | |
927 '@' for a reference to the top word on the stack: | |
928 sp@, (sp) or (%sp) depending on the style of syntax. | |
929 '#' for an immediate operand prefix (# in MIT and Motorola syntax | |
930 but & in SGS syntax). | |
931 '!' for the fpcr register (used in some float-to-fixed conversions). | |
932 '$' for the letter `s' in an op code, but only on the 68040. | |
933 '&' for the letter `d' in an op code, but only on the 68040. | |
934 '/' for register prefix needed by longlong.h. | |
935 '?' for m68k_library_id_string | |
936 | |
937 'b' for byte insn (no effect, on the Sun; this is for the ISI). | |
938 'd' to force memory addressing to be absolute, not relative. | |
939 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex) | |
940 'x' for float insn (print a CONST_DOUBLE as a float rather than in hex), | |
941 or print pair of registers as rx:ry. */ | |
942 | |
943 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ | |
944 ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \ | |
945 || (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \ | |
946 || (CODE) == '$' || (CODE) == '&' || (CODE) == '/' || (CODE) == '?') | |
947 | |
948 | |
949 /* See m68k.c for the m68k specific codes. */ | |
950 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
951 | |
952 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) | |
953 | |
954 #define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \ | |
955 do { \ | |
956 if (! m68k_output_addr_const_extra (FILE, (X))) \ | |
957 goto FAIL; \ | |
958 } while (0); | |
959 | |
960 /* Values used in the MICROARCH argument to M68K_DEVICE. */ | |
961 enum uarch_type | |
962 { | |
963 u68000, | |
964 u68010, | |
965 u68020, | |
966 u68020_40, | |
967 u68020_60, | |
968 u68030, | |
969 u68040, | |
970 u68060, | |
971 ucpu32, | |
972 ucfv1, | |
973 ucfv2, | |
974 ucfv3, | |
975 ucfv4, | |
976 ucfv4e, | |
977 ucfv5, | |
978 unk_arch | |
979 }; | |
980 | |
981 /* An enumeration of all supported target devices. */ | |
982 enum target_device | |
983 { | |
984 #define M68K_DEVICE(NAME,ENUM_VALUE,FAMILY,MULTILIB,MICROARCH,ISA,FLAGS) \ | |
985 ENUM_VALUE, | |
986 #include "m68k-devices.def" | |
987 #undef M68K_DEVICE | |
988 unk_device | |
989 }; | |
990 | |
991 enum fpu_type | |
992 { | |
993 FPUTYPE_NONE, | |
994 FPUTYPE_68881, | |
995 FPUTYPE_COLDFIRE | |
996 }; | |
997 | |
998 enum m68k_function_kind | |
999 { | |
1000 m68k_fk_normal_function, | |
1001 m68k_fk_interrupt_handler, | |
1002 m68k_fk_interrupt_thread | |
1003 }; | |
1004 | |
1005 /* Variables in m68k.c; see there for details. */ | |
1006 extern const char *m68k_library_id_string; | |
1007 extern enum target_device m68k_cpu; | |
1008 extern enum uarch_type m68k_tune; | |
1009 extern enum fpu_type m68k_fpu; | |
1010 extern unsigned int m68k_cpu_flags; | |
1011 extern unsigned int m68k_tune_flags; | |
1012 extern const char *m68k_symbolic_call; | |
1013 extern const char *m68k_symbolic_jump; | |
1014 | |
1015 enum M68K_SYMBOLIC_CALL { M68K_SYMBOLIC_CALL_NONE, M68K_SYMBOLIC_CALL_JSR, | |
1016 M68K_SYMBOLIC_CALL_BSR_C, M68K_SYMBOLIC_CALL_BSR_P }; | |
1017 | |
1018 extern enum M68K_SYMBOLIC_CALL m68k_symbolic_call_var; | |
1019 | |
1020 /* ??? HOST_WIDE_INT is not being defined for auto-generated files. | |
1021 Workaround that. */ | |
1022 #ifdef HOST_WIDE_INT | |
1023 typedef enum { MOVL, SWAP, NEGW, NOTW, NOTB, MOVQ, MVS, MVZ } | |
1024 M68K_CONST_METHOD; | |
1025 | |
1026 extern M68K_CONST_METHOD m68k_const_method (HOST_WIDE_INT); | |
1027 #endif | |
1028 | |
1029 extern void m68k_emit_move_double (rtx [2]); | |
1030 | |
1031 extern int m68k_sched_address_bypass_p (rtx, rtx); | |
1032 extern int m68k_sched_indexed_address_bypass_p (rtx, rtx); | |
1033 | |
1034 #define CPU_UNITS_QUERY 1 |