Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/mcore/mcore.h @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
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date | Tue, 22 Mar 2011 17:18:12 +0900 |
parents | b7f97abdc517 |
children | 04ced10e8804 |
rev | line source |
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0 | 1 /* Definitions of target machine for GNU compiler, |
2 for Motorola M*CORE Processor. | |
3 Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, | |
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4 2008, 2009, 2010 Free Software Foundation, Inc. |
0 | 5 |
6 This file is part of GCC. | |
7 | |
8 GCC is free software; you can redistribute it and/or modify it | |
9 under the terms of the GNU General Public License as published | |
10 by the Free Software Foundation; either version 3, or (at your | |
11 option) any later version. | |
12 | |
13 GCC is distributed in the hope that it will be useful, but WITHOUT | |
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
16 License for more details. | |
17 | |
18 You should have received a copy of the GNU General Public License | |
19 along with GCC; see the file COPYING3. If not see | |
20 <http://www.gnu.org/licenses/>. */ | |
21 | |
22 #ifndef GCC_MCORE_H | |
23 #define GCC_MCORE_H | |
24 | |
25 /* RBE: need to move these elsewhere. */ | |
26 #undef LIKE_PPC_ABI | |
27 #define MCORE_STRUCT_ARGS | |
28 /* RBE: end of "move elsewhere". */ | |
29 | |
30 /* Run-time Target Specification. */ | |
31 #define TARGET_MCORE | |
32 | |
33 /* Get tree.c to declare a target-specific specialization of | |
34 merge_decl_attributes. */ | |
35 #define TARGET_DLLIMPORT_DECL_ATTRIBUTES 1 | |
36 | |
37 #define TARGET_CPU_CPP_BUILTINS() \ | |
38 do \ | |
39 { \ | |
40 builtin_define ("__mcore__"); \ | |
41 builtin_define ("__MCORE__"); \ | |
42 if (TARGET_LITTLE_END) \ | |
43 builtin_define ("__MCORELE__"); \ | |
44 else \ | |
45 builtin_define ("__MCOREBE__"); \ | |
46 if (TARGET_M340) \ | |
47 builtin_define ("__M340__"); \ | |
48 else \ | |
49 builtin_define ("__M210__"); \ | |
50 } \ | |
51 while (0) | |
52 | |
53 #undef CPP_SPEC | |
54 #define CPP_SPEC "%{m210:%{mlittle-endian:%ethe m210 does not have little endian support}}" | |
55 | |
56 /* We don't have a -lg library, so don't put it in the list. */ | |
57 #undef LIB_SPEC | |
58 #define LIB_SPEC "%{!shared: %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}}" | |
59 | |
60 #undef ASM_SPEC | |
61 #define ASM_SPEC "%{mbig-endian:-EB} %{m210:-cpu=210 -EB}" | |
62 | |
63 #undef LINK_SPEC | |
64 #define LINK_SPEC "%{mbig-endian:-EB} %{m210:-EB} -X" | |
65 | |
66 #define TARGET_DEFAULT \ | |
67 (MASK_HARDLIT \ | |
68 | MASK_DIV \ | |
69 | MASK_RELAX_IMM \ | |
70 | MASK_M340 \ | |
71 | MASK_LITTLE_END) | |
72 | |
73 #ifndef MULTILIB_DEFAULTS | |
74 #define MULTILIB_DEFAULTS { "mlittle-endian", "m340" } | |
75 #endif | |
76 | |
77 /* The ability to have 4 byte alignment is being suppressed for now. | |
78 If this ability is reenabled, you must disable the definition below | |
79 *and* edit t-mcore to enable multilibs for 4 byte alignment code. */ | |
80 #undef TARGET_8ALIGN | |
81 #define TARGET_8ALIGN 1 | |
82 | |
83 extern char * mcore_current_function_name; | |
84 | |
85 /* The MCore ABI says that bitfields are unsigned by default. */ | |
86 #define CC1_SPEC "-funsigned-bitfields" | |
87 | |
88 /* Target machine storage Layout. */ | |
89 | |
90 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
91 if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
92 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
93 { \ | |
94 (MODE) = SImode; \ | |
95 (UNSIGNEDP) = 1; \ | |
96 } | |
97 | |
98 /* Define this if most significant bit is lowest numbered | |
99 in instructions that operate on numbered bit-fields. */ | |
100 #define BITS_BIG_ENDIAN 0 | |
101 | |
102 /* Define this if most significant byte of a word is the lowest numbered. */ | |
103 #define BYTES_BIG_ENDIAN (! TARGET_LITTLE_END) | |
104 | |
105 /* Define this if most significant word of a multiword number is the lowest | |
106 numbered. */ | |
107 #define WORDS_BIG_ENDIAN (! TARGET_LITTLE_END) | |
108 | |
109 #define MAX_BITS_PER_WORD 32 | |
110 | |
111 /* Width of a word, in units (bytes). */ | |
112 #define UNITS_PER_WORD 4 | |
113 | |
114 /* A C expression for the size in bits of the type `long long' on the | |
115 target machine. If you don't define this, the default is two | |
116 words. */ | |
117 #define LONG_LONG_TYPE_SIZE 64 | |
118 | |
119 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
120 #define PARM_BOUNDARY 32 | |
121 | |
122 /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
123 #define STACK_BOUNDARY (TARGET_8ALIGN ? 64 : 32) | |
124 | |
125 /* Largest increment in UNITS we allow the stack to grow in a single operation. */ | |
126 #define STACK_UNITS_MAXSTEP 4096 | |
127 | |
128 /* Allocation boundary (in *bits*) for the code of a function. */ | |
129 #define FUNCTION_BOUNDARY ((TARGET_OVERALIGN_FUNC) ? 32 : 16) | |
130 | |
131 /* Alignment of field after `int : 0' in a structure. */ | |
132 #define EMPTY_FIELD_BOUNDARY 32 | |
133 | |
134 /* No data type wants to be aligned rounder than this. */ | |
135 #define BIGGEST_ALIGNMENT (TARGET_8ALIGN ? 64 : 32) | |
136 | |
137 /* The best alignment to use in cases where we have a choice. */ | |
138 #define FASTEST_ALIGNMENT 32 | |
139 | |
140 /* Every structures size must be a multiple of 8 bits. */ | |
141 #define STRUCTURE_SIZE_BOUNDARY 8 | |
142 | |
143 /* Look at the fundamental type that is used for a bit-field and use | |
144 that to impose alignment on the enclosing structure. | |
145 struct s {int a:8}; should have same alignment as "int", not "char". */ | |
146 #define PCC_BITFIELD_TYPE_MATTERS 1 | |
147 | |
148 /* Largest integer machine mode for structures. If undefined, the default | |
149 is GET_MODE_SIZE(DImode). */ | |
150 #define MAX_FIXED_MODE_SIZE 32 | |
151 | |
152 /* Make strings word-aligned so strcpy from constants will be faster. */ | |
153 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
154 ((TREE_CODE (EXP) == STRING_CST \ | |
155 && (ALIGN) < FASTEST_ALIGNMENT) \ | |
156 ? FASTEST_ALIGNMENT : (ALIGN)) | |
157 | |
158 /* Make arrays of chars word-aligned for the same reasons. */ | |
159 #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
160 (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
161 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
162 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN)) | |
163 | |
164 /* Set this nonzero if move instructions will actually fail to work | |
165 when given unaligned data. */ | |
166 #define STRICT_ALIGNMENT 1 | |
167 | |
168 /* Standard register usage. */ | |
169 | |
170 /* Register allocation for our first guess | |
171 | |
172 r0 stack pointer | |
173 r1 scratch, target reg for xtrb? | |
174 r2-r7 arguments. | |
175 r8-r14 call saved | |
176 r15 link register | |
177 ap arg pointer (doesn't really exist, always eliminated) | |
178 c c bit | |
179 fp frame pointer (doesn't really exist, always eliminated) | |
180 x19 two control registers. */ | |
181 | |
182 /* Number of actual hardware registers. | |
183 The hardware registers are assigned numbers for the compiler | |
184 from 0 to just below FIRST_PSEUDO_REGISTER. | |
185 All registers that the compiler knows about must be given numbers, | |
186 even those that are not normally considered general registers. | |
187 | |
188 MCore has 16 integer registers and 2 control registers + the arg | |
189 pointer. */ | |
190 | |
191 #define FIRST_PSEUDO_REGISTER 20 | |
192 | |
193 #define R1_REG 1 /* Where literals are forced. */ | |
194 #define LK_REG 15 /* Overloaded on general register. */ | |
195 #define AP_REG 16 /* Fake arg pointer register. */ | |
196 /* RBE: mcore.md depends on CC_REG being set to 17. */ | |
197 #define CC_REG 17 /* Can't name it C_REG. */ | |
198 #define FP_REG 18 /* Fake frame pointer register. */ | |
199 | |
200 /* Specify the registers used for certain standard purposes. | |
201 The values of these macros are register numbers. */ | |
202 | |
203 | |
204 #undef PC_REGNUM /* Define this if the program counter is overloaded on a register. */ | |
205 #define STACK_POINTER_REGNUM 0 /* Register to use for pushing function arguments. */ | |
206 #define FRAME_POINTER_REGNUM 8 /* When we need FP, use r8. */ | |
207 | |
208 /* The assembler's names for the registers. RFP need not always be used as | |
209 the Real framepointer; it can also be used as a normal general register. | |
210 Note that the name `fp' is horribly misleading since `fp' is in fact only | |
211 the argument-and-return-context pointer. */ | |
212 #define REGISTER_NAMES \ | |
213 { \ | |
214 "sp", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ | |
215 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ | |
216 "apvirtual", "c", "fpvirtual", "x19" \ | |
217 } | |
218 | |
219 /* 1 for registers that have pervasive standard uses | |
220 and are not available for the register allocator. */ | |
221 #define FIXED_REGISTERS \ | |
222 /* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 ap c fp x19 */ \ | |
223 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1} | |
224 | |
225 /* 1 for registers not available across function calls. | |
226 These must include the FIXED_REGISTERS and also any | |
227 registers that can be used without being saved. | |
228 The latter must include the registers where values are returned | |
229 and the register where structure-value addresses are passed. | |
230 Aside from that, you can include as many other registers as you like. */ | |
231 | |
232 /* RBE: r15 {link register} not available across calls, | |
233 But we don't mark it that way here.... */ | |
234 #define CALL_USED_REGISTERS \ | |
235 /* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 ap c fp x19 */ \ | |
236 { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1} | |
237 | |
238 /* The order in which register should be allocated. */ | |
239 #define REG_ALLOC_ORDER \ | |
240 /* r7 r6 r5 r4 r3 r2 r15 r14 r13 r12 r11 r10 r9 r8 r1 r0 ap c fp x19*/ \ | |
241 { 7, 6, 5, 4, 3, 2, 15, 14, 13, 12, 11, 10, 9, 8, 1, 0, 16, 17, 18, 19} | |
242 | |
243 /* Return number of consecutive hard regs needed starting at reg REGNO | |
244 to hold something of mode MODE. | |
245 This is ordinarily the length in words of a value of mode MODE | |
246 but can be less for certain modes in special long registers. | |
247 | |
248 On the MCore regs are UNITS_PER_WORD bits wide; */ | |
249 #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
250 (((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
251 | |
252 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
253 We may keep double values in even registers. */ | |
254 #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
255 ((TARGET_8ALIGN && GET_MODE_SIZE (MODE) > UNITS_PER_WORD) ? (((REGNO) & 1) == 0) : (REGNO < 18)) | |
256 | |
257 /* Value is 1 if it is a good idea to tie two pseudo registers | |
258 when one has mode MODE1 and one has mode MODE2. | |
259 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
260 for any hard reg, then this must be 0 for correct output. */ | |
261 #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
262 ((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2)) | |
263 | |
264 /* Definitions for register eliminations. | |
265 | |
266 We have two registers that can be eliminated on the MCore. First, the | |
267 frame pointer register can often be eliminated in favor of the stack | |
268 pointer register. Secondly, the argument pointer register can always be | |
269 eliminated; it is replaced with either the stack or frame pointer. */ | |
270 | |
271 /* Base register for access to arguments of the function. */ | |
272 #define ARG_POINTER_REGNUM 16 | |
273 | |
274 /* Register in which the static-chain is passed to a function. */ | |
275 #define STATIC_CHAIN_REGNUM 1 | |
276 | |
277 /* This is an array of structures. Each structure initializes one pair | |
278 of eliminable registers. The "from" register number is given first, | |
279 followed by "to". Eliminations of the same "from" register are listed | |
280 in order of preference. */ | |
281 #define ELIMINABLE_REGS \ | |
282 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
283 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
284 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},} | |
285 | |
286 /* Define the offset between two registers, one to be eliminated, and the other | |
287 its replacement, at the start of a routine. */ | |
288 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
289 OFFSET = mcore_initial_elimination_offset (FROM, TO) | |
290 | |
291 /* Define the classes of registers for register constraints in the | |
292 machine description. Also define ranges of constants. | |
293 | |
294 One of the classes must always be named ALL_REGS and include all hard regs. | |
295 If there is more than one class, another class must be named NO_REGS | |
296 and contain no registers. | |
297 | |
298 The name GENERAL_REGS must be the name of a class (or an alias for | |
299 another name such as ALL_REGS). This is the class of registers | |
300 that is allowed by "g" or "r" in a register constraint. | |
301 Also, registers outside this class are allocated only when | |
302 instructions express preferences for them. | |
303 | |
304 The classes must be numbered in nondecreasing order; that is, | |
305 a larger-numbered class must never be contained completely | |
306 in a smaller-numbered class. | |
307 | |
308 For any two classes, it is very desirable that there be another | |
309 class that represents their union. */ | |
310 | |
311 /* The MCore has only general registers. There are | |
312 also some special purpose registers: the T bit register, the | |
313 procedure Link and the Count Registers. */ | |
314 enum reg_class | |
315 { | |
316 NO_REGS, | |
317 ONLYR1_REGS, | |
318 LRW_REGS, | |
319 GENERAL_REGS, | |
320 C_REGS, | |
321 ALL_REGS, | |
322 LIM_REG_CLASSES | |
323 }; | |
324 | |
325 #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
326 | |
327 #define IRA_COVER_CLASSES \ | |
328 { \ | |
329 GENERAL_REGS, C_REGS, LIM_REG_CLASSES \ | |
330 } | |
331 | |
332 | |
333 /* Give names of register classes as strings for dump file. */ | |
334 #define REG_CLASS_NAMES \ | |
335 { \ | |
336 "NO_REGS", \ | |
337 "ONLYR1_REGS", \ | |
338 "LRW_REGS", \ | |
339 "GENERAL_REGS", \ | |
340 "C_REGS", \ | |
341 "ALL_REGS", \ | |
342 } | |
343 | |
344 /* Define which registers fit in which classes. | |
345 This is an initializer for a vector of HARD_REG_SET | |
346 of length N_REG_CLASSES. */ | |
347 | |
348 /* ??? STACK_POINTER_REGNUM should be excluded from LRW_REGS. */ | |
349 #define REG_CLASS_CONTENTS \ | |
350 { \ | |
351 {0x000000}, /* NO_REGS */ \ | |
352 {0x000002}, /* ONLYR1_REGS */ \ | |
353 {0x007FFE}, /* LRW_REGS */ \ | |
354 {0x01FFFF}, /* GENERAL_REGS */ \ | |
355 {0x020000}, /* C_REGS */ \ | |
356 {0x0FFFFF} /* ALL_REGS */ \ | |
357 } | |
358 | |
359 /* The same information, inverted: | |
360 Return the class number of the smallest class containing | |
361 reg number REGNO. This could be a conditional expression | |
362 or could index an array. */ | |
363 | |
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364 extern const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER]; |
0 | 365 #define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO] |
366 | |
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367 /* When this hook returns true for MODE, the compiler allows |
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368 registers explicitly used in the rtl to be used as spill registers |
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369 but prevents the compiler from extending the lifetime of these |
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370 registers. */ |
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371 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
0 | 372 |
373 /* The class value for index registers, and the one for base regs. */ | |
374 #define INDEX_REG_CLASS NO_REGS | |
375 #define BASE_REG_CLASS GENERAL_REGS | |
376 | |
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377 /* Convenience wrappers around insn_const_int_ok_for_constraint. */ |
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378 #define CONST_OK_FOR_I(VALUE) \ |
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379 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_I) |
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380 #define CONST_OK_FOR_J(VALUE) \ |
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381 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_J) |
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382 #define CONST_OK_FOR_L(VALUE) \ |
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383 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_L) |
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384 #define CONST_OK_FOR_K(VALUE) \ |
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385 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_K) |
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386 #define CONST_OK_FOR_M(VALUE) \ |
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387 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_M) |
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388 #define CONST_OK_FOR_N(VALUE) \ |
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389 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_N) |
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390 #define CONST_OK_FOR_O(VALUE) \ |
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391 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_O) |
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392 #define CONST_OK_FOR_P(VALUE) \ |
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393 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_P) |
0 | 394 |
395 /* Given an rtx X being reloaded into a reg required to be | |
396 in class CLASS, return the class of reg to actually use. | |
397 In general this is just CLASS; but on some machines | |
398 in some cases it is preferable to use a more restrictive class. */ | |
399 #define PREFERRED_RELOAD_CLASS(X, CLASS) mcore_reload_class (X, CLASS) | |
400 | |
401 /* Return the register class of a scratch register needed to copy IN into | |
402 or out of a register in CLASS in MODE. If it can be done directly, | |
403 NO_REGS is returned. */ | |
404 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \ | |
405 mcore_secondary_reload_class (CLASS, MODE, X) | |
406 | |
407 /* Return the maximum number of consecutive registers | |
408 needed to represent mode MODE in a register of class CLASS. | |
409 | |
410 On MCore this is the size of MODE in words. */ | |
411 #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
412 (ROUND_ADVANCE (GET_MODE_SIZE (MODE))) | |
413 | |
414 /* Stack layout; function entry, exit and calling. */ | |
415 | |
416 /* Define the number of register that can hold parameters. | |
417 These two macros are used only in other macro definitions below. */ | |
418 #define NPARM_REGS 6 | |
419 #define FIRST_PARM_REG 2 | |
420 #define FIRST_RET_REG 2 | |
421 | |
422 /* Define this if pushing a word on the stack | |
423 makes the stack pointer a smaller address. */ | |
424 #define STACK_GROWS_DOWNWARD | |
425 | |
426 /* Offset within stack frame to start allocating local variables at. | |
427 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
428 first local allocated. Otherwise, it is the offset to the BEGINNING | |
429 of the first local allocated. */ | |
430 #define STARTING_FRAME_OFFSET 0 | |
431 | |
432 /* If defined, the maximum amount of space required for outgoing arguments | |
433 will be computed and placed into the variable | |
434 `crtl->outgoing_args_size'. No space will be pushed | |
435 onto the stack for each call; instead, the function prologue should | |
436 increase the stack frame size by this amount. */ | |
437 #define ACCUMULATE_OUTGOING_ARGS 1 | |
438 | |
439 /* Offset of first parameter from the argument pointer register value. */ | |
440 #define FIRST_PARM_OFFSET(FNDECL) 0 | |
441 | |
442 /* Define how to find the value returned by a function. | |
443 VALTYPE is the data type of the value (as a tree). | |
444 If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
445 otherwise, FUNC is 0. */ | |
446 #define FUNCTION_VALUE(VALTYPE, FUNC) mcore_function_value (VALTYPE, FUNC) | |
447 | |
448 /* Don't default to pcc-struct-return, because gcc is the only compiler, and | |
449 we want to retain compatibility with older gcc versions. */ | |
450 #define DEFAULT_PCC_STRUCT_RETURN 0 | |
451 | |
452 /* Define how to find the value returned by a library function | |
453 assuming the value has mode MODE. */ | |
454 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RET_REG) | |
455 | |
456 /* 1 if N is a possible register number for a function value. | |
457 On the MCore, only r4 can return results. */ | |
458 #define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == FIRST_RET_REG) | |
459 | |
460 /* 1 if N is a possible register number for function argument passing. */ | |
461 #define FUNCTION_ARG_REGNO_P(REGNO) \ | |
462 ((REGNO) >= FIRST_PARM_REG && (REGNO) < (NPARM_REGS + FIRST_PARM_REG)) | |
463 | |
464 /* Define a data type for recording info about an argument list | |
465 during the scan of that argument list. This data type should | |
466 hold all necessary information about the function itself | |
467 and about the args processed so far, enough to enable macros | |
468 such as FUNCTION_ARG to determine where the next arg should go. | |
469 | |
470 On MCore, this is a single integer, which is a number of words | |
471 of arguments scanned so far (including the invisible argument, | |
472 if any, which holds the structure-value-address). | |
473 Thus NARGREGS or more means all following args should go on the stack. */ | |
474 #define CUMULATIVE_ARGS int | |
475 | |
476 #define ROUND_ADVANCE(SIZE) \ | |
477 ((SIZE + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
478 | |
479 /* Round a register number up to a proper boundary for an arg of mode | |
480 MODE. | |
481 | |
482 We round to an even reg for things larger than a word. */ | |
483 #define ROUND_REG(X, MODE) \ | |
484 ((TARGET_8ALIGN \ | |
485 && GET_MODE_UNIT_SIZE ((MODE)) > UNITS_PER_WORD) \ | |
486 ? ((X) + ((X) & 1)) : (X)) | |
487 | |
488 | |
489 /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
490 for a call to a function whose data type is FNTYPE. | |
491 For a library call, FNTYPE is 0. | |
492 | |
493 On MCore, the offset always starts at 0: the first parm reg is always | |
494 the same reg. */ | |
495 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ | |
496 ((CUM) = 0) | |
497 | |
498 /* Call the function profiler with a given profile label. */ | |
499 #define FUNCTION_PROFILER(STREAM,LABELNO) \ | |
500 { \ | |
501 fprintf (STREAM, " trap 1\n"); \ | |
502 fprintf (STREAM, " .align 2\n"); \ | |
503 fprintf (STREAM, " .long LP%d\n", (LABELNO)); \ | |
504 } | |
505 | |
506 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
507 the stack pointer does not matter. The value is tested only in | |
508 functions that have frame pointers. | |
509 No definition is equivalent to always zero. */ | |
510 #define EXIT_IGNORE_STACK 0 | |
511 | |
512 /* Length in units of the trampoline for entering a nested function. */ | |
513 #define TRAMPOLINE_SIZE 12 | |
514 | |
515 /* Alignment required for a trampoline in bits. */ | |
516 #define TRAMPOLINE_ALIGNMENT 32 | |
517 | |
518 /* Macros to check register numbers against specific register classes. */ | |
519 | |
520 /* These assume that REGNO is a hard or pseudo reg number. | |
521 They give nonzero only if REGNO is a hard reg of the suitable class | |
522 or a pseudo reg currently allocated to a suitable hard reg. | |
523 Since they use reg_renumber, they are safe only once reg_renumber | |
524 has been allocated, which happens in local-alloc.c. */ | |
525 #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
526 ((REGNO) < AP_REG || (unsigned) reg_renumber[(REGNO)] < AP_REG) | |
527 | |
528 #define REGNO_OK_FOR_INDEX_P(REGNO) 0 | |
529 | |
530 /* Maximum number of registers that can appear in a valid memory | |
531 address. */ | |
532 #define MAX_REGS_PER_ADDRESS 1 | |
533 | |
534 /* Recognize any constant value that is a valid address. */ | |
535 #define CONSTANT_ADDRESS_P(X) (GET_CODE (X) == LABEL_REF) | |
536 | |
537 /* Nonzero if the constant value X is a legitimate general operand. | |
538 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. | |
539 | |
540 On the MCore, allow anything but a double. */ | |
541 #define LEGITIMATE_CONSTANT_P(X) (GET_CODE(X) != CONST_DOUBLE \ | |
542 && CONSTANT_P (X)) | |
543 | |
544 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
545 and check its validity for a certain class. | |
546 We have two alternate definitions for each of them. | |
547 The usual definition accepts all pseudo regs; the other rejects | |
548 them unless they have been allocated suitable hard regs. | |
549 The symbol REG_OK_STRICT causes the latter definition to be used. */ | |
550 #ifndef REG_OK_STRICT | |
551 | |
552 /* Nonzero if X is a hard reg that can be used as a base reg | |
553 or if it is a pseudo reg. */ | |
554 #define REG_OK_FOR_BASE_P(X) \ | |
555 (REGNO (X) <= 16 || REGNO (X) >= FIRST_PSEUDO_REGISTER) | |
556 | |
557 /* Nonzero if X is a hard reg that can be used as an index | |
558 or if it is a pseudo reg. */ | |
559 #define REG_OK_FOR_INDEX_P(X) 0 | |
560 | |
561 #else | |
562 | |
563 /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
564 #define REG_OK_FOR_BASE_P(X) \ | |
565 REGNO_OK_FOR_BASE_P (REGNO (X)) | |
566 | |
567 /* Nonzero if X is a hard reg that can be used as an index. */ | |
568 #define REG_OK_FOR_INDEX_P(X) 0 | |
569 | |
570 #endif | |
571 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
572 that is a valid memory address for an instruction. | |
573 The MODE argument is the machine mode for the MEM expression | |
574 that wants to use this address. | |
575 | |
576 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */ | |
577 #define BASE_REGISTER_RTX_P(X) \ | |
578 (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) | |
579 | |
580 #define INDEX_REGISTER_RTX_P(X) \ | |
581 (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) | |
582 | |
583 | |
584 /* Jump to LABEL if X is a valid address RTX. This must also take | |
585 REG_OK_STRICT into account when deciding about valid registers, but it uses | |
586 the above macros so we are in luck. | |
587 | |
588 Allow REG | |
589 REG+disp | |
590 | |
591 A legitimate index for a QI is 0..15, for HI is 0..30, for SI is 0..60, | |
592 and for DI is 0..56 because we use two SI loads, etc. */ | |
593 #define GO_IF_LEGITIMATE_INDEX(MODE, REGNO, OP, LABEL) \ | |
594 do \ | |
595 { \ | |
596 if (GET_CODE (OP) == CONST_INT) \ | |
597 { \ | |
598 if (GET_MODE_SIZE (MODE) >= 4 \ | |
599 && (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 4) == 0 \ | |
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600 && ((unsigned HOST_WIDE_INT) INTVAL (OP)) \ |
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601 <= (unsigned HOST_WIDE_INT) 64 - GET_MODE_SIZE (MODE)) \ |
0 | 602 goto LABEL; \ |
603 if (GET_MODE_SIZE (MODE) == 2 \ | |
604 && (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 2) == 0 \ | |
605 && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 30) \ | |
606 goto LABEL; \ | |
607 if (GET_MODE_SIZE (MODE) == 1 \ | |
608 && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 15) \ | |
609 goto LABEL; \ | |
610 } \ | |
611 } \ | |
612 while (0) | |
613 | |
614 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ | |
615 { \ | |
616 if (BASE_REGISTER_RTX_P (X)) \ | |
617 goto LABEL; \ | |
618 else if (GET_CODE (X) == PLUS || GET_CODE (X) == LO_SUM) \ | |
619 { \ | |
620 rtx xop0 = XEXP (X,0); \ | |
621 rtx xop1 = XEXP (X,1); \ | |
622 if (BASE_REGISTER_RTX_P (xop0)) \ | |
623 GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop0), xop1, LABEL); \ | |
624 if (BASE_REGISTER_RTX_P (xop1)) \ | |
625 GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop1), xop0, LABEL); \ | |
626 } \ | |
627 } | |
628 | |
629 /* Specify the machine mode that this machine uses | |
630 for the index in the tablejump instruction. */ | |
631 #define CASE_VECTOR_MODE SImode | |
632 | |
633 /* 'char' is signed by default. */ | |
634 #define DEFAULT_SIGNED_CHAR 0 | |
635 | |
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636 #undef SIZE_TYPE |
0 | 637 #define SIZE_TYPE "unsigned int" |
638 | |
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639 #undef PTRDIFF_TYPE |
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640 #define PTRDIFF_TYPE "int" |
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641 |
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642 #undef WCHAR_TYPE |
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643 #define WCHAR_TYPE "long int" |
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644 |
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645 #undef WCHAR_TYPE_SIZE |
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646 #define WCHAR_TYPE_SIZE BITS_PER_WORD |
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647 |
0 | 648 /* Max number of bytes we can move from memory to memory |
649 in one reasonably fast instruction. */ | |
650 #define MOVE_MAX 4 | |
651 | |
652 /* Define if operations between registers always perform the operation | |
653 on the full register even if a narrower mode is specified. */ | |
654 #define WORD_REGISTER_OPERATIONS | |
655 | |
656 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
657 will either zero-extend or sign-extend. The value of this macro should | |
658 be the code that says which one of the two operations is implicitly | |
659 done, UNKNOWN if none. */ | |
660 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
661 | |
662 /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
663 #define SLOW_BYTE_ACCESS TARGET_SLOW_BYTES | |
664 | |
665 /* Shift counts are truncated to 6-bits (0 to 63) instead of the expected | |
666 5-bits, so we can not define SHIFT_COUNT_TRUNCATED to true for this | |
667 target. */ | |
668 #define SHIFT_COUNT_TRUNCATED 0 | |
669 | |
670 /* All integers have the same format so truncation is easy. */ | |
671 #define TRULY_NOOP_TRUNCATION(OUTPREC,INPREC) 1 | |
672 | |
673 /* Define this if addresses of constant functions | |
674 shouldn't be put through pseudo regs where they can be cse'd. | |
675 Desirable on machines where ordinary constants are expensive | |
676 but a CALL with constant address is cheap. */ | |
677 /* Why is this defined??? -- dac */ | |
678 #define NO_FUNCTION_CSE 1 | |
679 | |
680 /* The machine modes of pointers and functions. */ | |
681 #define Pmode SImode | |
682 #define FUNCTION_MODE Pmode | |
683 | |
684 /* Compute extra cost of moving data between one register class | |
685 and another. All register moves are cheap. */ | |
686 #define REGISTER_MOVE_COST(MODE, SRCCLASS, DSTCLASS) 2 | |
687 | |
688 #define WORD_REGISTER_OPERATIONS | |
689 | |
690 /* Assembler output control. */ | |
691 #define ASM_COMMENT_START "\t//" | |
692 | |
693 #define ASM_APP_ON "// inline asm begin\n" | |
694 #define ASM_APP_OFF "// inline asm end\n" | |
695 | |
696 #define FILE_ASM_OP "\t.file\n" | |
697 | |
698 /* Switch to the text or data segment. */ | |
699 #define TEXT_SECTION_ASM_OP "\t.text" | |
700 #define DATA_SECTION_ASM_OP "\t.data" | |
701 | |
702 /* Switch into a generic section. */ | |
703 #undef TARGET_ASM_NAMED_SECTION | |
704 #define TARGET_ASM_NAMED_SECTION mcore_asm_named_section | |
705 | |
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706 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, LK_REG) |
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707 |
0 | 708 /* This is how to output an insn to push a register on the stack. |
709 It need not be very fast code. */ | |
710 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
711 fprintf (FILE, "\tsubi\t %s,%d\n\tstw\t %s,(%s)\n", \ | |
712 reg_names[STACK_POINTER_REGNUM], \ | |
713 (STACK_BOUNDARY / BITS_PER_UNIT), \ | |
714 reg_names[REGNO], \ | |
715 reg_names[STACK_POINTER_REGNUM]) | |
716 | |
717 /* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH. */ | |
718 #define REG_PUSH_LENGTH 2 | |
719 | |
720 /* This is how to output an insn to pop a register from the stack. */ | |
721 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
722 fprintf (FILE, "\tldw\t %s,(%s)\n\taddi\t %s,%d\n", \ | |
723 reg_names[REGNO], \ | |
724 reg_names[STACK_POINTER_REGNUM], \ | |
725 reg_names[STACK_POINTER_REGNUM], \ | |
726 (STACK_BOUNDARY / BITS_PER_UNIT)) | |
727 | |
728 | |
729 /* Output a reference to a label. */ | |
730 #undef ASM_OUTPUT_LABELREF | |
731 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \ | |
732 fprintf (STREAM, "%s%s", USER_LABEL_PREFIX, \ | |
733 (* targetm.strip_name_encoding) (NAME)) | |
734 | |
735 /* This is how to output an assembler line | |
736 that says to advance the location counter | |
737 to a multiple of 2**LOG bytes. */ | |
738 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
739 if ((LOG) != 0) \ | |
740 fprintf (FILE, "\t.align\t%d\n", LOG) | |
741 | |
742 #ifndef ASM_DECLARE_RESULT | |
743 #define ASM_DECLARE_RESULT(FILE, RESULT) | |
744 #endif | |
745 | |
746 #define MULTIPLE_SYMBOL_SPACES 1 | |
747 | |
748 #define SUPPORTS_ONE_ONLY 1 | |
749 | |
750 /* A pair of macros to output things for the callgraph data. | |
751 VALUE means (to the tools that reads this info later): | |
752 0 a call from src to dst | |
753 1 the call is special (e.g. dst is "unknown" or "alloca") | |
754 2 the call is special (e.g., the src is a table instead of routine) | |
755 | |
756 Frame sizes are augmented with timestamps to help later tools | |
757 differentiate between static entities with same names in different | |
758 files. */ | |
759 extern long mcore_current_compilation_timestamp; | |
760 #define ASM_OUTPUT_CG_NODE(FILE,SRCNAME,VALUE) \ | |
761 do \ | |
762 { \ | |
763 if (mcore_current_compilation_timestamp == 0) \ | |
764 mcore_current_compilation_timestamp = time (0); \ | |
765 fprintf ((FILE),"\t.equ\t__$frame$size$_%s_$_%08lx,%d\n", \ | |
766 (SRCNAME), mcore_current_compilation_timestamp, (VALUE)); \ | |
767 } \ | |
768 while (0) | |
769 | |
770 #define ASM_OUTPUT_CG_EDGE(FILE,SRCNAME,DSTNAME,VALUE) \ | |
771 do \ | |
772 { \ | |
773 fprintf ((FILE),"\t.equ\t__$function$call$_%s_$_%s,%d\n", \ | |
774 (SRCNAME), (DSTNAME), (VALUE)); \ | |
775 } \ | |
776 while (0) | |
777 | |
778 /* Globalizing directive for a label. */ | |
779 #define GLOBAL_ASM_OP "\t.export\t" | |
780 | |
781 /* The prefix to add to user-visible assembler symbols. */ | |
782 #undef USER_LABEL_PREFIX | |
783 #define USER_LABEL_PREFIX "" | |
784 | |
785 /* Make an internal label into a string. */ | |
786 #undef ASM_GENERATE_INTERNAL_LABEL | |
787 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ | |
788 sprintf (STRING, "*.%s%ld", PREFIX, (long) NUM) | |
789 | |
790 /* Jump tables must be 32 bit aligned. */ | |
791 #undef ASM_OUTPUT_CASE_LABEL | |
792 #define ASM_OUTPUT_CASE_LABEL(STREAM,PREFIX,NUM,TABLE) \ | |
793 fprintf (STREAM, "\t.align 2\n.%s%d:\n", PREFIX, NUM); | |
794 | |
795 /* Output a relative address. Not needed since jump tables are absolute | |
796 but we must define it anyway. */ | |
797 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,BODY,VALUE,REL) \ | |
798 fputs ("- - - ASM_OUTPUT_ADDR_DIFF_ELT called!\n", STREAM) | |
799 | |
800 /* Output an element of a dispatch table. */ | |
801 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \ | |
802 fprintf (STREAM, "\t.long\t.L%d\n", VALUE) | |
803 | |
804 /* Output various types of constants. */ | |
805 | |
806 /* This is how to output an assembler line | |
807 that says to advance the location counter by SIZE bytes. */ | |
808 #undef ASM_OUTPUT_SKIP | |
809 #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
810 fprintf (FILE, "\t.fill %d, 1\n", (int)(SIZE)) | |
811 | |
812 /* This says how to output an assembler line | |
813 to define a global common symbol, with alignment information. */ | |
814 /* XXX - for now we ignore the alignment. */ | |
815 #undef ASM_OUTPUT_ALIGNED_COMMON | |
816 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ | |
817 do \ | |
818 { \ | |
819 if (mcore_dllexport_name_p (NAME)) \ | |
820 MCORE_EXPORT_NAME (FILE, NAME) \ | |
821 if (! mcore_dllimport_name_p (NAME)) \ | |
822 { \ | |
823 fputs ("\t.comm\t", FILE); \ | |
824 assemble_name (FILE, NAME); \ | |
825 fprintf (FILE, ",%lu\n", (unsigned long)(SIZE)); \ | |
826 } \ | |
827 } \ | |
828 while (0) | |
829 | |
830 /* This says how to output an assembler line | |
831 to define a local common symbol.... */ | |
832 #undef ASM_OUTPUT_LOCAL | |
833 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ | |
834 (fputs ("\t.lcomm\t", FILE), \ | |
835 assemble_name (FILE, NAME), \ | |
836 fprintf (FILE, ",%d\n", (int)SIZE)) | |
837 | |
838 /* ... and how to define a local common symbol whose alignment | |
839 we wish to specify. ALIGN comes in as bits, we have to turn | |
840 it into bytes. */ | |
841 #undef ASM_OUTPUT_ALIGNED_LOCAL | |
842 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ | |
843 do \ | |
844 { \ | |
845 fputs ("\t.bss\t", (FILE)); \ | |
846 assemble_name ((FILE), (NAME)); \ | |
847 fprintf ((FILE), ",%d,%d\n", (int)(SIZE), (ALIGN) / BITS_PER_UNIT);\ | |
848 } \ | |
849 while (0) | |
850 | |
851 #endif /* ! GCC_MCORE_H */ |