Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/pa/pa.h @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
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date | Tue, 22 Mar 2011 17:18:12 +0900 |
parents | 77e2b8dfacca |
children | 04ced10e8804 |
rev | line source |
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0 | 1 /* Definitions of target machine for GNU compiler, for the HP Spectrum. |
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, | |
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3 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 |
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4 Free Software Foundation, Inc. |
0 | 5 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support |
6 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for | |
7 Software Science at the University of Utah. | |
8 | |
9 This file is part of GCC. | |
10 | |
11 GCC is free software; you can redistribute it and/or modify | |
12 it under the terms of the GNU General Public License as published by | |
13 the Free Software Foundation; either version 3, or (at your option) | |
14 any later version. | |
15 | |
16 GCC is distributed in the hope that it will be useful, | |
17 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 GNU General Public License for more details. | |
20 | |
21 You should have received a copy of the GNU General Public License | |
22 along with GCC; see the file COPYING3. If not see | |
23 <http://www.gnu.org/licenses/>. */ | |
24 | |
25 /* For long call handling. */ | |
26 extern unsigned long total_code_bytes; | |
27 | |
28 /* Which processor to schedule for. */ | |
29 | |
30 enum processor_type | |
31 { | |
32 PROCESSOR_700, | |
33 PROCESSOR_7100, | |
34 PROCESSOR_7100LC, | |
35 PROCESSOR_7200, | |
36 PROCESSOR_7300, | |
37 PROCESSOR_8000 | |
38 }; | |
39 | |
40 /* For -mschedule= option. */ | |
41 extern enum processor_type pa_cpu; | |
42 | |
43 /* For -munix= option. */ | |
44 extern int flag_pa_unix; | |
45 | |
46 #define pa_cpu_attr ((enum attr_cpu)pa_cpu) | |
47 | |
48 /* Print subsidiary information on the compiler version in use. */ | |
49 | |
50 #define TARGET_VERSION fputs (" (hppa)", stderr); | |
51 | |
52 #define TARGET_PA_10 (!TARGET_PA_11 && !TARGET_PA_20) | |
53 | |
54 /* Generate code for the HPPA 2.0 architecture in 64bit mode. */ | |
55 #ifndef TARGET_64BIT | |
56 #define TARGET_64BIT 0 | |
57 #endif | |
58 | |
59 /* Generate code for ELF32 ABI. */ | |
60 #ifndef TARGET_ELF32 | |
61 #define TARGET_ELF32 0 | |
62 #endif | |
63 | |
64 /* Generate code for SOM 32bit ABI. */ | |
65 #ifndef TARGET_SOM | |
66 #define TARGET_SOM 0 | |
67 #endif | |
68 | |
69 /* HP-UX UNIX features. */ | |
70 #ifndef TARGET_HPUX | |
71 #define TARGET_HPUX 0 | |
72 #endif | |
73 | |
74 /* HP-UX 10.10 UNIX 95 features. */ | |
75 #ifndef TARGET_HPUX_10_10 | |
76 #define TARGET_HPUX_10_10 0 | |
77 #endif | |
78 | |
79 /* HP-UX 11.* features (11.00, 11.11, 11.23, etc.) */ | |
80 #ifndef TARGET_HPUX_11 | |
81 #define TARGET_HPUX_11 0 | |
82 #endif | |
83 | |
84 /* HP-UX 11i multibyte and UNIX 98 extensions. */ | |
85 #ifndef TARGET_HPUX_11_11 | |
86 #define TARGET_HPUX_11_11 0 | |
87 #endif | |
88 | |
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89 /* HP-UX long double library. */ |
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90 #ifndef HPUX_LONG_DOUBLE_LIBRARY |
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91 #define HPUX_LONG_DOUBLE_LIBRARY 0 |
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92 #endif |
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93 |
0 | 94 /* The following three defines are potential target switches. The current |
95 defines are optimal given the current capabilities of GAS and GNU ld. */ | |
96 | |
97 /* Define to a C expression evaluating to true to use long absolute calls. | |
98 Currently, only the HP assembler and SOM linker support long absolute | |
99 calls. They are used only in non-pic code. */ | |
100 #define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS) | |
101 | |
102 /* Define to a C expression evaluating to true to use long PIC symbol | |
103 difference calls. Long PIC symbol difference calls are only used with | |
104 the HP assembler and linker. The HP assembler detects this instruction | |
105 sequence and treats it as long pc-relative call. Currently, GAS only | |
106 allows a difference of two symbols in the same subspace, and it doesn't | |
107 detect the sequence as a pc-relative call. */ | |
108 #define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS && TARGET_HPUX) | |
109 | |
110 /* Define to a C expression evaluating to true to use long PIC | |
111 pc-relative calls. Long PIC pc-relative calls are only used with | |
112 GAS. Currently, they are usable for calls which bind local to a | |
113 module but not for external calls. */ | |
114 #define TARGET_LONG_PIC_PCREL_CALL 0 | |
115 | |
116 /* Define to a C expression evaluating to true to use SOM secondary | |
117 definition symbols for weak support. Linker support for secondary | |
118 definition symbols is buggy prior to HP-UX 11.X. */ | |
119 #define TARGET_SOM_SDEF 0 | |
120 | |
121 /* Define to a C expression evaluating to true to save the entry value | |
122 of SP in the current frame marker. This is normally unnecessary. | |
123 However, the HP-UX unwind library looks at the SAVE_SP callinfo flag. | |
124 HP compilers don't use this flag but it is supported by the assembler. | |
125 We set this flag to indicate that register %r3 has been saved at the | |
126 start of the frame. Thus, when the HP unwind library is used, we | |
127 need to generate additional code to save SP into the frame marker. */ | |
128 #define TARGET_HPUX_UNWIND_LIBRARY 0 | |
129 | |
130 #ifndef TARGET_DEFAULT | |
131 #define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY | MASK_BIG_SWITCH) | |
132 #endif | |
133 | |
134 #ifndef TARGET_CPU_DEFAULT | |
135 #define TARGET_CPU_DEFAULT 0 | |
136 #endif | |
137 | |
138 #ifndef TARGET_SCHED_DEFAULT | |
139 #define TARGET_SCHED_DEFAULT PROCESSOR_8000 | |
140 #endif | |
141 | |
142 /* Support for a compile-time default CPU, et cetera. The rules are: | |
143 --with-schedule is ignored if -mschedule is specified. | |
144 --with-arch is ignored if -march is specified. */ | |
145 #define OPTION_DEFAULT_SPECS \ | |
146 {"arch", "%{!march=*:-march=%(VALUE)}" }, \ | |
147 {"schedule", "%{!mschedule=*:-mschedule=%(VALUE)}" } | |
148 | |
149 /* Specify the dialect of assembler to use. New mnemonics is dialect one | |
150 and the old mnemonics are dialect zero. */ | |
151 #define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0) | |
152 | |
153 /* Override some settings from dbxelf.h. */ | |
154 | |
155 /* We do not have to be compatible with dbx, so we enable gdb extensions | |
156 by default. */ | |
157 #define DEFAULT_GDB_EXTENSIONS 1 | |
158 | |
159 /* This used to be zero (no max length), but big enums and such can | |
160 cause huge strings which killed gas. | |
161 | |
162 We also have to avoid lossage in dbxout.c -- it does not compute the | |
163 string size accurately, so we are real conservative here. */ | |
164 #undef DBX_CONTIN_LENGTH | |
165 #define DBX_CONTIN_LENGTH 3000 | |
166 | |
167 /* GDB always assumes the current function's frame begins at the value | |
168 of the stack pointer upon entry to the current function. Accessing | |
169 local variables and parameters passed on the stack is done using the | |
170 base of the frame + an offset provided by GCC. | |
171 | |
172 For functions which have frame pointers this method works fine; | |
173 the (frame pointer) == (stack pointer at function entry) and GCC provides | |
174 an offset relative to the frame pointer. | |
175 | |
176 This loses for functions without a frame pointer; GCC provides an offset | |
177 which is relative to the stack pointer after adjusting for the function's | |
178 frame size. GDB would prefer the offset to be relative to the value of | |
179 the stack pointer at the function's entry. Yuk! */ | |
180 #define DEBUGGER_AUTO_OFFSET(X) \ | |
181 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \ | |
182 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0))) | |
183 | |
184 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \ | |
185 ((GET_CODE (X) == PLUS ? OFFSET : 0) \ | |
186 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0))) | |
187 | |
188 #define TARGET_CPU_CPP_BUILTINS() \ | |
189 do { \ | |
190 builtin_assert("cpu=hppa"); \ | |
191 builtin_assert("machine=hppa"); \ | |
192 builtin_define("__hppa"); \ | |
193 builtin_define("__hppa__"); \ | |
194 if (TARGET_PA_20) \ | |
195 builtin_define("_PA_RISC2_0"); \ | |
196 else if (TARGET_PA_11) \ | |
197 builtin_define("_PA_RISC1_1"); \ | |
198 else \ | |
199 builtin_define("_PA_RISC1_0"); \ | |
200 } while (0) | |
201 | |
202 /* An old set of OS defines for various BSD-like systems. */ | |
203 #define TARGET_OS_CPP_BUILTINS() \ | |
204 do \ | |
205 { \ | |
206 builtin_define_std ("REVARGV"); \ | |
207 builtin_define_std ("hp800"); \ | |
208 builtin_define_std ("hp9000"); \ | |
209 builtin_define_std ("hp9k8"); \ | |
210 if (!c_dialect_cxx () && !flag_iso) \ | |
211 builtin_define ("hppa"); \ | |
212 builtin_define_std ("spectrum"); \ | |
213 builtin_define_std ("unix"); \ | |
214 builtin_assert ("system=bsd"); \ | |
215 builtin_assert ("system=unix"); \ | |
216 } \ | |
217 while (0) | |
218 | |
219 #define CC1_SPEC "%{pg:} %{p:}" | |
220 | |
221 #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}" | |
222 | |
223 /* We don't want -lg. */ | |
224 #ifndef LIB_SPEC | |
225 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}" | |
226 #endif | |
227 | |
228 /* Make gcc agree with <machine/ansi.h> */ | |
229 | |
230 #define SIZE_TYPE "unsigned int" | |
231 #define PTRDIFF_TYPE "int" | |
232 #define WCHAR_TYPE "unsigned int" | |
233 #define WCHAR_TYPE_SIZE 32 | |
234 | |
235 /* target machine storage layout */ | |
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236 typedef struct GTY(()) machine_function |
0 | 237 { |
238 /* Flag indicating that a .NSUBSPA directive has been output for | |
239 this function. */ | |
240 int in_nsubspa; | |
241 } machine_function; | |
242 | |
243 /* Define this macro if it is advisable to hold scalars in registers | |
244 in a wider mode than that declared by the program. In such cases, | |
245 the value is constrained to be within the bounds of the declared | |
246 type, but kept valid in the wider mode. The signedness of the | |
247 extension may differ from that of the type. */ | |
248 | |
249 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
250 if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
251 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
252 (MODE) = word_mode; | |
253 | |
254 /* Define this if most significant bit is lowest numbered | |
255 in instructions that operate on numbered bit-fields. */ | |
256 #define BITS_BIG_ENDIAN 1 | |
257 | |
258 /* Define this if most significant byte of a word is the lowest numbered. */ | |
259 /* That is true on the HP-PA. */ | |
260 #define BYTES_BIG_ENDIAN 1 | |
261 | |
262 /* Define this if most significant word of a multiword number is lowest | |
263 numbered. */ | |
264 #define WORDS_BIG_ENDIAN 1 | |
265 | |
266 #define MAX_BITS_PER_WORD 64 | |
267 | |
268 /* Width of a word, in units (bytes). */ | |
269 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) | |
270 | |
271 /* Minimum number of units in a word. If this is undefined, the default | |
272 is UNITS_PER_WORD. Otherwise, it is the constant value that is the | |
273 smallest value that UNITS_PER_WORD can have at run-time. | |
274 | |
275 FIXME: This needs to be 4 when TARGET_64BIT is true to suppress the | |
276 building of various TImode routines in libgcc. The HP runtime | |
277 specification doesn't provide the alignment requirements and calling | |
278 conventions for TImode variables. */ | |
279 #define MIN_UNITS_PER_WORD 4 | |
280 | |
281 /* The widest floating point format supported by the hardware. Note that | |
282 setting this influences some Ada floating point type sizes, currently | |
283 required for GNAT to operate properly. */ | |
284 #define WIDEST_HARDWARE_FP_SIZE 64 | |
285 | |
286 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
287 #define PARM_BOUNDARY BITS_PER_WORD | |
288 | |
289 /* Largest alignment required for any stack parameter, in bits. | |
290 Don't define this if it is equal to PARM_BOUNDARY */ | |
291 #define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT | |
292 | |
293 /* Boundary (in *bits*) on which stack pointer is always aligned; | |
294 certain optimizations in combine depend on this. | |
295 | |
296 The HP-UX runtime documents mandate 64-byte and 16-byte alignment for | |
297 the stack on the 32 and 64-bit ports, respectively. However, we | |
298 are only guaranteed that the stack is aligned to BIGGEST_ALIGNMENT | |
299 in main. Thus, we treat the former as the preferred alignment. */ | |
300 #define STACK_BOUNDARY BIGGEST_ALIGNMENT | |
301 #define PREFERRED_STACK_BOUNDARY (TARGET_64BIT ? 128 : 512) | |
302 | |
303 /* Allocation boundary (in *bits*) for the code of a function. */ | |
304 #define FUNCTION_BOUNDARY BITS_PER_WORD | |
305 | |
306 /* Alignment of field after `int : 0' in a structure. */ | |
307 #define EMPTY_FIELD_BOUNDARY 32 | |
308 | |
309 /* Every structure's size must be a multiple of this. */ | |
310 #define STRUCTURE_SIZE_BOUNDARY 8 | |
311 | |
312 /* A bit-field declared as `int' forces `int' alignment for the struct. */ | |
313 #define PCC_BITFIELD_TYPE_MATTERS 1 | |
314 | |
315 /* No data type wants to be aligned rounder than this. */ | |
316 #define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD) | |
317 | |
318 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */ | |
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319 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ |
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320 (TREE_CODE (EXP) == STRING_CST \ |
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321 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) |
0 | 322 |
323 /* Make arrays of chars word-aligned for the same reasons. */ | |
324 #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
325 (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
326 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
327 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
328 | |
329 /* Set this nonzero if move instructions will actually fail to work | |
330 when given unaligned data. */ | |
331 #define STRICT_ALIGNMENT 1 | |
332 | |
333 /* Value is 1 if it is a good idea to tie two pseudo registers | |
334 when one has mode MODE1 and one has mode MODE2. | |
335 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
336 for any hard reg, then this must be 0 for correct output. */ | |
337 #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
338 pa_modes_tieable_p (MODE1, MODE2) | |
339 | |
340 /* Specify the registers used for certain standard purposes. | |
341 The values of these macros are register numbers. */ | |
342 | |
343 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */ | |
344 /* #define PC_REGNUM */ | |
345 | |
346 /* Register to use for pushing function arguments. */ | |
347 #define STACK_POINTER_REGNUM 30 | |
348 | |
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349 /* Fixed register for local variable access. Always eliminated. */ |
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350 #define FRAME_POINTER_REGNUM (TARGET_64BIT ? 61 : 89) |
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351 |
0 | 352 /* Base register for access to local variables of the function. */ |
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353 #define HARD_FRAME_POINTER_REGNUM 3 |
0 | 354 |
355 /* Don't allow hard registers to be renamed into r2 unless r2 | |
356 is already live or already being saved (due to eh). */ | |
357 | |
358 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ | |
359 ((NEW_REG) != 2 || df_regs_ever_live_p (2) || crtl->calls_eh_return) | |
360 | |
361 /* Base register for access to arguments of the function. */ | |
362 #define ARG_POINTER_REGNUM (TARGET_64BIT ? 29 : 3) | |
363 | |
364 /* Register in which static-chain is passed to a function. */ | |
365 #define STATIC_CHAIN_REGNUM (TARGET_64BIT ? 31 : 29) | |
366 | |
367 /* Register used to address the offset table for position-independent | |
368 data references. */ | |
369 #define PIC_OFFSET_TABLE_REGNUM \ | |
370 (flag_pic ? (TARGET_64BIT ? 27 : 19) : INVALID_REGNUM) | |
371 | |
372 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1 | |
373 | |
374 /* Function to return the rtx used to save the pic offset table register | |
375 across function calls. */ | |
376 extern struct rtx_def *hppa_pic_save_rtx (void); | |
377 | |
378 #define DEFAULT_PCC_STRUCT_RETURN 0 | |
379 | |
380 /* Register in which address to store a structure value | |
381 is passed to a function. */ | |
382 #define PA_STRUCT_VALUE_REGNUM 28 | |
383 | |
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384 /* Definitions for register eliminations. |
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385 |
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386 We have two registers that can be eliminated. First, the frame pointer |
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387 register can often be eliminated in favor of the stack pointer register. |
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388 Secondly, the argument pointer register can always be eliminated in the |
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389 32-bit runtimes. */ |
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390 |
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391 /* This is an array of structures. Each structure initializes one pair |
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392 of eliminable registers. The "from" register number is given first, |
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393 followed by "to". Eliminations of the same "from" register are listed |
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394 in order of preference. |
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395 |
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396 The argument pointer cannot be eliminated in the 64-bit runtime. It |
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397 is the same register as the hard frame pointer in the 32-bit runtime. |
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398 So, it does not need to be listed. */ |
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399 #define ELIMINABLE_REGS \ |
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400 {{ HARD_FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ |
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401 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ |
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402 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM} } |
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403 |
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404 /* Define the offset between two registers, one to be eliminated, |
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405 and the other its replacement, at the start of a routine. */ |
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406 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ |
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407 ((OFFSET) = pa_initial_elimination_offset(FROM, TO)) |
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408 |
0 | 409 /* Describe how we implement __builtin_eh_return. */ |
410 #define EH_RETURN_DATA_REGNO(N) \ | |
411 ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM) | |
412 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29) | |
413 #define EH_RETURN_HANDLER_RTX pa_eh_return_handler_rtx () | |
414 | |
415 /* Offset from the frame pointer register value to the top of stack. */ | |
416 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0 | |
417 | |
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418 /* The maximum number of hard registers that can be saved in the call |
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419 frame. The soft frame pointer is not included. */ |
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420 #define DWARF_FRAME_REGISTERS (FIRST_PSEUDO_REGISTER - 1) |
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421 |
0 | 422 /* A C expression whose value is RTL representing the location of the |
423 incoming return address at the beginning of any function, before the | |
424 prologue. You only need to define this macro if you want to support | |
425 call frame debugging information like that provided by DWARF 2. */ | |
426 #define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2)) | |
427 #define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2)) | |
428 | |
429 /* A C expression whose value is an integer giving a DWARF 2 column | |
430 number that may be used as an alternate return column. This should | |
431 be defined only if DWARF_FRAME_RETURN_COLUMN is set to a general | |
432 register, but an alternate column needs to be used for signal frames. | |
433 | |
434 Column 0 is not used but unfortunately its register size is set to | |
435 4 bytes (sizeof CCmode) so it can't be used on 64-bit targets. */ | |
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436 #define DWARF_ALT_FRAME_RETURN_COLUMN (FIRST_PSEUDO_REGISTER - 1) |
0 | 437 |
438 /* This macro chooses the encoding of pointers embedded in the exception | |
439 handling sections. If at all possible, this should be defined such | |
440 that the exception handling section will not require dynamic relocations, | |
441 and so may be read-only. | |
442 | |
443 Because the HP assembler auto aligns, it is necessary to use | |
444 DW_EH_PE_aligned. It's not possible to make the data read-only | |
445 on the HP-UX SOM port since the linker requires fixups for label | |
446 differences in different sections to be word aligned. However, | |
447 the SOM linker can do unaligned fixups for absolute pointers. | |
448 We also need aligned pointers for global and function pointers. | |
449 | |
450 Although the HP-UX 64-bit ELF linker can handle unaligned pc-relative | |
451 fixups, the runtime doesn't have a consistent relationship between | |
452 text and data for dynamically loaded objects. Thus, it's not possible | |
453 to use pc-relative encoding for pointers on this target. It may be | |
454 possible to use segment relative encodings but GAS doesn't currently | |
455 have a mechanism to generate these encodings. For other targets, we | |
456 use pc-relative encoding for pointers. If the pointer might require | |
457 dynamic relocation, we make it indirect. */ | |
458 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \ | |
459 (TARGET_GAS && !TARGET_HPUX \ | |
460 ? (DW_EH_PE_pcrel \ | |
461 | ((GLOBAL) || (CODE) == 2 ? DW_EH_PE_indirect : 0) \ | |
462 | (TARGET_64BIT ? DW_EH_PE_sdata8 : DW_EH_PE_sdata4)) \ | |
463 : (!TARGET_GAS || (GLOBAL) || (CODE) == 2 \ | |
464 ? DW_EH_PE_aligned : DW_EH_PE_absptr)) | |
465 | |
466 /* Handle special EH pointer encodings. Absolute, pc-relative, and | |
467 indirect are handled automatically. We output pc-relative, and | |
468 indirect pc-relative ourself since we need some special magic to | |
469 generate pc-relative relocations, and to handle indirect function | |
470 pointers. */ | |
471 #define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \ | |
472 do { \ | |
473 if (((ENCODING) & 0x70) == DW_EH_PE_pcrel) \ | |
474 { \ | |
475 fputs (integer_asm_op (SIZE, FALSE), FILE); \ | |
476 if ((ENCODING) & DW_EH_PE_indirect) \ | |
477 output_addr_const (FILE, get_deferred_plabel (ADDR)); \ | |
478 else \ | |
479 assemble_name (FILE, XSTR ((ADDR), 0)); \ | |
480 fputs ("+8-$PIC_pcrel$0", FILE); \ | |
481 goto DONE; \ | |
482 } \ | |
483 } while (0) | |
484 | |
485 | |
486 /* The class value for index registers, and the one for base regs. */ | |
487 #define INDEX_REG_CLASS GENERAL_REGS | |
488 #define BASE_REG_CLASS GENERAL_REGS | |
489 | |
490 #define FP_REG_CLASS_P(CLASS) \ | |
491 ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS) | |
492 | |
493 /* True if register is floating-point. */ | |
494 #define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST) | |
495 | |
496 #define MAYBE_FP_REG_CLASS_P(CLASS) \ | |
497 reg_classes_intersect_p ((CLASS), FP_REGS) | |
498 | |
499 | |
500 /* Stack layout; function entry, exit and calling. */ | |
501 | |
502 /* Define this if pushing a word on the stack | |
503 makes the stack pointer a smaller address. */ | |
504 /* #define STACK_GROWS_DOWNWARD */ | |
505 | |
506 /* Believe it or not. */ | |
507 #define ARGS_GROW_DOWNWARD | |
508 | |
509 /* Define this to nonzero if the nominal address of the stack frame | |
510 is at the high-address end of the local variables; | |
511 that is, each additional local variable allocated | |
512 goes at a more negative offset in the frame. */ | |
513 #define FRAME_GROWS_DOWNWARD 0 | |
514 | |
515 /* Offset within stack frame to start allocating local variables at. | |
516 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
517 first local allocated. Otherwise, it is the offset to the BEGINNING | |
518 of the first local allocated. | |
519 | |
520 On the 32-bit ports, we reserve one slot for the previous frame | |
521 pointer and one fill slot. The fill slot is for compatibility | |
522 with HP compiled programs. On the 64-bit ports, we reserve one | |
523 slot for the previous frame pointer. */ | |
524 #define STARTING_FRAME_OFFSET 8 | |
525 | |
526 /* Define STACK_ALIGNMENT_NEEDED to zero to disable final alignment | |
527 of the stack. The default is to align it to STACK_BOUNDARY. */ | |
528 #define STACK_ALIGNMENT_NEEDED 0 | |
529 | |
530 /* If we generate an insn to push BYTES bytes, | |
531 this says how many the stack pointer really advances by. | |
532 On the HP-PA, don't define this because there are no push insns. */ | |
533 /* #define PUSH_ROUNDING(BYTES) */ | |
534 | |
535 /* Offset of first parameter from the argument pointer register value. | |
536 This value will be negated because the arguments grow down. | |
537 Also note that on STACK_GROWS_UPWARD machines (such as this one) | |
538 this is the distance from the frame pointer to the end of the first | |
539 argument, not it's beginning. To get the real offset of the first | |
540 argument, the size of the argument must be added. */ | |
541 | |
542 #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32) | |
543 | |
544 /* When a parameter is passed in a register, stack space is still | |
545 allocated for it. */ | |
546 #define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16) | |
547 | |
548 /* Define this if the above stack space is to be considered part of the | |
549 space allocated by the caller. */ | |
550 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 | |
551 | |
552 /* Keep the stack pointer constant throughout the function. | |
553 This is both an optimization and a necessity: longjmp | |
554 doesn't behave itself when the stack pointer moves within | |
555 the function! */ | |
556 #define ACCUMULATE_OUTGOING_ARGS 1 | |
557 | |
558 /* The weird HPPA calling conventions require a minimum of 48 bytes on | |
559 the stack: 16 bytes for register saves, and 32 bytes for magic. | |
560 This is the difference between the logical top of stack and the | |
561 actual sp. | |
562 | |
563 On the 64-bit port, the HP C compiler allocates a 48-byte frame | |
564 marker, although the runtime documentation only describes a 16 | |
565 byte marker. For compatibility, we allocate 48 bytes. */ | |
566 #define STACK_POINTER_OFFSET \ | |
567 (TARGET_64BIT ? -(crtl->outgoing_args_size + 48): -32) | |
568 | |
569 #define STACK_DYNAMIC_OFFSET(FNDECL) \ | |
570 (TARGET_64BIT \ | |
571 ? (STACK_POINTER_OFFSET) \ | |
572 : ((STACK_POINTER_OFFSET) - crtl->outgoing_args_size)) | |
573 | |
574 | |
575 /* Define a data type for recording info about an argument list | |
576 during the scan of that argument list. This data type should | |
577 hold all necessary information about the function itself | |
578 and about the args processed so far, enough to enable macros | |
579 such as FUNCTION_ARG to determine where the next arg should go. | |
580 | |
581 On the HP-PA, the WORDS field holds the number of words | |
582 of arguments scanned so far (including the invisible argument, | |
583 if any, which holds the structure-value-address). Thus, 4 or | |
584 more means all following args should go on the stack. | |
585 | |
586 The INCOMING field tracks whether this is an "incoming" or | |
587 "outgoing" argument. | |
588 | |
589 The INDIRECT field indicates whether this is is an indirect | |
590 call or not. | |
591 | |
592 The NARGS_PROTOTYPE field indicates that an argument does not | |
593 have a prototype when it less than or equal to 0. */ | |
594 | |
595 struct hppa_args {int words, nargs_prototype, incoming, indirect; }; | |
596 | |
597 #define CUMULATIVE_ARGS struct hppa_args | |
598 | |
599 /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
600 for a call to a function whose data type is FNTYPE. | |
601 For a library call, FNTYPE is 0. */ | |
602 | |
603 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ | |
604 (CUM).words = 0, \ | |
605 (CUM).incoming = 0, \ | |
606 (CUM).indirect = (FNTYPE) && !(FNDECL), \ | |
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607 (CUM).nargs_prototype = (FNTYPE && prototype_p (FNTYPE) \ |
0 | 608 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \ |
609 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \ | |
610 || pa_return_in_memory (TREE_TYPE (FNTYPE), 0))) \ | |
611 : 0) | |
612 | |
613 | |
614 | |
615 /* Similar, but when scanning the definition of a procedure. We always | |
616 set NARGS_PROTOTYPE large so we never return a PARALLEL. */ | |
617 | |
618 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \ | |
619 (CUM).words = 0, \ | |
620 (CUM).incoming = 1, \ | |
621 (CUM).indirect = 0, \ | |
622 (CUM).nargs_prototype = 1000 | |
623 | |
624 /* Figure out the size in words of the function argument. The size | |
625 returned by this macro should always be greater than zero because | |
626 we pass variable and zero sized objects by reference. */ | |
627 | |
628 #define FUNCTION_ARG_SIZE(MODE, TYPE) \ | |
629 ((((MODE) != BLKmode \ | |
630 ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \ | |
631 : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
632 | |
633 /* Determine where to put an argument to a function. | |
634 Value is zero to push the argument on the stack, | |
635 or a hard register in which to store the argument. | |
636 | |
637 MODE is the argument's machine mode. | |
638 TYPE is the data type of the argument (as a tree). | |
639 This is null for libcalls where that information may | |
640 not be available. | |
641 CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
642 the preceding args and about the function being called. | |
643 NAMED is nonzero if this argument is a named parameter | |
644 (otherwise it is an extra parameter matching an ellipsis). | |
645 | |
646 On the HP-PA the first four words of args are normally in registers | |
647 and the rest are pushed. But any arg that won't entirely fit in regs | |
648 is pushed. | |
649 | |
650 Arguments passed in registers are either 1 or 2 words long. | |
651 | |
652 The caller must make a distinction between calls to explicitly named | |
653 functions and calls through pointers to functions -- the conventions | |
654 are different! Calls through pointers to functions only use general | |
655 registers for the first four argument words. | |
656 | |
657 Of course all this is different for the portable runtime model | |
658 HP wants everyone to use for ELF. Ugh. Here's a quick description | |
659 of how it's supposed to work. | |
660 | |
661 1) callee side remains unchanged. It expects integer args to be | |
662 in the integer registers, float args in the float registers and | |
663 unnamed args in integer registers. | |
664 | |
665 2) caller side now depends on if the function being called has | |
666 a prototype in scope (rather than if it's being called indirectly). | |
667 | |
668 2a) If there is a prototype in scope, then arguments are passed | |
669 according to their type (ints in integer registers, floats in float | |
670 registers, unnamed args in integer registers. | |
671 | |
672 2b) If there is no prototype in scope, then floating point arguments | |
673 are passed in both integer and float registers. egad. | |
674 | |
675 FYI: The portable parameter passing conventions are almost exactly like | |
676 the standard parameter passing conventions on the RS6000. That's why | |
677 you'll see lots of similar code in rs6000.h. */ | |
678 | |
679 /* If defined, a C expression which determines whether, and in which | |
680 direction, to pad out an argument with extra space. */ | |
681 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE)) | |
682 | |
683 /* Specify padding for the last element of a block move between registers | |
684 and memory. | |
685 | |
686 The 64-bit runtime specifies that objects need to be left justified | |
687 (i.e., the normal justification for a big endian target). The 32-bit | |
688 runtime specifies right justification for objects smaller than 64 bits. | |
689 We use a DImode register in the parallel for 5 to 7 byte structures | |
690 so that there is only one element. This allows the object to be | |
691 correctly padded. */ | |
692 #define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \ | |
693 function_arg_padding ((MODE), (TYPE)) | |
694 | |
695 | |
696 /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than | |
697 as assembly via FUNCTION_PROFILER. Just output a local label. | |
698 We can't use the function label because the GAS SOM target can't | |
699 handle the difference of a global symbol and a local symbol. */ | |
700 | |
701 #ifndef FUNC_BEGIN_PROLOG_LABEL | |
702 #define FUNC_BEGIN_PROLOG_LABEL "LFBP" | |
703 #endif | |
704 | |
705 #define FUNCTION_PROFILER(FILE, LABEL) \ | |
706 (*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL) | |
707 | |
708 #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no) | |
709 void hppa_profile_hook (int label_no); | |
710 | |
711 /* The profile counter if emitted must come before the prologue. */ | |
712 #define PROFILE_BEFORE_PROLOGUE 1 | |
713 | |
714 /* We never want final.c to emit profile counters. When profile | |
715 counters are required, we have to defer emitting them to the end | |
716 of the current file. */ | |
717 #define NO_PROFILE_COUNTERS 1 | |
718 | |
719 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
720 the stack pointer does not matter. The value is tested only in | |
721 functions that have frame pointers. | |
722 No definition is equivalent to always zero. */ | |
723 | |
724 extern int may_call_alloca; | |
725 | |
726 #define EXIT_IGNORE_STACK \ | |
727 (get_frame_size () != 0 \ | |
728 || cfun->calls_alloca || crtl->outgoing_args_size) | |
729 | |
730 /* Length in units of the trampoline for entering a nested function. */ | |
731 | |
732 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52) | |
733 | |
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734 /* Alignment required by the trampoline. */ |
0 | 735 |
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736 #define TRAMPOLINE_ALIGNMENT BITS_PER_WORD |
0 | 737 |
738 /* Minimum length of a cache line. A length of 16 will work on all | |
739 PA-RISC processors. All PA 1.1 processors have a cache line of | |
740 32 bytes. Most but not all PA 2.0 processors have a cache line | |
741 of 64 bytes. As cache flushes are expensive and we don't support | |
742 PA 1.0, we use a minimum length of 32. */ | |
743 | |
744 #define MIN_CACHELINE_SIZE 32 | |
745 | |
746 | |
747 /* Addressing modes, and classification of registers for them. | |
748 | |
749 Using autoincrement addressing modes on PA8000 class machines is | |
750 not profitable. */ | |
751 | |
752 #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000) | |
753 #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000) | |
754 | |
755 #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000) | |
756 #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000) | |
757 | |
758 /* Macros to check register numbers against specific register classes. */ | |
759 | |
760 /* The following macros assume that X is a hard or pseudo reg number. | |
761 They give nonzero only if X is a hard reg of the suitable class | |
762 or a pseudo reg currently allocated to a suitable hard reg. | |
763 Since they use reg_renumber, they are safe only once reg_renumber | |
764 has been allocated, which happens in local-alloc.c. */ | |
765 | |
766 #define REGNO_OK_FOR_INDEX_P(X) \ | |
767 ((X) && ((X) < 32 \ | |
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768 || ((X) == FRAME_POINTER_REGNUM) \ |
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769 || ((X) >= FIRST_PSEUDO_REGISTER \ |
0 | 770 && reg_renumber \ |
771 && (unsigned) reg_renumber[X] < 32))) | |
772 #define REGNO_OK_FOR_BASE_P(X) \ | |
773 ((X) && ((X) < 32 \ | |
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774 || ((X) == FRAME_POINTER_REGNUM) \ |
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775 || ((X) >= FIRST_PSEUDO_REGISTER \ |
0 | 776 && reg_renumber \ |
777 && (unsigned) reg_renumber[X] < 32))) | |
778 #define REGNO_OK_FOR_FP_P(X) \ | |
779 (FP_REGNO_P (X) \ | |
780 || (X >= FIRST_PSEUDO_REGISTER \ | |
781 && reg_renumber \ | |
782 && FP_REGNO_P (reg_renumber[X]))) | |
783 | |
784 /* Now macros that check whether X is a register and also, | |
785 strictly, whether it is in a specified class. | |
786 | |
787 These macros are specific to the HP-PA, and may be used only | |
788 in code for printing assembler insns and in conditions for | |
789 define_optimization. */ | |
790 | |
791 /* 1 if X is an fp register. */ | |
792 | |
793 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X))) | |
794 | |
795 /* Maximum number of registers that can appear in a valid memory address. */ | |
796 | |
797 #define MAX_REGS_PER_ADDRESS 2 | |
798 | |
799 /* Non-TLS symbolic references. */ | |
800 #define PA_SYMBOL_REF_TLS_P(RTX) \ | |
801 (GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0) | |
802 | |
803 /* Recognize any constant value that is a valid address except | |
804 for symbolic addresses. We get better CSE by rejecting them | |
805 here and allowing hppa_legitimize_address to break them up. We | |
806 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */ | |
807 | |
808 #define CONSTANT_ADDRESS_P(X) \ | |
809 ((GET_CODE (X) == LABEL_REF \ | |
810 || (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X)) \ | |
811 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ | |
812 || GET_CODE (X) == HIGH) \ | |
813 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X))) | |
814 | |
815 /* A C expression that is nonzero if we are using the new HP assembler. */ | |
816 | |
817 #ifndef NEW_HP_ASSEMBLER | |
818 #define NEW_HP_ASSEMBLER 0 | |
819 #endif | |
820 | |
821 /* The macros below define the immediate range for CONST_INTS on | |
822 the 64-bit port. Constants in this range can be loaded in three | |
823 instructions using a ldil/ldo/depdi sequence. Constants outside | |
824 this range are forced to the constant pool prior to reload. */ | |
825 | |
826 #define MAX_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) 32 << 31) | |
827 #define MIN_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) -32 << 31) | |
828 #define LEGITIMATE_64BIT_CONST_INT_P(X) \ | |
829 ((X) >= MIN_LEGIT_64BIT_CONST_INT && (X) < MAX_LEGIT_64BIT_CONST_INT) | |
830 | |
831 /* A C expression that is nonzero if X is a legitimate constant for an | |
832 immediate operand. | |
833 | |
834 We include all constant integers and constant doubles, but not | |
835 floating-point, except for floating-point zero. We reject LABEL_REFs | |
836 if we're not using gas or the new HP assembler. | |
837 | |
838 In 64-bit mode, we reject CONST_DOUBLES. We also reject CONST_INTS | |
839 that need more than three instructions to load prior to reload. This | |
840 limit is somewhat arbitrary. It takes three instructions to load a | |
841 CONST_INT from memory but two are memory accesses. It may be better | |
842 to increase the allowed range for CONST_INTS. We may also be able | |
843 to handle CONST_DOUBLES. */ | |
844 | |
845 #define LEGITIMATE_CONSTANT_P(X) \ | |
846 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \ | |
847 || (X) == CONST0_RTX (GET_MODE (X))) \ | |
848 && (NEW_HP_ASSEMBLER \ | |
849 || TARGET_GAS \ | |
850 || GET_CODE (X) != LABEL_REF) \ | |
851 && (!TARGET_64BIT \ | |
852 || GET_CODE (X) != CONST_DOUBLE) \ | |
853 && (!TARGET_64BIT \ | |
854 || HOST_BITS_PER_WIDE_INT <= 32 \ | |
855 || GET_CODE (X) != CONST_INT \ | |
856 || reload_in_progress \ | |
857 || reload_completed \ | |
858 || LEGITIMATE_64BIT_CONST_INT_P (INTVAL (X)) \ | |
859 || cint_ok_for_move (INTVAL (X))) \ | |
860 && !function_label_operand (X, VOIDmode)) | |
861 | |
862 /* Target flags set on a symbol_ref. */ | |
863 | |
864 /* Set by ASM_OUTPUT_SYMBOL_REF when a symbol_ref is output. */ | |
865 #define SYMBOL_FLAG_REFERENCED (1 << SYMBOL_FLAG_MACH_DEP_SHIFT) | |
866 #define SYMBOL_REF_REFERENCED_P(RTX) \ | |
867 ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_REFERENCED) != 0) | |
868 | |
869 /* Defines for constraints.md. */ | |
870 | |
871 /* Return 1 iff OP is a scaled or unscaled index address. */ | |
872 #define IS_INDEX_ADDR_P(OP) \ | |
873 (GET_CODE (OP) == PLUS \ | |
874 && GET_MODE (OP) == Pmode \ | |
875 && (GET_CODE (XEXP (OP, 0)) == MULT \ | |
876 || GET_CODE (XEXP (OP, 1)) == MULT \ | |
877 || (REG_P (XEXP (OP, 0)) \ | |
878 && REG_P (XEXP (OP, 1))))) | |
879 | |
880 /* Return 1 iff OP is a LO_SUM DLT address. */ | |
881 #define IS_LO_SUM_DLT_ADDR_P(OP) \ | |
882 (GET_CODE (OP) == LO_SUM \ | |
883 && GET_MODE (OP) == Pmode \ | |
884 && REG_P (XEXP (OP, 0)) \ | |
885 && REG_OK_FOR_BASE_P (XEXP (OP, 0)) \ | |
886 && GET_CODE (XEXP (OP, 1)) == UNSPEC) | |
887 | |
888 /* Nonzero if 14-bit offsets can be used for all loads and stores. | |
889 This is not possible when generating PA 1.x code as floating point | |
890 loads and stores only support 5-bit offsets. Note that we do not | |
891 forbid the use of 14-bit offsets in GO_IF_LEGITIMATE_ADDRESS. | |
892 Instead, we use pa_secondary_reload() to reload integer mode | |
893 REG+D memory addresses used in floating point loads and stores. | |
894 | |
895 FIXME: the ELF32 linker clobbers the LSB of the FP register number | |
896 in PA 2.0 floating-point insns with long displacements. This is | |
897 because R_PARISC_DPREL14WR and other relocations like it are not | |
898 yet supported by GNU ld. For now, we reject long displacements | |
899 on this target. */ | |
900 | |
901 #define INT14_OK_STRICT \ | |
902 (TARGET_SOFT_FLOAT \ | |
903 || TARGET_DISABLE_FPREGS \ | |
904 || (TARGET_PA_20 && !TARGET_ELF32)) | |
905 | |
906 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
907 and check its validity for a certain class. | |
908 We have two alternate definitions for each of them. | |
909 The usual definition accepts all pseudo regs; the other rejects | |
910 them unless they have been allocated suitable hard regs. | |
911 The symbol REG_OK_STRICT causes the latter definition to be used. | |
912 | |
913 Most source files want to accept pseudo regs in the hope that | |
914 they will get allocated to the class that the insn wants them to be in. | |
915 Source files for reload pass need to be strict. | |
916 After reload, it makes no difference, since pseudo regs have | |
917 been eliminated by then. */ | |
918 | |
919 #ifndef REG_OK_STRICT | |
920 | |
921 /* Nonzero if X is a hard reg that can be used as an index | |
922 or if it is a pseudo reg. */ | |
923 #define REG_OK_FOR_INDEX_P(X) \ | |
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924 (REGNO (X) && (REGNO (X) < 32 \ |
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925 || REGNO (X) == FRAME_POINTER_REGNUM \ |
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926 || REGNO (X) >= FIRST_PSEUDO_REGISTER)) |
0 | 927 |
928 /* Nonzero if X is a hard reg that can be used as a base reg | |
929 or if it is a pseudo reg. */ | |
930 #define REG_OK_FOR_BASE_P(X) \ | |
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931 (REGNO (X) && (REGNO (X) < 32 \ |
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932 || REGNO (X) == FRAME_POINTER_REGNUM \ |
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933 || REGNO (X) >= FIRST_PSEUDO_REGISTER)) |
0 | 934 |
935 #else | |
936 | |
937 /* Nonzero if X is a hard reg that can be used as an index. */ | |
938 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
939 | |
940 /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
941 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
942 | |
943 #endif | |
944 | |
945 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a | |
946 valid memory address for an instruction. The MODE argument is the | |
947 machine mode for the MEM expression that wants to use this address. | |
948 | |
949 On HP PA-RISC, the legitimate address forms are REG+SMALLINT, | |
950 REG+REG, and REG+(REG*SCALE). The indexed address forms are only | |
951 available with floating point loads and stores, and integer loads. | |
952 We get better code by allowing indexed addresses in the initial | |
953 RTL generation. | |
954 | |
955 The acceptance of indexed addresses as legitimate implies that we | |
956 must provide patterns for doing indexed integer stores, or the move | |
957 expanders must force the address of an indexed store to a register. | |
958 We have adopted the latter approach. | |
959 | |
960 Another function of GO_IF_LEGITIMATE_ADDRESS is to ensure that | |
961 the base register is a valid pointer for indexed instructions. | |
962 On targets that have non-equivalent space registers, we have to | |
963 know at the time of assembler output which register in a REG+REG | |
964 pair is the base register. The REG_POINTER flag is sometimes lost | |
965 in reload and the following passes, so it can't be relied on during | |
966 code generation. Thus, we either have to canonicalize the order | |
967 of the registers in REG+REG indexed addresses, or treat REG+REG | |
968 addresses separately and provide patterns for both permutations. | |
969 | |
970 The latter approach requires several hundred additional lines of | |
971 code in pa.md. The downside to canonicalizing is that a PLUS | |
972 in the wrong order can't combine to form to make a scaled indexed | |
973 memory operand. As we won't need to canonicalize the operands if | |
974 the REG_POINTER lossage can be fixed, it seems better canonicalize. | |
975 | |
976 We initially break out scaled indexed addresses in canonical order | |
977 in emit_move_sequence. LEGITIMIZE_ADDRESS also canonicalizes | |
978 scaled indexed addresses during RTL generation. However, fold_rtx | |
979 has its own opinion on how the operands of a PLUS should be ordered. | |
980 If one of the operands is equivalent to a constant, it will make | |
981 that operand the second operand. As the base register is likely to | |
982 be equivalent to a SYMBOL_REF, we have made it the second operand. | |
983 | |
984 GO_IF_LEGITIMATE_ADDRESS accepts REG+REG as legitimate when the | |
985 operands are in the order INDEX+BASE on targets with non-equivalent | |
986 space registers, and in any order on targets with equivalent space | |
987 registers. It accepts both MULT+BASE and BASE+MULT for scaled indexing. | |
988 | |
989 We treat a SYMBOL_REF as legitimate if it is part of the current | |
990 function's constant-pool, because such addresses can actually be | |
991 output as REG+SMALLINT. */ | |
992 | |
993 #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20) | |
994 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X)) | |
995 | |
996 #define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20) | |
997 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X)) | |
998 | |
999 #define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800) | |
1000 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X)) | |
1001 | |
1002 #define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000) | |
1003 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X)) | |
1004 | |
1005 #if HOST_BITS_PER_WIDE_INT > 32 | |
1006 #define VAL_32_BITS_P(X) \ | |
1007 ((unsigned HOST_WIDE_INT)(X) + ((unsigned HOST_WIDE_INT) 1 << 31) \ | |
1008 < (unsigned HOST_WIDE_INT) 2 << 31) | |
1009 #else | |
1010 #define VAL_32_BITS_P(X) 1 | |
1011 #endif | |
1012 #define INT_32_BITS(X) VAL_32_BITS_P (INTVAL (X)) | |
1013 | |
1014 /* These are the modes that we allow for scaled indexing. */ | |
1015 #define MODE_OK_FOR_SCALED_INDEXING_P(MODE) \ | |
1016 ((TARGET_64BIT && (MODE) == DImode) \ | |
1017 || (MODE) == SImode \ | |
1018 || (MODE) == HImode \ | |
1019 || (MODE) == SFmode \ | |
1020 || (MODE) == DFmode) | |
1021 | |
1022 /* These are the modes that we allow for unscaled indexing. */ | |
1023 #define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \ | |
1024 ((TARGET_64BIT && (MODE) == DImode) \ | |
1025 || (MODE) == SImode \ | |
1026 || (MODE) == HImode \ | |
1027 || (MODE) == QImode \ | |
1028 || (MODE) == SFmode \ | |
1029 || (MODE) == DFmode) | |
1030 | |
1031 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
1032 { \ | |
1033 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \ | |
1034 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \ | |
1035 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \ | |
1036 && REG_P (XEXP (X, 0)) \ | |
1037 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \ | |
1038 goto ADDR; \ | |
1039 else if (GET_CODE (X) == PLUS) \ | |
1040 { \ | |
1041 rtx base = 0, index = 0; \ | |
1042 if (REG_P (XEXP (X, 1)) \ | |
1043 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \ | |
1044 base = XEXP (X, 1), index = XEXP (X, 0); \ | |
1045 else if (REG_P (XEXP (X, 0)) \ | |
1046 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \ | |
1047 base = XEXP (X, 0), index = XEXP (X, 1); \ | |
1048 if (base \ | |
1049 && GET_CODE (index) == CONST_INT \ | |
1050 && ((INT_14_BITS (index) \ | |
1051 && (((MODE) != DImode \ | |
1052 && (MODE) != SFmode \ | |
1053 && (MODE) != DFmode) \ | |
1054 /* The base register for DImode loads and stores \ | |
1055 with long displacements must be aligned because \ | |
1056 the lower three bits in the displacement are \ | |
1057 assumed to be zero. */ \ | |
1058 || ((MODE) == DImode \ | |
1059 && (!TARGET_64BIT \ | |
1060 || (INTVAL (index) % 8) == 0)) \ | |
1061 /* Similarly, the base register for SFmode/DFmode \ | |
1062 loads and stores with long displacements must \ | |
1063 be aligned. */ \ | |
1064 || (((MODE) == SFmode || (MODE) == DFmode) \ | |
1065 && INT14_OK_STRICT \ | |
1066 && (INTVAL (index) % GET_MODE_SIZE (MODE)) == 0))) \ | |
1067 || INT_5_BITS (index))) \ | |
1068 goto ADDR; \ | |
1069 if (!TARGET_DISABLE_INDEXING \ | |
1070 /* Only accept the "canonical" INDEX+BASE operand order \ | |
1071 on targets with non-equivalent space registers. */ \ | |
1072 && (TARGET_NO_SPACE_REGS \ | |
1073 ? (base && REG_P (index)) \ | |
1074 : (base == XEXP (X, 1) && REG_P (index) \ | |
1075 && (reload_completed \ | |
1076 || (reload_in_progress && HARD_REGISTER_P (base)) \ | |
1077 || REG_POINTER (base)) \ | |
1078 && (reload_completed \ | |
1079 || (reload_in_progress && HARD_REGISTER_P (index)) \ | |
1080 || !REG_POINTER (index)))) \ | |
1081 && MODE_OK_FOR_UNSCALED_INDEXING_P (MODE) \ | |
1082 && REG_OK_FOR_INDEX_P (index) \ | |
1083 && borx_reg_operand (base, Pmode) \ | |
1084 && borx_reg_operand (index, Pmode)) \ | |
1085 goto ADDR; \ | |
1086 if (!TARGET_DISABLE_INDEXING \ | |
1087 && base \ | |
1088 && GET_CODE (index) == MULT \ | |
1089 && MODE_OK_FOR_SCALED_INDEXING_P (MODE) \ | |
1090 && REG_P (XEXP (index, 0)) \ | |
1091 && GET_MODE (XEXP (index, 0)) == Pmode \ | |
1092 && REG_OK_FOR_INDEX_P (XEXP (index, 0)) \ | |
1093 && GET_CODE (XEXP (index, 1)) == CONST_INT \ | |
1094 && INTVAL (XEXP (index, 1)) \ | |
1095 == (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \ | |
1096 && borx_reg_operand (base, Pmode)) \ | |
1097 goto ADDR; \ | |
1098 } \ | |
1099 else if (GET_CODE (X) == LO_SUM \ | |
1100 && GET_CODE (XEXP (X, 0)) == REG \ | |
1101 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1102 && CONSTANT_P (XEXP (X, 1)) \ | |
1103 && (TARGET_SOFT_FLOAT \ | |
1104 /* We can allow symbolic LO_SUM addresses for PA2.0. */ \ | |
1105 || (TARGET_PA_20 \ | |
1106 && !TARGET_ELF32 \ | |
1107 && GET_CODE (XEXP (X, 1)) != CONST_INT) \ | |
1108 || ((MODE) != SFmode \ | |
1109 && (MODE) != DFmode))) \ | |
1110 goto ADDR; \ | |
1111 else if (GET_CODE (X) == LO_SUM \ | |
1112 && GET_CODE (XEXP (X, 0)) == SUBREG \ | |
1113 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG \ | |
1114 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0))) \ | |
1115 && CONSTANT_P (XEXP (X, 1)) \ | |
1116 && (TARGET_SOFT_FLOAT \ | |
1117 /* We can allow symbolic LO_SUM addresses for PA2.0. */ \ | |
1118 || (TARGET_PA_20 \ | |
1119 && !TARGET_ELF32 \ | |
1120 && GET_CODE (XEXP (X, 1)) != CONST_INT) \ | |
1121 || ((MODE) != SFmode \ | |
1122 && (MODE) != DFmode))) \ | |
1123 goto ADDR; \ | |
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1124 else if (GET_CODE (X) == CONST_INT && INT_5_BITS (X)) \ |
0 | 1125 goto ADDR; \ |
1126 /* Needed for -fPIC */ \ | |
1127 else if (GET_CODE (X) == LO_SUM \ | |
1128 && GET_CODE (XEXP (X, 0)) == REG \ | |
1129 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1130 && GET_CODE (XEXP (X, 1)) == UNSPEC \ | |
1131 && (TARGET_SOFT_FLOAT \ | |
1132 || (TARGET_PA_20 && !TARGET_ELF32) \ | |
1133 || ((MODE) != SFmode \ | |
1134 && (MODE) != DFmode))) \ | |
1135 goto ADDR; \ | |
1136 } | |
1137 | |
1138 /* Look for machine dependent ways to make the invalid address AD a | |
1139 valid address. | |
1140 | |
1141 For the PA, transform: | |
1142 | |
1143 memory(X + <large int>) | |
1144 | |
1145 into: | |
1146 | |
1147 if (<large int> & mask) >= 16 | |
1148 Y = (<large int> & ~mask) + mask + 1 Round up. | |
1149 else | |
1150 Y = (<large int> & ~mask) Round down. | |
1151 Z = X + Y | |
1152 memory (Z + (<large int> - Y)); | |
1153 | |
1154 This makes reload inheritance and reload_cse work better since Z | |
1155 can be reused. | |
1156 | |
1157 There may be more opportunities to improve code with this hook. */ | |
1158 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \ | |
1159 do { \ | |
1160 long offset, newoffset, mask; \ | |
1161 rtx new_rtx, temp = NULL_RTX; \ | |
1162 \ | |
1163 mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
1164 ? (INT14_OK_STRICT ? 0x3fff : 0x1f) : 0x3fff); \ | |
1165 \ | |
1166 if (optimize && GET_CODE (AD) == PLUS) \ | |
1167 temp = simplify_binary_operation (PLUS, Pmode, \ | |
1168 XEXP (AD, 0), XEXP (AD, 1)); \ | |
1169 \ | |
1170 new_rtx = temp ? temp : AD; \ | |
1171 \ | |
1172 if (optimize \ | |
1173 && GET_CODE (new_rtx) == PLUS \ | |
1174 && GET_CODE (XEXP (new_rtx, 0)) == REG \ | |
1175 && GET_CODE (XEXP (new_rtx, 1)) == CONST_INT) \ | |
1176 { \ | |
1177 offset = INTVAL (XEXP ((new_rtx), 1)); \ | |
1178 \ | |
1179 /* Choose rounding direction. Round up if we are >= halfway. */ \ | |
1180 if ((offset & mask) >= ((mask + 1) / 2)) \ | |
1181 newoffset = (offset & ~mask) + mask + 1; \ | |
1182 else \ | |
1183 newoffset = offset & ~mask; \ | |
1184 \ | |
1185 /* Ensure that long displacements are aligned. */ \ | |
1186 if (mask == 0x3fff \ | |
1187 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
1188 || (TARGET_64BIT && (MODE) == DImode))) \ | |
1189 newoffset &= ~(GET_MODE_SIZE (MODE) - 1); \ | |
1190 \ | |
1191 if (newoffset != 0 && VAL_14_BITS_P (newoffset)) \ | |
1192 { \ | |
1193 temp = gen_rtx_PLUS (Pmode, XEXP (new_rtx, 0), \ | |
1194 GEN_INT (newoffset)); \ | |
1195 AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\ | |
1196 push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \ | |
1197 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \ | |
1198 (OPNUM), (TYPE)); \ | |
1199 goto WIN; \ | |
1200 } \ | |
1201 } \ | |
1202 } while (0) | |
1203 | |
1204 | |
1205 | |
1206 #define TARGET_ASM_SELECT_SECTION pa_select_section | |
1207 | |
1208 /* Return a nonzero value if DECL has a section attribute. */ | |
1209 #define IN_NAMED_SECTION_P(DECL) \ | |
1210 ((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \ | |
1211 && DECL_SECTION_NAME (DECL) != NULL_TREE) | |
1212 | |
1213 /* Define this macro if references to a symbol must be treated | |
1214 differently depending on something about the variable or | |
1215 function named by the symbol (such as what section it is in). | |
1216 | |
1217 The macro definition, if any, is executed immediately after the | |
1218 rtl for DECL or other node is created. | |
1219 The value of the rtl will be a `mem' whose address is a | |
1220 `symbol_ref'. | |
1221 | |
1222 The usual thing for this macro to do is to a flag in the | |
1223 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified | |
1224 name string in the `symbol_ref' (if one bit is not enough | |
1225 information). | |
1226 | |
1227 On the HP-PA we use this to indicate if a symbol is in text or | |
1228 data space. Also, function labels need special treatment. */ | |
1229 | |
1230 #define TEXT_SPACE_P(DECL)\ | |
1231 (TREE_CODE (DECL) == FUNCTION_DECL \ | |
1232 || (TREE_CODE (DECL) == VAR_DECL \ | |
1233 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \ | |
1234 && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \ | |
1235 && !flag_pic) \ | |
1236 || CONSTANT_CLASS_P (DECL)) | |
1237 | |
1238 #define FUNCTION_NAME_P(NAME) (*(NAME) == '@') | |
1239 | |
1240 /* Specify the machine mode that this machine uses for the index in the | |
1241 tablejump instruction. For small tables, an element consists of a | |
1242 ia-relative branch and its delay slot. When -mbig-switch is specified, | |
1243 we use a 32-bit absolute address for non-pic code, and a 32-bit offset | |
1244 for both 32 and 64-bit pic code. */ | |
1245 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : DImode) | |
1246 | |
1247 /* Jump tables must be 32-bit aligned, no matter the size of the element. */ | |
1248 #define ADDR_VEC_ALIGN(ADDR_VEC) 2 | |
1249 | |
1250 /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
1251 #define DEFAULT_SIGNED_CHAR 1 | |
1252 | |
1253 /* Max number of bytes we can move from memory to memory | |
1254 in one reasonably fast instruction. */ | |
1255 #define MOVE_MAX 8 | |
1256 | |
1257 /* Higher than the default as we prefer to use simple move insns | |
1258 (better scheduling and delay slot filling) and because our | |
1259 built-in block move is really a 2X unrolled loop. | |
1260 | |
1261 Believe it or not, this has to be big enough to allow for copying all | |
1262 arguments passed in registers to avoid infinite recursion during argument | |
1263 setup for a function call. Why? Consider how we copy the stack slots | |
1264 reserved for parameters when they may be trashed by a call. */ | |
1265 #define MOVE_RATIO(speed) (TARGET_64BIT ? 8 : 4) | |
1266 | |
1267 /* Define if operations between registers always perform the operation | |
1268 on the full register even if a narrower mode is specified. */ | |
1269 #define WORD_REGISTER_OPERATIONS | |
1270 | |
1271 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1272 will either zero-extend or sign-extend. The value of this macro should | |
1273 be the code that says which one of the two operations is implicitly | |
1274 done, UNKNOWN if none. */ | |
1275 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
1276 | |
1277 /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
1278 #define SLOW_BYTE_ACCESS 1 | |
1279 | |
1280 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
1281 is done just by pretending it is already truncated. */ | |
1282 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1283 | |
1284 /* Specify the machine mode that pointers have. | |
1285 After generation of rtl, the compiler makes no further distinction | |
1286 between pointers and any other objects of this machine mode. */ | |
1287 #define Pmode word_mode | |
1288 | |
1289 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, | |
1290 return the mode to be used for the comparison. For floating-point, CCFPmode | |
1291 should be used. CC_NOOVmode should be used when the first operand is a | |
1292 PLUS, MINUS, or NEG. CCmode should be used when no special processing is | |
1293 needed. */ | |
1294 #define SELECT_CC_MODE(OP,X,Y) \ | |
1295 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \ | |
1296 | |
1297 /* A function address in a call instruction | |
1298 is a byte address (for indexing purposes) | |
1299 so give the MEM rtx a byte's mode. */ | |
1300 #define FUNCTION_MODE SImode | |
1301 | |
1302 /* Define this if addresses of constant functions | |
1303 shouldn't be put through pseudo regs where they can be cse'd. | |
1304 Desirable on machines where ordinary constants are expensive | |
1305 but a CALL with constant address is cheap. */ | |
1306 #define NO_FUNCTION_CSE | |
1307 | |
1308 /* Define this to be nonzero if shift instructions ignore all but the low-order | |
1309 few bits. */ | |
1310 #define SHIFT_COUNT_TRUNCATED 1 | |
1311 | |
1312 /* Adjust the cost of branches. */ | |
1313 #define BRANCH_COST(speed_p, predictable_p) (pa_cpu == PROCESSOR_8000 ? 2 : 1) | |
1314 | |
1315 /* Handling the special cases is going to get too complicated for a macro, | |
1316 just call `pa_adjust_insn_length' to do the real work. */ | |
1317 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \ | |
1318 LENGTH += pa_adjust_insn_length (INSN, LENGTH); | |
1319 | |
1320 /* Millicode insns are actually function calls with some special | |
1321 constraints on arguments and register usage. | |
1322 | |
1323 Millicode calls always expect their arguments in the integer argument | |
1324 registers, and always return their result in %r29 (ret1). They | |
1325 are expected to clobber their arguments, %r1, %r29, and the return | |
1326 pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else. | |
1327 | |
1328 This macro tells reorg that the references to arguments and | |
1329 millicode calls do not appear to happen until after the millicode call. | |
1330 This allows reorg to put insns which set the argument registers into the | |
1331 delay slot of the millicode call -- thus they act more like traditional | |
1332 CALL_INSNs. | |
1333 | |
1334 Note we cannot consider side effects of the insn to be delayed because | |
1335 the branch and link insn will clobber the return pointer. If we happened | |
1336 to use the return pointer in the delay slot of the call, then we lose. | |
1337 | |
1338 get_attr_type will try to recognize the given insn, so make sure to | |
1339 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns | |
1340 in particular. */ | |
1341 #define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X)) | |
1342 | |
1343 | |
1344 /* Control the assembler format that we output. */ | |
1345 | |
1346 /* A C string constant describing how to begin a comment in the target | |
1347 assembler language. The compiler assumes that the comment will end at | |
1348 the end of the line. */ | |
1349 | |
1350 #define ASM_COMMENT_START ";" | |
1351 | |
1352 /* Output to assembler file text saying following lines | |
1353 may contain character constants, extra white space, comments, etc. */ | |
1354 | |
1355 #define ASM_APP_ON "" | |
1356 | |
1357 /* Output to assembler file text saying following lines | |
1358 no longer contain unusual constructs. */ | |
1359 | |
1360 #define ASM_APP_OFF "" | |
1361 | |
1362 /* This is how to output the definition of a user-level label named NAME, | |
1363 such as the label on a static function or variable NAME. */ | |
1364 | |
1365 #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
1366 do { \ | |
1367 assemble_name ((FILE), (NAME)); \ | |
1368 if (TARGET_GAS) \ | |
1369 fputs (":\n", (FILE)); \ | |
1370 else \ | |
1371 fputc ('\n', (FILE)); \ | |
1372 } while (0) | |
1373 | |
1374 /* This is how to output a reference to a user-level label named NAME. | |
1375 `assemble_name' uses this. */ | |
1376 | |
1377 #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
1378 do { \ | |
1379 const char *xname = (NAME); \ | |
1380 if (FUNCTION_NAME_P (NAME)) \ | |
1381 xname += 1; \ | |
1382 if (xname[0] == '*') \ | |
1383 xname += 1; \ | |
1384 else \ | |
1385 fputs (user_label_prefix, FILE); \ | |
1386 fputs (xname, FILE); \ | |
1387 } while (0) | |
1388 | |
1389 /* This how we output the symbol_ref X. */ | |
1390 | |
1391 #define ASM_OUTPUT_SYMBOL_REF(FILE,X) \ | |
1392 do { \ | |
1393 SYMBOL_REF_FLAGS (X) |= SYMBOL_FLAG_REFERENCED; \ | |
1394 assemble_name (FILE, XSTR (X, 0)); \ | |
1395 } while (0) | |
1396 | |
1397 /* This is how to store into the string LABEL | |
1398 the symbol_ref name of an internal numbered label where | |
1399 PREFIX is the class of label and NUM is the number within the class. | |
1400 This is suitable for output with `assemble_name'. */ | |
1401 | |
1402 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
1403 sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM)) | |
1404 | |
1405 /* Output the definition of a compiler-generated label named NAME. */ | |
1406 | |
1407 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,NAME) \ | |
1408 do { \ | |
1409 assemble_name_raw ((FILE), (NAME)); \ | |
1410 if (TARGET_GAS) \ | |
1411 fputs (":\n", (FILE)); \ | |
1412 else \ | |
1413 fputc ('\n', (FILE)); \ | |
1414 } while (0) | |
1415 | |
1416 #define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label | |
1417 | |
1418 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \ | |
1419 output_ascii ((FILE), (P), (SIZE)) | |
1420 | |
1421 /* Jump tables are always placed in the text section. Technically, it | |
1422 is possible to put them in the readonly data section when -mbig-switch | |
1423 is specified. This has the benefit of getting the table out of .text | |
1424 and reducing branch lengths as a result. The downside is that an | |
1425 additional insn (addil) is needed to access the table when generating | |
1426 PIC code. The address difference table also has to use 32-bit | |
1427 pc-relative relocations. Currently, GAS does not support these | |
1428 relocations, although it is easily modified to do this operation. | |
1429 The table entries need to look like "$L1+(.+8-$L0)-$PIC_pcrel$0" | |
1430 when using ELF GAS. A simple difference can be used when using | |
1431 SOM GAS or the HP assembler. The final downside is GDB complains | |
1432 about the nesting of the label for the table when debugging. */ | |
1433 | |
1434 #define JUMP_TABLES_IN_TEXT_SECTION 1 | |
1435 | |
1436 /* This is how to output an element of a case-vector that is absolute. */ | |
1437 | |
1438 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
1439 if (TARGET_BIG_SWITCH) \ | |
1440 fprintf (FILE, "\t.word L$%04d\n", VALUE); \ | |
1441 else \ | |
1442 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE) | |
1443 | |
1444 /* This is how to output an element of a case-vector that is relative. | |
1445 Since we always place jump tables in the text section, the difference | |
1446 is absolute and requires no relocation. */ | |
1447 | |
1448 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ | |
1449 if (TARGET_BIG_SWITCH) \ | |
1450 fprintf (FILE, "\t.word L$%04d-L$%04d\n", VALUE, REL); \ | |
1451 else \ | |
1452 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE) | |
1453 | |
1454 /* This is how to output an assembler line that says to advance the | |
1455 location counter to a multiple of 2**LOG bytes. */ | |
1456 | |
1457 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
1458 fprintf (FILE, "\t.align %d\n", (1<<(LOG))) | |
1459 | |
1460 #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
1461 fprintf (FILE, "\t.blockz "HOST_WIDE_INT_PRINT_UNSIGNED"\n", \ | |
1462 (unsigned HOST_WIDE_INT)(SIZE)) | |
1463 | |
1464 /* This says how to output an assembler line to define an uninitialized | |
1465 global variable with size SIZE (in bytes) and alignment ALIGN (in bits). | |
1466 This macro exists to properly support languages like C++ which do not | |
1467 have common data. */ | |
1468 | |
1469 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ | |
1470 pa_asm_output_aligned_bss (FILE, NAME, SIZE, ALIGN) | |
1471 | |
1472 /* This says how to output an assembler line to define a global common symbol | |
1473 with size SIZE (in bytes) and alignment ALIGN (in bits). */ | |
1474 | |
1475 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ | |
1476 pa_asm_output_aligned_common (FILE, NAME, SIZE, ALIGN) | |
1477 | |
1478 /* This says how to output an assembler line to define a local common symbol | |
1479 with size SIZE (in bytes) and alignment ALIGN (in bits). This macro | |
1480 controls how the assembler definitions of uninitialized static variables | |
1481 are output. */ | |
1482 | |
1483 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ | |
1484 pa_asm_output_aligned_local (FILE, NAME, SIZE, ALIGN) | |
1485 | |
1486 /* All HP assemblers use "!" to separate logical lines. */ | |
1487 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '!') | |
1488 | |
1489 /* Print operand X (an rtx) in assembler syntax to file FILE. | |
1490 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
1491 For `%' followed by punctuation, CODE is the punctuation and X is null. | |
1492 | |
1493 On the HP-PA, the CODE can be `r', meaning this is a register-only operand | |
1494 and an immediate zero should be represented as `r0'. | |
1495 | |
1496 Several % codes are defined: | |
1497 O an operation | |
1498 C compare conditions | |
1499 N extract conditions | |
1500 M modifier to handle preincrement addressing for memory refs. | |
1501 F modifier to handle preincrement addressing for fp memory refs */ | |
1502 | |
1503 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
1504 | |
1505 | |
1506 /* Print a memory address as an operand to reference that memory location. */ | |
1507 | |
1508 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
1509 { rtx addr = ADDR; \ | |
1510 switch (GET_CODE (addr)) \ | |
1511 { \ | |
1512 case REG: \ | |
1513 fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \ | |
1514 break; \ | |
1515 case PLUS: \ | |
1516 gcc_assert (GET_CODE (XEXP (addr, 1)) == CONST_INT); \ | |
1517 fprintf (FILE, "%d(%s)", (int)INTVAL (XEXP (addr, 1)), \ | |
1518 reg_names [REGNO (XEXP (addr, 0))]); \ | |
1519 break; \ | |
1520 case LO_SUM: \ | |
1521 if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \ | |
1522 fputs ("R'", FILE); \ | |
1523 else if (flag_pic == 0) \ | |
1524 fputs ("RR'", FILE); \ | |
1525 else \ | |
1526 fputs ("RT'", FILE); \ | |
1527 output_global_address (FILE, XEXP (addr, 1), 0); \ | |
1528 fputs ("(", FILE); \ | |
1529 output_operand (XEXP (addr, 0), 0); \ | |
1530 fputs (")", FILE); \ | |
1531 break; \ | |
1532 case CONST_INT: \ | |
1533 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC "(%%r0)", INTVAL (addr)); \ | |
1534 break; \ | |
1535 default: \ | |
1536 output_addr_const (FILE, addr); \ | |
1537 }} | |
1538 | |
1539 | |
1540 /* Find the return address associated with the frame given by | |
1541 FRAMEADDR. */ | |
1542 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \ | |
1543 (return_addr_rtx (COUNT, FRAMEADDR)) | |
1544 | |
1545 /* Used to mask out junk bits from the return address, such as | |
1546 processor state, interrupt status, condition codes and the like. */ | |
1547 #define MASK_RETURN_ADDR \ | |
1548 /* The privilege level is in the two low order bits, mask em out \ | |
1549 of the return address. */ \ | |
1550 (GEN_INT (-4)) | |
1551 | |
1552 /* The number of Pmode words for the setjmp buffer. */ | |
1553 #define JMP_BUF_SIZE 50 | |
1554 | |
1555 /* We need a libcall to canonicalize function pointers on TARGET_ELF32. */ | |
1556 #define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \ | |
1557 "__canonicalize_funcptr_for_compare" | |
1558 | |
1559 #ifdef HAVE_AS_TLS | |
1560 #undef TARGET_HAVE_TLS | |
1561 #define TARGET_HAVE_TLS true | |
1562 #endif |